diff --git a/.gitignore b/.gitignore new file mode 100755 index 0000000..153b678 --- /dev/null +++ b/.gitignore @@ -0,0 +1,26 @@ +#ignore kicad backup files +*.bak +*.sch-bak +*.log +*.kicad_pcb-bak +#zipped gerbers +pcb/gerbers/*.zip +#ignore ltspice log files +simulation/*.log +simulation/*.plt +simulation/*.raw +simulation/*.net + +modeling/*.log +modeling/*.plt +modeling/*.raw +modeling/*.net +#femm files +modeling/*.edge +modeling/*.ans + +#osx files +*.DS_Store + + +firmware/B1-firmware.X/dist/ \ No newline at end of file diff --git a/doc/current-sense.pdf b/doc/current-sense.pdf new file mode 100644 index 0000000..ce561c3 Binary files /dev/null and b/doc/current-sense.pdf differ diff --git a/firmware/B1-firmware.X/Makefile b/firmware/B1-firmware.X/Makefile new file mode 100755 index 0000000..fca8e2c --- /dev/null +++ b/firmware/B1-firmware.X/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/firmware/B1-firmware.X/MyConfig.mc3 b/firmware/B1-firmware.X/MyConfig.mc3 new file mode 100755 index 0000000..32aca5c --- /dev/null +++ b/firmware/B1-firmware.X/MyConfig.mc3 @@ -0,0 +1,7696 @@ + + + + ADC + class com.microchip.mcc.mcu8.modules.adc.ADC + + + FVR + class com.microchip.mcc.mcu8.modules.fvr.FVR + + + WDT + class com.microchip.mcc.mcu8.systemManager.wdt.WDT + + + Pin Module + class com.microchip.mcc.mcu8.pinManager.PinManager + + + RESET + class com.microchip.mcc.mcu8.systemManager.reset.RESET + + + Interrupt Module + class com.microchip.mcc.mcu8.interruptManager.InterruptManager + + + DAC7 + class com.microchip.mcc.mcu8.modules.dac.DAC + + + System Module + class com.microchip.mcc.mcu8.systemManager.SystemManager + + + CMP5 + class com.microchip.mcc.mcu8.modules.cmp.CMP + + + DAC5 + class com.microchip.mcc.mcu8.modules.dac10bit.DAC10BIT + + + DAC4 + class com.microchip.mcc.mcu8.modules.dac.DAC + + + DAC3 + class com.microchip.mcc.mcu8.modules.dac.DAC + + + CMP2 + class com.microchip.mcc.mcu8.modules.cmp.CMP + + + CMP1 + class com.microchip.mcc.mcu8.modules.cmp.CMP + + + OPA1 + class com.microchip.mcc.mcu8.modules.opa.OPA + + + INTERNAL OSCILLATOR + class com.microchip.mcc.mcu8.systemManager.osc.Osc + + + DAC1 + class com.microchip.mcc.mcu8.modules.dac10bit.DAC10BIT + + + OPA2 + class com.microchip.mcc.mcu8.modules.opa.OPA + + + + + + + + + right justified + + + + clear + + + + right justified + + + + 1 + + + + 16 + + + + 1 + + + + 0 + + + + 0 + + + + 2 + + + + 1 + + + + analog + + + + 0 + + + + 1 + + + + disabled + + + + 1 + + + + 1.001 + + + + 0 + + + + 0 + + + + enabled + + + + 0 + + + + 1 + + + + 0 + + + + off + + + + 0 + + + + 1 + + + + 0 + + + + 1.000 + + + + VDD + + + + 15 + + + + 0 + + + + analog + + + + 1 + + + + 0 + + + + 3 + + + + 1 + + + + 0 + + + + 1 + + + + 0 + + + + 0 + + + + 0 + + + + disabled + + + + 0 + + + + disabled + + + + disabled + + + + disabled + + + + disabled + + + + disabled + + + + 0 + + + + 0 + + + + enabled + + + + disabled + + + + 1 + + + + 2 + + + + 0 + + + + 1 + + + + FOSC + + + + clear + + + + 0 + + + + 0.938 + + + + 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"main.c" 2 +# 44 "main.c" +# 1 "./mcc_generated_files/mcc.h" 1 +# 49 "./mcc_generated_files/mcc.h" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 49 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/device_config.h" 1 +# 50 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/pin_manager.h" 1 +# 413 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 425 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 438 "./mcc_generated_files/pin_manager.h" +void IOCBF0_ISR(void); +# 461 "./mcc_generated_files/pin_manager.h" +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +# 485 "./mcc_generated_files/pin_manager.h" +extern void (*IOCBF0_InterruptHandler)(void); +# 509 "./mcc_generated_files/pin_manager.h" +void IOCBF0_DefaultInterruptHandler(void); +# 522 "./mcc_generated_files/pin_manager.h" +void IOCCF7_ISR(void); +# 545 "./mcc_generated_files/pin_manager.h" +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +# 569 "./mcc_generated_files/pin_manager.h" +extern void (*IOCCF7_InterruptHandler)(void); +# 593 "./mcc_generated_files/pin_manager.h" +void IOCCF7_DefaultInterruptHandler(void); +# 51 "./mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 52 "./mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 53 "./mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 1 3 + + + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 1 3 +# 12 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 3 +extern int errno; +# 9 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__null.h" 1 3 +# 10 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 + + +extern void init_uart(void); + +extern char getch(void); +extern char getche(void); +extern void putch(char); +extern void ungetch(char); + +extern __bit kbhit(void); + + + +extern char * cgets(char *); +extern void cputs(const char *); +# 54 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/interrupt_manager.h" 1 +# 55 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/dac5.h" 1 +# 94 "./mcc_generated_files/dac5.h" +void DAC5_Initialize(void); +# 125 "./mcc_generated_files/dac5.h" +void DAC5_Load16bitInputData(uint16_t input16BitData); +# 156 "./mcc_generated_files/dac5.h" +void DAC5_Load10bitInputData(uint16_t input10BitData); +# 187 "./mcc_generated_files/dac5.h" +void DAC5_Load8bitInputData(uint8_t input8BitData); +# 215 "./mcc_generated_files/dac5.h" +uint16_t DAC5_Read10BitInputData(void); +# 56 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/dac4.h" 1 +# 93 "./mcc_generated_files/dac4.h" +void DAC4_Initialize(void); +# 129 "./mcc_generated_files/dac4.h" +void DAC4_SetOutput(uint8_t inputData); +# 163 "./mcc_generated_files/dac4.h" +uint8_t DAC4_GetOutput(void); +# 57 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/dac7.h" 1 +# 93 "./mcc_generated_files/dac7.h" +void DAC7_Initialize(void); +# 129 "./mcc_generated_files/dac7.h" +void DAC7_SetOutput(uint8_t inputData); +# 163 "./mcc_generated_files/dac7.h" +uint8_t DAC7_GetOutput(void); +# 58 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/cmp2.h" 1 +# 92 "./mcc_generated_files/cmp2.h" +void CMP2_Initialize(void); +# 132 "./mcc_generated_files/cmp2.h" +_Bool CMP2_GetOutputStatus(void); +# 148 "./mcc_generated_files/cmp2.h" +void CMP2_ISR(void); +# 59 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/cmp1.h" 1 +# 92 "./mcc_generated_files/cmp1.h" +void CMP1_Initialize(void); +# 132 "./mcc_generated_files/cmp1.h" +_Bool CMP1_GetOutputStatus(void); +# 148 "./mcc_generated_files/cmp1.h" +void CMP1_ISR(void); +# 60 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/fvr.h" 1 +# 93 "./mcc_generated_files/fvr.h" + void FVR_Initialize(void); +# 127 "./mcc_generated_files/fvr.h" +_Bool FVR_IsOutputReady(void); +# 61 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/cmp5.h" 1 +# 92 "./mcc_generated_files/cmp5.h" +void CMP5_Initialize(void); +# 132 "./mcc_generated_files/cmp5.h" +_Bool CMP5_GetOutputStatus(void); +# 62 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/opa1.h" 1 +# 93 "./mcc_generated_files/opa1.h" +void OPA1_Initialize(void); +# 63 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/dac1.h" 1 +# 94 "./mcc_generated_files/dac1.h" +void DAC1_Initialize(void); +# 125 "./mcc_generated_files/dac1.h" +void DAC1_Load16bitInputData(uint16_t input16BitData); +# 156 "./mcc_generated_files/dac1.h" +void DAC1_Load10bitInputData(uint16_t input10BitData); +# 187 "./mcc_generated_files/dac1.h" +void DAC1_Load8bitInputData(uint8_t input8BitData); +# 215 "./mcc_generated_files/dac1.h" +uint16_t DAC1_Read10BitInputData(void); +# 64 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/opa2.h" 1 +# 93 "./mcc_generated_files/opa2.h" +void OPA2_Initialize(void); +# 65 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/dac3.h" 1 +# 93 "./mcc_generated_files/dac3.h" +void DAC3_Initialize(void); +# 129 "./mcc_generated_files/dac3.h" +void DAC3_SetOutput(uint8_t inputData); +# 163 "./mcc_generated_files/dac3.h" +uint8_t DAC3_GetOutput(void); +# 66 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/adc.h" 1 +# 72 "./mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "./mcc_generated_files/adc.h" +typedef enum +{ + GNDREF_SENSE = 0x0, + VIN_SENSE = 0xD, + STAGE2_MON = 0xE, + STAGE1_MON = 0xF, + channel_Switched_AN1 = 0x21, + channel_Switched_AN10 = 0x2A, + channel_Switched_AN18 = 0x32, + channel_DAC7_Output = 0x37, + channel_DAC5_Output = 0x39, + channel_DAC4_Output = 0x3A, + channel_DAC3_Output = 0x3B, + channel_DAC2_Output = 0x3C, + channel_Temp = 0x3D, + channel_DAC1_Output = 0x3E, + channel_FVRBuffer1 = 0x3F +} adc_channel_t; +# 147 "./mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 177 "./mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 204 "./mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 236 "./mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 269 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 299 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 327 "./mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 67 "./mcc_generated_files/mcc.h" 2 +# 82 "./mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 95 "./mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 107 "./mcc_generated_files/mcc.h" +void WDT_Initialize(void); +# 44 "main.c" 2 +# 65 "main.c" +uint8_t mux_state = 0; +uint8_t led_color_state = 0x0; + + + +void set_led(uint8_t); +void init_sensor(void); +void reset_sensor(void); + + + +void my_CMP2_ISR(void){ + + PIR2bits.C2IF = 0; + set_led(0x4); + +} + +void my_CMP1_ISR(void){ + + PIR2bits.C1IF = 0; + set_led(0x4); +} + + +void SW2_ISR(void){ + + switch(mux_state){ + case 0: + led_color_state = 0x2; + LATAbits.LATA7 = 1; + LATBbits.LATB4 = 1; + + + break; + + case 1: + led_color_state = (0x4 | 0x2); + LATAbits.LATA7 = 0; + LATBbits.LATB4 = 1; + + break; + + case 2: + led_color_state = 0x1; + LATAbits.LATA7 = 1; + LATBbits.LATB4 = 0; + + break; + + case 3: + led_color_state = (0x1 | 0x2); + LATAbits.LATA7 = 0; + LATBbits.LATB4 = 0; + + break; + } + set_led(led_color_state); + mux_state = (mux_state+1)%4; + _delay((unsigned long)((200)*(8000000/4000.0))); +} + + +void SW1_ISR(void){ + + + set_led(0x0); + _delay((unsigned long)((200)*(8000000/4000.0))); + set_led(led_color_state); + reset_sensor(); + _delay((unsigned long)((200)*(8000000/4000.0))); + if(PORTCbits.RC7 == 0){ + + init_sensor(); + } + + + set_led(0x0); + _delay((unsigned long)((200)*(8000000/4000.0))); + set_led(led_color_state); + + + PIR2bits.C2IF = 0; + PIR2bits.C1IF = 0; +} + +uint16_t average_adc_reading(adc_channel_t read_ch){ + + uint16_t averaged_val = 0; + for (int i = 0; i<8; i++){ + averaged_val = averaged_val + ADC_GetConversion(read_ch); + } + + averaged_val = averaged_val; + + return averaged_val; +} + +void set_led(uint8_t led_color) { + +LATCbits.LATC6 = (~led_color>>2)&1; +LATCbits.LATC5 = (~led_color>>1)&1; +LATCbits.LATC4 = (~led_color)&1; + +} +void zero_stage_1(void){ + uint16_t gnd_ref_val; + uint16_t best_dac_val = 0; + uint16_t stage_val; + uint16_t best_val = (1<<12); + + gnd_ref_val = average_adc_reading(GNDREF_SENSE); + + for(uint16_t i = 0; i<1024; i++){ + + DAC1_Load10bitInputData(i); + _delay((unsigned long)((1)*(8000000/4000.0))); + stage_val = average_adc_reading(STAGE1_MON); + + if ((stage_val-gnd_ref_val) < best_val){ + best_val = (stage_val - gnd_ref_val); + best_dac_val = i; + } + } + DAC1_Load10bitInputData(best_dac_val); +} + +void zero_stage_2(void){ + uint16_t gnd_ref_val; + uint16_t best_dac_val = 0; + uint16_t stage_val; + uint16_t best_val = 2000; + + gnd_ref_val = average_adc_reading(GNDREF_SENSE); + + for(uint16_t i = 0; i<1024; i++){ + + DAC5_Load10bitInputData(i); + _delay((unsigned long)((1)*(8000000/4000.0))); + stage_val = average_adc_reading(STAGE2_MON); + + if ((stage_val-gnd_ref_val) < best_val){ + best_val = (stage_val - gnd_ref_val); + best_dac_val = i; + } + + } + + DAC5_Load10bitInputData(best_dac_val); + + +} + +void init_sensor(void){ + + _delay((unsigned long)((50)*(8000000/4000.0))); + zero_stage_1(); + _delay((unsigned long)((50)*(8000000/4000.0))); + zero_stage_2(); + +} + +void reset_sensor(){ + do { LATAbits.LATA6 = 0; } while(0); + _delay((unsigned long)((50)*(8000000/4000.0))); + do { LATAbits.LATA6 = 1; } while(0); + _delay((unsigned long)((50)*(8000000/4000.0))); + do { LATAbits.LATA6 = 0; } while(0); + +} + +void low_battery_loop(){ + while(1){ + set_led(0x0); + + _delay((unsigned long)((500)*(8000000/4000.0))); + + set_led(0x4); + + _delay((unsigned long)((500)*(8000000/4000.0))); + } +} +void main(void) +{ + + SYSTEM_Initialize(); +# 267 "main.c" + DAC7_SetOutput(16); + DAC3_SetOutput(24); + DAC4_SetOutput(8); + + led_color_state = 0x2; + mux_state = 0; + SW2_ISR(); + + reset_sensor(); + init_sensor(); + + PIR2bits.C2IF = 0; + PIR2bits.C1IF = 0; + + IOCBF0_SetInterruptHandler(SW2_ISR); + + IOCCF7_SetInterruptHandler(SW1_ISR); + + (INTCONbits.GIE = 1); + (INTCONbits.PEIE = 1); + + while (1) + { + + _delay((unsigned long)((100)*(8000000/4000.0))); + if((average_adc_reading(VIN_SENSE)>>3) < 173){ + (INTCONbits.GIE = 0); + (INTCONbits.PEIE = 0); + low_battery_loop(); + } + + } +} diff --git a/firmware/B1-firmware.X/build/default/production/main.p1 b/firmware/B1-firmware.X/build/default/production/main.p1 new file mode 100644 index 0000000..1efe21a --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/main.p1 @@ -0,0 +1,2373 @@ +Version 4.0 HI-TECH Software Intermediate Code +"713 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 713: struct { +[s S45 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S45 . CCP2IF C3IF C4IF BCL1IF COG1IF C1IF C2IF OSFIF ] +"712 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 712: typedef union { +[u S44 `S45 1 ] +[n S44 . . ] +"724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 724: extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +[v _PIR2bits `VS44 ~T0 @X0 0 e@18 ] +"70 main.c +[; ;main.c: 70: void set_led(uint8_t); +[v _set_led `(v ~T0 @X0 0 ef1`uc ] +"2679 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2679: struct { +[s S128 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S128 . LATA0 LATA1 LATA2 LATA3 LATA4 LATA5 LATA6 LATA7 ] +"2678 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2678: typedef union { +[u S127 `S128 1 ] +[n S127 . . ] +"2690 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2690: extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +[v _LATAbits `VS127 ~T0 @X0 0 e@268 ] +"2741 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2741: struct { +[s S130 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S130 . LATB0 LATB1 LATB2 LATB3 LATB4 LATB5 LATB6 LATB7 ] +"2740 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2740: typedef union { +[u S129 `S130 1 ] +[n S129 . . ] +"2752 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2752: extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +[v _LATBbits `VS129 ~T0 @X0 0 e@269 ] +[v F11967 `(v ~T0 @X0 1 tf1`ul ] +"92 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h +[v __delay `JF11967 ~T0 @X0 0 e ] +[p i __delay ] +"72 main.c +[; ;main.c: 72: void reset_sensor(void); +[v _reset_sensor `(v ~T0 @X0 0 ef ] +"559 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 559: struct { +[s S38 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S38 . RC0 RC1 RC2 RC3 RC4 RC5 RC6 RC7 ] +"558 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 558: typedef union { +[u S37 `S38 1 ] +[n S37 . . ] +"570 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 570: extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +[v _PORTCbits `VS37 ~T0 @X0 0 e@14 ] +"71 main.c +[; ;main.c: 71: void init_sensor(void); +[v _init_sensor `(v ~T0 @X0 0 ef ] +"151 +[; ;main.c: 151: uint16_t average_adc_reading(adc_channel_t read_ch){ +[c E12086 0 13 14 15 33 42 50 55 57 58 59 60 61 62 63 .. ] +[n E12086 . GNDREF_SENSE VIN_SENSE STAGE2_MON STAGE1_MON channel_Switched_AN1 channel_Switched_AN10 channel_Switched_AN18 channel_DAC7_Output channel_DAC5_Output channel_DAC4_Output channel_DAC3_Output channel_DAC2_Output channel_Temp channel_DAC1_Output channel_FVRBuffer1 ] +"299 ./mcc_generated_files/adc.h +[; ;./mcc_generated_files/adc.h: 299: adc_result_t ADC_GetConversion(adc_channel_t channel); +[v _ADC_GetConversion `(us ~T0 @X0 0 ef1`E12086 ] +"2803 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2803: struct { +[s S132 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S132 . LATC0 LATC1 LATC2 LATC3 LATC4 LATC5 LATC6 LATC7 ] +"2802 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2802: typedef union { +[u S131 `S132 1 ] +[n S131 . . ] +"2814 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2814: extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +[v _LATCbits `VS131 ~T0 @X0 0 e@270 ] +"156 ./mcc_generated_files/dac1.h +[; ;./mcc_generated_files/dac1.h: 156: void DAC1_Load10bitInputData(uint16_t input10BitData); +[v _DAC1_Load10bitInputData `(v ~T0 @X0 0 ef1`us ] +"156 ./mcc_generated_files/dac5.h +[; ;./mcc_generated_files/dac5.h: 156: void DAC5_Load10bitInputData(uint16_t input10BitData); +[v _DAC5_Load10bitInputData `(v ~T0 @X0 0 ef1`us ] +[p mainexit ] +"82 ./mcc_generated_files/mcc.h +[; ;./mcc_generated_files/mcc.h: 82: void SYSTEM_Initialize(void); +[v _SYSTEM_Initialize `(v ~T0 @X0 0 ef ] +"129 ./mcc_generated_files/dac7.h +[; ;./mcc_generated_files/dac7.h: 129: void DAC7_SetOutput(uint8_t inputData); +[v _DAC7_SetOutput `(v ~T0 @X0 0 ef1`uc ] +"129 ./mcc_generated_files/dac3.h +[; ;./mcc_generated_files/dac3.h: 129: void DAC3_SetOutput(uint8_t inputData); +[v _DAC3_SetOutput `(v ~T0 @X0 0 ef1`uc ] +"129 ./mcc_generated_files/dac4.h +[; ;./mcc_generated_files/dac4.h: 129: void DAC4_SetOutput(uint8_t inputData); +[v _DAC4_SetOutput `(v ~T0 @X0 0 ef1`uc ] +[v F11982 `(v ~T0 @X0 0 tf ] +"461 ./mcc_generated_files/pin_manager.h +[; ;./mcc_generated_files/pin_manager.h: 461: void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +[v _IOCBF0_SetInterruptHandler `(v ~T0 @X0 0 ef1`*F11982 ] +[v F11990 `(v ~T0 @X0 0 tf ] +"545 +[; ;./mcc_generated_files/pin_manager.h: 545: void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +[v _IOCCF7_SetInterruptHandler `(v ~T0 @X0 0 ef1`*F11990 ] +"357 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 357: struct { +[s S31 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S31 . IOCIF INTF TMR0IF IOCIE INTE TMR0IE PEIE GIE ] +"367 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 367: struct { +[s S32 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S32 . . T0IF . T0IE ] +"356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 356: typedef union { +[u S30 `S31 1 `S32 1 ] +[n S30 . . . ] +"374 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 374: extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +[v _INTCONbits `VS30 ~T0 @X0 0 e@11 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"65 main.c +[; ;main.c: 65: uint8_t mux_state = 0; +[v _mux_state `uc ~T0 @X0 1 e ] +[i _mux_state +-> -> 0 `i `uc +] +"66 +[; ;main.c: 66: uint8_t led_color_state = 0x0; +[v _led_color_state `uc ~T0 @X0 1 e ] +[i _led_color_state +-> -> 0 `i `uc +] +"76 +[; ;main.c: 76: void my_CMP2_ISR(void){ +[v _my_CMP2_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _my_CMP2_ISR ] +[f ] +"78 +[; ;main.c: 78: PIR2bits.C2IF = 0; +[e = . . _PIR2bits 0 6 -> -> 0 `i `uc ] +"79 +[; ;main.c: 79: set_led(0x4); +[e ( _set_led (1 -> -> 4 `i `uc ] +"81 +[; ;main.c: 81: } +[e :UE 1732 ] +} +"83 +[; ;main.c: 83: void my_CMP1_ISR(void){ +[v _my_CMP1_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _my_CMP1_ISR ] +[f ] +"85 +[; ;main.c: 85: PIR2bits.C1IF = 0; +[e = . . _PIR2bits 0 5 -> -> 0 `i `uc ] +"86 +[; ;main.c: 86: set_led(0x4); +[e ( _set_led (1 -> -> 4 `i `uc ] +"87 +[; ;main.c: 87: } +[e :UE 1733 ] +} +"90 +[; ;main.c: 90: void SW2_ISR(void){ +[v _SW2_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _SW2_ISR ] +[f ] +"92 +[; ;main.c: 92: switch(mux_state){ +[e $U 1736 ] +{ +"93 +[; ;main.c: 93: case 0: +[e :U 1737 ] +"94 +[; ;main.c: 94: led_color_state = 0x2; +[e = _led_color_state -> -> 2 `i `uc ] +"95 +[; ;main.c: 95: LATAbits.LATA7 = 1; +[e = . . _LATAbits 0 7 -> -> 1 `i `uc ] +"96 +[; ;main.c: 96: LATBbits.LATB4 = 1; +[e = . . _LATBbits 0 4 -> -> 1 `i `uc ] +"99 +[; ;main.c: 99: break; +[e $U 1735 ] +"101 +[; ;main.c: 101: case 1: +[e :U 1738 ] +"102 +[; ;main.c: 102: led_color_state = (0x4 | 0x2); +[e = _led_color_state -> | -> 4 `i -> 2 `i `uc ] +"103 +[; ;main.c: 103: LATAbits.LATA7 = 0; +[e = . . _LATAbits 0 7 -> -> 0 `i `uc ] +"104 +[; ;main.c: 104: LATBbits.LATB4 = 1; +[e = . . _LATBbits 0 4 -> -> 1 `i `uc ] +"106 +[; ;main.c: 106: break; +[e $U 1735 ] +"108 +[; ;main.c: 108: case 2: +[e :U 1739 ] +"109 +[; ;main.c: 109: led_color_state = 0x1; +[e = _led_color_state -> -> 1 `i `uc ] +"110 +[; ;main.c: 110: LATAbits.LATA7 = 1; +[e = . . _LATAbits 0 7 -> -> 1 `i `uc ] +"111 +[; ;main.c: 111: LATBbits.LATB4 = 0; +[e = . . _LATBbits 0 4 -> -> 0 `i `uc ] +"113 +[; ;main.c: 113: break; +[e $U 1735 ] +"115 +[; ;main.c: 115: case 3: +[e :U 1740 ] +"116 +[; ;main.c: 116: led_color_state = (0x1 | 0x2); +[e = _led_color_state -> | -> 1 `i -> 2 `i `uc ] +"117 +[; ;main.c: 117: LATAbits.LATA7 = 0; +[e = . . _LATAbits 0 7 -> -> 0 `i `uc ] +"118 +[; ;main.c: 118: LATBbits.LATB4 = 0; +[e = . . _LATBbits 0 4 -> -> 0 `i `uc ] +"120 +[; ;main.c: 120: break; +[e $U 1735 ] +"121 +[; ;main.c: 121: } +} +[e $U 1735 ] +[e :U 1736 ] +[e [\ -> _mux_state `i , $ -> 0 `i 1737 + , $ -> 1 `i 1738 + , $ -> 2 `i 1739 + , $ -> 3 `i 1740 + 1735 ] +[e :U 1735 ] +"122 +[; ;main.c: 122: set_led(led_color_state); +[e ( _set_led (1 _led_color_state ] +"123 +[; ;main.c: 123: mux_state = (mux_state+1)%4; +[e = _mux_state -> % + -> _mux_state `i -> 1 `i -> 4 `i `uc ] +"124 +[; ;main.c: 124: _delay((unsigned long)((200)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"125 +[; ;main.c: 125: } +[e :UE 1734 ] +} +"128 +[; ;main.c: 128: void SW1_ISR(void){ +[v _SW1_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _SW1_ISR ] +[f ] +"131 +[; ;main.c: 131: set_led(0x0); +[e ( _set_led (1 -> -> 0 `i `uc ] +"132 +[; ;main.c: 132: _delay((unsigned long)((200)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"133 +[; ;main.c: 133: set_led(led_color_state); +[e ( _set_led (1 _led_color_state ] +"134 +[; ;main.c: 134: reset_sensor(); +[e ( _reset_sensor .. ] +"135 +[; ;main.c: 135: _delay((unsigned long)((200)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"136 +[; ;main.c: 136: if(PORTCbits.RC7 == 0){ +[e $ ! == -> . . _PORTCbits 0 7 `i -> 0 `i 1742 ] +{ +"138 +[; ;main.c: 138: init_sensor(); +[e ( _init_sensor .. ] +"139 +[; ;main.c: 139: } +} +[e :U 1742 ] +"142 +[; ;main.c: 142: set_led(0x0); +[e ( _set_led (1 -> -> 0 `i `uc ] +"143 +[; ;main.c: 143: _delay((unsigned long)((200)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"144 +[; ;main.c: 144: set_led(led_color_state); +[e ( _set_led (1 _led_color_state ] +"147 +[; ;main.c: 147: PIR2bits.C2IF = 0; +[e = . . _PIR2bits 0 6 -> -> 0 `i `uc ] +"148 +[; ;main.c: 148: PIR2bits.C1IF = 0; +[e = . . _PIR2bits 0 5 -> -> 0 `i `uc ] +"149 +[; ;main.c: 149: } +[e :UE 1741 ] +} +"151 +[; ;main.c: 151: uint16_t average_adc_reading(adc_channel_t read_ch){ +[v _average_adc_reading `(us ~T0 @X0 1 ef1`E12086 ] +{ +[e :U _average_adc_reading ] +[v _read_ch `E12086 ~T0 @X0 1 r1 ] +[f ] +"153 +[; ;main.c: 153: uint16_t averaged_val = 0; +[v _averaged_val `us ~T0 @X0 1 a ] +[e = _averaged_val -> -> 0 `i `us ] +"154 +[; ;main.c: 154: for (int i = 0; i<8; i++){ +{ +[v _i `i ~T0 @X0 1 a ] +[e = _i -> 0 `i ] +[e $ < _i -> 8 `i 1744 ] +[e $U 1745 ] +[e :U 1744 ] +{ +"155 +[; ;main.c: 155: averaged_val = averaged_val + ADC_GetConversion(read_ch); +[e = _averaged_val -> + -> _averaged_val `ui -> ( _ADC_GetConversion (1 _read_ch `ui `us ] +"156 +[; ;main.c: 156: } +} +[e ++ _i -> 1 `i ] +[e $ < _i -> 8 `i 1744 ] +[e :U 1745 ] +} +"158 +[; ;main.c: 158: averaged_val = averaged_val; +[e = _averaged_val _averaged_val ] +"160 +[; ;main.c: 160: return averaged_val; +[e ) _averaged_val ] +[e $UE 1743 ] +"161 +[; ;main.c: 161: } +[e :UE 1743 ] +} +"163 +[; ;main.c: 163: void set_led(uint8_t led_color) { +[v _set_led `(v ~T0 @X0 1 ef1`uc ] +{ +[e :U _set_led ] +[v _led_color `uc ~T0 @X0 1 r1 ] +[f ] +"165 +[; ;main.c: 165: LATCbits.LATC6 = (~led_color>>2)&1; +[e = . . _LATCbits 0 6 -> & >> ~ -> _led_color `i -> 2 `i -> 1 `i `uc ] +"166 +[; ;main.c: 166: LATCbits.LATC5 = (~led_color>>1)&1; +[e = . . _LATCbits 0 5 -> & >> ~ -> _led_color `i -> 1 `i -> 1 `i `uc ] +"167 +[; ;main.c: 167: LATCbits.LATC4 = (~led_color)&1; +[e = . . _LATCbits 0 4 -> & ~ -> _led_color `i -> 1 `i `uc ] +"169 +[; ;main.c: 169: } +[e :UE 1747 ] +} +"170 +[; ;main.c: 170: void zero_stage_1(void){ +[v _zero_stage_1 `(v ~T0 @X0 1 ef ] +{ +[e :U _zero_stage_1 ] +[f ] +"171 +[; ;main.c: 171: uint16_t gnd_ref_val; +[v _gnd_ref_val `us ~T0 @X0 1 a ] +"172 +[; ;main.c: 172: uint16_t best_dac_val = 0; +[v _best_dac_val `us ~T0 @X0 1 a ] +[e = _best_dac_val -> -> 0 `i `us ] +"173 +[; ;main.c: 173: uint16_t stage_val; +[v _stage_val `us ~T0 @X0 1 a ] +"174 +[; ;main.c: 174: uint16_t best_val = (1<<12); +[v _best_val `us ~T0 @X0 1 a ] +[e = _best_val -> << -> 1 `i -> 12 `i `us ] +"176 +[; ;main.c: 176: gnd_ref_val = average_adc_reading(GNDREF_SENSE); +[e = _gnd_ref_val ( _average_adc_reading (1 . `E12086 0 ] +"178 +[; ;main.c: 178: for(uint16_t i = 0; i<1024; i++){ +{ +[v _i `us ~T0 @X0 1 a ] +[e = _i -> -> 0 `i `us ] +[e $ < -> _i `ui -> -> 1024 `i `ui 1749 ] +[e $U 1750 ] +[e :U 1749 ] +{ +"180 +[; ;main.c: 180: DAC1_Load10bitInputData(i); +[e ( _DAC1_Load10bitInputData (1 _i ] +"181 +[; ;main.c: 181: _delay((unsigned long)((1)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"182 +[; ;main.c: 182: stage_val = average_adc_reading(STAGE1_MON); +[e = _stage_val ( _average_adc_reading (1 . `E12086 3 ] +"184 +[; ;main.c: 184: if ((stage_val-gnd_ref_val) < best_val){ +[e $ ! < - -> _stage_val `ui -> _gnd_ref_val `ui -> _best_val `ui 1752 ] +{ +"185 +[; ;main.c: 185: best_val = (stage_val - gnd_ref_val); +[e = _best_val -> - -> _stage_val `ui -> _gnd_ref_val `ui `us ] +"186 +[; ;main.c: 186: best_dac_val = i; +[e = _best_dac_val _i ] +"187 +[; ;main.c: 187: } +} +[e :U 1752 ] +"188 +[; ;main.c: 188: } +} +[e ++ _i -> -> 1 `i `us ] +[e $ < -> _i `ui -> -> 1024 `i `ui 1749 ] +[e :U 1750 ] +} +"189 +[; ;main.c: 189: DAC1_Load10bitInputData(best_dac_val); +[e ( _DAC1_Load10bitInputData (1 _best_dac_val ] +"190 +[; ;main.c: 190: } +[e :UE 1748 ] +} +"192 +[; ;main.c: 192: void zero_stage_2(void){ +[v _zero_stage_2 `(v ~T0 @X0 1 ef ] +{ +[e :U _zero_stage_2 ] +[f ] +"193 +[; ;main.c: 193: uint16_t gnd_ref_val; +[v _gnd_ref_val `us ~T0 @X0 1 a ] +"194 +[; ;main.c: 194: uint16_t best_dac_val = 0; +[v _best_dac_val `us ~T0 @X0 1 a ] +[e = _best_dac_val -> -> 0 `i `us ] +"195 +[; ;main.c: 195: uint16_t stage_val; +[v _stage_val `us ~T0 @X0 1 a ] +"196 +[; ;main.c: 196: uint16_t best_val = 2000; +[v _best_val `us ~T0 @X0 1 a ] +[e = _best_val -> -> 2000 `i `us ] +"198 +[; ;main.c: 198: gnd_ref_val = average_adc_reading(GNDREF_SENSE); +[e = _gnd_ref_val ( _average_adc_reading (1 . `E12086 0 ] +"200 +[; ;main.c: 200: for(uint16_t i = 0; i<1024; i++){ +{ +[v _i `us ~T0 @X0 1 a ] +[e = _i -> -> 0 `i `us ] +[e $ < -> _i `ui -> -> 1024 `i `ui 1754 ] +[e $U 1755 ] +[e :U 1754 ] +{ +"202 +[; ;main.c: 202: DAC5_Load10bitInputData(i); +[e ( _DAC5_Load10bitInputData (1 _i ] +"203 +[; ;main.c: 203: _delay((unsigned long)((1)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"204 +[; ;main.c: 204: stage_val = average_adc_reading(STAGE2_MON); +[e = _stage_val ( _average_adc_reading (1 . `E12086 2 ] +"206 +[; ;main.c: 206: if ((stage_val-gnd_ref_val) < best_val){ +[e $ ! < - -> _stage_val `ui -> _gnd_ref_val `ui -> _best_val `ui 1757 ] +{ +"207 +[; ;main.c: 207: best_val = (stage_val - gnd_ref_val); +[e = _best_val -> - -> _stage_val `ui -> _gnd_ref_val `ui `us ] +"208 +[; ;main.c: 208: best_dac_val = i; +[e = _best_dac_val _i ] +"209 +[; ;main.c: 209: } +} +[e :U 1757 ] +"211 +[; ;main.c: 211: } +} +[e ++ _i -> -> 1 `i `us ] +[e $ < -> _i `ui -> -> 1024 `i `ui 1754 ] +[e :U 1755 ] +} +"213 +[; ;main.c: 213: DAC5_Load10bitInputData(best_dac_val); +[e ( _DAC5_Load10bitInputData (1 _best_dac_val ] +"216 +[; ;main.c: 216: } +[e :UE 1753 ] +} +"218 +[; ;main.c: 218: void init_sensor(void){ +[v _init_sensor `(v ~T0 @X0 1 ef ] +{ +[e :U _init_sensor ] +[f ] +"220 +[; ;main.c: 220: _delay((unsigned long)((50)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 50 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"221 +[; ;main.c: 221: zero_stage_1(); +[e ( _zero_stage_1 .. ] +"222 +[; ;main.c: 222: _delay((unsigned long)((50)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 50 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"223 +[; ;main.c: 223: zero_stage_2(); +[e ( _zero_stage_2 .. ] +"225 +[; ;main.c: 225: } +[e :UE 1758 ] +} +"227 +[; ;main.c: 227: void reset_sensor(){ +[v _reset_sensor `(v ~T0 @X0 1 ef ] +{ +[e :U _reset_sensor ] +[f ] +"228 +[; ;main.c: 228: do { LATAbits.LATA6 = 0; } while(0); +[e :U 1762 ] +{ +[e = . . _LATAbits 0 6 -> -> 0 `i `uc ] +} +[e :U 1761 ] +"229 +[; ;main.c: 229: _delay((unsigned long)((50)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 50 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"230 +[; ;main.c: 230: do { LATAbits.LATA6 = 1; } while(0); +[e :U 1765 ] +{ +[e = . . _LATAbits 0 6 -> -> 1 `i `uc ] +} +[e :U 1764 ] +"231 +[; ;main.c: 231: _delay((unsigned long)((50)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 50 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"232 +[; ;main.c: 232: do { LATAbits.LATA6 = 0; } while(0); +[e :U 1768 ] +{ +[e = . . _LATAbits 0 6 -> -> 0 `i `uc ] +} +[e :U 1767 ] +"234 +[; ;main.c: 234: } +[e :UE 1759 ] +} +"236 +[; ;main.c: 236: void low_battery_loop(){ +[v _low_battery_loop `(v ~T0 @X0 1 ef ] +{ +[e :U _low_battery_loop ] +[f ] +"237 +[; ;main.c: 237: while(1){ +[e :U 1771 ] +{ +"238 +[; ;main.c: 238: set_led(0x0); +[e ( _set_led (1 -> -> 0 `i `uc ] +"240 +[; ;main.c: 240: _delay((unsigned long)((500)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 500 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"242 +[; ;main.c: 242: set_led(0x4); +[e ( _set_led (1 -> -> 4 `i `uc ] +"244 +[; ;main.c: 244: _delay((unsigned long)((500)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 500 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"245 +[; ;main.c: 245: } +} +[e :U 1770 ] +[e $U 1771 ] +[e :U 1772 ] +"246 +[; ;main.c: 246: } +[e :UE 1769 ] +} +[v $root$_main `(v ~T0 @X0 0 e ] +"247 +[; ;main.c: 247: void main(void) +[v _main `(v ~T0 @X0 1 ef ] +"248 +[; ;main.c: 248: { +{ +[e :U _main ] +[f ] +"250 +[; ;main.c: 250: SYSTEM_Initialize(); +[e ( _SYSTEM_Initialize .. ] +"267 +[; ;main.c: 267: DAC7_SetOutput(16); +[e ( _DAC7_SetOutput (1 -> -> 16 `i `uc ] +"268 +[; ;main.c: 268: DAC3_SetOutput(24); +[e ( _DAC3_SetOutput (1 -> -> 24 `i `uc ] +"269 +[; ;main.c: 269: DAC4_SetOutput(8); +[e ( _DAC4_SetOutput (1 -> -> 8 `i `uc ] +"271 +[; ;main.c: 271: led_color_state = 0x2; +[e = _led_color_state -> -> 2 `i `uc ] +"272 +[; ;main.c: 272: mux_state = 0; +[e = _mux_state -> -> 0 `i `uc ] +"273 +[; ;main.c: 273: SW2_ISR(); +[e ( _SW2_ISR .. ] +"275 +[; ;main.c: 275: reset_sensor(); +[e ( _reset_sensor .. ] +"276 +[; ;main.c: 276: init_sensor(); +[e ( _init_sensor .. ] +"278 +[; ;main.c: 278: PIR2bits.C2IF = 0; +[e = . . _PIR2bits 0 6 -> -> 0 `i `uc ] +"279 +[; ;main.c: 279: PIR2bits.C1IF = 0; +[e = . . _PIR2bits 0 5 -> -> 0 `i `uc ] +"281 +[; ;main.c: 281: IOCBF0_SetInterruptHandler(SW2_ISR); +[e ( _IOCBF0_SetInterruptHandler (1 &U _SW2_ISR ] +"283 +[; ;main.c: 283: IOCCF7_SetInterruptHandler(SW1_ISR); +[e ( _IOCCF7_SetInterruptHandler (1 &U _SW1_ISR ] +"285 +[; ;main.c: 285: (INTCONbits.GIE = 1); +[e = . . _INTCONbits 0 7 -> -> 1 `i `uc ] +"286 +[; ;main.c: 286: (INTCONbits.PEIE = 1); +[e = . . _INTCONbits 0 6 -> -> 1 `i `uc ] +"288 +[; ;main.c: 288: while (1) +[e :U 1775 ] +"289 +[; ;main.c: 289: { +{ +"291 +[; ;main.c: 291: _delay((unsigned long)((100)*(8000000/4000.0))); +[e ( __delay (1 -> * -> -> 100 `i `d / -> -> 8000000 `l `d .4000.0 `ul ] +"292 +[; ;main.c: 292: if((average_adc_reading(VIN_SENSE)>>3) < 173){ +[e $ ! < >> -> ( _average_adc_reading (1 . `E12086 1 `ui -> 3 `i -> -> 173 `i `ui 1777 ] +{ +"293 +[; ;main.c: 293: (INTCONbits.GIE = 0); +[e = . . _INTCONbits 0 7 -> -> 0 `i `uc ] +"294 +[; ;main.c: 294: (INTCONbits.PEIE = 0); +[e = . . _INTCONbits 0 6 -> -> 0 `i `uc ] +"295 +[; ;main.c: 295: low_battery_loop(); +[e ( _low_battery_loop .. ] +"296 +[; ;main.c: 296: } +} +[e :U 1777 ] +"298 +[; ;main.c: 298: } +} +[e :U 1774 ] +[e $U 1775 ] +[e :U 1776 ] +"299 +[; ;main.c: 299: } +[e :UE 1773 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/main.p1.d b/firmware/B1-firmware.X/build/default/production/main.p1.d new file mode 100644 index 0000000..e260a9a --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/main.p1.d @@ -0,0 +1,18 @@ +build/default/production/main.p1: \ +main.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/interrupt_manager.h \ +mcc_generated_files/dac5.h \ +mcc_generated_files/dac4.h \ +mcc_generated_files/dac7.h \ +mcc_generated_files/cmp2.h \ +mcc_generated_files/cmp1.h \ +mcc_generated_files/fvr.h \ +mcc_generated_files/cmp5.h \ +mcc_generated_files/opa1.h \ +mcc_generated_files/dac1.h \ +mcc_generated_files/opa2.h \ +mcc_generated_files/dac3.h \ +mcc_generated_files/adc.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.i new file mode 100644 index 0000000..406cd9b --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.i @@ -0,0 +1,19590 @@ +# 1 "mcc_generated_files/adc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/adc.c" 2 +# 51 "mcc_generated_files/adc.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 55 "mcc_generated_files/adc.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/adc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 56 "mcc_generated_files/adc.h" 2 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + GNDREF_SENSE = 0x0, + VIN_SENSE = 0xD, + STAGE2_MON = 0xE, + STAGE1_MON = 0xF, + channel_Switched_AN1 = 0x21, + channel_Switched_AN10 = 0x2A, + channel_Switched_AN18 = 0x32, + channel_DAC7_Output = 0x37, + channel_DAC5_Output = 0x39, + channel_DAC4_Output = 0x3A, + channel_DAC3_Output = 0x3B, + channel_DAC2_Output = 0x3C, + channel_Temp = 0x3D, + channel_DAC1_Output = 0x3E, + channel_FVRBuffer1 = 0x3F +} adc_channel_t; +# 147 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 177 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 204 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 236 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 269 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 299 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 327 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 52 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 53 "mcc_generated_files/adc.c" 2 + + + + + + + + +void (*ADC_InterruptHandler)(void); + + + + + +void ADC_Initialize(void) +{ + + + + ADCON0 = 0x01; + + + ADCON1 = 0x90; + + + ADCON2 = 0x00; + + + ADRESL = 0x00; + + + ADRESH = 0x00; + +} + +void ADC_SelectChannel(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + ADCON0bits.ADON = 1; +} + +void ADC_StartConversion(void) +{ + + ADCON0bits.GO = 1; +} + + +_Bool ADC_IsConversionDone(void) +{ + + return ((_Bool)(!ADCON0bits.GO)); +} + +adc_result_t ADC_GetConversionResult(void) +{ + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +adc_result_t ADC_GetConversion(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + + ADCON0bits.ADON = 1; + + + _delay((unsigned long)((5)*(8000000/4000000.0))); + + + ADCON0bits.GO = 1; + + + while (ADCON0bits.GO) + { + } + + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +void ADC_TemperatureAcquisitionDelay(void) +{ + _delay((unsigned long)((200)*(8000000/4000000.0))); +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1 new file mode 100644 index 0000000..1d36350 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1 @@ -0,0 +1,1885 @@ +Version 4.0 HI-TECH Software Intermediate Code +[v F12042 `(v ~T0 @X0 0 tf ] +"11366 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11366: extern volatile unsigned char ADCON0 __attribute__((address(0x490))); +[v _ADCON0 `Vuc ~T0 @X0 0 e@1168 ] +"11398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11398: extern volatile unsigned char ADCON1 __attribute__((address(0x491))); +[v _ADCON1 `Vuc ~T0 @X0 0 e@1169 ] +"11437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11437: extern volatile unsigned char ADCON2 __attribute__((address(0x492))); +[v _ADCON2 `Vuc ~T0 @X0 0 e@1170 ] +"11326 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11326: extern volatile unsigned char ADRESL __attribute__((address(0x48E))); +[v _ADRESL `Vuc ~T0 @X0 0 e@1166 ] +"11346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11346: extern volatile unsigned char ADRESH __attribute__((address(0x48F))); +[v _ADRESH `Vuc ~T0 @X0 0 e@1167 ] +"88 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 88: void ADC_SelectChannel(adc_channel_t channel) +[c E12015 0 13 14 15 33 42 50 55 57 58 59 60 61 62 63 .. ] +[n E12015 . GNDREF_SENSE VIN_SENSE STAGE2_MON STAGE1_MON channel_Switched_AN1 channel_Switched_AN10 channel_Switched_AN18 channel_DAC7_Output channel_DAC5_Output channel_DAC4_Output channel_DAC3_Output channel_DAC2_Output channel_Temp channel_DAC1_Output channel_FVRBuffer1 ] +"11372 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11372: struct { +[s S553 :1 `uc 1 :1 `uc 1 :6 `uc 1 ] +[n S553 . ADON GO CHS ] +"11371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11371: typedef union { +[u S552 `S553 1 ] +[n S552 . . ] +"11378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11378: extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +[v _ADCON0bits `VS552 ~T0 @X0 0 e@1168 ] +[v F11967 `(v ~T0 @X0 1 tf1`ul ] +"92 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h +[v __delay `JF11967 ~T0 @X0 0 e ] +[p i __delay ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"61 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 61: void (*ADC_InterruptHandler)(void); +[v _ADC_InterruptHandler `*F12042 ~T0 @X0 1 e ] +"67 +[; ;mcc_generated_files/adc.c: 67: void ADC_Initialize(void) +[v _ADC_Initialize `(v ~T0 @X0 1 ef ] +"68 +[; ;mcc_generated_files/adc.c: 68: { +{ +[e :U _ADC_Initialize ] +[f ] +"72 +[; ;mcc_generated_files/adc.c: 72: ADCON0 = 0x01; +[e = _ADCON0 -> -> 1 `i `uc ] +"75 +[; ;mcc_generated_files/adc.c: 75: ADCON1 = 0x90; +[e = _ADCON1 -> -> 144 `i `uc ] +"78 +[; ;mcc_generated_files/adc.c: 78: ADCON2 = 0x00; +[e = _ADCON2 -> -> 0 `i `uc ] +"81 +[; ;mcc_generated_files/adc.c: 81: ADRESL = 0x00; +[e = _ADRESL -> -> 0 `i `uc ] +"84 +[; ;mcc_generated_files/adc.c: 84: ADRESH = 0x00; +[e = _ADRESH -> -> 0 `i `uc ] +"86 +[; ;mcc_generated_files/adc.c: 86: } +[e :UE 1732 ] +} +"88 +[; ;mcc_generated_files/adc.c: 88: void ADC_SelectChannel(adc_channel_t channel) +[v _ADC_SelectChannel `(v ~T0 @X0 1 ef1`E12015 ] +"89 +[; ;mcc_generated_files/adc.c: 89: { +{ +[e :U _ADC_SelectChannel ] +"88 +[; ;mcc_generated_files/adc.c: 88: void ADC_SelectChannel(adc_channel_t channel) +[v _channel `E12015 ~T0 @X0 1 r1 ] +"89 +[; ;mcc_generated_files/adc.c: 89: { +[f ] +"91 +[; ;mcc_generated_files/adc.c: 91: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 0 2 -> _channel `uc ] +"93 +[; ;mcc_generated_files/adc.c: 93: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 0 0 -> -> 1 `i `uc ] +"94 +[; ;mcc_generated_files/adc.c: 94: } +[e :UE 1733 ] +} +"96 +[; ;mcc_generated_files/adc.c: 96: void ADC_StartConversion(void) +[v _ADC_StartConversion `(v ~T0 @X0 1 ef ] +"97 +[; ;mcc_generated_files/adc.c: 97: { +{ +[e :U _ADC_StartConversion ] +[f ] +"99 +[; ;mcc_generated_files/adc.c: 99: ADCON0bits.GO = 1; +[e = . . _ADCON0bits 0 1 -> -> 1 `i `uc ] +"100 +[; ;mcc_generated_files/adc.c: 100: } +[e :UE 1734 ] +} +"103 +[; ;mcc_generated_files/adc.c: 103: _Bool ADC_IsConversionDone(void) +[v _ADC_IsConversionDone `(a ~T0 @X0 1 ef ] +"104 +[; ;mcc_generated_files/adc.c: 104: { +{ +[e :U _ADC_IsConversionDone ] +[f ] +"106 +[; ;mcc_generated_files/adc.c: 106: return ((_Bool)(!ADCON0bits.GO)); +[e ) -> -> ! != -> . . _ADCON0bits 0 1 `i -> 0 `i `i `a ] +[e $UE 1735 ] +"107 +[; ;mcc_generated_files/adc.c: 107: } +[e :UE 1735 ] +} +"109 +[; ;mcc_generated_files/adc.c: 109: adc_result_t ADC_GetConversionResult(void) +[v _ADC_GetConversionResult `(us ~T0 @X0 1 ef ] +"110 +[; ;mcc_generated_files/adc.c: 110: { +{ +[e :U _ADC_GetConversionResult ] +[f ] +"112 +[; ;mcc_generated_files/adc.c: 112: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 1736 ] +"113 +[; ;mcc_generated_files/adc.c: 113: } +[e :UE 1736 ] +} +"115 +[; ;mcc_generated_files/adc.c: 115: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _ADC_GetConversion `(us ~T0 @X0 1 ef1`E12015 ] +"116 +[; ;mcc_generated_files/adc.c: 116: { +{ +[e :U _ADC_GetConversion ] +"115 +[; ;mcc_generated_files/adc.c: 115: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _channel `E12015 ~T0 @X0 1 r1 ] +"116 +[; ;mcc_generated_files/adc.c: 116: { +[f ] +"118 +[; ;mcc_generated_files/adc.c: 118: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 0 2 -> _channel `uc ] +"121 +[; ;mcc_generated_files/adc.c: 121: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 0 0 -> -> 1 `i `uc ] +"124 +[; ;mcc_generated_files/adc.c: 124: _delay((unsigned long)((5)*(8000000/4000000.0))); +[e ( __delay (1 -> * -> -> 5 `i `d / -> -> 8000000 `l `d .4000000.0 `ul ] +"127 +[; ;mcc_generated_files/adc.c: 127: ADCON0bits.GO = 1; +[e = . . _ADCON0bits 0 1 -> -> 1 `i `uc ] +"130 +[; ;mcc_generated_files/adc.c: 130: while (ADCON0bits.GO) +[e $U 1738 ] +[e :U 1739 ] +"131 +[; ;mcc_generated_files/adc.c: 131: { +{ +"132 +[; ;mcc_generated_files/adc.c: 132: } +} +[e :U 1738 ] +"130 +[; ;mcc_generated_files/adc.c: 130: while (ADCON0bits.GO) +[e $ != -> . . _ADCON0bits 0 1 `i -> 0 `i 1739 ] +[e :U 1740 ] +"135 +[; ;mcc_generated_files/adc.c: 135: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 1737 ] +"136 +[; ;mcc_generated_files/adc.c: 136: } +[e :UE 1737 ] +} +"138 +[; ;mcc_generated_files/adc.c: 138: void ADC_TemperatureAcquisitionDelay(void) +[v _ADC_TemperatureAcquisitionDelay `(v ~T0 @X0 1 ef ] +"139 +[; ;mcc_generated_files/adc.c: 139: { +{ +[e :U _ADC_TemperatureAcquisitionDelay ] +[f ] +"140 +[; ;mcc_generated_files/adc.c: 140: _delay((unsigned long)((200)*(8000000/4000000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 8000000 `l `d .4000000.0 `ul ] +"141 +[; ;mcc_generated_files/adc.c: 141: } +[e :UE 1741 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1.d new file mode 100644 index 0000000..d65e03f --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/adc.p1.d @@ -0,0 +1,4 @@ +build/default/production/mcc_generated_files/adc.p1: \ +mcc_generated_files/adc.c \ +mcc_generated_files/adc.h \ +mcc_generated_files/device_config.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.i new file mode 100644 index 0000000..67b171b --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.i @@ -0,0 +1,19506 @@ +# 1 "mcc_generated_files/cmp1.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/cmp1.c" 2 +# 52 "mcc_generated_files/cmp1.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 52 "mcc_generated_files/cmp1.c" 2 + +# 1 "mcc_generated_files/cmp1.h" 1 +# 54 "mcc_generated_files/cmp1.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/cmp1.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/cmp1.h" 2 +# 92 "mcc_generated_files/cmp1.h" +void CMP1_Initialize(void); +# 132 "mcc_generated_files/cmp1.h" +_Bool CMP1_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp1.h" +void CMP1_ISR(void); +# 53 "mcc_generated_files/cmp1.c" 2 + + + + + +void CMP1_Initialize(void) +{ + + + + + + PIE2bits.C1IE = 0; + + + CM1CON0 = 0x8C; + + + CM1CON1 = 0x01; + + + CM1NSEL = 0x04; + + + CM1PSEL = 0x07; + + + CMOUT = 0x00; + + + PIR2bits.C1IF = 0; + + + PIE2bits.C1IE = 1; +} + +_Bool CMP1_GetOutputStatus(void) +{ + return (CMOUTbits.MC1OUT); +} + +void CMP1_ISR(void) +{ + + PIR2bits.C1IF = 0; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1 new file mode 100644 index 0000000..3f63866 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1 @@ -0,0 +1,1802 @@ +Version 4.0 HI-TECH Software Intermediate Code +"1919 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1919: struct { +[s S96 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S96 . CCP2IE C3IE C4IE BCL1IE COGIE C1IE C2IE OSFIE ] +"1918 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1918: typedef union { +[u S95 `S96 1 ] +[n S95 . . ] +"1930 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1930: extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +[v _PIE2bits `VS95 ~T0 @X0 0 e@146 ] +"2909 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2909: extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); +[v _CM1CON0 `Vuc ~T0 @X0 0 e@274 ] +"3006 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3006: extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); +[v _CM1CON1 `Vuc ~T0 @X0 0 e@275 ] +"3046 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3046: extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); +[v _CM1NSEL `Vuc ~T0 @X0 0 e@276 ] +"3100 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3100: extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); +[v _CM1PSEL `Vuc ~T0 @X0 0 e@277 ] +"2859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2859: extern volatile unsigned char CMOUT __attribute__((address(0x111))); +[v _CMOUT `Vuc ~T0 @X0 0 e@273 ] +"713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 713: struct { +[s S45 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S45 . CCP2IF C3IF C4IF BCL1IF COG1IF C1IF C2IF OSFIF ] +"712 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 712: typedef union { +[u S44 `S45 1 ] +[n S44 . . ] +"724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 724: extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +[v _PIR2bits `VS44 ~T0 @X0 0 e@18 ] +"2865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2865: struct { +[s S134 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S134 . MC1OUT MC2OUT MC3OUT MC4OUT MC5OUT MC6OUT ] +"2864 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2864: typedef union { +[u S133 `S134 1 ] +[n S133 . . ] +"2874 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2874: extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +[v _CMOUTbits `VS133 ~T0 @X0 0 e@273 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/cmp1.c +[; ;mcc_generated_files/cmp1.c: 58: void CMP1_Initialize(void) +[v _CMP1_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/cmp1.c: 59: { +{ +[e :U _CMP1_Initialize ] +[f ] +"65 +[; ;mcc_generated_files/cmp1.c: 65: PIE2bits.C1IE = 0; +[e = . . _PIE2bits 0 5 -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/cmp1.c: 68: CM1CON0 = 0x8C; +[e = _CM1CON0 -> -> 140 `i `uc ] +"71 +[; ;mcc_generated_files/cmp1.c: 71: CM1CON1 = 0x01; +[e = _CM1CON1 -> -> 1 `i `uc ] +"74 +[; ;mcc_generated_files/cmp1.c: 74: CM1NSEL = 0x04; +[e = _CM1NSEL -> -> 4 `i `uc ] +"77 +[; ;mcc_generated_files/cmp1.c: 77: CM1PSEL = 0x07; +[e = _CM1PSEL -> -> 7 `i `uc ] +"80 +[; ;mcc_generated_files/cmp1.c: 80: CMOUT = 0x00; +[e = _CMOUT -> -> 0 `i `uc ] +"83 +[; ;mcc_generated_files/cmp1.c: 83: PIR2bits.C1IF = 0; +[e = . . _PIR2bits 0 5 -> -> 0 `i `uc ] +"86 +[; ;mcc_generated_files/cmp1.c: 86: PIE2bits.C1IE = 1; +[e = . . _PIE2bits 0 5 -> -> 1 `i `uc ] +"87 +[; ;mcc_generated_files/cmp1.c: 87: } +[e :UE 1731 ] +} +"89 +[; ;mcc_generated_files/cmp1.c: 89: _Bool CMP1_GetOutputStatus(void) +[v _CMP1_GetOutputStatus `(a ~T0 @X0 1 ef ] +"90 +[; ;mcc_generated_files/cmp1.c: 90: { +{ +[e :U _CMP1_GetOutputStatus ] +[f ] +"91 +[; ;mcc_generated_files/cmp1.c: 91: return (CMOUTbits.MC1OUT); +[e ) -> . . _CMOUTbits 0 0 `a ] +[e $UE 1732 ] +"92 +[; ;mcc_generated_files/cmp1.c: 92: } +[e :UE 1732 ] +} +"94 +[; ;mcc_generated_files/cmp1.c: 94: void CMP1_ISR(void) +[v _CMP1_ISR `(v ~T0 @X0 1 ef ] +"95 +[; ;mcc_generated_files/cmp1.c: 95: { +{ +[e :U _CMP1_ISR ] +[f ] +"97 +[; ;mcc_generated_files/cmp1.c: 97: PIR2bits.C1IF = 0; +[e = . . _PIR2bits 0 5 -> -> 0 `i `uc ] +"98 +[; ;mcc_generated_files/cmp1.c: 98: } +[e :UE 1733 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1.d new file mode 100644 index 0000000..cc3bfcd --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp1.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/cmp1.p1: \ +mcc_generated_files/cmp1.c \ +mcc_generated_files/cmp1.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.i new file mode 100644 index 0000000..d14e583 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.i @@ -0,0 +1,19506 @@ +# 1 "mcc_generated_files/cmp2.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/cmp2.c" 2 +# 52 "mcc_generated_files/cmp2.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 52 "mcc_generated_files/cmp2.c" 2 + +# 1 "mcc_generated_files/cmp2.h" 1 +# 54 "mcc_generated_files/cmp2.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/cmp2.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/cmp2.h" 2 +# 92 "mcc_generated_files/cmp2.h" +void CMP2_Initialize(void); +# 132 "mcc_generated_files/cmp2.h" +_Bool CMP2_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp2.h" +void CMP2_ISR(void); +# 53 "mcc_generated_files/cmp2.c" 2 + + + + + +void CMP2_Initialize(void) +{ + + + + + + PIE2bits.C2IE = 0; + + + CM2CON0 = 0x9C; + + + CM2CON1 = 0x02; + + + CM2NSEL = 0x04; + + + CM2PSEL = 0x08; + + + CMOUT = 0x00; + + + PIR2bits.C2IF = 0; + + + PIE2bits.C2IE = 1; +} + +_Bool CMP2_GetOutputStatus(void) +{ + return (CMOUTbits.MC2OUT); +} + +void CMP2_ISR(void) +{ + + PIR2bits.C2IF = 0; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1 new file mode 100644 index 0000000..866161a --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1 @@ -0,0 +1,1802 @@ +Version 4.0 HI-TECH Software Intermediate Code +"1919 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1919: struct { +[s S96 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S96 . CCP2IE C3IE C4IE BCL1IE COGIE C1IE C2IE OSFIE ] +"1918 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1918: typedef union { +[u S95 `S96 1 ] +[n S95 . . ] +"1930 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1930: extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +[v _PIE2bits `VS95 ~T0 @X0 0 e@146 ] +"3180 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3180: extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); +[v _CM2CON0 `Vuc ~T0 @X0 0 e@278 ] +"3277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3277: extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); +[v _CM2CON1 `Vuc ~T0 @X0 0 e@279 ] +"3317 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3317: extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); +[v _CM2NSEL `Vuc ~T0 @X0 0 e@280 ] +"3371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3371: extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); +[v _CM2PSEL `Vuc ~T0 @X0 0 e@281 ] +"2859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2859: extern volatile unsigned char CMOUT __attribute__((address(0x111))); +[v _CMOUT `Vuc ~T0 @X0 0 e@273 ] +"713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 713: struct { +[s S45 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S45 . CCP2IF C3IF C4IF BCL1IF COG1IF C1IF C2IF OSFIF ] +"712 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 712: typedef union { +[u S44 `S45 1 ] +[n S44 . . ] +"724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 724: extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +[v _PIR2bits `VS44 ~T0 @X0 0 e@18 ] +"2865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2865: struct { +[s S134 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S134 . MC1OUT MC2OUT MC3OUT MC4OUT MC5OUT MC6OUT ] +"2864 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2864: typedef union { +[u S133 `S134 1 ] +[n S133 . . ] +"2874 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2874: extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +[v _CMOUTbits `VS133 ~T0 @X0 0 e@273 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/cmp2.c +[; ;mcc_generated_files/cmp2.c: 58: void CMP2_Initialize(void) +[v _CMP2_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/cmp2.c: 59: { +{ +[e :U _CMP2_Initialize ] +[f ] +"65 +[; ;mcc_generated_files/cmp2.c: 65: PIE2bits.C2IE = 0; +[e = . . _PIE2bits 0 6 -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/cmp2.c: 68: CM2CON0 = 0x9C; +[e = _CM2CON0 -> -> 156 `i `uc ] +"71 +[; ;mcc_generated_files/cmp2.c: 71: CM2CON1 = 0x02; +[e = _CM2CON1 -> -> 2 `i `uc ] +"74 +[; ;mcc_generated_files/cmp2.c: 74: CM2NSEL = 0x04; +[e = _CM2NSEL -> -> 4 `i `uc ] +"77 +[; ;mcc_generated_files/cmp2.c: 77: CM2PSEL = 0x08; +[e = _CM2PSEL -> -> 8 `i `uc ] +"80 +[; ;mcc_generated_files/cmp2.c: 80: CMOUT = 0x00; +[e = _CMOUT -> -> 0 `i `uc ] +"83 +[; ;mcc_generated_files/cmp2.c: 83: PIR2bits.C2IF = 0; +[e = . . _PIR2bits 0 6 -> -> 0 `i `uc ] +"86 +[; ;mcc_generated_files/cmp2.c: 86: PIE2bits.C2IE = 1; +[e = . . _PIE2bits 0 6 -> -> 1 `i `uc ] +"87 +[; ;mcc_generated_files/cmp2.c: 87: } +[e :UE 1731 ] +} +"89 +[; ;mcc_generated_files/cmp2.c: 89: _Bool CMP2_GetOutputStatus(void) +[v _CMP2_GetOutputStatus `(a ~T0 @X0 1 ef ] +"90 +[; ;mcc_generated_files/cmp2.c: 90: { +{ +[e :U _CMP2_GetOutputStatus ] +[f ] +"91 +[; ;mcc_generated_files/cmp2.c: 91: return (CMOUTbits.MC2OUT); +[e ) -> . . _CMOUTbits 0 1 `a ] +[e $UE 1732 ] +"92 +[; ;mcc_generated_files/cmp2.c: 92: } +[e :UE 1732 ] +} +"94 +[; ;mcc_generated_files/cmp2.c: 94: void CMP2_ISR(void) +[v _CMP2_ISR `(v ~T0 @X0 1 ef ] +"95 +[; ;mcc_generated_files/cmp2.c: 95: { +{ +[e :U _CMP2_ISR ] +[f ] +"97 +[; ;mcc_generated_files/cmp2.c: 97: PIR2bits.C2IF = 0; +[e = . . _PIR2bits 0 6 -> -> 0 `i `uc ] +"98 +[; ;mcc_generated_files/cmp2.c: 98: } +[e :UE 1733 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1.d new file mode 100644 index 0000000..3fc7348 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp2.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/cmp2.p1: \ +mcc_generated_files/cmp2.c \ +mcc_generated_files/cmp2.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.i new file mode 100644 index 0000000..fd935d0 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.i @@ -0,0 +1,19487 @@ +# 1 "mcc_generated_files/cmp5.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/cmp5.c" 2 +# 52 "mcc_generated_files/cmp5.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 52 "mcc_generated_files/cmp5.c" 2 + +# 1 "mcc_generated_files/cmp5.h" 1 +# 54 "mcc_generated_files/cmp5.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/cmp5.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/cmp5.h" 2 +# 92 "mcc_generated_files/cmp5.h" +void CMP5_Initialize(void); +# 132 "mcc_generated_files/cmp5.h" +_Bool CMP5_GetOutputStatus(void); +# 53 "mcc_generated_files/cmp5.c" 2 + + + + + +void CMP5_Initialize(void) +{ + + + CM5CON0 = 0x04; + + + CM5CON1 = 0x00; + + + CM5NSEL = 0x08; + + + CM5PSEL = 0x09; + + + CMOUT = 0x00; + +} + +_Bool CMP5_GetOutputStatus(void) +{ + return (CMOUTbits.MC5OUT); +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1 new file mode 100644 index 0000000..aa450a1 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1 @@ -0,0 +1,1756 @@ +Version 4.0 HI-TECH Software Intermediate Code +"26694 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26694: extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); +[v _CM5CON0 `Vuc ~T0 @X0 0 e@2320 ] +"26791 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26791: extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); +[v _CM5CON1 `Vuc ~T0 @X0 0 e@2321 ] +"26831 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26831: extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); +[v _CM5NSEL `Vuc ~T0 @X0 0 e@2322 ] +"26885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26885: extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); +[v _CM5PSEL `Vuc ~T0 @X0 0 e@2323 ] +"2859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2859: extern volatile unsigned char CMOUT __attribute__((address(0x111))); +[v _CMOUT `Vuc ~T0 @X0 0 e@273 ] +"2865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2865: struct { +[s S134 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S134 . MC1OUT MC2OUT MC3OUT MC4OUT MC5OUT MC6OUT ] +"2864 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2864: typedef union { +[u S133 `S134 1 ] +[n S133 . . ] +"2874 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2874: extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +[v _CMOUTbits `VS133 ~T0 @X0 0 e@273 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/cmp5.c +[; ;mcc_generated_files/cmp5.c: 58: void CMP5_Initialize(void) +[v _CMP5_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/cmp5.c: 59: { +{ +[e :U _CMP5_Initialize ] +[f ] +"62 +[; ;mcc_generated_files/cmp5.c: 62: CM5CON0 = 0x04; +[e = _CM5CON0 -> -> 4 `i `uc ] +"65 +[; ;mcc_generated_files/cmp5.c: 65: CM5CON1 = 0x00; +[e = _CM5CON1 -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/cmp5.c: 68: CM5NSEL = 0x08; +[e = _CM5NSEL -> -> 8 `i `uc ] +"71 +[; ;mcc_generated_files/cmp5.c: 71: CM5PSEL = 0x09; +[e = _CM5PSEL -> -> 9 `i `uc ] +"74 +[; ;mcc_generated_files/cmp5.c: 74: CMOUT = 0x00; +[e = _CMOUT -> -> 0 `i `uc ] +"76 +[; ;mcc_generated_files/cmp5.c: 76: } +[e :UE 1731 ] +} +"78 +[; ;mcc_generated_files/cmp5.c: 78: _Bool CMP5_GetOutputStatus(void) +[v _CMP5_GetOutputStatus `(a ~T0 @X0 1 ef ] +"79 +[; ;mcc_generated_files/cmp5.c: 79: { +{ +[e :U _CMP5_GetOutputStatus ] +[f ] +"80 +[; ;mcc_generated_files/cmp5.c: 80: return (CMOUTbits.MC5OUT); +[e ) -> . . _CMOUTbits 0 4 `a ] +[e $UE 1732 ] +"81 +[; ;mcc_generated_files/cmp5.c: 81: } +[e :UE 1732 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1.d new file mode 100644 index 0000000..7846aee --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/cmp5.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/cmp5.p1: \ +mcc_generated_files/cmp5.c \ +mcc_generated_files/cmp5.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.i new file mode 100644 index 0000000..8cda46b --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.i @@ -0,0 +1,19526 @@ +# 1 "mcc_generated_files/dac1.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/dac1.c" 2 +# 51 "mcc_generated_files/dac1.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/dac1.c" 2 + +# 1 "mcc_generated_files/dac1.h" 1 +# 54 "mcc_generated_files/dac1.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/dac1.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/dac1.h" 2 +# 94 "mcc_generated_files/dac1.h" +void DAC1_Initialize(void); +# 125 "mcc_generated_files/dac1.h" +void DAC1_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac1.h" +void DAC1_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac1.h" +void DAC1_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac1.h" +uint16_t DAC1_Read10BitInputData(void); +# 52 "mcc_generated_files/dac1.c" 2 +# 68 "mcc_generated_files/dac1.c" +void DAC1_Initialize(void) +{ + + DAC1CON0 = 0xA0; + + DAC1REFH = 0x00; + + DAC1REFL = 0xCD; + + (DACLDbits.DAC1LD = 1); +} + + +void DAC1_Load16bitInputData(uint16_t input16BitData) +{ + + + DAC1CON0bits.DAC1FM = 1; + + + DAC1REFL = (uint8_t) input16BitData; + DAC1REFH = (uint8_t)(input16BitData >> 8); + + (DACLDbits.DAC1LD = 1); +} + +void DAC1_Load10bitInputData(uint16_t input10BitData) +{ + + + DAC1CON0bits.DAC1FM = 0; + + + DAC1REFL = (uint8_t) input10BitData; + DAC1REFH = (uint8_t)(input10BitData >> 8); + + (DACLDbits.DAC1LD = 1); +} + +void DAC1_Load8bitInputData(uint8_t input8BitData) +{ + + + DAC1CON0bits.DAC1FM = 0; + + + DAC1REFL = input8BitData; + + (DACLDbits.DAC1LD = 1); +} + +uint16_t DAC1_Read10BitInputData(void) { + + DAC1CON0bits.DAC1FM = 0; + + + uint16_t data = ((uint16_t) DAC1REFH) << 8; + data |= ((uint16_t) DAC1REFL); + + return data; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1 new file mode 100644 index 0000000..e50b13e --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1 @@ -0,0 +1,1870 @@ +Version 4.0 HI-TECH Software Intermediate Code +"13126 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13126: extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); +[v _DAC1CON0 `Vuc ~T0 @X0 0 e@1422 ] +"13773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13773: extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); +[v _DAC1REFH `Vuc ~T0 @X0 0 e@1424 ] +"13351 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13351: extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); +[v _DAC1REFL `Vuc ~T0 @X0 0 e@1423 ] +"13099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13099: struct { +[s S662 :1 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S662 . DAC1LD DAC2LD . DAC5LD ] +"13098 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13098: typedef union { +[u S661 `S662 1 ] +[n S661 . . ] +"13106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13106: extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +[v _DACLDbits `VS661 ~T0 @X0 0 e@1421 ] +"13132 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13132: struct { +[s S664 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S664 . NSS PSS OE2 OE1 FM EN ] +"13140 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13140: struct { +[s S665 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S665 . NSS0 NSS1 PSS0 PSS1 . OE ] +"13148 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13148: struct { +[s S666 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S666 . DACNSS DACPSS DACOE2 DACOE1 DACFM DACEN ] +"13156 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13156: struct { +[s S667 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S667 . DACNSS0 DACNSS1 DACPSS0 DACPSS1 . DACOE ] +"13164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13164: struct { +[s S668 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S668 . DAC1NSS DAC1PSS DAC1OE2 DAC1OE1 DAC1FM DAC1EN ] +"13172 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13172: struct { +[s S669 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S669 . DAC1NSS0 DAC1NSS1 DAC1PSS0 DAC1PSS1 ] +"13131 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13131: typedef union { +[u S663 `S664 1 `S665 1 `S666 1 `S667 1 `S668 1 `S669 1 ] +[n S663 . . . . . . . ] +"13179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13179: extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +[v _DAC1CON0bits `VS663 ~T0 @X0 0 e@1422 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"68 mcc_generated_files/dac1.c +[; ;mcc_generated_files/dac1.c: 68: void DAC1_Initialize(void) +[v _DAC1_Initialize `(v ~T0 @X0 1 ef ] +"69 +[; ;mcc_generated_files/dac1.c: 69: { +{ +[e :U _DAC1_Initialize ] +[f ] +"71 +[; ;mcc_generated_files/dac1.c: 71: DAC1CON0 = 0xA0; +[e = _DAC1CON0 -> -> 160 `i `uc ] +"73 +[; ;mcc_generated_files/dac1.c: 73: DAC1REFH = 0x00; +[e = _DAC1REFH -> -> 0 `i `uc ] +"75 +[; ;mcc_generated_files/dac1.c: 75: DAC1REFL = 0xCD; +[e = _DAC1REFL -> -> 205 `i `uc ] +"77 +[; ;mcc_generated_files/dac1.c: 77: (DACLDbits.DAC1LD = 1); +[e = . . _DACLDbits 0 0 -> -> 1 `i `uc ] +"78 +[; ;mcc_generated_files/dac1.c: 78: } +[e :UE 1731 ] +} +"81 +[; ;mcc_generated_files/dac1.c: 81: void DAC1_Load16bitInputData(uint16_t input16BitData) +[v _DAC1_Load16bitInputData `(v ~T0 @X0 1 ef1`us ] +"82 +[; ;mcc_generated_files/dac1.c: 82: { +{ +[e :U _DAC1_Load16bitInputData ] +"81 +[; ;mcc_generated_files/dac1.c: 81: void DAC1_Load16bitInputData(uint16_t input16BitData) +[v _input16BitData `us ~T0 @X0 1 r1 ] +"82 +[; ;mcc_generated_files/dac1.c: 82: { +[f ] +"85 +[; ;mcc_generated_files/dac1.c: 85: DAC1CON0bits.DAC1FM = 1; +[e = . . _DAC1CON0bits 4 4 -> -> 1 `i `uc ] +"88 +[; ;mcc_generated_files/dac1.c: 88: DAC1REFL = (uint8_t) input16BitData; +[e = _DAC1REFL -> _input16BitData `uc ] +"89 +[; ;mcc_generated_files/dac1.c: 89: DAC1REFH = (uint8_t)(input16BitData >> 8); +[e = _DAC1REFH -> >> -> _input16BitData `ui -> 8 `i `uc ] +"91 +[; ;mcc_generated_files/dac1.c: 91: (DACLDbits.DAC1LD = 1); +[e = . . _DACLDbits 0 0 -> -> 1 `i `uc ] +"92 +[; ;mcc_generated_files/dac1.c: 92: } +[e :UE 1732 ] +} +"94 +[; ;mcc_generated_files/dac1.c: 94: void DAC1_Load10bitInputData(uint16_t input10BitData) +[v _DAC1_Load10bitInputData `(v ~T0 @X0 1 ef1`us ] +"95 +[; ;mcc_generated_files/dac1.c: 95: { +{ +[e :U _DAC1_Load10bitInputData ] +"94 +[; ;mcc_generated_files/dac1.c: 94: void DAC1_Load10bitInputData(uint16_t input10BitData) +[v _input10BitData `us ~T0 @X0 1 r1 ] +"95 +[; ;mcc_generated_files/dac1.c: 95: { +[f ] +"98 +[; ;mcc_generated_files/dac1.c: 98: DAC1CON0bits.DAC1FM = 0; +[e = . . _DAC1CON0bits 4 4 -> -> 0 `i `uc ] +"101 +[; ;mcc_generated_files/dac1.c: 101: DAC1REFL = (uint8_t) input10BitData; +[e = _DAC1REFL -> _input10BitData `uc ] +"102 +[; ;mcc_generated_files/dac1.c: 102: DAC1REFH = (uint8_t)(input10BitData >> 8); +[e = _DAC1REFH -> >> -> _input10BitData `ui -> 8 `i `uc ] +"104 +[; ;mcc_generated_files/dac1.c: 104: (DACLDbits.DAC1LD = 1); +[e = . . _DACLDbits 0 0 -> -> 1 `i `uc ] +"105 +[; ;mcc_generated_files/dac1.c: 105: } +[e :UE 1733 ] +} +"107 +[; ;mcc_generated_files/dac1.c: 107: void DAC1_Load8bitInputData(uint8_t input8BitData) +[v _DAC1_Load8bitInputData `(v ~T0 @X0 1 ef1`uc ] +"108 +[; ;mcc_generated_files/dac1.c: 108: { +{ +[e :U _DAC1_Load8bitInputData ] +"107 +[; ;mcc_generated_files/dac1.c: 107: void DAC1_Load8bitInputData(uint8_t input8BitData) +[v _input8BitData `uc ~T0 @X0 1 r1 ] +"108 +[; ;mcc_generated_files/dac1.c: 108: { +[f ] +"111 +[; ;mcc_generated_files/dac1.c: 111: DAC1CON0bits.DAC1FM = 0; +[e = . . _DAC1CON0bits 4 4 -> -> 0 `i `uc ] +"114 +[; ;mcc_generated_files/dac1.c: 114: DAC1REFL = input8BitData; +[e = _DAC1REFL _input8BitData ] +"116 +[; ;mcc_generated_files/dac1.c: 116: (DACLDbits.DAC1LD = 1); +[e = . . _DACLDbits 0 0 -> -> 1 `i `uc ] +"117 +[; ;mcc_generated_files/dac1.c: 117: } +[e :UE 1734 ] +} +"119 +[; ;mcc_generated_files/dac1.c: 119: uint16_t DAC1_Read10BitInputData(void) { +[v _DAC1_Read10BitInputData `(us ~T0 @X0 1 ef ] +{ +[e :U _DAC1_Read10BitInputData ] +[f ] +"121 +[; ;mcc_generated_files/dac1.c: 121: DAC1CON0bits.DAC1FM = 0; +[e = . . _DAC1CON0bits 4 4 -> -> 0 `i `uc ] +"124 +[; ;mcc_generated_files/dac1.c: 124: uint16_t data = ((uint16_t) DAC1REFH) << 8; +[v _data `us ~T0 @X0 1 a ] +[e = _data -> << -> -> _DAC1REFH `us `ui -> 8 `i `us ] +"125 +[; ;mcc_generated_files/dac1.c: 125: data |= ((uint16_t) DAC1REFL); +[e =| _data -> -> _DAC1REFL `us `us ] +"127 +[; ;mcc_generated_files/dac1.c: 127: return data; +[e ) _data ] +[e $UE 1735 ] +"128 +[; ;mcc_generated_files/dac1.c: 128: } +[e :UE 1735 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1.d new file mode 100644 index 0000000..7a1cb25 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac1.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/dac1.p1: \ +mcc_generated_files/dac1.c \ +mcc_generated_files/dac1.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.i new file mode 100644 index 0000000..778b432 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.i @@ -0,0 +1,19483 @@ +# 1 "mcc_generated_files/dac3.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/dac3.c" 2 +# 51 "mcc_generated_files/dac3.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/dac3.c" 2 + +# 1 "mcc_generated_files/dac3.h" 1 +# 54 "mcc_generated_files/dac3.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/dac3.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/dac3.h" 2 +# 93 "mcc_generated_files/dac3.h" +void DAC3_Initialize(void); +# 129 "mcc_generated_files/dac3.h" +void DAC3_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac3.h" +uint8_t DAC3_GetOutput(void); +# 52 "mcc_generated_files/dac3.c" 2 + + + + + + +void DAC3_Initialize(void) +{ + + DAC3CON0 = 0x80; + + DAC3CON1 = 0x06; +} + +void DAC3_SetOutput(uint8_t inputData) +{ + DAC3CON1 = inputData; +} + +uint8_t DAC3_GetOutput(void) +{ + return DAC3CON1; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1 new file mode 100644 index 0000000..fcf3f89 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1 @@ -0,0 +1,1747 @@ +Version 4.0 HI-TECH Software Intermediate Code +"15264 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15264: extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); +[v _DAC3CON0 `Vuc ~T0 @X0 0 e@1428 ] +"15458 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15458: extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); +[v _DAC3CON1 `Vuc ~T0 @X0 0 e@1429 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/dac3.c +[; ;mcc_generated_files/dac3.c: 58: void DAC3_Initialize(void) +[v _DAC3_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/dac3.c: 59: { +{ +[e :U _DAC3_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/dac3.c: 61: DAC3CON0 = 0x80; +[e = _DAC3CON0 -> -> 128 `i `uc ] +"63 +[; ;mcc_generated_files/dac3.c: 63: DAC3CON1 = 0x06; +[e = _DAC3CON1 -> -> 6 `i `uc ] +"64 +[; ;mcc_generated_files/dac3.c: 64: } +[e :UE 1731 ] +} +"66 +[; ;mcc_generated_files/dac3.c: 66: void DAC3_SetOutput(uint8_t inputData) +[v _DAC3_SetOutput `(v ~T0 @X0 1 ef1`uc ] +"67 +[; ;mcc_generated_files/dac3.c: 67: { +{ +[e :U _DAC3_SetOutput ] +"66 +[; ;mcc_generated_files/dac3.c: 66: void DAC3_SetOutput(uint8_t inputData) +[v _inputData `uc ~T0 @X0 1 r1 ] +"67 +[; ;mcc_generated_files/dac3.c: 67: { +[f ] +"68 +[; ;mcc_generated_files/dac3.c: 68: DAC3CON1 = inputData; +[e = _DAC3CON1 _inputData ] +"69 +[; ;mcc_generated_files/dac3.c: 69: } +[e :UE 1732 ] +} +"71 +[; ;mcc_generated_files/dac3.c: 71: uint8_t DAC3_GetOutput(void) +[v _DAC3_GetOutput `(uc ~T0 @X0 1 ef ] +"72 +[; ;mcc_generated_files/dac3.c: 72: { +{ +[e :U _DAC3_GetOutput ] +[f ] +"73 +[; ;mcc_generated_files/dac3.c: 73: return DAC3CON1; +[e ) _DAC3CON1 ] +[e $UE 1733 ] +"74 +[; ;mcc_generated_files/dac3.c: 74: } +[e :UE 1733 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1.d new file mode 100644 index 0000000..c8a5762 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac3.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/dac3.p1: \ +mcc_generated_files/dac3.c \ +mcc_generated_files/dac3.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.i new file mode 100644 index 0000000..d5995eb --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.i @@ -0,0 +1,19483 @@ +# 1 "mcc_generated_files/dac4.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/dac4.c" 2 +# 51 "mcc_generated_files/dac4.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/dac4.c" 2 + +# 1 "mcc_generated_files/dac4.h" 1 +# 54 "mcc_generated_files/dac4.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/dac4.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/dac4.h" 2 +# 93 "mcc_generated_files/dac4.h" +void DAC4_Initialize(void); +# 129 "mcc_generated_files/dac4.h" +void DAC4_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac4.h" +uint8_t DAC4_GetOutput(void); +# 52 "mcc_generated_files/dac4.c" 2 + + + + + + +void DAC4_Initialize(void) +{ + + DAC4CON0 = 0x80; + + DAC4CON1 = 0x06; +} + +void DAC4_SetOutput(uint8_t inputData) +{ + DAC4CON1 = inputData; +} + +uint8_t DAC4_GetOutput(void) +{ + return DAC4CON1; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1 new file mode 100644 index 0000000..d5c7e8c --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1 @@ -0,0 +1,1747 @@ +Version 4.0 HI-TECH Software Intermediate Code +"15827 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15827: extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); +[v _DAC4CON0 `Vuc ~T0 @X0 0 e@1430 ] +"16021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16021: extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); +[v _DAC4CON1 `Vuc ~T0 @X0 0 e@1431 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/dac4.c +[; ;mcc_generated_files/dac4.c: 58: void DAC4_Initialize(void) +[v _DAC4_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/dac4.c: 59: { +{ +[e :U _DAC4_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/dac4.c: 61: DAC4CON0 = 0x80; +[e = _DAC4CON0 -> -> 128 `i `uc ] +"63 +[; ;mcc_generated_files/dac4.c: 63: DAC4CON1 = 0x06; +[e = _DAC4CON1 -> -> 6 `i `uc ] +"64 +[; ;mcc_generated_files/dac4.c: 64: } +[e :UE 1731 ] +} +"66 +[; ;mcc_generated_files/dac4.c: 66: void DAC4_SetOutput(uint8_t inputData) +[v _DAC4_SetOutput `(v ~T0 @X0 1 ef1`uc ] +"67 +[; ;mcc_generated_files/dac4.c: 67: { +{ +[e :U _DAC4_SetOutput ] +"66 +[; ;mcc_generated_files/dac4.c: 66: void DAC4_SetOutput(uint8_t inputData) +[v _inputData `uc ~T0 @X0 1 r1 ] +"67 +[; ;mcc_generated_files/dac4.c: 67: { +[f ] +"68 +[; ;mcc_generated_files/dac4.c: 68: DAC4CON1 = inputData; +[e = _DAC4CON1 _inputData ] +"69 +[; ;mcc_generated_files/dac4.c: 69: } +[e :UE 1732 ] +} +"71 +[; ;mcc_generated_files/dac4.c: 71: uint8_t DAC4_GetOutput(void) +[v _DAC4_GetOutput `(uc ~T0 @X0 1 ef ] +"72 +[; ;mcc_generated_files/dac4.c: 72: { +{ +[e :U _DAC4_GetOutput ] +[f ] +"73 +[; ;mcc_generated_files/dac4.c: 73: return DAC4CON1; +[e ) _DAC4CON1 ] +[e $UE 1733 ] +"74 +[; ;mcc_generated_files/dac4.c: 74: } +[e :UE 1733 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1.d new file mode 100644 index 0000000..7e9cb79 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac4.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/dac4.p1: \ +mcc_generated_files/dac4.c \ +mcc_generated_files/dac4.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.i new file mode 100644 index 0000000..e94061f --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.i @@ -0,0 +1,19526 @@ +# 1 "mcc_generated_files/dac5.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/dac5.c" 2 +# 51 "mcc_generated_files/dac5.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/dac5.c" 2 + +# 1 "mcc_generated_files/dac5.h" 1 +# 54 "mcc_generated_files/dac5.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/dac5.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/dac5.h" 2 +# 94 "mcc_generated_files/dac5.h" +void DAC5_Initialize(void); +# 125 "mcc_generated_files/dac5.h" +void DAC5_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac5.h" +void DAC5_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac5.h" +void DAC5_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac5.h" +uint16_t DAC5_Read10BitInputData(void); +# 52 "mcc_generated_files/dac5.c" 2 +# 68 "mcc_generated_files/dac5.c" +void DAC5_Initialize(void) +{ + + DAC5CON0 = 0xA0; + + DAC5REFH = 0x00; + + DAC5REFL = 0xCD; + + (DACLDbits.DAC5LD = 1); +} + + +void DAC5_Load16bitInputData(uint16_t input16BitData) +{ + + + DAC5CON0bits.DAC5FM = 1; + + + DAC5REFL = (uint8_t) input16BitData; + DAC5REFH = (uint8_t)(input16BitData >> 8); + + (DACLDbits.DAC5LD = 1); +} + +void DAC5_Load10bitInputData(uint16_t input10BitData) +{ + + + DAC5CON0bits.DAC5FM = 0; + + + DAC5REFL = (uint8_t) input10BitData; + DAC5REFH = (uint8_t)(input10BitData >> 8); + + (DACLDbits.DAC5LD = 1); +} + +void DAC5_Load8bitInputData(uint8_t input8BitData) +{ + + + DAC5CON0bits.DAC5FM = 0; + + + DAC5REFL = input8BitData; + + (DACLDbits.DAC5LD = 1); +} + +uint16_t DAC5_Read10BitInputData(void) { + + DAC5CON0bits.DAC5FM = 0; + + + uint16_t data = ((uint16_t) DAC5REFH) << 8; + data |= ((uint16_t) DAC5REFL); + + return data; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1 new file mode 100644 index 0000000..b4dc00f --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1 @@ -0,0 +1,1870 @@ +Version 4.0 HI-TECH Software Intermediate Code +"16390 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16390: extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); +[v _DAC5CON0 `Vuc ~T0 @X0 0 e@1432 ] +"17037 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17037: extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); +[v _DAC5REFH `Vuc ~T0 @X0 0 e@1434 ] +"16615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16615: extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); +[v _DAC5REFL `Vuc ~T0 @X0 0 e@1433 ] +"13099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13099: struct { +[s S662 :1 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S662 . DAC1LD DAC2LD . DAC5LD ] +"13098 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13098: typedef union { +[u S661 `S662 1 ] +[n S661 . . ] +"13106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13106: extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +[v _DACLDbits `VS661 ~T0 @X0 0 e@1421 ] +"16396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16396: struct { +[s S764 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S764 . NSS PSS OE2 OE1 FM EN ] +"16404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16404: struct { +[s S765 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S765 . NSS0 NSS1 PSS0 PSS1 . OE ] +"16412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16412: struct { +[s S766 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S766 . DACNSS DACPSS DACOE2 DACOE1 DACFM DACEN ] +"16420 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16420: struct { +[s S767 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S767 . DACNSS0 DACNSS1 DACPSS0 DACPSS1 . DACOE ] +"16428 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16428: struct { +[s S768 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S768 . DAC5NSS DAC5PSS DAC5OE2 DAC5OE1 DAC5FM DAC5EN ] +"16436 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16436: struct { +[s S769 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S769 . DAC5NSS0 DAC5NSS1 DAC5PSS0 DAC5PSS1 ] +"16395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16395: typedef union { +[u S763 `S764 1 `S765 1 `S766 1 `S767 1 `S768 1 `S769 1 ] +[n S763 . . . . . . . ] +"16443 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16443: extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +[v _DAC5CON0bits `VS763 ~T0 @X0 0 e@1432 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"68 mcc_generated_files/dac5.c +[; ;mcc_generated_files/dac5.c: 68: void DAC5_Initialize(void) +[v _DAC5_Initialize `(v ~T0 @X0 1 ef ] +"69 +[; ;mcc_generated_files/dac5.c: 69: { +{ +[e :U _DAC5_Initialize ] +[f ] +"71 +[; ;mcc_generated_files/dac5.c: 71: DAC5CON0 = 0xA0; +[e = _DAC5CON0 -> -> 160 `i `uc ] +"73 +[; ;mcc_generated_files/dac5.c: 73: DAC5REFH = 0x00; +[e = _DAC5REFH -> -> 0 `i `uc ] +"75 +[; ;mcc_generated_files/dac5.c: 75: DAC5REFL = 0xCD; +[e = _DAC5REFL -> -> 205 `i `uc ] +"77 +[; ;mcc_generated_files/dac5.c: 77: (DACLDbits.DAC5LD = 1); +[e = . . _DACLDbits 0 3 -> -> 1 `i `uc ] +"78 +[; ;mcc_generated_files/dac5.c: 78: } +[e :UE 1731 ] +} +"81 +[; ;mcc_generated_files/dac5.c: 81: void DAC5_Load16bitInputData(uint16_t input16BitData) +[v _DAC5_Load16bitInputData `(v ~T0 @X0 1 ef1`us ] +"82 +[; ;mcc_generated_files/dac5.c: 82: { +{ +[e :U _DAC5_Load16bitInputData ] +"81 +[; ;mcc_generated_files/dac5.c: 81: void DAC5_Load16bitInputData(uint16_t input16BitData) +[v _input16BitData `us ~T0 @X0 1 r1 ] +"82 +[; ;mcc_generated_files/dac5.c: 82: { +[f ] +"85 +[; ;mcc_generated_files/dac5.c: 85: DAC5CON0bits.DAC5FM = 1; +[e = . . _DAC5CON0bits 4 4 -> -> 1 `i `uc ] +"88 +[; ;mcc_generated_files/dac5.c: 88: DAC5REFL = (uint8_t) input16BitData; +[e = _DAC5REFL -> _input16BitData `uc ] +"89 +[; ;mcc_generated_files/dac5.c: 89: DAC5REFH = (uint8_t)(input16BitData >> 8); +[e = _DAC5REFH -> >> -> _input16BitData `ui -> 8 `i `uc ] +"91 +[; ;mcc_generated_files/dac5.c: 91: (DACLDbits.DAC5LD = 1); +[e = . . _DACLDbits 0 3 -> -> 1 `i `uc ] +"92 +[; ;mcc_generated_files/dac5.c: 92: } +[e :UE 1732 ] +} +"94 +[; ;mcc_generated_files/dac5.c: 94: void DAC5_Load10bitInputData(uint16_t input10BitData) +[v _DAC5_Load10bitInputData `(v ~T0 @X0 1 ef1`us ] +"95 +[; ;mcc_generated_files/dac5.c: 95: { +{ +[e :U _DAC5_Load10bitInputData ] +"94 +[; ;mcc_generated_files/dac5.c: 94: void DAC5_Load10bitInputData(uint16_t input10BitData) +[v _input10BitData `us ~T0 @X0 1 r1 ] +"95 +[; ;mcc_generated_files/dac5.c: 95: { +[f ] +"98 +[; ;mcc_generated_files/dac5.c: 98: DAC5CON0bits.DAC5FM = 0; +[e = . . _DAC5CON0bits 4 4 -> -> 0 `i `uc ] +"101 +[; ;mcc_generated_files/dac5.c: 101: DAC5REFL = (uint8_t) input10BitData; +[e = _DAC5REFL -> _input10BitData `uc ] +"102 +[; ;mcc_generated_files/dac5.c: 102: DAC5REFH = (uint8_t)(input10BitData >> 8); +[e = _DAC5REFH -> >> -> _input10BitData `ui -> 8 `i `uc ] +"104 +[; ;mcc_generated_files/dac5.c: 104: (DACLDbits.DAC5LD = 1); +[e = . . _DACLDbits 0 3 -> -> 1 `i `uc ] +"105 +[; ;mcc_generated_files/dac5.c: 105: } +[e :UE 1733 ] +} +"107 +[; ;mcc_generated_files/dac5.c: 107: void DAC5_Load8bitInputData(uint8_t input8BitData) +[v _DAC5_Load8bitInputData `(v ~T0 @X0 1 ef1`uc ] +"108 +[; ;mcc_generated_files/dac5.c: 108: { +{ +[e :U _DAC5_Load8bitInputData ] +"107 +[; ;mcc_generated_files/dac5.c: 107: void DAC5_Load8bitInputData(uint8_t input8BitData) +[v _input8BitData `uc ~T0 @X0 1 r1 ] +"108 +[; ;mcc_generated_files/dac5.c: 108: { +[f ] +"111 +[; ;mcc_generated_files/dac5.c: 111: DAC5CON0bits.DAC5FM = 0; +[e = . . _DAC5CON0bits 4 4 -> -> 0 `i `uc ] +"114 +[; ;mcc_generated_files/dac5.c: 114: DAC5REFL = input8BitData; +[e = _DAC5REFL _input8BitData ] +"116 +[; ;mcc_generated_files/dac5.c: 116: (DACLDbits.DAC5LD = 1); +[e = . . _DACLDbits 0 3 -> -> 1 `i `uc ] +"117 +[; ;mcc_generated_files/dac5.c: 117: } +[e :UE 1734 ] +} +"119 +[; ;mcc_generated_files/dac5.c: 119: uint16_t DAC5_Read10BitInputData(void) { +[v _DAC5_Read10BitInputData `(us ~T0 @X0 1 ef ] +{ +[e :U _DAC5_Read10BitInputData ] +[f ] +"121 +[; ;mcc_generated_files/dac5.c: 121: DAC5CON0bits.DAC5FM = 0; +[e = . . _DAC5CON0bits 4 4 -> -> 0 `i `uc ] +"124 +[; ;mcc_generated_files/dac5.c: 124: uint16_t data = ((uint16_t) DAC5REFH) << 8; +[v _data `us ~T0 @X0 1 a ] +[e = _data -> << -> -> _DAC5REFH `us `ui -> 8 `i `us ] +"125 +[; ;mcc_generated_files/dac5.c: 125: data |= ((uint16_t) DAC5REFL); +[e =| _data -> -> _DAC5REFL `us `us ] +"127 +[; ;mcc_generated_files/dac5.c: 127: return data; +[e ) _data ] +[e $UE 1735 ] +"128 +[; ;mcc_generated_files/dac5.c: 128: } +[e :UE 1735 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1.d new file mode 100644 index 0000000..5f0324a --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac5.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/dac5.p1: \ +mcc_generated_files/dac5.c \ +mcc_generated_files/dac5.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.i new file mode 100644 index 0000000..c164bdb --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.i @@ -0,0 +1,19483 @@ +# 1 "mcc_generated_files/dac7.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/dac7.c" 2 +# 51 "mcc_generated_files/dac7.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/dac7.c" 2 + +# 1 "mcc_generated_files/dac7.h" 1 +# 54 "mcc_generated_files/dac7.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/dac7.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/dac7.h" 2 +# 93 "mcc_generated_files/dac7.h" +void DAC7_Initialize(void); +# 129 "mcc_generated_files/dac7.h" +void DAC7_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac7.h" +uint8_t DAC7_GetOutput(void); +# 52 "mcc_generated_files/dac7.c" 2 + + + + + + +void DAC7_Initialize(void) +{ + + DAC7CON0 = 0xA0; + + DAC7CON1 = 0x06; +} + +void DAC7_SetOutput(uint8_t inputData) +{ + DAC7CON1 = inputData; +} + +uint8_t DAC7_GetOutput(void) +{ + return DAC7CON1; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1 new file mode 100644 index 0000000..970c8ac --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1 @@ -0,0 +1,1747 @@ +Version 4.0 HI-TECH Software Intermediate Code +"17459 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17459: extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); +[v _DAC7CON0 `Vuc ~T0 @X0 0 e@1438 ] +"17653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17653: extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); +[v _DAC7CON1 `Vuc ~T0 @X0 0 e@1439 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/dac7.c +[; ;mcc_generated_files/dac7.c: 58: void DAC7_Initialize(void) +[v _DAC7_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/dac7.c: 59: { +{ +[e :U _DAC7_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/dac7.c: 61: DAC7CON0 = 0xA0; +[e = _DAC7CON0 -> -> 160 `i `uc ] +"63 +[; ;mcc_generated_files/dac7.c: 63: DAC7CON1 = 0x06; +[e = _DAC7CON1 -> -> 6 `i `uc ] +"64 +[; ;mcc_generated_files/dac7.c: 64: } +[e :UE 1731 ] +} +"66 +[; ;mcc_generated_files/dac7.c: 66: void DAC7_SetOutput(uint8_t inputData) +[v _DAC7_SetOutput `(v ~T0 @X0 1 ef1`uc ] +"67 +[; ;mcc_generated_files/dac7.c: 67: { +{ +[e :U _DAC7_SetOutput ] +"66 +[; ;mcc_generated_files/dac7.c: 66: void DAC7_SetOutput(uint8_t inputData) +[v _inputData `uc ~T0 @X0 1 r1 ] +"67 +[; ;mcc_generated_files/dac7.c: 67: { +[f ] +"68 +[; ;mcc_generated_files/dac7.c: 68: DAC7CON1 = inputData; +[e = _DAC7CON1 _inputData ] +"69 +[; ;mcc_generated_files/dac7.c: 69: } +[e :UE 1732 ] +} +"71 +[; ;mcc_generated_files/dac7.c: 71: uint8_t DAC7_GetOutput(void) +[v _DAC7_GetOutput `(uc ~T0 @X0 1 ef ] +"72 +[; ;mcc_generated_files/dac7.c: 72: { +{ +[e :U _DAC7_GetOutput ] +[f ] +"73 +[; ;mcc_generated_files/dac7.c: 73: return DAC7CON1; +[e ) _DAC7CON1 ] +[e $UE 1733 ] +"74 +[; ;mcc_generated_files/dac7.c: 74: } +[e :UE 1733 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1.d new file mode 100644 index 0000000..dc94de0 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/dac7.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/dac7.p1: \ +mcc_generated_files/dac7.c \ +mcc_generated_files/dac7.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.i new file mode 100644 index 0000000..89a260c --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.i @@ -0,0 +1,31 @@ +# 1 "mcc_generated_files/device_config.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/device_config.c" 2 +# 50 "mcc_generated_files/device_config.c" +#pragma config FOSC = INTOSC +#pragma config WDTE = OFF +#pragma config PWRTE = OFF +#pragma config MCLRE = ON +#pragma config CP = OFF +#pragma config BOREN = ON +#pragma config CLKOUTEN = OFF +#pragma config IESO = ON +#pragma config FCMEN = ON + + +#pragma config WRT = OFF +#pragma config PPS1WAY = ON +#pragma config ZCD = OFF +#pragma config PLLEN = OFF +#pragma config STVREN = ON +#pragma config BORV = LO +#pragma config LPBOR = OFF +#pragma config LVP = ON +# 68 "mcc_generated_files/device_config.c" + diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1 new file mode 100644 index 0000000..3a75167 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1 @@ -0,0 +1,36 @@ +Version 4.0 HI-TECH Software Intermediate Code +"50 mcc_generated_files/device_config.c +[p x FOSC = INTOSC ] +"51 +[p x WDTE = OFF ] +"52 +[p x PWRTE = OFF ] +"53 +[p x MCLRE = ON ] +"54 +[p x CP = OFF ] +"55 +[p x BOREN = ON ] +"56 +[p x CLKOUTEN = OFF ] +"57 +[p x IESO = ON ] +"58 +[p x FCMEN = ON ] +"61 +[p x WRT = OFF ] +"62 +[p x PPS1WAY = ON ] +"63 +[p x ZCD = OFF ] +"64 +[p x PLLEN = OFF ] +"65 +[p x STVREN = ON ] +"66 +[p x BORV = LO ] +"67 +[p x LPBOR = OFF ] +"68 +[; ;mcc_generated_files/device_config.c: 68: +[p x LVP = ON ] diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1.d new file mode 100644 index 0000000..c820398 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/device_config.p1.d @@ -0,0 +1,2 @@ +build/default/production/mcc_generated_files/device_config.p1: \ +mcc_generated_files/device_config.c diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.i new file mode 100644 index 0000000..48cbd6b --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.i @@ -0,0 +1,19474 @@ +# 1 "mcc_generated_files/fvr.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/fvr.c" 2 +# 51 "mcc_generated_files/fvr.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/fvr.c" 2 + +# 1 "mcc_generated_files/fvr.h" 1 +# 54 "mcc_generated_files/fvr.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/fvr.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/fvr.h" 2 +# 93 "mcc_generated_files/fvr.h" + void FVR_Initialize(void); +# 127 "mcc_generated_files/fvr.h" +_Bool FVR_IsOutputReady(void); +# 52 "mcc_generated_files/fvr.c" 2 + + + + + + +void FVR_Initialize(void) +{ + + FVRCON = 0x00; +} + +_Bool FVR_IsOutputReady(void) +{ + return (FVRCONbits.FVRRDY); +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1 new file mode 100644 index 0000000..eda0a6e --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1 @@ -0,0 +1,1732 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2577 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2577: extern volatile unsigned char FVRCON __attribute__((address(0x09E))); +[v _FVRCON `Vuc ~T0 @X0 0 e@158 ] +"2583 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2583: struct { +[s S124 :2 `uc 1 :2 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S124 . ADFVR CDAFVR TSRNG TSEN FVRRDY FVREN ] +"2582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2582: typedef union { +[u S123 `S124 1 ] +[n S123 . . ] +"2592 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2592: extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +[v _FVRCONbits `VS123 ~T0 @X0 0 e@158 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/fvr.c +[; ;mcc_generated_files/fvr.c: 58: void FVR_Initialize(void) +[v _FVR_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/fvr.c: 59: { +{ +[e :U _FVR_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/fvr.c: 61: FVRCON = 0x00; +[e = _FVRCON -> -> 0 `i `uc ] +"62 +[; ;mcc_generated_files/fvr.c: 62: } +[e :UE 1731 ] +} +"64 +[; ;mcc_generated_files/fvr.c: 64: _Bool FVR_IsOutputReady(void) +[v _FVR_IsOutputReady `(a ~T0 @X0 1 ef ] +"65 +[; ;mcc_generated_files/fvr.c: 65: { +{ +[e :U _FVR_IsOutputReady ] +[f ] +"66 +[; ;mcc_generated_files/fvr.c: 66: return (FVRCONbits.FVRRDY); +[e ) -> . . _FVRCONbits 0 4 `a ] +[e $UE 1732 ] +"67 +[; ;mcc_generated_files/fvr.c: 67: } +[e :UE 1732 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1.d new file mode 100644 index 0000000..82d0a87 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/fvr.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/fvr.p1: \ +mcc_generated_files/fvr.c \ +mcc_generated_files/fvr.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.i new file mode 100644 index 0000000..d8c8bd5 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.i @@ -0,0 +1,19698 @@ +# 1 "mcc_generated_files/interrupt_manager.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/interrupt_manager.c" 2 +# 49 "mcc_generated_files/interrupt_manager.c" +# 1 "mcc_generated_files/interrupt_manager.h" 1 +# 49 "mcc_generated_files/interrupt_manager.c" 2 + +# 1 "mcc_generated_files/mcc.h" 1 +# 49 "mcc_generated_files/mcc.h" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 49 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 50 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/pin_manager.h" 1 +# 413 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 425 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 438 "mcc_generated_files/pin_manager.h" +void IOCBF0_ISR(void); +# 461 "mcc_generated_files/pin_manager.h" +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +# 485 "mcc_generated_files/pin_manager.h" +extern void (*IOCBF0_InterruptHandler)(void); +# 509 "mcc_generated_files/pin_manager.h" +void IOCBF0_DefaultInterruptHandler(void); +# 522 "mcc_generated_files/pin_manager.h" +void IOCCF7_ISR(void); +# 545 "mcc_generated_files/pin_manager.h" +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +# 569 "mcc_generated_files/pin_manager.h" +extern void (*IOCCF7_InterruptHandler)(void); +# 593 "mcc_generated_files/pin_manager.h" +void IOCCF7_DefaultInterruptHandler(void); +# 51 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 52 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 53 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 1 3 + + + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 1 3 +# 12 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 3 +extern int errno; +# 9 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__null.h" 1 3 +# 10 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 + + +extern void init_uart(void); + +extern char getch(void); +extern char getche(void); +extern void putch(char); +extern void ungetch(char); + +extern __bit kbhit(void); + + + +extern char * cgets(char *); +extern void cputs(const char *); +# 54 "mcc_generated_files/mcc.h" 2 + + +# 1 "mcc_generated_files/dac5.h" 1 +# 94 "mcc_generated_files/dac5.h" +void DAC5_Initialize(void); +# 125 "mcc_generated_files/dac5.h" +void DAC5_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac5.h" +void DAC5_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac5.h" +void DAC5_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac5.h" +uint16_t DAC5_Read10BitInputData(void); +# 56 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac4.h" 1 +# 93 "mcc_generated_files/dac4.h" +void DAC4_Initialize(void); +# 129 "mcc_generated_files/dac4.h" +void DAC4_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac4.h" +uint8_t DAC4_GetOutput(void); +# 57 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac7.h" 1 +# 93 "mcc_generated_files/dac7.h" +void DAC7_Initialize(void); +# 129 "mcc_generated_files/dac7.h" +void DAC7_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac7.h" +uint8_t DAC7_GetOutput(void); +# 58 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp2.h" 1 +# 92 "mcc_generated_files/cmp2.h" +void CMP2_Initialize(void); +# 132 "mcc_generated_files/cmp2.h" +_Bool CMP2_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp2.h" +void CMP2_ISR(void); +# 59 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp1.h" 1 +# 92 "mcc_generated_files/cmp1.h" +void CMP1_Initialize(void); +# 132 "mcc_generated_files/cmp1.h" +_Bool CMP1_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp1.h" +void CMP1_ISR(void); +# 60 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/fvr.h" 1 +# 93 "mcc_generated_files/fvr.h" + void FVR_Initialize(void); +# 127 "mcc_generated_files/fvr.h" +_Bool FVR_IsOutputReady(void); +# 61 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp5.h" 1 +# 92 "mcc_generated_files/cmp5.h" +void CMP5_Initialize(void); +# 132 "mcc_generated_files/cmp5.h" +_Bool CMP5_GetOutputStatus(void); +# 62 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/opa1.h" 1 +# 93 "mcc_generated_files/opa1.h" +void OPA1_Initialize(void); +# 63 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac1.h" 1 +# 94 "mcc_generated_files/dac1.h" +void DAC1_Initialize(void); +# 125 "mcc_generated_files/dac1.h" +void DAC1_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac1.h" +void DAC1_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac1.h" +void DAC1_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac1.h" +uint16_t DAC1_Read10BitInputData(void); +# 64 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/opa2.h" 1 +# 93 "mcc_generated_files/opa2.h" +void OPA2_Initialize(void); +# 65 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac3.h" 1 +# 93 "mcc_generated_files/dac3.h" +void DAC3_Initialize(void); +# 129 "mcc_generated_files/dac3.h" +void DAC3_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac3.h" +uint8_t DAC3_GetOutput(void); +# 66 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + GNDREF_SENSE = 0x0, + VIN_SENSE = 0xD, + STAGE2_MON = 0xE, + STAGE1_MON = 0xF, + channel_Switched_AN1 = 0x21, + channel_Switched_AN10 = 0x2A, + channel_Switched_AN18 = 0x32, + channel_DAC7_Output = 0x37, + channel_DAC5_Output = 0x39, + channel_DAC4_Output = 0x3A, + channel_DAC3_Output = 0x3B, + channel_DAC2_Output = 0x3C, + channel_Temp = 0x3D, + channel_DAC1_Output = 0x3E, + channel_FVRBuffer1 = 0x3F +} adc_channel_t; +# 147 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 177 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 204 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 236 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 269 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 299 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 327 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 67 "mcc_generated_files/mcc.h" 2 +# 82 "mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 95 "mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 107 "mcc_generated_files/mcc.h" +void WDT_Initialize(void); +# 50 "mcc_generated_files/interrupt_manager.c" 2 + + +void __attribute__((picinterrupt(("")))) INTERRUPT_InterruptManager (void) +{ + + if(INTCONbits.IOCIE == 1 && INTCONbits.IOCIF == 1) + { + PIN_MANAGER_IOC(); + } + else if(INTCONbits.PEIE == 1) + { + if(PIE2bits.C2IE == 1 && PIR2bits.C2IF == 1) + { + CMP2_ISR(); + LATCbits.LATC6 = (~0x04>>2)&1; + LATCbits.LATC5 = (~0x04>>1)&1; + LATCbits.LATC4 = (~0x04)&1; + } + else if(PIE2bits.C1IE == 1 && PIR2bits.C1IF == 1) + { + CMP1_ISR(); + LATCbits.LATC6 = (~0x04>>2)&1; + LATCbits.LATC5 = (~0x04>>1)&1; + LATCbits.LATC4 = (~0x04)&1; + } + else + { + + } + } + else + { + + } +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1 new file mode 100644 index 0000000..0767479 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1 @@ -0,0 +1,1850 @@ +Version 4.0 HI-TECH Software Intermediate Code +[t ~ __interrupt . k ] +[t T1 __interrupt ] +"357 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 357: struct { +[s S31 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S31 . IOCIF INTF TMR0IF IOCIE INTE TMR0IE PEIE GIE ] +"367 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 367: struct { +[s S32 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S32 . . T0IF . T0IE ] +"356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 356: typedef union { +[u S30 `S31 1 `S32 1 ] +[n S30 . . . ] +"374 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 374: extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +[v _INTCONbits `VS30 ~T0 @X0 0 e@11 ] +"425 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 425: void PIN_MANAGER_IOC(void); +[v _PIN_MANAGER_IOC `(v ~T0 @X0 0 ef ] +"1919 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1919: struct { +[s S96 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S96 . CCP2IE C3IE C4IE BCL1IE COGIE C1IE C2IE OSFIE ] +"1918 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1918: typedef union { +[u S95 `S96 1 ] +[n S95 . . ] +"1930 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1930: extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +[v _PIE2bits `VS95 ~T0 @X0 0 e@146 ] +"713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 713: struct { +[s S45 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S45 . CCP2IF C3IF C4IF BCL1IF COG1IF C1IF C2IF OSFIF ] +"712 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 712: typedef union { +[u S44 `S45 1 ] +[n S44 . . ] +"724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 724: extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +[v _PIR2bits `VS44 ~T0 @X0 0 e@18 ] +"148 mcc_generated_files/cmp2.h +[; ;mcc_generated_files/cmp2.h: 148: void CMP2_ISR(void); +[v _CMP2_ISR `(v ~T0 @X0 0 ef ] +"2803 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2803: struct { +[s S132 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S132 . LATC0 LATC1 LATC2 LATC3 LATC4 LATC5 LATC6 LATC7 ] +"2802 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2802: typedef union { +[u S131 `S132 1 ] +[n S131 . . ] +"2814 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2814: extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +[v _LATCbits `VS131 ~T0 @X0 0 e@270 ] +"148 mcc_generated_files/cmp1.h +[; ;mcc_generated_files/cmp1.h: 148: void CMP1_ISR(void); +[v _CMP1_ISR `(v ~T0 @X0 0 ef ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +[v $root$_INTERRUPT_InterruptManager `(v ~T0 @X0 0 e ] +"52 mcc_generated_files/interrupt_manager.c +[; ;mcc_generated_files/interrupt_manager.c: 52: void __attribute__((picinterrupt(("")))) INTERRUPT_InterruptManager (void) +[v _INTERRUPT_InterruptManager `(v ~T1 @X0 1 ef ] +"53 +[; ;mcc_generated_files/interrupt_manager.c: 53: { +{ +[e :U _INTERRUPT_InterruptManager ] +[f ] +"55 +[; ;mcc_generated_files/interrupt_manager.c: 55: if(INTCONbits.IOCIE == 1 && INTCONbits.IOCIF == 1) +[e $ ! && == -> . . _INTCONbits 0 3 `i -> 1 `i == -> . . _INTCONbits 0 0 `i -> 1 `i 1733 ] +"56 +[; ;mcc_generated_files/interrupt_manager.c: 56: { +{ +"57 +[; ;mcc_generated_files/interrupt_manager.c: 57: PIN_MANAGER_IOC(); +[e ( _PIN_MANAGER_IOC .. ] +"58 +[; ;mcc_generated_files/interrupt_manager.c: 58: } +} +[e $U 1734 ] +"59 +[; ;mcc_generated_files/interrupt_manager.c: 59: else if(INTCONbits.PEIE == 1) +[e :U 1733 ] +[e $ ! == -> . . _INTCONbits 0 6 `i -> 1 `i 1735 ] +"60 +[; ;mcc_generated_files/interrupt_manager.c: 60: { +{ +"61 +[; ;mcc_generated_files/interrupt_manager.c: 61: if(PIE2bits.C2IE == 1 && PIR2bits.C2IF == 1) +[e $ ! && == -> . . _PIE2bits 0 6 `i -> 1 `i == -> . . _PIR2bits 0 6 `i -> 1 `i 1736 ] +"62 +[; ;mcc_generated_files/interrupt_manager.c: 62: { +{ +"63 +[; ;mcc_generated_files/interrupt_manager.c: 63: CMP2_ISR(); +[e ( _CMP2_ISR .. ] +"64 +[; ;mcc_generated_files/interrupt_manager.c: 64: LATCbits.LATC6 = (~0x04>>2)&1; +[e = . . _LATCbits 0 6 -> & >> ~ -> 4 `i -> 2 `i -> 1 `i `uc ] +"65 +[; ;mcc_generated_files/interrupt_manager.c: 65: LATCbits.LATC5 = (~0x04>>1)&1; +[e = . . _LATCbits 0 5 -> & >> ~ -> 4 `i -> 1 `i -> 1 `i `uc ] +"66 +[; ;mcc_generated_files/interrupt_manager.c: 66: LATCbits.LATC4 = (~0x04)&1; +[e = . . _LATCbits 0 4 -> & ~ -> 4 `i -> 1 `i `uc ] +"67 +[; ;mcc_generated_files/interrupt_manager.c: 67: } +} +[e $U 1737 ] +"68 +[; ;mcc_generated_files/interrupt_manager.c: 68: else if(PIE2bits.C1IE == 1 && PIR2bits.C1IF == 1) +[e :U 1736 ] +[e $ ! && == -> . . _PIE2bits 0 5 `i -> 1 `i == -> . . _PIR2bits 0 5 `i -> 1 `i 1738 ] +"69 +[; ;mcc_generated_files/interrupt_manager.c: 69: { +{ +"70 +[; ;mcc_generated_files/interrupt_manager.c: 70: CMP1_ISR(); +[e ( _CMP1_ISR .. ] +"71 +[; ;mcc_generated_files/interrupt_manager.c: 71: LATCbits.LATC6 = (~0x04>>2)&1; +[e = . . _LATCbits 0 6 -> & >> ~ -> 4 `i -> 2 `i -> 1 `i `uc ] +"72 +[; ;mcc_generated_files/interrupt_manager.c: 72: LATCbits.LATC5 = (~0x04>>1)&1; +[e = . . _LATCbits 0 5 -> & >> ~ -> 4 `i -> 1 `i -> 1 `i `uc ] +"73 +[; ;mcc_generated_files/interrupt_manager.c: 73: LATCbits.LATC4 = (~0x04)&1; +[e = . . _LATCbits 0 4 -> & ~ -> 4 `i -> 1 `i `uc ] +"74 +[; ;mcc_generated_files/interrupt_manager.c: 74: } +} +[e $U 1739 ] +"75 +[; ;mcc_generated_files/interrupt_manager.c: 75: else +[e :U 1738 ] +"76 +[; ;mcc_generated_files/interrupt_manager.c: 76: { +{ +"78 +[; ;mcc_generated_files/interrupt_manager.c: 78: } +} +[e :U 1739 ] +[e :U 1737 ] +"79 +[; ;mcc_generated_files/interrupt_manager.c: 79: } +} +[e $U 1740 ] +"80 +[; ;mcc_generated_files/interrupt_manager.c: 80: else +[e :U 1735 ] +"81 +[; ;mcc_generated_files/interrupt_manager.c: 81: { +{ +"83 +[; ;mcc_generated_files/interrupt_manager.c: 83: } +} +[e :U 1740 ] +[e :U 1734 ] +"84 +[; ;mcc_generated_files/interrupt_manager.c: 84: } +[e :UE 1732 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1.d new file mode 100644 index 0000000..33f8023 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/interrupt_manager.p1.d @@ -0,0 +1,18 @@ +build/default/production/mcc_generated_files/interrupt_manager.p1: \ +mcc_generated_files/interrupt_manager.c \ +mcc_generated_files/interrupt_manager.h \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/dac5.h \ +mcc_generated_files/dac4.h \ +mcc_generated_files/dac7.h \ +mcc_generated_files/cmp2.h \ +mcc_generated_files/cmp1.h \ +mcc_generated_files/fvr.h \ +mcc_generated_files/cmp5.h \ +mcc_generated_files/opa1.h \ +mcc_generated_files/dac1.h \ +mcc_generated_files/opa2.h \ +mcc_generated_files/dac3.h \ +mcc_generated_files/adc.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.i new file mode 100644 index 0000000..d3dbc4e --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.i @@ -0,0 +1,19702 @@ +# 1 "mcc_generated_files/mcc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/mcc.c" 2 +# 47 "mcc_generated_files/mcc.c" +# 1 "mcc_generated_files/mcc.h" 1 +# 49 "mcc_generated_files/mcc.h" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 49 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 50 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/pin_manager.h" 1 +# 413 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 425 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 438 "mcc_generated_files/pin_manager.h" +void IOCBF0_ISR(void); +# 461 "mcc_generated_files/pin_manager.h" +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +# 485 "mcc_generated_files/pin_manager.h" +extern void (*IOCBF0_InterruptHandler)(void); +# 509 "mcc_generated_files/pin_manager.h" +void IOCBF0_DefaultInterruptHandler(void); +# 522 "mcc_generated_files/pin_manager.h" +void IOCCF7_ISR(void); +# 545 "mcc_generated_files/pin_manager.h" +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +# 569 "mcc_generated_files/pin_manager.h" +extern void (*IOCCF7_InterruptHandler)(void); +# 593 "mcc_generated_files/pin_manager.h" +void IOCCF7_DefaultInterruptHandler(void); +# 51 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 52 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 53 "mcc_generated_files/mcc.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 1 3 + + + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 1 3 +# 12 "/opt/microchip/xc8/v2.31/pic/include/c99/errno.h" 3 +extern int errno; +# 9 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__null.h" 1 3 +# 10 "/opt/microchip/xc8/v2.31/pic/include/c99/conio.h" 2 3 + + +extern void init_uart(void); + +extern char getch(void); +extern char getche(void); +extern void putch(char); +extern void ungetch(char); + +extern __bit kbhit(void); + + + +extern char * cgets(char *); +extern void cputs(const char *); +# 54 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/interrupt_manager.h" 1 +# 55 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac5.h" 1 +# 94 "mcc_generated_files/dac5.h" +void DAC5_Initialize(void); +# 125 "mcc_generated_files/dac5.h" +void DAC5_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac5.h" +void DAC5_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac5.h" +void DAC5_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac5.h" +uint16_t DAC5_Read10BitInputData(void); +# 56 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac4.h" 1 +# 93 "mcc_generated_files/dac4.h" +void DAC4_Initialize(void); +# 129 "mcc_generated_files/dac4.h" +void DAC4_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac4.h" +uint8_t DAC4_GetOutput(void); +# 57 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac7.h" 1 +# 93 "mcc_generated_files/dac7.h" +void DAC7_Initialize(void); +# 129 "mcc_generated_files/dac7.h" +void DAC7_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac7.h" +uint8_t DAC7_GetOutput(void); +# 58 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp2.h" 1 +# 92 "mcc_generated_files/cmp2.h" +void CMP2_Initialize(void); +# 132 "mcc_generated_files/cmp2.h" +_Bool CMP2_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp2.h" +void CMP2_ISR(void); +# 59 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp1.h" 1 +# 92 "mcc_generated_files/cmp1.h" +void CMP1_Initialize(void); +# 132 "mcc_generated_files/cmp1.h" +_Bool CMP1_GetOutputStatus(void); +# 148 "mcc_generated_files/cmp1.h" +void CMP1_ISR(void); +# 60 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/fvr.h" 1 +# 93 "mcc_generated_files/fvr.h" + void FVR_Initialize(void); +# 127 "mcc_generated_files/fvr.h" +_Bool FVR_IsOutputReady(void); +# 61 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/cmp5.h" 1 +# 92 "mcc_generated_files/cmp5.h" +void CMP5_Initialize(void); +# 132 "mcc_generated_files/cmp5.h" +_Bool CMP5_GetOutputStatus(void); +# 62 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/opa1.h" 1 +# 93 "mcc_generated_files/opa1.h" +void OPA1_Initialize(void); +# 63 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac1.h" 1 +# 94 "mcc_generated_files/dac1.h" +void DAC1_Initialize(void); +# 125 "mcc_generated_files/dac1.h" +void DAC1_Load16bitInputData(uint16_t input16BitData); +# 156 "mcc_generated_files/dac1.h" +void DAC1_Load10bitInputData(uint16_t input10BitData); +# 187 "mcc_generated_files/dac1.h" +void DAC1_Load8bitInputData(uint8_t input8BitData); +# 215 "mcc_generated_files/dac1.h" +uint16_t DAC1_Read10BitInputData(void); +# 64 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/opa2.h" 1 +# 93 "mcc_generated_files/opa2.h" +void OPA2_Initialize(void); +# 65 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/dac3.h" 1 +# 93 "mcc_generated_files/dac3.h" +void DAC3_Initialize(void); +# 129 "mcc_generated_files/dac3.h" +void DAC3_SetOutput(uint8_t inputData); +# 163 "mcc_generated_files/dac3.h" +uint8_t DAC3_GetOutput(void); +# 66 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + GNDREF_SENSE = 0x0, + VIN_SENSE = 0xD, + STAGE2_MON = 0xE, + STAGE1_MON = 0xF, + channel_Switched_AN1 = 0x21, + channel_Switched_AN10 = 0x2A, + channel_Switched_AN18 = 0x32, + channel_DAC7_Output = 0x37, + channel_DAC5_Output = 0x39, + channel_DAC4_Output = 0x3A, + channel_DAC3_Output = 0x3B, + channel_DAC2_Output = 0x3C, + channel_Temp = 0x3D, + channel_DAC1_Output = 0x3E, + channel_FVRBuffer1 = 0x3F +} adc_channel_t; +# 147 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 177 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 204 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 236 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 269 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 299 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 327 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 67 "mcc_generated_files/mcc.h" 2 +# 82 "mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 95 "mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 107 "mcc_generated_files/mcc.h" +void WDT_Initialize(void); +# 47 "mcc_generated_files/mcc.c" 2 + + + +void SYSTEM_Initialize(void) +{ + + PIN_MANAGER_Initialize(); + OSCILLATOR_Initialize(); + WDT_Initialize(); + DAC3_Initialize(); + CMP2_Initialize(); + FVR_Initialize(); + DAC5_Initialize(); + OPA2_Initialize(); + DAC4_Initialize(); + CMP1_Initialize(); + DAC7_Initialize(); + CMP5_Initialize(); + ADC_Initialize(); + OPA1_Initialize(); + DAC1_Initialize(); +} + +void OSCILLATOR_Initialize(void) +{ + + OSCCON = 0x70; + + OSCSTAT = 0x80; + + OSCTUNE = 0x00; + + BORCON = 0x00; +} + +void WDT_Initialize(void) +{ + + WDTCON = 0x16; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1 new file mode 100644 index 0000000..21019a3 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1 @@ -0,0 +1,1843 @@ +Version 4.0 HI-TECH Software Intermediate Code +"413 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 413: void PIN_MANAGER_Initialize (void); +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 0 ef ] +"95 mcc_generated_files/mcc.h +[; ;mcc_generated_files/mcc.h: 95: void OSCILLATOR_Initialize(void); +[v _OSCILLATOR_Initialize `(v ~T0 @X0 0 ef ] +"107 +[; ;mcc_generated_files/mcc.h: 107: void WDT_Initialize(void); +[v _WDT_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/dac3.h +[; ;mcc_generated_files/dac3.h: 93: void DAC3_Initialize(void); +[v _DAC3_Initialize `(v ~T0 @X0 0 ef ] +"92 mcc_generated_files/cmp2.h +[; ;mcc_generated_files/cmp2.h: 92: void CMP2_Initialize(void); +[v _CMP2_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/fvr.h +[; ;mcc_generated_files/fvr.h: 93: void FVR_Initialize(void); +[v _FVR_Initialize `(v ~T0 @X0 0 ef ] +"94 mcc_generated_files/dac5.h +[; ;mcc_generated_files/dac5.h: 94: void DAC5_Initialize(void); +[v _DAC5_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/opa2.h +[; ;mcc_generated_files/opa2.h: 93: void OPA2_Initialize(void); +[v _OPA2_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/dac4.h +[; ;mcc_generated_files/dac4.h: 93: void DAC4_Initialize(void); +[v _DAC4_Initialize `(v ~T0 @X0 0 ef ] +"92 mcc_generated_files/cmp1.h +[; ;mcc_generated_files/cmp1.h: 92: void CMP1_Initialize(void); +[v _CMP1_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/dac7.h +[; ;mcc_generated_files/dac7.h: 93: void DAC7_Initialize(void); +[v _DAC7_Initialize `(v ~T0 @X0 0 ef ] +"92 mcc_generated_files/cmp5.h +[; ;mcc_generated_files/cmp5.h: 92: void CMP5_Initialize(void); +[v _CMP5_Initialize `(v ~T0 @X0 0 ef ] +"147 mcc_generated_files/adc.h +[; ;mcc_generated_files/adc.h: 147: void ADC_Initialize(void); +[v _ADC_Initialize `(v ~T0 @X0 0 ef ] +"93 mcc_generated_files/opa1.h +[; ;mcc_generated_files/opa1.h: 93: void OPA1_Initialize(void); +[v _OPA1_Initialize `(v ~T0 @X0 0 ef ] +"94 mcc_generated_files/dac1.h +[; ;mcc_generated_files/dac1.h: 94: void DAC1_Initialize(void); +[v _DAC1_Initialize `(v ~T0 @X0 0 ef ] +"2410 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2410: extern volatile unsigned char OSCCON __attribute__((address(0x09B))); +[v _OSCCON `Vuc ~T0 @X0 0 e@155 ] +"2482 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2482: extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); +[v _OSCSTAT `Vuc ~T0 @X0 0 e@156 ] +"2352 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2352: extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); +[v _OSCTUNE `Vuc ~T0 @X0 0 e@154 ] +"2544 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2544: extern volatile unsigned char BORCON __attribute__((address(0x09D))); +[v _BORCON `Vuc ~T0 @X0 0 e@157 ] +"2293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2293: extern volatile unsigned char WDTCON __attribute__((address(0x099))); +[v _WDTCON `Vuc ~T0 @X0 0 e@153 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"50 mcc_generated_files/mcc.c +[; ;mcc_generated_files/mcc.c: 50: void SYSTEM_Initialize(void) +[v _SYSTEM_Initialize `(v ~T0 @X0 1 ef ] +"51 +[; ;mcc_generated_files/mcc.c: 51: { +{ +[e :U _SYSTEM_Initialize ] +[f ] +"53 +[; ;mcc_generated_files/mcc.c: 53: PIN_MANAGER_Initialize(); +[e ( _PIN_MANAGER_Initialize .. ] +"54 +[; ;mcc_generated_files/mcc.c: 54: OSCILLATOR_Initialize(); +[e ( _OSCILLATOR_Initialize .. ] +"55 +[; ;mcc_generated_files/mcc.c: 55: WDT_Initialize(); +[e ( _WDT_Initialize .. ] +"56 +[; ;mcc_generated_files/mcc.c: 56: DAC3_Initialize(); +[e ( _DAC3_Initialize .. ] +"57 +[; ;mcc_generated_files/mcc.c: 57: CMP2_Initialize(); +[e ( _CMP2_Initialize .. ] +"58 +[; ;mcc_generated_files/mcc.c: 58: FVR_Initialize(); +[e ( _FVR_Initialize .. ] +"59 +[; ;mcc_generated_files/mcc.c: 59: DAC5_Initialize(); +[e ( _DAC5_Initialize .. ] +"60 +[; ;mcc_generated_files/mcc.c: 60: OPA2_Initialize(); +[e ( _OPA2_Initialize .. ] +"61 +[; ;mcc_generated_files/mcc.c: 61: DAC4_Initialize(); +[e ( _DAC4_Initialize .. ] +"62 +[; ;mcc_generated_files/mcc.c: 62: CMP1_Initialize(); +[e ( _CMP1_Initialize .. ] +"63 +[; ;mcc_generated_files/mcc.c: 63: DAC7_Initialize(); +[e ( _DAC7_Initialize .. ] +"64 +[; ;mcc_generated_files/mcc.c: 64: CMP5_Initialize(); +[e ( _CMP5_Initialize .. ] +"65 +[; ;mcc_generated_files/mcc.c: 65: ADC_Initialize(); +[e ( _ADC_Initialize .. ] +"66 +[; ;mcc_generated_files/mcc.c: 66: OPA1_Initialize(); +[e ( _OPA1_Initialize .. ] +"67 +[; ;mcc_generated_files/mcc.c: 67: DAC1_Initialize(); +[e ( _DAC1_Initialize .. ] +"68 +[; ;mcc_generated_files/mcc.c: 68: } +[e :UE 1732 ] +} +"70 +[; ;mcc_generated_files/mcc.c: 70: void OSCILLATOR_Initialize(void) +[v _OSCILLATOR_Initialize `(v ~T0 @X0 1 ef ] +"71 +[; ;mcc_generated_files/mcc.c: 71: { +{ +[e :U _OSCILLATOR_Initialize ] +[f ] +"73 +[; ;mcc_generated_files/mcc.c: 73: OSCCON = 0x70; +[e = _OSCCON -> -> 112 `i `uc ] +"75 +[; ;mcc_generated_files/mcc.c: 75: OSCSTAT = 0x80; +[e = _OSCSTAT -> -> 128 `i `uc ] +"77 +[; ;mcc_generated_files/mcc.c: 77: OSCTUNE = 0x00; +[e = _OSCTUNE -> -> 0 `i `uc ] +"79 +[; ;mcc_generated_files/mcc.c: 79: BORCON = 0x00; +[e = _BORCON -> -> 0 `i `uc ] +"80 +[; ;mcc_generated_files/mcc.c: 80: } +[e :UE 1733 ] +} +"82 +[; ;mcc_generated_files/mcc.c: 82: void WDT_Initialize(void) +[v _WDT_Initialize `(v ~T0 @X0 1 ef ] +"83 +[; ;mcc_generated_files/mcc.c: 83: { +{ +[e :U _WDT_Initialize ] +[f ] +"85 +[; ;mcc_generated_files/mcc.c: 85: WDTCON = 0x16; +[e = _WDTCON -> -> 22 `i `uc ] +"86 +[; ;mcc_generated_files/mcc.c: 86: } +[e :UE 1734 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1.d new file mode 100644 index 0000000..e46d962 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/mcc.p1.d @@ -0,0 +1,18 @@ +build/default/production/mcc_generated_files/mcc.p1: \ +mcc_generated_files/mcc.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/interrupt_manager.h \ +mcc_generated_files/dac5.h \ +mcc_generated_files/dac4.h \ +mcc_generated_files/dac7.h \ +mcc_generated_files/cmp2.h \ +mcc_generated_files/cmp1.h \ +mcc_generated_files/fvr.h \ +mcc_generated_files/cmp5.h \ +mcc_generated_files/opa1.h \ +mcc_generated_files/dac1.h \ +mcc_generated_files/opa2.h \ +mcc_generated_files/dac3.h \ +mcc_generated_files/adc.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.i new file mode 100644 index 0000000..1f4e747 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.i @@ -0,0 +1,19473 @@ +# 1 "mcc_generated_files/opa1.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/opa1.c" 2 +# 51 "mcc_generated_files/opa1.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/opa1.c" 2 + +# 1 "mcc_generated_files/opa1.h" 1 +# 54 "mcc_generated_files/opa1.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/opa1.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/opa1.h" 2 +# 93 "mcc_generated_files/opa1.h" +void OPA1_Initialize(void); +# 52 "mcc_generated_files/opa1.c" 2 + + + + + + +void OPA1_Initialize(void) +{ + + OPA1CON = 0x80; + + OPA1ORS = 0x00; + + OPA1NCHS = 0x00; + + OPA1PCHS = 0x00; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1 new file mode 100644 index 0000000..6452102 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1 @@ -0,0 +1,1723 @@ +Version 4.0 HI-TECH Software Intermediate Code +"12621 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12621: extern volatile unsigned char OPA1CON __attribute__((address(0x511))); +[v _OPA1CON `Vuc ~T0 @X0 0 e@1297 ] +"12717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12717: extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); +[v _OPA1ORS `Vuc ~T0 @X0 0 e@1298 ] +"12565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12565: extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); +[v _OPA1NCHS `Vuc ~T0 @X0 0 e@1295 ] +"12593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12593: extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); +[v _OPA1PCHS `Vuc ~T0 @X0 0 e@1296 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/opa1.c +[; ;mcc_generated_files/opa1.c: 58: void OPA1_Initialize(void) +[v _OPA1_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/opa1.c: 59: { +{ +[e :U _OPA1_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/opa1.c: 61: OPA1CON = 0x80; +[e = _OPA1CON -> -> 128 `i `uc ] +"63 +[; ;mcc_generated_files/opa1.c: 63: OPA1ORS = 0x00; +[e = _OPA1ORS -> -> 0 `i `uc ] +"65 +[; ;mcc_generated_files/opa1.c: 65: OPA1NCHS = 0x00; +[e = _OPA1NCHS -> -> 0 `i `uc ] +"67 +[; ;mcc_generated_files/opa1.c: 67: OPA1PCHS = 0x00; +[e = _OPA1PCHS -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/opa1.c: 68: } +[e :UE 1731 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1.d new file mode 100644 index 0000000..1393657 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa1.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/opa1.p1: \ +mcc_generated_files/opa1.c \ +mcc_generated_files/opa1.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.i new file mode 100644 index 0000000..2a570c5 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.i @@ -0,0 +1,19473 @@ +# 1 "mcc_generated_files/opa2.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/opa2.c" 2 +# 51 "mcc_generated_files/opa2.c" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 51 "mcc_generated_files/opa2.c" 2 + +# 1 "mcc_generated_files/opa2.h" 1 +# 54 "mcc_generated_files/opa2.h" +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdbool.h" 1 3 +# 54 "mcc_generated_files/opa2.h" 2 + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 1 3 +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 127 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 23 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 145 "/opt/microchip/xc8/v2.31/pic/include/c99/stdint.h" 2 3 +# 55 "mcc_generated_files/opa2.h" 2 +# 93 "mcc_generated_files/opa2.h" +void OPA2_Initialize(void); +# 52 "mcc_generated_files/opa2.c" 2 + + + + + + +void OPA2_Initialize(void) +{ + + OPA2CON = 0x80; + + OPA2ORS = 0x00; + + OPA2NCHS = 0x00; + + OPA2PCHS = 0x00; +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1 new file mode 100644 index 0000000..f272c00 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1 @@ -0,0 +1,1723 @@ +Version 4.0 HI-TECH Software Intermediate Code +"12793 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12793: extern volatile unsigned char OPA2CON __attribute__((address(0x515))); +[v _OPA2CON `Vuc ~T0 @X0 0 e@1301 ] +"12889 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12889: extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); +[v _OPA2ORS `Vuc ~T0 @X0 0 e@1302 ] +"12737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12737: extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); +[v _OPA2NCHS `Vuc ~T0 @X0 0 e@1299 ] +"12765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12765: extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); +[v _OPA2PCHS `Vuc ~T0 @X0 0 e@1300 ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"58 mcc_generated_files/opa2.c +[; ;mcc_generated_files/opa2.c: 58: void OPA2_Initialize(void) +[v _OPA2_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/opa2.c: 59: { +{ +[e :U _OPA2_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/opa2.c: 61: OPA2CON = 0x80; +[e = _OPA2CON -> -> 128 `i `uc ] +"63 +[; ;mcc_generated_files/opa2.c: 63: OPA2ORS = 0x00; +[e = _OPA2ORS -> -> 0 `i `uc ] +"65 +[; ;mcc_generated_files/opa2.c: 65: OPA2NCHS = 0x00; +[e = _OPA2NCHS -> -> 0 `i `uc ] +"67 +[; ;mcc_generated_files/opa2.c: 67: OPA2PCHS = 0x00; +[e = _OPA2PCHS -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/opa2.c: 68: } +[e :UE 1731 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1.d new file mode 100644 index 0000000..8ad1705 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/opa2.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/opa2.p1: \ +mcc_generated_files/opa2.c \ +mcc_generated_files/opa2.h diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.i b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.i new file mode 100644 index 0000000..a3b75f4 --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.i @@ -0,0 +1,19549 @@ +# 1 "mcc_generated_files/pin_manager.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/pin_manager.c" 2 +# 49 "mcc_generated_files/pin_manager.c" +# 1 "mcc_generated_files/pin_manager.h" 1 +# 54 "mcc_generated_files/pin_manager.h" +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 18 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 1 3 + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/musl_xc8.h" 1 3 +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + + + + + +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/features.h" 1 3 +# 11 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 +# 21 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 3 +# 1 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 1 3 +# 18 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "/opt/microchip/xc8/v2.31/pic/include/c99/bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 22 "/opt/microchip/xc8/v2.31/pic/include/c99/stdlib.h" 2 3 + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); + + + + + +size_t __ctype_get_mb_cur_max(void); +# 5 "/opt/microchip/xc8/v2.31/pic/include/c99/xc8debug.h" 2 3 + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 1 3 + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 1 3 + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 1 3 +# 5 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/htc.h" 2 3 +# 6 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 1 3 +# 314 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 1 3 +# 44 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/__at.h" 1 3 +# 45 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 2 3 + + + + + + + +extern volatile unsigned char INDF0 __attribute__((address(0x000))); + +__asm("INDF0 equ 00h"); + + +typedef union { + struct { + unsigned INDF0 :8; + }; +} INDF0bits_t; +extern volatile INDF0bits_t INDF0bits __attribute__((address(0x000))); +# 72 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INDF1 __attribute__((address(0x001))); + +__asm("INDF1 equ 01h"); + + +typedef union { + struct { + unsigned INDF1 :8; + }; +} INDF1bits_t; +extern volatile INDF1bits_t INDF1bits __attribute__((address(0x001))); +# 92 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + +typedef union { + struct { + unsigned PCL :8; + }; +} PCLbits_t; +extern volatile PCLbits_t PCLbits __attribute__((address(0x002))); +# 112 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR0 __attribute__((address(0x004))); + + + +extern volatile unsigned char FSR0L __attribute__((address(0x004))); + +__asm("FSR0L equ 04h"); + + +typedef union { + struct { + unsigned FSR0L :8; + }; +} FSR0Lbits_t; +extern volatile FSR0Lbits_t FSR0Lbits __attribute__((address(0x004))); +# 195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H __attribute__((address(0x005))); + +__asm("FSR0H equ 05h"); + + +typedef union { + struct { + unsigned FSR0H :8; + }; +} FSR0Hbits_t; +extern volatile FSR0Hbits_t FSR0Hbits __attribute__((address(0x005))); +# 215 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short FSR1 __attribute__((address(0x006))); + + + +extern volatile unsigned char FSR1L __attribute__((address(0x006))); + +__asm("FSR1L equ 06h"); + + +typedef union { + struct { + unsigned FSR1L :8; + }; +} FSR1Lbits_t; +extern volatile FSR1Lbits_t FSR1Lbits __attribute__((address(0x006))); +# 239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H __attribute__((address(0x007))); + +__asm("FSR1H equ 07h"); + + +typedef union { + struct { + unsigned FSR1H :8; + }; +} FSR1Hbits_t; +extern volatile FSR1Hbits_t FSR1Hbits __attribute__((address(0x007))); +# 259 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR __attribute__((address(0x008))); + +__asm("BSR equ 08h"); + + +typedef union { + struct { + unsigned BSR :5; + }; + struct { + unsigned BSR0 :1; + unsigned BSR1 :1; + unsigned BSR2 :1; + unsigned BSR3 :1; + unsigned BSR4 :1; + }; +} BSRbits_t; +extern volatile BSRbits_t BSRbits __attribute__((address(0x008))); +# 311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG __attribute__((address(0x009))); + +__asm("WREG equ 09h"); + + +typedef union { + struct { + unsigned WREG0 :8; + }; +} WREGbits_t; +extern volatile WREGbits_t WREGbits __attribute__((address(0x009))); +# 331 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :7; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned IOCIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned IOCIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTA __attribute__((address(0x00C))); + +__asm("PORTA equ 0Ch"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned RA6 :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x00C))); +# 491 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x00D))); + +__asm("PORTB equ 0Dh"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x00D))); +# 553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x00E))); + +__asm("PORTC equ 0Eh"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x00E))); +# 615 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x010))); + +__asm("PORTE equ 010h"); + + +typedef union { + struct { + unsigned :3; + unsigned RE3 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x010))); +# 636 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x011))); + +__asm("PIR1 equ 011h"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned TMR1GIF :1; + }; + struct { + unsigned :2; + unsigned CCPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x011))); +# 707 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x012))); + +__asm("PIR2 equ 012h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned C3IF :1; + unsigned C4IF :1; + unsigned BCL1IF :1; + unsigned COG1IF :1; + unsigned C1IF :1; + unsigned C2IF :1; + unsigned OSFIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x012))); +# 769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0x013))); + +__asm("PIR3 equ 013h"); + + +typedef union { + struct { + unsigned CLC1IF :1; + unsigned CLC2IF :1; + unsigned CLC3IF :1; + unsigned CLC4IF :1; + unsigned ZCDIF :1; + unsigned COG2IF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0x013))); +# 819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR4 __attribute__((address(0x014))); + +__asm("PIR4 equ 014h"); + + +typedef union { + struct { + unsigned TMR4IF :1; + unsigned TMR6IF :1; + unsigned TMR3IF :1; + unsigned TMR3GIF :1; + unsigned TMR5IF :1; + unsigned TMR5GIF :1; + unsigned TMR8IF :1; + }; +} PIR4bits_t; +extern volatile PIR4bits_t PIR4bits __attribute__((address(0x014))); +# 875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR5 __attribute__((address(0x015))); + +__asm("PIR5 equ 015h"); + + +typedef union { + struct { + unsigned C5IF :1; + unsigned C6IF :1; + unsigned :2; + unsigned COG3IF :1; + unsigned :1; + unsigned CCP7IF :1; + }; +} PIR5bits_t; +extern volatile PIR5bits_t PIR5bits __attribute__((address(0x015))); +# 915 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIR6 __attribute__((address(0x016))); + +__asm("PIR6 equ 016h"); + + +typedef union { + struct { + unsigned PWM5IF :1; + unsigned PWM6IF :1; + unsigned PWM11IF :1; + }; +} PIR6bits_t; +extern volatile PIR6bits_t PIR6bits __attribute__((address(0x016))); +# 947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR0 __attribute__((address(0x017))); + +__asm("TMR0 equ 017h"); + + +typedef union { + struct { + unsigned TMR0 :8; + }; +} TMR0bits_t; +extern volatile TMR0bits_t TMR0bits __attribute__((address(0x017))); +# 967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x018))); + +__asm("TMR1 equ 018h"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x018))); + +__asm("TMR1L equ 018h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Lbits_t; +extern volatile TMR1Lbits_t TMR1Lbits __attribute__((address(0x018))); +# 994 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR1H __attribute__((address(0x019))); + +__asm("TMR1H equ 019h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR1Hbits_t; +extern volatile TMR1Hbits_t TMR1Hbits __attribute__((address(0x019))); +# 1014 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CON __attribute__((address(0x01A))); + +__asm("T1CON equ 01Ah"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR1ON :1; + unsigned :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned :2; + unsigned T1CS0 :1; + unsigned T1CS1 :1; + }; + struct { + unsigned T1ON :1; + unsigned :3; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + unsigned TMR1CS0 :1; + unsigned TMR1CS1 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x01A))); +# 1171 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GCON __attribute__((address(0x01B))); + +__asm("T1GCON equ 01Bh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T1GE :1; + }; + struct { + unsigned :2; + unsigned T1GVAL :1; + unsigned T1GGO_nDONE :1; + unsigned T1GSPM :1; + unsigned T1GTM :1; + unsigned T1GPOL :1; + unsigned TMR1GE :1; + }; + struct { + unsigned T1GSS0 :1; + unsigned T1GSS1 :1; + }; +} T1GCONbits_t; +extern volatile T1GCONbits_t T1GCONbits __attribute__((address(0x01B))); +# 1301 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0x01C))); + +__asm("TMR3 equ 01Ch"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0x01C))); + +__asm("TMR3L equ 01Ch"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Lbits_t; +extern volatile TMR3Lbits_t TMR3Lbits __attribute__((address(0x01C))); +# 1328 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR3H __attribute__((address(0x01D))); + +__asm("TMR3H equ 01Dh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR3Hbits_t; +extern volatile TMR3Hbits_t TMR3Hbits __attribute__((address(0x01D))); +# 1348 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0x01E))); + +__asm("T3CON equ 01Eh"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR3ON :1; + unsigned :1; + unsigned nT3SYNC :1; + unsigned T3OSCEN :1; + unsigned :2; + unsigned T3CS0 :1; + unsigned T3CS1 :1; + }; + struct { + unsigned T3ON :1; + unsigned :3; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + unsigned TMR3CS0 :1; + unsigned TMR3CS1 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0x01E))); +# 1505 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GCON __attribute__((address(0x01F))); + +__asm("T3GCON equ 01Fh"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T3GE :1; + }; + struct { + unsigned :2; + unsigned T3GVAL :1; + unsigned T3GGO_nDONE :1; + unsigned T3GSPM :1; + unsigned T3GTM :1; + unsigned T3GPOL :1; + unsigned TMR3GE :1; + }; + struct { + unsigned T3GSS0 :1; + unsigned T3GSS1 :1; + }; +} T3GCONbits_t; +extern volatile T3GCONbits_t T3GCONbits __attribute__((address(0x01F))); +# 1635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x08C))); + +__asm("TRISA equ 08Ch"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + unsigned TRISA6 :1; + unsigned TRISA7 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x08C))); +# 1697 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x08D))); + +__asm("TRISB equ 08Dh"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x08D))); +# 1759 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x08E))); + +__asm("TRISC equ 08Eh"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x08E))); +# 1821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x090))); + +__asm("TRISE equ 090h"); + + +typedef union { + struct { + unsigned :3; + unsigned TRISE3 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x090))); +# 1842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x091))); + +__asm("PIE1 equ 091h"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned TMR1GIE :1; + }; + struct { + unsigned :2; + unsigned CCPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x091))); +# 1913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x092))); + +__asm("PIE2 equ 092h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned C3IE :1; + unsigned C4IE :1; + unsigned BCL1IE :1; + unsigned COGIE :1; + unsigned C1IE :1; + unsigned C2IE :1; + unsigned OSFIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x092))); +# 1975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0x093))); + +__asm("PIE3 equ 093h"); + + +typedef union { + struct { + unsigned CLC1IE :1; + unsigned CLC2IE :1; + unsigned CLC3IE :1; + unsigned CLC4IE :1; + unsigned ZCDIE :1; + unsigned COG2IE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0x093))); +# 2025 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE4 __attribute__((address(0x094))); + +__asm("PIE4 equ 094h"); + + +typedef union { + struct { + unsigned TMR4IE :1; + unsigned TMR6IE :1; + unsigned TMR3IE :1; + unsigned TMR3GIE :1; + unsigned TMR5IE :1; + unsigned TMR5GIE :1; + unsigned TMR8IE :1; + }; +} PIE4bits_t; +extern volatile PIE4bits_t PIE4bits __attribute__((address(0x094))); +# 2081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE5 __attribute__((address(0x095))); + +__asm("PIE5 equ 095h"); + + +typedef union { + struct { + unsigned C5IE :1; + unsigned C6IE :1; + unsigned :2; + unsigned COG3IE :1; + unsigned :1; + unsigned CCP7IE :1; + }; +} PIE5bits_t; +extern volatile PIE5bits_t PIE5bits __attribute__((address(0x095))); +# 2121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PIE6 __attribute__((address(0x096))); + +__asm("PIE6 equ 096h"); + + +typedef union { + struct { + unsigned PWM5IE :1; + unsigned PWM6IE :1; + unsigned PWM11IE :1; + }; +} PIE6bits_t; +extern volatile PIE6bits_t PIE6bits __attribute__((address(0x096))); +# 2153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x097))); + +__asm("OPTION_REG equ 097h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned TMR0SE :1; + unsigned TMR0CS :1; + unsigned INTEDG :1; + unsigned nWPUEN :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + unsigned :1; + unsigned T0SE :1; + unsigned T0CS :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +# 2236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x098))); + +__asm("PCON equ 098h"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nRI :1; + unsigned nRMCLR :1; + unsigned nRWDT :1; + unsigned :1; + unsigned STKUNF :1; + unsigned STKOVF :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x098))); +# 2293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0x099))); + +__asm("WDTCON equ 099h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + unsigned WDTPS :5; + }; + struct { + unsigned :1; + unsigned WDTPS0 :1; + unsigned WDTPS1 :1; + unsigned WDTPS2 :1; + unsigned WDTPS3 :1; + unsigned WDTPS4 :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0x099))); +# 2352 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0x09A))); + +__asm("OSCTUNE equ 09Ah"); + + +typedef union { + struct { + unsigned TUN :6; + }; + struct { + unsigned TUN0 :1; + unsigned TUN1 :1; + unsigned TUN2 :1; + unsigned TUN3 :1; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0x09A))); +# 2410 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0x09B))); + +__asm("OSCCON equ 09Bh"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned IRCF :4; + unsigned SPLLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + unsigned :1; + unsigned IRCF0 :1; + unsigned IRCF1 :1; + unsigned IRCF2 :1; + unsigned IRCF3 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0x09B))); +# 2482 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OSCSTAT __attribute__((address(0x09C))); + +__asm("OSCSTAT equ 09Ch"); + + +typedef union { + struct { + unsigned HFIOFS :1; + unsigned LFIOFR :1; + unsigned MFIOFR :1; + unsigned HFIOFL :1; + unsigned HFIOFR :1; + unsigned OSTS :1; + unsigned PLLR :1; + unsigned SOSCR :1; + }; +} OSCSTATbits_t; +extern volatile OSCSTATbits_t OSCSTATbits __attribute__((address(0x09C))); +# 2544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BORCON __attribute__((address(0x09D))); + +__asm("BORCON equ 09Dh"); + + +typedef union { + struct { + unsigned BORRDY :1; + unsigned :5; + unsigned BORFS :1; + unsigned SBOREN :1; + }; +} BORCONbits_t; +extern volatile BORCONbits_t BORCONbits __attribute__((address(0x09D))); +# 2577 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FVRCON __attribute__((address(0x09E))); + +__asm("FVRCON equ 09Eh"); + + +typedef union { + struct { + unsigned ADFVR :2; + unsigned CDAFVR :2; + unsigned TSRNG :1; + unsigned TSEN :1; + unsigned FVRRDY :1; + unsigned FVREN :1; + }; +} FVRCONbits_t; +extern volatile FVRCONbits_t FVRCONbits __attribute__((address(0x09E))); +# 2627 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ZCD1CON __attribute__((address(0x09F))); + +__asm("ZCD1CON equ 09Fh"); + + +typedef union { + struct { + unsigned ZCD1INTN :1; + unsigned ZCD1INTP :1; + unsigned :2; + unsigned ZCD1POL :1; + unsigned ZCD1OUT :1; + unsigned :1; + unsigned ZCD1EN :1; + }; +} ZCD1CONbits_t; +extern volatile ZCD1CONbits_t ZCD1CONbits __attribute__((address(0x09F))); +# 2673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATA __attribute__((address(0x10C))); + +__asm("LATA equ 010Ch"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned LATA6 :1; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0x10C))); +# 2735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATB __attribute__((address(0x10D))); + +__asm("LATB equ 010Dh"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0x10D))); +# 2797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char LATC __attribute__((address(0x10E))); + +__asm("LATC equ 010Eh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0x10E))); +# 2859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CMOUT __attribute__((address(0x111))); + +__asm("CMOUT equ 0111h"); + + +typedef union { + struct { + unsigned MC1OUT :1; + unsigned MC2OUT :1; + unsigned MC3OUT :1; + unsigned MC4OUT :1; + unsigned MC5OUT :1; + unsigned MC6OUT :1; + }; +} CMOUTbits_t; +extern volatile CMOUTbits_t CMOUTbits __attribute__((address(0x111))); +# 2909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON0 __attribute__((address(0x112))); + +__asm("CM1CON0 equ 0112h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C1SYNC :1; + unsigned C1HYS :1; + unsigned C1SP :1; + unsigned C1ZLF :1; + unsigned C1POL :1; + unsigned :1; + unsigned C1OUT :1; + unsigned C1ON :1; + }; +} CM1CON0bits_t; +extern volatile CM1CON0bits_t CM1CON0bits __attribute__((address(0x112))); +# 3006 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1CON1 __attribute__((address(0x113))); + +__asm("CM1CON1 equ 0113h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C1INTN :1; + unsigned C1INTP :1; + }; +} CM1CON1bits_t; +extern volatile CM1CON1bits_t CM1CON1bits __attribute__((address(0x113))); +# 3046 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1NSEL __attribute__((address(0x114))); + +__asm("CM1NSEL equ 0114h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C1NCH :4; + }; + struct { + unsigned C1NCH0 :1; + unsigned C1NCH1 :1; + unsigned C1NCH2 :1; + unsigned C1NCH3 :1; + }; +} CM1NSELbits_t; +extern volatile CM1NSELbits_t CM1NSELbits __attribute__((address(0x114))); +# 3100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM1PSEL __attribute__((address(0x115))); + +__asm("CM1PSEL equ 0115h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C1PCH :4; + }; + struct { + unsigned C1PCH0 :1; + unsigned C1PCH1 :1; + unsigned C1PCH2 :1; + unsigned C1PCH3 :1; + }; +} CM1PSELbits_t; +extern volatile CM1PSELbits_t CM1PSELbits __attribute__((address(0x115))); +# 3180 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON0 __attribute__((address(0x116))); + +__asm("CM2CON0 equ 0116h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C2SYNC :1; + unsigned C2HYS :1; + unsigned C2SP :1; + unsigned C2ZLF :1; + unsigned C2POL :1; + unsigned :1; + unsigned C2OUT :1; + unsigned C2ON :1; + }; +} CM2CON0bits_t; +extern volatile CM2CON0bits_t CM2CON0bits __attribute__((address(0x116))); +# 3277 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2CON1 __attribute__((address(0x117))); + +__asm("CM2CON1 equ 0117h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C2INTN :1; + unsigned C2INTP :1; + }; +} CM2CON1bits_t; +extern volatile CM2CON1bits_t CM2CON1bits __attribute__((address(0x117))); +# 3317 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2NSEL __attribute__((address(0x118))); + +__asm("CM2NSEL equ 0118h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C2NCH :4; + }; + struct { + unsigned C2NCH0 :1; + unsigned C2NCH1 :1; + unsigned C2NCH2 :1; + unsigned C2NCH3 :1; + }; +} CM2NSELbits_t; +extern volatile CM2NSELbits_t CM2NSELbits __attribute__((address(0x118))); +# 3371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM2PSEL __attribute__((address(0x119))); + +__asm("CM2PSEL equ 0119h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C2PCH :4; + }; + struct { + unsigned C2PCH0 :1; + unsigned C2PCH1 :1; + unsigned C2PCH2 :1; + unsigned C2PCH3 :1; + }; +} CM2PSELbits_t; +extern volatile CM2PSELbits_t CM2PSELbits __attribute__((address(0x119))); +# 3451 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON0 __attribute__((address(0x11A))); + +__asm("CM3CON0 equ 011Ah"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C3SYNC :1; + unsigned C3HYS :1; + unsigned C3SP :1; + unsigned C3ZLF :1; + unsigned C3POL :1; + unsigned :1; + unsigned C3OUT :1; + unsigned C3ON :1; + }; +} CM3CON0bits_t; +extern volatile CM3CON0bits_t CM3CON0bits __attribute__((address(0x11A))); +# 3548 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3CON1 __attribute__((address(0x11B))); + +__asm("CM3CON1 equ 011Bh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C3INTN :1; + unsigned C3INTP :1; + }; +} CM3CON1bits_t; +extern volatile CM3CON1bits_t CM3CON1bits __attribute__((address(0x11B))); +# 3588 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3NSEL __attribute__((address(0x11C))); + +__asm("CM3NSEL equ 011Ch"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C3NCH :4; + }; + struct { + unsigned C3NCH0 :1; + unsigned C3NCH1 :1; + unsigned C3NCH2 :1; + unsigned C3NCH3 :1; + }; +} CM3NSELbits_t; +extern volatile CM3NSELbits_t CM3NSELbits __attribute__((address(0x11C))); +# 3642 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM3PSEL __attribute__((address(0x11D))); + +__asm("CM3PSEL equ 011Dh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C3PCH :4; + }; + struct { + unsigned C3PCH0 :1; + unsigned C3PCH1 :1; + unsigned C3PCH2 :1; + unsigned C3PCH3 :1; + }; +} CM3PSELbits_t; +extern volatile CM3PSELbits_t CM3PSELbits __attribute__((address(0x11D))); +# 3722 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELA __attribute__((address(0x18C))); + +__asm("ANSELA equ 018Ch"); + + +typedef union { + struct { + unsigned ANSA0 :1; + unsigned ANSA1 :1; + unsigned ANSA2 :1; + unsigned ANSA3 :1; + unsigned ANSA4 :1; + unsigned ANSA5 :1; + }; +} ANSELAbits_t; +extern volatile ANSELAbits_t ANSELAbits __attribute__((address(0x18C))); +# 3772 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELB __attribute__((address(0x18D))); + +__asm("ANSELB equ 018Dh"); + + +typedef union { + struct { + unsigned ANSB0 :1; + unsigned ANSB1 :1; + unsigned ANSB2 :1; + unsigned ANSB3 :1; + unsigned ANSB4 :1; + unsigned ANSB5 :1; + }; +} ANSELBbits_t; +extern volatile ANSELBbits_t ANSELBbits __attribute__((address(0x18D))); +# 3822 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ANSELC __attribute__((address(0x18E))); + +__asm("ANSELC equ 018Eh"); + + +typedef union { + struct { + unsigned :2; + unsigned ANSC2 :1; + unsigned ANSC3 :1; + unsigned ANSC4 :1; + unsigned ANSC5 :1; + unsigned ANSC6 :1; + unsigned ANSC7 :1; + }; +} ANSELCbits_t; +extern volatile ANSELCbits_t ANSELCbits __attribute__((address(0x18E))); +# 3873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMADR __attribute__((address(0x191))); + +__asm("PMADR equ 0191h"); + + + + +extern volatile unsigned char PMADRL __attribute__((address(0x191))); + +__asm("PMADRL equ 0191h"); + + +typedef union { + struct { + unsigned PMADRL :8; + }; +} PMADRLbits_t; +extern volatile PMADRLbits_t PMADRLbits __attribute__((address(0x191))); +# 3900 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMADRH __attribute__((address(0x192))); + +__asm("PMADRH equ 0192h"); + + +typedef union { + struct { + unsigned PMADRH :7; + }; +} PMADRHbits_t; +extern volatile PMADRHbits_t PMADRHbits __attribute__((address(0x192))); +# 3920 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PMDAT __attribute__((address(0x193))); + +__asm("PMDAT equ 0193h"); + + + + +extern volatile unsigned char PMDATL __attribute__((address(0x193))); + +__asm("PMDATL equ 0193h"); + + +typedef union { + struct { + unsigned PMDATL :8; + }; +} PMDATLbits_t; +extern volatile PMDATLbits_t PMDATLbits __attribute__((address(0x193))); +# 3947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMDATH __attribute__((address(0x194))); + +__asm("PMDATH equ 0194h"); + + +typedef union { + struct { + unsigned PMDATH :6; + }; +} PMDATHbits_t; +extern volatile PMDATHbits_t PMDATHbits __attribute__((address(0x194))); +# 3967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON1 __attribute__((address(0x195))); + +__asm("PMCON1 equ 0195h"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + unsigned LWLO :1; + unsigned CFGS :1; + }; +} PMCON1bits_t; +extern volatile PMCON1bits_t PMCON1bits __attribute__((address(0x195))); +# 4023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PMCON2 __attribute__((address(0x196))); + +__asm("PMCON2 equ 0196h"); + + +typedef union { + struct { + unsigned PMCON2 :8; + }; +} PMCON2bits_t; +extern volatile PMCON2bits_t PMCON2bits __attribute__((address(0x196))); +# 4043 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char VREGCON __attribute__((address(0x197))); + +__asm("VREGCON equ 0197h"); + + +typedef union { + struct { + unsigned VREGPM0 :1; + unsigned VREGPM1 :1; + }; +} VREGCONbits_t; +extern volatile VREGCONbits_t VREGCONbits __attribute__((address(0x197))); +# 4069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1REG __attribute__((address(0x199))); + +__asm("RC1REG equ 0199h"); + + +extern volatile unsigned char RCREG __attribute__((address(0x199))); + +__asm("RCREG equ 0199h"); + +extern volatile unsigned char RCREG1 __attribute__((address(0x199))); + +__asm("RCREG1 equ 0199h"); + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RC1REGbits_t; +extern volatile RC1REGbits_t RC1REGbits __attribute__((address(0x199))); + + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREGbits_t; +extern volatile RCREGbits_t RCREGbits __attribute__((address(0x199))); + + + + + + +typedef union { + struct { + unsigned RC1REG :8; + }; +} RCREG1bits_t; +extern volatile RCREG1bits_t RCREG1bits __attribute__((address(0x199))); +# 4123 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1REG __attribute__((address(0x19A))); + +__asm("TX1REG equ 019Ah"); + + +extern volatile unsigned char TXREG1 __attribute__((address(0x19A))); + +__asm("TXREG1 equ 019Ah"); + +extern volatile unsigned char TXREG __attribute__((address(0x19A))); + +__asm("TXREG equ 019Ah"); + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TX1REGbits_t; +extern volatile TX1REGbits_t TX1REGbits __attribute__((address(0x19A))); + + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREG1bits_t; +extern volatile TXREG1bits_t TXREG1bits __attribute__((address(0x19A))); + + + + + + +typedef union { + struct { + unsigned TX1REG :8; + }; +} TXREGbits_t; +extern volatile TXREGbits_t TXREGbits __attribute__((address(0x19A))); +# 4177 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short SP1BRG __attribute__((address(0x19B))); + +__asm("SP1BRG equ 019Bh"); + + + + +extern volatile unsigned char SP1BRGL __attribute__((address(0x19B))); + +__asm("SP1BRGL equ 019Bh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0x19B))); + +__asm("SPBRG equ 019Bh"); + +extern volatile unsigned char SPBRG1 __attribute__((address(0x19B))); + +__asm("SPBRG1 equ 019Bh"); + +extern volatile unsigned char SPBRGL __attribute__((address(0x19B))); + +__asm("SPBRGL equ 019Bh"); + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SP1BRGLbits_t; +extern volatile SP1BRGLbits_t SP1BRGLbits __attribute__((address(0x19B))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGbits_t; +extern volatile SPBRGbits_t SPBRGbits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRG1bits_t; +extern volatile SPBRG1bits_t SPBRG1bits __attribute__((address(0x19B))); + + + + + + +typedef union { + struct { + unsigned SP1BRGL :8; + }; +} SPBRGLbits_t; +extern volatile SPBRGLbits_t SPBRGLbits __attribute__((address(0x19B))); +# 4254 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SP1BRGH __attribute__((address(0x19C))); + +__asm("SP1BRGH equ 019Ch"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0x19C))); + +__asm("SPBRGH equ 019Ch"); + +extern volatile unsigned char SPBRGH1 __attribute__((address(0x19C))); + +__asm("SPBRGH1 equ 019Ch"); + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SP1BRGHbits_t; +extern volatile SP1BRGHbits_t SP1BRGHbits __attribute__((address(0x19C))); + + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGHbits_t; +extern volatile SPBRGHbits_t SPBRGHbits __attribute__((address(0x19C))); + + + + + + +typedef union { + struct { + unsigned SP1BRGH :8; + }; +} SPBRGH1bits_t; +extern volatile SPBRGH1bits_t SPBRGH1bits __attribute__((address(0x19C))); +# 4308 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1STA __attribute__((address(0x19D))); + +__asm("RC1STA equ 019Dh"); + + +extern volatile unsigned char RCSTA1 __attribute__((address(0x19D))); + +__asm("RCSTA1 equ 019Dh"); + +extern volatile unsigned char RCSTA __attribute__((address(0x19D))); + +__asm("RCSTA equ 019Dh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RC1STAbits_t; +extern volatile RC1STAbits_t RC1STAbits __attribute__((address(0x19D))); +# 4377 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0x19D))); +# 4431 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x19D))); +# 4488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TX1STA __attribute__((address(0x19E))); + +__asm("TX1STA equ 019Eh"); + + +extern volatile unsigned char TXSTA1 __attribute__((address(0x19E))); + +__asm("TXSTA1 equ 019Eh"); + +extern volatile unsigned char TXSTA __attribute__((address(0x19E))); + +__asm("TXSTA equ 019Eh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TX1STAbits_t; +extern volatile TX1STAbits_t TX1STAbits __attribute__((address(0x19E))); +# 4557 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0x19E))); +# 4611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x19E))); +# 4668 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BAUD1CON __attribute__((address(0x19F))); + +__asm("BAUD1CON equ 019Fh"); + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0x19F))); + +__asm("BAUDCON1 equ 019Fh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0x19F))); + +__asm("BAUDCTL1 equ 019Fh"); + +extern volatile unsigned char BAUDCON __attribute__((address(0x19F))); + +__asm("BAUDCON equ 019Fh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0x19F))); + +__asm("BAUDCTL equ 019Fh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUD1CONbits_t; +extern volatile BAUD1CONbits_t BAUD1CONbits __attribute__((address(0x19F))); +# 4735 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0x19F))); +# 4779 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0x19F))); +# 4823 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0x19F))); +# 4867 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned SCKP :1; + unsigned :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0x19F))); +# 4914 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUA __attribute__((address(0x20C))); + +__asm("WPUA equ 020Ch"); + + +typedef union { + struct { + unsigned WPUA0 :1; + unsigned WPUA1 :1; + unsigned WPUA2 :1; + unsigned WPUA3 :1; + unsigned WPUA4 :1; + unsigned WPUA5 :1; + unsigned WPUA6 :1; + unsigned WPUA7 :1; + }; +} WPUAbits_t; +extern volatile WPUAbits_t WPUAbits __attribute__((address(0x20C))); +# 4976 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUB __attribute__((address(0x20D))); + +__asm("WPUB equ 020Dh"); + + +typedef union { + struct { + unsigned WPUB0 :1; + unsigned WPUB1 :1; + unsigned WPUB2 :1; + unsigned WPUB3 :1; + unsigned WPUB4 :1; + unsigned WPUB5 :1; + unsigned WPUB6 :1; + unsigned WPUB7 :1; + }; +} WPUBbits_t; +extern volatile WPUBbits_t WPUBbits __attribute__((address(0x20D))); +# 5038 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUC __attribute__((address(0x20E))); + +__asm("WPUC equ 020Eh"); + + +typedef union { + struct { + unsigned WPUC0 :1; + unsigned WPUC1 :1; + unsigned WPUC2 :1; + unsigned WPUC3 :1; + unsigned WPUC4 :1; + unsigned WPUC5 :1; + unsigned WPUC6 :1; + unsigned WPUC7 :1; + }; +} WPUCbits_t; +extern volatile WPUCbits_t WPUCbits __attribute__((address(0x20E))); +# 5100 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WPUE __attribute__((address(0x210))); + +__asm("WPUE equ 0210h"); + + +typedef union { + struct { + unsigned :3; + unsigned WPUE3 :1; + }; +} WPUEbits_t; +extern volatile WPUEbits_t WPUEbits __attribute__((address(0x210))); +# 5121 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0x211))); + +__asm("SSP1BUF equ 0211h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0x211))); + +__asm("SSPBUF equ 0211h"); + + +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSP1BUFbits_t; +extern volatile SSP1BUFbits_t SSP1BUFbits __attribute__((address(0x211))); +# 5252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1BUF0 :1; + unsigned SSP1BUF1 :1; + unsigned SSP1BUF2 :1; + unsigned SSP1BUF3 :1; + unsigned SSP1BUF4 :1; + unsigned SSP1BUF5 :1; + unsigned SSP1BUF6 :1; + unsigned SSP1BUF7 :1; + }; + struct { + unsigned BUF :8; + }; + struct { + unsigned BUF0 :1; + unsigned BUF1 :1; + unsigned BUF2 :1; + unsigned BUF3 :1; + unsigned BUF4 :1; + unsigned BUF5 :1; + unsigned BUF6 :1; + unsigned BUF7 :1; + }; + struct { + unsigned SSP1BUF :8; + }; +} SSPBUFbits_t; +extern volatile SSPBUFbits_t SSPBUFbits __attribute__((address(0x211))); +# 5375 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0x212))); + +__asm("SSP1ADD equ 0212h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0x212))); + +__asm("SSPADD equ 0212h"); + + +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0x212))); +# 5506 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1ADD0 :1; + unsigned SSP1ADD1 :1; + unsigned SSP1ADD2 :1; + unsigned SSP1ADD3 :1; + unsigned SSP1ADD4 :1; + unsigned SSP1ADD5 :1; + unsigned SSP1ADD6 :1; + unsigned SSP1ADD7 :1; + }; + struct { + unsigned ADD :8; + }; + struct { + unsigned ADD0 :1; + unsigned ADD1 :1; + unsigned ADD2 :1; + unsigned ADD3 :1; + unsigned ADD4 :1; + unsigned ADD5 :1; + unsigned ADD6 :1; + unsigned ADD7 :1; + }; + struct { + unsigned SSP1ADD :8; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0x212))); +# 5629 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1MSK __attribute__((address(0x213))); + +__asm("SSP1MSK equ 0213h"); + + +extern volatile unsigned char SSPMSK __attribute__((address(0x213))); + +__asm("SSPMSK equ 0213h"); + + +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSP1MSKbits_t; +extern volatile SSP1MSKbits_t SSP1MSKbits __attribute__((address(0x213))); +# 5760 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSP1MSK0 :1; + unsigned SSP1MSK1 :1; + unsigned SSP1MSK2 :1; + unsigned SSP1MSK3 :1; + unsigned SSP1MSK4 :1; + unsigned SSP1MSK5 :1; + unsigned SSP1MSK6 :1; + unsigned SSP1MSK7 :1; + }; + struct { + unsigned MSK :8; + }; + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned SSP1MSK :8; + }; +} SSPMSKbits_t; +extern volatile SSPMSKbits_t SSPMSKbits __attribute__((address(0x213))); +# 5883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0x214))); + +__asm("SSP1STAT equ 0214h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x214))); + +__asm("SSPSTAT equ 0214h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0x214))); +# 5948 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x214))); +# 6005 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0x215))); + +__asm("SSP1CON1 equ 0215h"); + + +extern volatile unsigned char SSPCON __attribute__((address(0x215))); + +__asm("SSPCON equ 0215h"); + +extern volatile unsigned char SSPCON1 __attribute__((address(0x215))); + +__asm("SSPCON1 equ 0215h"); + +extern volatile unsigned char SSP1CON __attribute__((address(0x215))); + +__asm("SSP1CON equ 0215h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0x215))); +# 6086 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x215))); +# 6148 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0x215))); +# 6210 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSP1CONbits_t; +extern volatile SSP1CONbits_t SSP1CONbits __attribute__((address(0x215))); +# 6275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON2 __attribute__((address(0x216))); + +__asm("SSP1CON2 equ 0216h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0x216))); + +__asm("SSPCON2 equ 0216h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0x216))); +# 6340 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x216))); +# 6397 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSP1CON3 __attribute__((address(0x217))); + +__asm("SSP1CON3 equ 0217h"); + + +extern volatile unsigned char SSPCON3 __attribute__((address(0x217))); + +__asm("SSPCON3 equ 0217h"); + + +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSP1CON3bits_t; +extern volatile SSP1CON3bits_t SSP1CON3bits __attribute__((address(0x217))); +# 6462 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DHEN :1; + unsigned AHEN :1; + unsigned SBCDE :1; + unsigned SDAHT :1; + unsigned BOEN :1; + unsigned SCIE :1; + unsigned PCIE :1; + unsigned ACKTIM :1; + }; +} SSPCON3bits_t; +extern volatile SSPCON3bits_t SSPCON3bits __attribute__((address(0x217))); +# 6519 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON0 __attribute__((address(0x21B))); + +__asm("MD3CON0 equ 021Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD3BIT :1; + unsigned :3; + unsigned MD3OPOL :1; + unsigned MD3OUT :1; + unsigned :1; + unsigned MD3EN :1; + }; +} MD3CON0bits_t; +extern volatile MD3CON0bits_t MD3CON0bits __attribute__((address(0x21B))); +# 6587 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CON1 __attribute__((address(0x21C))); + +__asm("MD3CON1 equ 021Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD3CLSYNC :1; + unsigned MD3CLPOL :1; + unsigned :2; + unsigned MD3CHSYNC :1; + unsigned MD3CHPOL :1; + }; +} MD3CON1bits_t; +extern volatile MD3CON1bits_t MD3CON1bits __attribute__((address(0x21C))); +# 6653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3SRC __attribute__((address(0x21D))); + +__asm("MD3SRC equ 021Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD3MS :5; + }; + struct { + unsigned MD3MS0 :1; + unsigned MD3MS1 :1; + unsigned MD3MS2 :1; + unsigned MD3MS3 :1; + unsigned MD3MS4 :1; + }; +} MD3SRCbits_t; +extern volatile MD3SRCbits_t MD3SRCbits __attribute__((address(0x21D))); +# 6745 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARL __attribute__((address(0x21E))); + +__asm("MD3CARL equ 021Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD3CL :5; + }; + struct { + unsigned MD3CL0 :1; + unsigned MD3CL1 :1; + unsigned MD3CL2 :1; + unsigned MD3CL3 :1; + unsigned MD3CL4 :1; + }; +} MD3CARLbits_t; +extern volatile MD3CARLbits_t MD3CARLbits __attribute__((address(0x21E))); +# 6837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CARH __attribute__((address(0x21F))); + +__asm("MD3CARH equ 021Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD3CH :5; + }; + struct { + unsigned MD3CH0 :1; + unsigned MD3CH1 :1; + unsigned MD3CH2 :1; + unsigned MD3CH3 :1; + unsigned MD3CH4 :1; + }; +} MD3CARHbits_t; +extern volatile MD3CARHbits_t MD3CARHbits __attribute__((address(0x21F))); +# 6929 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONA __attribute__((address(0x28C))); + +__asm("ODCONA equ 028Ch"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODA4 :1; + unsigned ODA5 :1; + unsigned ODA6 :1; + unsigned ODA7 :1; + }; +} ODCONAbits_t; +extern volatile ODCONAbits_t ODCONAbits __attribute__((address(0x28C))); +# 6991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONB __attribute__((address(0x28D))); + +__asm("ODCONB equ 028Dh"); + + +typedef union { + struct { + unsigned ODA0 :1; + unsigned ODA1 :1; + unsigned ODA2 :1; + unsigned ODA3 :1; + unsigned ODB4 :1; + unsigned ODB5 :1; + unsigned ODB6 :1; + unsigned ODB7 :1; + }; +} ODCONBbits_t; +extern volatile ODCONBbits_t ODCONBbits __attribute__((address(0x28D))); +# 7053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ODCONC __attribute__((address(0x28E))); + +__asm("ODCONC equ 028Eh"); + + +typedef union { + struct { + unsigned ODC0 :1; + unsigned ODC1 :1; + unsigned ODC2 :1; + unsigned ODC3 :1; + unsigned ODC4 :1; + unsigned ODC5 :1; + unsigned ODC6 :1; + unsigned ODC7 :1; + }; +} ODCONCbits_t; +extern volatile ODCONCbits_t ODCONCbits __attribute__((address(0x28E))); +# 7115 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x291))); + +__asm("CCPR1 equ 0291h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x291))); + +__asm("CCPR1L equ 0291h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR1Lbits_t; +extern volatile CCPR1Lbits_t CCPR1Lbits __attribute__((address(0x291))); +# 7142 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR1H __attribute__((address(0x292))); + +__asm("CCPR1H equ 0292h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR1Hbits_t; +extern volatile CCPR1Hbits_t CCPR1Hbits __attribute__((address(0x292))); +# 7162 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CON __attribute__((address(0x293))); + +__asm("CCP1CON equ 0293h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP1MODE :4; + unsigned CCP1FMT :1; + unsigned CCP1OUT :1; + unsigned :1; + unsigned CCP1EN :1; + }; + struct { + unsigned CCP1MODE0 :1; + unsigned CCP1MODE1 :1; + unsigned CCP1MODE2 :1; + unsigned CCP1MODE3 :1; + }; + struct { + unsigned :7; + unsigned P1M1 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x293))); +# 7289 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1CAP __attribute__((address(0x294))); + +__asm("CCP1CAP equ 0294h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP1CTS :8; + }; + struct { + unsigned CCP1CTS0 :1; + unsigned CCP1CTS1 :1; + unsigned CCP1CTS2 :1; + unsigned CCP1CTS3 :1; + }; +} CCP1CAPbits_t; +extern volatile CCP1CAPbits_t CCP1CAPbits __attribute__((address(0x294))); +# 7369 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0x295))); + +__asm("CCPR2 equ 0295h"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x295))); + +__asm("CCPR2L equ 0295h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR2Lbits_t; +extern volatile CCPR2Lbits_t CCPR2Lbits __attribute__((address(0x295))); +# 7396 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR2H __attribute__((address(0x296))); + +__asm("CCPR2H equ 0296h"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR2Hbits_t; +extern volatile CCPR2Hbits_t CCPR2Hbits __attribute__((address(0x296))); +# 7416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CON __attribute__((address(0x297))); + +__asm("CCP2CON equ 0297h"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP2MODE :4; + unsigned CCP2FMT :1; + unsigned CCP2OUT :1; + unsigned :1; + unsigned CCP2EN :1; + }; + struct { + unsigned CCP2MODE0 :1; + unsigned CCP2MODE1 :1; + unsigned CCP2MODE2 :1; + unsigned CCP2MODE3 :1; + }; + struct { + unsigned :7; + unsigned P2M1 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x297))); +# 7543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2CAP __attribute__((address(0x298))); + +__asm("CCP2CAP equ 0298h"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP2CTS :8; + }; + struct { + unsigned CCP2CTS0 :1; + unsigned CCP2CTS1 :1; + unsigned CCP2CTS2 :1; + unsigned CCP2CTS3 :1; + }; +} CCP2CAPbits_t; +extern volatile CCP2CAPbits_t CCP2CAPbits __attribute__((address(0x298))); +# 7623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short CCPR7 __attribute__((address(0x299))); + +__asm("CCPR7 equ 0299h"); + + + + +extern volatile unsigned char CCPR7L __attribute__((address(0x299))); + +__asm("CCPR7L equ 0299h"); + + +typedef union { + struct { + unsigned RL :8; + }; +} CCPR7Lbits_t; +extern volatile CCPR7Lbits_t CCPR7Lbits __attribute__((address(0x299))); +# 7650 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPR7H __attribute__((address(0x29A))); + +__asm("CCPR7H equ 029Ah"); + + +typedef union { + struct { + unsigned RH :8; + }; +} CCPR7Hbits_t; +extern volatile CCPR7Hbits_t CCPR7Hbits __attribute__((address(0x29A))); +# 7670 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CON __attribute__((address(0x29B))); + +__asm("CCP7CON equ 029Bh"); + + +typedef union { + struct { + unsigned MODE :4; + unsigned FMT :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + }; + struct { + unsigned CCP7MODE :4; + unsigned CCP7FMT :1; + unsigned CCP7OUT :1; + unsigned :1; + unsigned CCP7EN :1; + }; + struct { + unsigned CCP7MODE0 :1; + unsigned CCP7MODE1 :1; + unsigned CCP7MODE2 :1; + unsigned CCP7MODE3 :1; + }; + struct { + unsigned :7; + unsigned P7M1 :1; + }; +} CCP7CONbits_t; +extern volatile CCP7CONbits_t CCP7CONbits __attribute__((address(0x29B))); +# 7797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7CAP __attribute__((address(0x29C))); + +__asm("CCP7CAP equ 029Ch"); + + +typedef union { + struct { + unsigned CTS :8; + }; + struct { + unsigned CTS0 :1; + unsigned CTS1 :1; + unsigned CTS2 :1; + unsigned CTS3 :1; + }; + struct { + unsigned CCP7CTS :8; + }; + struct { + unsigned CCP7CTS0 :1; + unsigned CCP7CTS1 :1; + unsigned CCP7CTS2 :1; + unsigned CCP7CTS3 :1; + }; +} CCP7CAPbits_t; +extern volatile CCP7CAPbits_t CCP7CAPbits __attribute__((address(0x29C))); +# 7877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS1 __attribute__((address(0x29E))); + +__asm("CCPTMRS1 equ 029Eh"); + + +typedef union { + struct { + unsigned C1TSEL :2; + unsigned C2TSEL :2; + unsigned C7TSEL :2; + }; + struct { + unsigned C1TSEL0 :1; + unsigned C1TSEL1 :1; + unsigned C2TSEL0 :1; + unsigned C2TSEL1 :1; + unsigned C7TSEL0 :1; + unsigned C7TSEL1 :1; + }; +} CCPTMRS1bits_t; +extern volatile CCPTMRS1bits_t CCPTMRS1bits __attribute__((address(0x29E))); +# 7947 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCPTMRS2 __attribute__((address(0x29F))); + +__asm("CCPTMRS2 equ 029Fh"); + + +typedef union { + struct { + unsigned P3TSEL :2; + unsigned P4TSEL :2; + unsigned P9TSEL :2; + }; + struct { + unsigned P3TSEL0 :1; + unsigned P3TSEL1 :1; + unsigned P4TSEL0 :1; + unsigned P4TSEL1 :1; + unsigned P9TSEL0 :1; + unsigned P9TSEL1 :1; + }; +} CCPTMRS2bits_t; +extern volatile CCPTMRS2bits_t CCPTMRS2bits __attribute__((address(0x29F))); +# 8017 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); + +__asm("SLRCONA equ 030Ch"); + + +typedef union { + struct { + unsigned SLRA0 :1; + unsigned SLRA1 :1; + unsigned SLRA2 :1; + unsigned SLRA3 :1; + unsigned SLRA4 :1; + unsigned SLRA5 :1; + unsigned SLRA6 :1; + unsigned SLRA7 :1; + }; +} SLRCONAbits_t; +extern volatile SLRCONAbits_t SLRCONAbits __attribute__((address(0x30C))); +# 8079 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); + +__asm("SLRCONB equ 030Dh"); + + +typedef union { + struct { + unsigned SLRB0 :1; + unsigned SLRB1 :1; + unsigned SLRB2 :1; + unsigned SLRB3 :1; + unsigned SLRB4 :1; + unsigned SLRB5 :1; + unsigned SLRB6 :1; + unsigned SLRB7 :1; + }; +} SLRCONBbits_t; +extern volatile SLRCONBbits_t SLRCONBbits __attribute__((address(0x30D))); +# 8141 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); + +__asm("SLRCONC equ 030Eh"); + + +typedef union { + struct { + unsigned SLRC0 :1; + unsigned SLRC1 :1; + unsigned SLRC2 :1; + unsigned SLRC3 :1; + unsigned SLRC4 :1; + unsigned SLRC5 :1; + unsigned SLRC6 :1; + unsigned SLRC7 :1; + }; +} SLRCONCbits_t; +extern volatile SLRCONCbits_t SLRCONCbits __attribute__((address(0x30E))); +# 8203 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON0 __attribute__((address(0x315))); + +__asm("MD1CON0 equ 0315h"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD1BIT :1; + unsigned :3; + unsigned MD1OPOL :1; + unsigned MD1OUT :1; + unsigned :1; + unsigned MD1EN :1; + }; +} MD1CON0bits_t; +extern volatile MD1CON0bits_t MD1CON0bits __attribute__((address(0x315))); +# 8271 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CON1 __attribute__((address(0x316))); + +__asm("MD1CON1 equ 0316h"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD1CLSYNC :1; + unsigned MD1CLPOL :1; + unsigned :2; + unsigned MD1CHSYNC :1; + unsigned MD1CHPOL :1; + }; +} MD1CON1bits_t; +extern volatile MD1CON1bits_t MD1CON1bits __attribute__((address(0x316))); +# 8337 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1SRC __attribute__((address(0x317))); + +__asm("MD1SRC equ 0317h"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD1MS :5; + }; + struct { + unsigned MD1MS0 :1; + unsigned MD1MS1 :1; + unsigned MD1MS2 :1; + unsigned MD1MS3 :1; + unsigned MD1MS4 :1; + }; +} MD1SRCbits_t; +extern volatile MD1SRCbits_t MD1SRCbits __attribute__((address(0x317))); +# 8429 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARL __attribute__((address(0x318))); + +__asm("MD1CARL equ 0318h"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD1CL :5; + }; + struct { + unsigned MD1CL0 :1; + unsigned MD1CL1 :1; + unsigned MD1CL2 :1; + unsigned MD1CL3 :1; + unsigned MD1CL4 :1; + }; +} MD1CARLbits_t; +extern volatile MD1CARLbits_t MD1CARLbits __attribute__((address(0x318))); +# 8521 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CARH __attribute__((address(0x319))); + +__asm("MD1CARH equ 0319h"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD1CH :5; + }; + struct { + unsigned MD1CH0 :1; + unsigned MD1CH1 :1; + unsigned MD1CH2 :1; + unsigned MD1CH3 :1; + unsigned MD1CH4 :1; + }; +} MD1CARHbits_t; +extern volatile MD1CARHbits_t MD1CARHbits __attribute__((address(0x319))); +# 8613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON0 __attribute__((address(0x31B))); + +__asm("MD2CON0 equ 031Bh"); + + +typedef union { + struct { + unsigned BIT :1; + unsigned :3; + unsigned OPOL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MD2BIT :1; + unsigned :3; + unsigned MD2OPOL :1; + unsigned MD2OUT :1; + unsigned :1; + unsigned MD2EN :1; + }; +} MD2CON0bits_t; +extern volatile MD2CON0bits_t MD2CON0bits __attribute__((address(0x31B))); +# 8681 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CON1 __attribute__((address(0x31C))); + +__asm("MD2CON1 equ 031Ch"); + + +typedef union { + struct { + unsigned CLSYNC :1; + unsigned CLPOL :1; + unsigned :2; + unsigned CHSYNC :1; + unsigned CHPOL :1; + }; + struct { + unsigned MD2CLSYNC :1; + unsigned MD2CLPOL :1; + unsigned :2; + unsigned MD2CHSYNC :1; + unsigned MD2CHPOL :1; + }; +} MD2CON1bits_t; +extern volatile MD2CON1bits_t MD2CON1bits __attribute__((address(0x31C))); +# 8747 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2SRC __attribute__((address(0x31D))); + +__asm("MD2SRC equ 031Dh"); + + +typedef union { + struct { + unsigned MS :5; + }; + struct { + unsigned MS0 :1; + unsigned MS1 :1; + unsigned MS2 :1; + unsigned MS3 :1; + unsigned MS4 :1; + }; + struct { + unsigned MD2MS :5; + }; + struct { + unsigned MD2MS0 :1; + unsigned MD2MS1 :1; + unsigned MD2MS2 :1; + unsigned MD2MS3 :1; + unsigned MD2MS4 :1; + }; +} MD2SRCbits_t; +extern volatile MD2SRCbits_t MD2SRCbits __attribute__((address(0x31D))); +# 8839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARL __attribute__((address(0x31E))); + +__asm("MD2CARL equ 031Eh"); + + +typedef union { + struct { + unsigned CL :5; + }; + struct { + unsigned CL0 :1; + unsigned CL1 :1; + unsigned CL2 :1; + unsigned CL3 :1; + unsigned CL4 :1; + }; + struct { + unsigned MD2CL :5; + }; + struct { + unsigned MD2CL0 :1; + unsigned MD2CL1 :1; + unsigned MD2CL2 :1; + unsigned MD2CL3 :1; + unsigned MD2CL4 :1; + }; +} MD2CARLbits_t; +extern volatile MD2CARLbits_t MD2CARLbits __attribute__((address(0x31E))); +# 8931 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CARH __attribute__((address(0x31F))); + +__asm("MD2CARH equ 031Fh"); + + +typedef union { + struct { + unsigned CH :5; + }; + struct { + unsigned CH0 :1; + unsigned CH1 :1; + unsigned CH2 :1; + unsigned CH3 :1; + unsigned CH4 :1; + }; + struct { + unsigned MD2CH :5; + }; + struct { + unsigned MD2CH0 :1; + unsigned MD2CH1 :1; + unsigned MD2CH2 :1; + unsigned MD2CH3 :1; + unsigned MD2CH4 :1; + }; +} MD2CARHbits_t; +extern volatile MD2CARHbits_t MD2CARHbits __attribute__((address(0x31F))); +# 9023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLA __attribute__((address(0x38C))); + +__asm("INLVLA equ 038Ch"); + + +typedef union { + struct { + unsigned INLVLA0 :1; + unsigned INLVLA1 :1; + unsigned INLVLA2 :1; + unsigned INLVLA3 :1; + unsigned INLVLA4 :1; + unsigned INLVLA5 :1; + unsigned INLVA6 :1; + unsigned INLVA7 :1; + }; +} INLVLAbits_t; +extern volatile INLVLAbits_t INLVLAbits __attribute__((address(0x38C))); +# 9085 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLB __attribute__((address(0x38D))); + +__asm("INLVLB equ 038Dh"); + + +typedef union { + struct { + unsigned INLVB0 :1; + unsigned INLVB1 :1; + unsigned INLVB2 :1; + unsigned INLVB3 :1; + unsigned INLVLB4 :1; + unsigned INLVLB5 :1; + unsigned INLVLB6 :1; + unsigned INLVLB7 :1; + }; +} INLVLBbits_t; +extern volatile INLVLBbits_t INLVLBbits __attribute__((address(0x38D))); +# 9147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVLC __attribute__((address(0x38E))); + +__asm("INLVLC equ 038Eh"); + + +typedef union { + struct { + unsigned INLVLC0 :1; + unsigned INLVLC1 :1; + unsigned INLVLC2 :1; + unsigned INLVLC3 :1; + unsigned INLVLC4 :1; + unsigned INLVLC5 :1; + unsigned INLVLC6 :1; + unsigned INLVLC7 :1; + }; +} INLVLCbits_t; +extern volatile INLVLCbits_t INLVLCbits __attribute__((address(0x38E))); +# 9209 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INLVE __attribute__((address(0x390))); + +__asm("INLVE equ 0390h"); + + +typedef union { + struct { + unsigned :3; + unsigned INLVE3 :1; + }; +} INLVEbits_t; +extern volatile INLVEbits_t INLVEbits __attribute__((address(0x390))); +# 9230 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAP __attribute__((address(0x391))); + +__asm("IOCAP equ 0391h"); + + +typedef union { + struct { + unsigned IOCAP0 :1; + unsigned IOCAP1 :1; + unsigned IOCAP2 :1; + unsigned IOCAP3 :1; + unsigned IOCAP4 :1; + unsigned IOCAP5 :1; + unsigned IOCAP6 :1; + unsigned IOCAP7 :1; + }; +} IOCAPbits_t; +extern volatile IOCAPbits_t IOCAPbits __attribute__((address(0x391))); +# 9292 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAN __attribute__((address(0x392))); + +__asm("IOCAN equ 0392h"); + + +typedef union { + struct { + unsigned IOCAN0 :1; + unsigned IOCAN1 :1; + unsigned IOCAN2 :1; + unsigned IOCAN3 :1; + unsigned IOCAN4 :1; + unsigned IOCAN5 :1; + unsigned IOCAN6 :1; + unsigned IOCAN7 :1; + }; +} IOCANbits_t; +extern volatile IOCANbits_t IOCANbits __attribute__((address(0x392))); +# 9354 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCAF __attribute__((address(0x393))); + +__asm("IOCAF equ 0393h"); + + +typedef union { + struct { + unsigned IOCAF0 :1; + unsigned IOCAF1 :1; + unsigned IOCAF2 :1; + unsigned IOCAF3 :1; + unsigned IOCAF4 :1; + unsigned IOCAF5 :1; + unsigned IOCAF6 :1; + unsigned IOCAF7 :1; + }; +} IOCAFbits_t; +extern volatile IOCAFbits_t IOCAFbits __attribute__((address(0x393))); +# 9416 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBP __attribute__((address(0x394))); + +__asm("IOCBP equ 0394h"); + + +typedef union { + struct { + unsigned IOCBP0 :1; + unsigned IOCBP1 :1; + unsigned IOCBP2 :1; + unsigned IOCBP3 :1; + unsigned IOCBP4 :1; + unsigned IOCBP5 :1; + unsigned IOCBP6 :1; + unsigned IOCBP7 :1; + }; +} IOCBPbits_t; +extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +# 9478 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBN __attribute__((address(0x395))); + +__asm("IOCBN equ 0395h"); + + +typedef union { + struct { + unsigned IOCBN0 :1; + unsigned IOCBN1 :1; + unsigned IOCBN2 :1; + unsigned IOCBN3 :1; + unsigned IOCBN4 :1; + unsigned IOCBN5 :1; + unsigned IOCBN6 :1; + unsigned IOCBN7 :1; + }; +} IOCBNbits_t; +extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +# 9540 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCBF __attribute__((address(0x396))); + +__asm("IOCBF equ 0396h"); + + +typedef union { + struct { + unsigned IOCBF0 :1; + unsigned IOCBF1 :1; + unsigned IOCBF2 :1; + unsigned IOCBF3 :1; + unsigned IOCBF4 :1; + unsigned IOCBF5 :1; + unsigned IOCBF6 :1; + unsigned IOCBF7 :1; + }; +} IOCBFbits_t; +extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +# 9602 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCP __attribute__((address(0x397))); + +__asm("IOCCP equ 0397h"); + + +typedef union { + struct { + unsigned IOCCP0 :1; + unsigned IOCCP1 :1; + unsigned IOCCP2 :1; + unsigned IOCCP3 :1; + unsigned IOCCP4 :1; + unsigned IOCCP5 :1; + unsigned IOCCP6 :1; + unsigned IOCCP7 :1; + }; +} IOCCPbits_t; +extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +# 9664 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCN __attribute__((address(0x398))); + +__asm("IOCCN equ 0398h"); + + +typedef union { + struct { + unsigned IOCCN0 :1; + unsigned IOCCN1 :1; + unsigned IOCCN2 :1; + unsigned IOCCN3 :1; + unsigned IOCCN4 :1; + unsigned IOCCN5 :1; + unsigned IOCCN6 :1; + unsigned IOCCN7 :1; + }; +} IOCCNbits_t; +extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +# 9726 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCCF __attribute__((address(0x399))); + +__asm("IOCCF equ 0399h"); + + +typedef union { + struct { + unsigned IOCCF0 :1; + unsigned IOCCF1 :1; + unsigned IOCCF2 :1; + unsigned IOCCF3 :1; + unsigned IOCCF4 :1; + unsigned IOCCF5 :1; + unsigned IOCCF6 :1; + unsigned IOCCF7 :1; + }; +} IOCCFbits_t; +extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +# 9788 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEP __attribute__((address(0x39D))); + +__asm("IOCEP equ 039Dh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEP3 :1; + }; +} IOCEPbits_t; +extern volatile IOCEPbits_t IOCEPbits __attribute__((address(0x39D))); +# 9809 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEN __attribute__((address(0x39E))); + +__asm("IOCEN equ 039Eh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEN3 :1; + }; +} IOCENbits_t; +extern volatile IOCENbits_t IOCENbits __attribute__((address(0x39E))); +# 9830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char IOCEF __attribute__((address(0x39F))); + +__asm("IOCEF equ 039Fh"); + + +typedef union { + struct { + unsigned :3; + unsigned IOCEF3 :1; + }; +} IOCEFbits_t; +extern volatile IOCEFbits_t IOCEFbits __attribute__((address(0x39F))); +# 9851 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char HIDRVB __attribute__((address(0x40D))); + +__asm("HIDRVB equ 040Dh"); + + +typedef union { + struct { + unsigned HIDB0 :1; + unsigned HIDB1 :1; + }; +} HIDRVBbits_t; +extern volatile HIDRVBbits_t HIDRVBbits __attribute__((address(0x40D))); +# 9877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short TMR5 __attribute__((address(0x40F))); + +__asm("TMR5 equ 040Fh"); + + + + +extern volatile unsigned char TMR5L __attribute__((address(0x40F))); + +__asm("TMR5L equ 040Fh"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Lbits_t; +extern volatile TMR5Lbits_t TMR5Lbits __attribute__((address(0x40F))); +# 9904 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TMR5H __attribute__((address(0x410))); + +__asm("TMR5H equ 0410h"); + + +typedef union { + struct { + unsigned TMR :8; + }; +} TMR5Hbits_t; +extern volatile TMR5Hbits_t TMR5Hbits __attribute__((address(0x410))); +# 9924 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CON __attribute__((address(0x411))); + +__asm("T5CON equ 0411h"); + + +typedef union { + struct { + unsigned ON :1; + unsigned :1; + unsigned nSYNC :1; + unsigned OSCEN :1; + unsigned CKPS :2; + unsigned CS :2; + }; + struct { + unsigned TMRON :1; + unsigned :1; + unsigned SYNC :1; + unsigned SOSCEN :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned TMR5ON :1; + unsigned :1; + unsigned nT5SYNC :1; + unsigned T5OSCEN :1; + unsigned :2; + unsigned T5CS0 :1; + unsigned T5CS1 :1; + }; + struct { + unsigned T5ON :1; + unsigned :3; + unsigned T5CKPS0 :1; + unsigned T5CKPS1 :1; + unsigned TMR5CS0 :1; + unsigned TMR5CS1 :1; + }; +} T5CONbits_t; +extern volatile T5CONbits_t T5CONbits __attribute__((address(0x411))); +# 10081 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GCON __attribute__((address(0x412))); + +__asm("T5GCON equ 0412h"); + + +typedef union { + struct { + unsigned GSS :2; + unsigned GVAL :1; + unsigned GGO_nDONE :1; + unsigned GSPM :1; + unsigned GTM :1; + unsigned GPOL :1; + unsigned GE :1; + }; + struct { + unsigned GSS0 :1; + unsigned GSS1 :1; + unsigned :5; + unsigned T5GE :1; + }; + struct { + unsigned :2; + unsigned T5GVAL :1; + unsigned T5GGO_nDONE :1; + unsigned T5GSPM :1; + unsigned T5GTM :1; + unsigned T5GPOL :1; + unsigned TMR5GE :1; + }; + struct { + unsigned T5GSS0 :1; + unsigned T5GSS1 :1; + }; +} T5GCONbits_t; +extern volatile T5GCONbits_t T5GCONbits __attribute__((address(0x412))); +# 10211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4TMR __attribute__((address(0x413))); + +__asm("T4TMR equ 0413h"); + + +extern volatile unsigned char TMR4 __attribute__((address(0x413))); + +__asm("TMR4 equ 0413h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} T4TMRbits_t; +extern volatile T4TMRbits_t T4TMRbits __attribute__((address(0x413))); +# 10242 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR4 :8; + }; +} TMR4bits_t; +extern volatile TMR4bits_t TMR4bits __attribute__((address(0x413))); +# 10265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4PR __attribute__((address(0x414))); + +__asm("T4PR equ 0414h"); + + +extern volatile unsigned char PR4 __attribute__((address(0x414))); + +__asm("PR4 equ 0414h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} T4PRbits_t; +extern volatile T4PRbits_t T4PRbits __attribute__((address(0x414))); +# 10296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T4PR :8; + }; +} PR4bits_t; +extern volatile PR4bits_t PR4bits __attribute__((address(0x414))); +# 10319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CON __attribute__((address(0x415))); + +__asm("T4CON equ 0415h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T4OUTPS :4; + unsigned T4CKPS :3; + unsigned T4ON :1; + }; + struct { + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned T4CKPS2 :1; + unsigned TMR4ON :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0x415))); +# 10465 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4HLT __attribute__((address(0x416))); + +__asm("T4HLT equ 0416h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T4MODE :5; + unsigned T4CKSYNC :1; + unsigned T4CKPOL :1; + unsigned T4PSYNC :1; + }; + struct { + unsigned T4MODE0 :1; + unsigned T4MODE1 :1; + unsigned T4MODE2 :1; + unsigned T4MODE3 :1; + unsigned T4MODE4 :1; + }; +} T4HLTbits_t; +extern volatile T4HLTbits_t T4HLTbits __attribute__((address(0x416))); +# 10593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4CLKCON __attribute__((address(0x417))); + +__asm("T4CLKCON equ 0417h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T4CS :4; + }; + struct { + unsigned T4CS0 :1; + unsigned T4CS1 :1; + unsigned T4CS2 :1; + unsigned T4CS3 :1; + }; +} T4CLKCONbits_t; +extern volatile T4CLKCONbits_t T4CLKCONbits __attribute__((address(0x417))); +# 10673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4RST __attribute__((address(0x418))); + +__asm("T4RST equ 0418h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T4RSEL :5; + }; + struct { + unsigned T4RSEL0 :1; + unsigned T4RSEL1 :1; + unsigned T4RSEL2 :1; + unsigned T4RSEL3 :1; + unsigned T4RSEL4 :1; + }; +} T4RSTbits_t; +extern volatile T4RSTbits_t T4RSTbits __attribute__((address(0x418))); +# 10765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6TMR __attribute__((address(0x41A))); + +__asm("T6TMR equ 041Ah"); + + +extern volatile unsigned char TMR6 __attribute__((address(0x41A))); + +__asm("TMR6 equ 041Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} T6TMRbits_t; +extern volatile T6TMRbits_t T6TMRbits __attribute__((address(0x41A))); +# 10796 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR6 :8; + }; +} TMR6bits_t; +extern volatile TMR6bits_t TMR6bits __attribute__((address(0x41A))); +# 10819 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6PR __attribute__((address(0x41B))); + +__asm("T6PR equ 041Bh"); + + +extern volatile unsigned char PR6 __attribute__((address(0x41B))); + +__asm("PR6 equ 041Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} T6PRbits_t; +extern volatile T6PRbits_t T6PRbits __attribute__((address(0x41B))); +# 10850 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T6PR :8; + }; +} PR6bits_t; +extern volatile PR6bits_t PR6bits __attribute__((address(0x41B))); +# 10873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CON __attribute__((address(0x41C))); + +__asm("T6CON equ 041Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T6OUTPS :4; + unsigned T6CKPS :3; + unsigned T6ON :1; + }; + struct { + unsigned T6OUTPS0 :1; + unsigned T6OUTPS1 :1; + unsigned T6OUTPS2 :1; + unsigned T6OUTPS3 :1; + unsigned T6CKPS0 :1; + unsigned T6CKPS1 :1; + unsigned T6CKPS2 :1; + unsigned TMR6ON :1; + }; +} T6CONbits_t; +extern volatile T6CONbits_t T6CONbits __attribute__((address(0x41C))); +# 11019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6HLT __attribute__((address(0x41D))); + +__asm("T6HLT equ 041Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T6MODE :5; + unsigned T6CKSYNC :1; + unsigned T6CKPOL :1; + unsigned T6PSYNC :1; + }; + struct { + unsigned T6MODE0 :1; + unsigned T6MODE1 :1; + unsigned T6MODE2 :1; + unsigned T6MODE3 :1; + unsigned T6MODE4 :1; + }; +} T6HLTbits_t; +extern volatile T6HLTbits_t T6HLTbits __attribute__((address(0x41D))); +# 11147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6CLKCON __attribute__((address(0x41E))); + +__asm("T6CLKCON equ 041Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T6CS :4; + }; + struct { + unsigned T6CS0 :1; + unsigned T6CS1 :1; + unsigned T6CS2 :1; + unsigned T6CS3 :1; + }; +} T6CLKCONbits_t; +extern volatile T6CLKCONbits_t T6CLKCONbits __attribute__((address(0x41E))); +# 11227 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6RST __attribute__((address(0x41F))); + +__asm("T6RST equ 041Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T6RSEL :5; + }; + struct { + unsigned T6RSEL0 :1; + unsigned T6RSEL1 :1; + unsigned T6RSEL2 :1; + unsigned T6RSEL3 :1; + unsigned T6RSEL4 :1; + }; +} T6RSTbits_t; +extern volatile T6RSTbits_t T6RSTbits __attribute__((address(0x41F))); +# 11319 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0x48E))); + +__asm("ADRES equ 048Eh"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0x48E))); + +__asm("ADRESL equ 048Eh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESLbits_t; +extern volatile ADRESLbits_t ADRESLbits __attribute__((address(0x48E))); +# 11346 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x48F))); + +__asm("ADRESH equ 048Fh"); + + +typedef union { + struct { + unsigned ADRES :8; + }; +} ADRESHbits_t; +extern volatile ADRESHbits_t ADRESHbits __attribute__((address(0x48F))); +# 11366 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0x490))); + +__asm("ADCON0 equ 0490h"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned GO :1; + unsigned CHS :6; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x490))); +# 11398 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0x491))); + +__asm("ADCON1 equ 0491h"); + + +typedef union { + struct { + unsigned ADPREF :2; + unsigned ADNREF :1; + unsigned :1; + unsigned ADCS :3; + unsigned ADFM :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x491))); +# 11437 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCON2 __attribute__((address(0x492))); + +__asm("ADCON2 equ 0492h"); + + +typedef union { + struct { + unsigned TRIGSEL :6; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0x492))); +# 11457 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2TMR __attribute__((address(0x493))); + +__asm("T2TMR equ 0493h"); + + +extern volatile unsigned char TMR2 __attribute__((address(0x493))); + +__asm("TMR2 equ 0493h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} T2TMRbits_t; +extern volatile T2TMRbits_t T2TMRbits __attribute__((address(0x493))); +# 11488 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR2 :8; + }; +} TMR2bits_t; +extern volatile TMR2bits_t TMR2bits __attribute__((address(0x493))); +# 11511 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2PR __attribute__((address(0x494))); + +__asm("T2PR equ 0494h"); + + +extern volatile unsigned char PR2 __attribute__((address(0x494))); + +__asm("PR2 equ 0494h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} T2PRbits_t; +extern volatile T2PRbits_t T2PRbits __attribute__((address(0x494))); +# 11542 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T2PR :8; + }; +} PR2bits_t; +extern volatile PR2bits_t PR2bits __attribute__((address(0x494))); +# 11565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CON __attribute__((address(0x495))); + +__asm("T2CON equ 0495h"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T2OUTPS :4; + unsigned T2CKPS :3; + unsigned T2ON :1; + }; + struct { + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned T2CKPS2 :1; + unsigned TMR2ON :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x495))); +# 11711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2HLT __attribute__((address(0x496))); + +__asm("T2HLT equ 0496h"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T2MODE :5; + unsigned T2CKSYNC :1; + unsigned T2CKPOL :1; + unsigned T2PSYNC :1; + }; + struct { + unsigned T2MODE0 :1; + unsigned T2MODE1 :1; + unsigned T2MODE2 :1; + unsigned T2MODE3 :1; + unsigned T2MODE4 :1; + }; +} T2HLTbits_t; +extern volatile T2HLTbits_t T2HLTbits __attribute__((address(0x496))); +# 11839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2CLKCON __attribute__((address(0x497))); + +__asm("T2CLKCON equ 0497h"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T2CS :4; + }; + struct { + unsigned T2CS0 :1; + unsigned T2CS1 :1; + unsigned T2CS2 :1; + unsigned T2CS3 :1; + }; +} T2CLKCONbits_t; +extern volatile T2CLKCONbits_t T2CLKCONbits __attribute__((address(0x497))); +# 11919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2RST __attribute__((address(0x498))); + +__asm("T2RST equ 0498h"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T2RSEL :5; + }; + struct { + unsigned T2RSEL0 :1; + unsigned T2RSEL1 :1; + unsigned T2RSEL2 :1; + unsigned T2RSEL3 :1; + unsigned T2RSEL4 :1; + }; +} T2RSTbits_t; +extern volatile T2RSTbits_t T2RSTbits __attribute__((address(0x498))); +# 12011 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8TMR __attribute__((address(0x49A))); + +__asm("T8TMR equ 049Ah"); + + +extern volatile unsigned char TMR8 __attribute__((address(0x49A))); + +__asm("TMR8 equ 049Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} T8TMRbits_t; +extern volatile T8TMRbits_t T8TMRbits __attribute__((address(0x49A))); +# 12042 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned TMR8 :8; + }; +} TMR8bits_t; +extern volatile TMR8bits_t TMR8bits __attribute__((address(0x49A))); +# 12065 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8PR __attribute__((address(0x49B))); + +__asm("T8PR equ 049Bh"); + + +extern volatile unsigned char PR8 __attribute__((address(0x49B))); + +__asm("PR8 equ 049Bh"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} T8PRbits_t; +extern volatile T8PRbits_t T8PRbits __attribute__((address(0x49B))); +# 12096 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned T8PR :8; + }; +} PR8bits_t; +extern volatile PR8bits_t PR8bits __attribute__((address(0x49B))); +# 12119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CON __attribute__((address(0x49C))); + +__asm("T8CON equ 049Ch"); + + +typedef union { + struct { + unsigned OUTPS :4; + unsigned CKPS :3; + unsigned ON :1; + }; + struct { + unsigned OUTPS0 :1; + unsigned OUTPS1 :1; + unsigned OUTPS2 :1; + unsigned OUTPS3 :1; + unsigned CKPS0 :1; + unsigned CKPS1 :1; + unsigned CKPS2 :1; + }; + struct { + unsigned T8OUTPS :4; + unsigned T8CKPS :3; + unsigned T8ON :1; + }; + struct { + unsigned T8OUTPS0 :1; + unsigned T8OUTPS1 :1; + unsigned T8OUTPS2 :1; + unsigned T8OUTPS3 :1; + unsigned T8CKPS0 :1; + unsigned T8CKPS1 :1; + unsigned T8CKPS2 :1; + unsigned TMR8ON :1; + }; +} T8CONbits_t; +extern volatile T8CONbits_t T8CONbits __attribute__((address(0x49C))); +# 12265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8HLT __attribute__((address(0x49D))); + +__asm("T8HLT equ 049Dh"); + + +typedef union { + struct { + unsigned MODE :5; + unsigned CKSYNC :1; + unsigned CKPOL :1; + unsigned PSYNC :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + unsigned MODE3 :1; + unsigned MODE4 :1; + }; + struct { + unsigned T8MODE :5; + unsigned T8CKSYNC :1; + unsigned T8CKPOL :1; + unsigned T8PSYNC :1; + }; + struct { + unsigned T8MODE0 :1; + unsigned T8MODE1 :1; + unsigned T8MODE2 :1; + unsigned T8MODE3 :1; + unsigned T8MODE4 :1; + }; +} T8HLTbits_t; +extern volatile T8HLTbits_t T8HLTbits __attribute__((address(0x49D))); +# 12393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8CLKCON __attribute__((address(0x49E))); + +__asm("T8CLKCON equ 049Eh"); + + +typedef union { + struct { + unsigned CS :4; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned CS3 :1; + }; + struct { + unsigned T8CS :4; + }; + struct { + unsigned T8CS0 :1; + unsigned T8CS1 :1; + unsigned T8CS2 :1; + unsigned T8CS3 :1; + }; +} T8CLKCONbits_t; +extern volatile T8CLKCONbits_t T8CLKCONbits __attribute__((address(0x49E))); +# 12473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8RST __attribute__((address(0x49F))); + +__asm("T8RST equ 049Fh"); + + +typedef union { + struct { + unsigned RSEL :5; + }; + struct { + unsigned RSEL0 :1; + unsigned RSEL1 :1; + unsigned RSEL2 :1; + unsigned RSEL3 :1; + unsigned RSEL4 :1; + }; + struct { + unsigned T8RSEL :5; + }; + struct { + unsigned T8RSEL0 :1; + unsigned T8RSEL1 :1; + unsigned T8RSEL2 :1; + unsigned T8RSEL3 :1; + unsigned T8RSEL4 :1; + }; +} T8RSTbits_t; +extern volatile T8RSTbits_t T8RSTbits __attribute__((address(0x49F))); +# 12565 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1NCHS __attribute__((address(0x50F))); + +__asm("OPA1NCHS equ 050Fh"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA1NCH :8; + }; +} OPA1NCHSbits_t; +extern volatile OPA1NCHSbits_t OPA1NCHSbits __attribute__((address(0x50F))); +# 12593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1PCHS __attribute__((address(0x510))); + +__asm("OPA1PCHS equ 0510h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA1PCH :8; + }; +} OPA1PCHSbits_t; +extern volatile OPA1PCHSbits_t OPA1PCHSbits __attribute__((address(0x510))); +# 12621 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1CON __attribute__((address(0x511))); + +__asm("OPA1CON equ 0511h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA1ORM :2; + unsigned OPA1ORPOL :1; + unsigned :1; + unsigned OPA1UG :1; + unsigned :2; + unsigned OPA1EN :1; + }; + struct { + unsigned OPA1ORM0 :1; + unsigned OPA1ORM1 :1; + }; +} OPA1CONbits_t; +extern volatile OPA1CONbits_t OPA1CONbits __attribute__((address(0x511))); +# 12717 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA1ORS __attribute__((address(0x512))); + +__asm("OPA1ORS equ 0512h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA1ORSbits_t; +extern volatile OPA1ORSbits_t OPA1ORSbits __attribute__((address(0x512))); +# 12737 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2NCHS __attribute__((address(0x513))); + +__asm("OPA2NCHS equ 0513h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA2NCH :8; + }; +} OPA2NCHSbits_t; +extern volatile OPA2NCHSbits_t OPA2NCHSbits __attribute__((address(0x513))); +# 12765 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2PCHS __attribute__((address(0x514))); + +__asm("OPA2PCHS equ 0514h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA2PCH :8; + }; +} OPA2PCHSbits_t; +extern volatile OPA2PCHSbits_t OPA2PCHSbits __attribute__((address(0x514))); +# 12793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2CON __attribute__((address(0x515))); + +__asm("OPA2CON equ 0515h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :2; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA2ORM :2; + unsigned OPA2ORPOL :1; + unsigned :1; + unsigned OPA2UG :1; + unsigned :2; + unsigned OPA2EN :1; + }; + struct { + unsigned OPA2ORM0 :1; + unsigned OPA2ORM1 :1; + }; +} OPA2CONbits_t; +extern volatile OPA2CONbits_t OPA2CONbits __attribute__((address(0x515))); +# 12889 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA2ORS __attribute__((address(0x516))); + +__asm("OPA2ORS equ 0516h"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA2ORSbits_t; +extern volatile OPA2ORSbits_t OPA2ORSbits __attribute__((address(0x516))); +# 12909 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3NCHS __attribute__((address(0x517))); + +__asm("OPA3NCHS equ 0517h"); + + +typedef union { + struct { + unsigned NCH :8; + }; + struct { + unsigned OPA3NCH :8; + }; +} OPA3NCHSbits_t; +extern volatile OPA3NCHSbits_t OPA3NCHSbits __attribute__((address(0x517))); +# 12937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3PCHS __attribute__((address(0x518))); + +__asm("OPA3PCHS equ 0518h"); + + +typedef union { + struct { + unsigned PCH :8; + }; + struct { + unsigned OPA3PCH :8; + }; +} OPA3PCHSbits_t; +extern volatile OPA3PCHSbits_t OPA3PCHSbits __attribute__((address(0x518))); +# 12965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3CON __attribute__((address(0x519))); + +__asm("OPA3CON equ 0519h"); + + +typedef union { + struct { + unsigned ORM :2; + unsigned ORPOL :1; + unsigned :1; + unsigned UG :1; + unsigned :1; + unsigned SP :1; + unsigned EN :1; + }; + struct { + unsigned ORM0 :1; + unsigned ORM1 :1; + }; + struct { + unsigned OPA3ORM :2; + unsigned OPA3ORPOL :1; + unsigned :1; + unsigned OPA3UG :1; + unsigned :1; + unsigned OPA3SP :1; + unsigned OPA3EN :1; + }; + struct { + unsigned OPA3ORM0 :1; + unsigned OPA3ORM1 :1; + }; +} OPA3CONbits_t; +extern volatile OPA3CONbits_t OPA3CONbits __attribute__((address(0x519))); +# 13073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char OPA3ORS __attribute__((address(0x51A))); + +__asm("OPA3ORS equ 051Ah"); + + +typedef union { + struct { + unsigned ORS :8; + }; +} OPA3ORSbits_t; +extern volatile OPA3ORSbits_t OPA3ORSbits __attribute__((address(0x51A))); +# 13093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DACLD __attribute__((address(0x58D))); + +__asm("DACLD equ 058Dh"); + + +typedef union { + struct { + unsigned DAC1LD :1; + unsigned DAC2LD :1; + unsigned :2; + unsigned DAC5LD :1; + }; +} DACLDbits_t; +extern volatile DACLDbits_t DACLDbits __attribute__((address(0x58D))); +# 13126 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1CON0 __attribute__((address(0x58E))); + +__asm("DAC1CON0 equ 058Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC1NSS :2; + unsigned DAC1PSS :2; + unsigned DAC1OE2 :1; + unsigned DAC1OE1 :1; + unsigned DAC1FM :1; + unsigned DAC1EN :1; + }; + struct { + unsigned DAC1NSS0 :1; + unsigned DAC1NSS1 :1; + unsigned DAC1PSS0 :1; + unsigned DAC1PSS1 :1; + }; +} DAC1CON0bits_t; +extern volatile DAC1CON0bits_t DAC1CON0bits __attribute__((address(0x58E))); +# 13344 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC1REF __attribute__((address(0x58F))); + +__asm("DAC1REF equ 058Fh"); + + + + +extern volatile unsigned char DAC1REFL __attribute__((address(0x58F))); + +__asm("DAC1REFL equ 058Fh"); + + +extern volatile unsigned char DAC1CON1 __attribute__((address(0x58F))); + +__asm("DAC1CON1 equ 058Fh"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1REFLbits_t; +extern volatile DAC1REFLbits_t DAC1REFLbits __attribute__((address(0x58F))); +# 13566 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC1REF0 :1; + unsigned DAC1REF1 :1; + unsigned DAC1REF2 :1; + unsigned DAC1REF3 :1; + unsigned DAC1REF4 :1; + unsigned DAC1REF5 :1; + unsigned DAC1REF6 :1; + unsigned DAC1REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC1R0 :1; + unsigned DAC1R1 :1; + unsigned DAC1R2 :1; + unsigned DAC1R3 :1; + unsigned DAC1R4 :1; + unsigned DAC1R5 :1; + unsigned DAC1R6 :1; + unsigned DAC1R7 :1; + }; +} DAC1CON1bits_t; +extern volatile DAC1CON1bits_t DAC1CON1bits __attribute__((address(0x58F))); +# 13773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC1REFH __attribute__((address(0x590))); + +__asm("DAC1REFH equ 0590h"); + + +extern volatile unsigned char DAC1CON2 __attribute__((address(0x590))); + +__asm("DAC1CON2 equ 0590h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1REFHbits_t; +extern volatile DAC1REFHbits_t DAC1REFHbits __attribute__((address(0x590))); +# 13988 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC1REF8 :1; + unsigned DAC1REF9 :1; + unsigned DAC1REF10 :1; + unsigned DAC1REF11 :1; + unsigned DAC1REF12 :1; + unsigned DAC1REF13 :1; + unsigned DAC1REF14 :1; + unsigned DAC1REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC1R8 :1; + unsigned DAC1R9 :1; + unsigned DAC1R10 :1; + unsigned DAC1R11 :1; + unsigned DAC1R12 :1; + unsigned DAC1R13 :1; + unsigned DAC1R14 :1; + unsigned DAC1R15 :1; + }; +} DAC1CON2bits_t; +extern volatile DAC1CON2bits_t DAC1CON2bits __attribute__((address(0x590))); +# 14195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2CON0 __attribute__((address(0x591))); + +__asm("DAC2CON0 equ 0591h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC2NSS :2; + unsigned DAC2PSS :2; + unsigned DAC2OE2 :1; + unsigned DAC2OE1 :1; + unsigned DAC2FM :1; + unsigned DAC2EN :1; + }; + struct { + unsigned DAC2NSS0 :1; + unsigned DAC2NSS1 :1; + unsigned DAC2PSS0 :1; + unsigned DAC2PSS1 :1; + }; +} DAC2CON0bits_t; +extern volatile DAC2CON0bits_t DAC2CON0bits __attribute__((address(0x591))); +# 14413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC2REF __attribute__((address(0x592))); + +__asm("DAC2REF equ 0592h"); + + + + +extern volatile unsigned char DAC2REFL __attribute__((address(0x592))); + +__asm("DAC2REFL equ 0592h"); + + +extern volatile unsigned char DAC2CON1 __attribute__((address(0x592))); + +__asm("DAC2CON1 equ 0592h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2REFLbits_t; +extern volatile DAC2REFLbits_t DAC2REFLbits __attribute__((address(0x592))); +# 14635 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC2REF0 :1; + unsigned DAC2REF1 :1; + unsigned DAC2REF2 :1; + unsigned DAC2REF3 :1; + unsigned DAC2REF4 :1; + unsigned DAC2REF5 :1; + unsigned DAC2REF6 :1; + unsigned DAC2REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC2R0 :1; + unsigned DAC2R1 :1; + unsigned DAC2R2 :1; + unsigned DAC2R3 :1; + unsigned DAC2R4 :1; + unsigned DAC2R5 :1; + unsigned DAC2R6 :1; + unsigned DAC2R7 :1; + }; +} DAC2CON1bits_t; +extern volatile DAC2CON1bits_t DAC2CON1bits __attribute__((address(0x592))); +# 14842 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC2REFH __attribute__((address(0x593))); + +__asm("DAC2REFH equ 0593h"); + + +extern volatile unsigned char DAC2CON2 __attribute__((address(0x593))); + +__asm("DAC2CON2 equ 0593h"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2REFHbits_t; +extern volatile DAC2REFHbits_t DAC2REFHbits __attribute__((address(0x593))); +# 15057 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC2REF8 :1; + unsigned DAC2REF9 :1; + unsigned DAC2REF10 :1; + unsigned DAC2REF11 :1; + unsigned DAC2REF12 :1; + unsigned DAC2REF13 :1; + unsigned DAC2REF14 :1; + unsigned DAC2REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC2R8 :1; + unsigned DAC2R9 :1; + unsigned DAC2R10 :1; + unsigned DAC2R11 :1; + unsigned DAC2R12 :1; + unsigned DAC2R13 :1; + unsigned DAC2R14 :1; + unsigned DAC2R15 :1; + }; +} DAC2CON2bits_t; +extern volatile DAC2CON2bits_t DAC2CON2bits __attribute__((address(0x593))); +# 15264 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3CON0 __attribute__((address(0x594))); + +__asm("DAC3CON0 equ 0594h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC3NSS :2; + unsigned DAC3PSS :2; + unsigned DAC3OE2 :1; + unsigned DAC3OE1 :1; + unsigned :1; + unsigned DAC3EN :1; + }; + struct { + unsigned DAC3NSS0 :1; + unsigned DAC3NSS1 :1; + unsigned DAC3PSS0 :1; + unsigned DAC3PSS1 :1; + }; +} DAC3CON0bits_t; +extern volatile DAC3CON0bits_t DAC3CON0bits __attribute__((address(0x594))); +# 15453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC3REF __attribute__((address(0x595))); + +__asm("DAC3REF equ 0595h"); + + +extern volatile unsigned char DAC3CON1 __attribute__((address(0x595))); + +__asm("DAC3CON1 equ 0595h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3REFbits_t; +extern volatile DAC3REFbits_t DAC3REFbits __attribute__((address(0x595))); +# 15644 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC3R :5; + }; + struct { + unsigned DAC3R0 :1; + unsigned DAC3R1 :1; + unsigned DAC3R2 :1; + unsigned DAC3R3 :1; + unsigned DAC3R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC3REF0 :1; + unsigned DAC3REF1 :1; + unsigned DAC3REF2 :1; + unsigned DAC3REF3 :1; + unsigned DAC3REF4 :1; + }; +} DAC3CON1bits_t; +extern volatile DAC3CON1bits_t DAC3CON1bits __attribute__((address(0x595))); +# 15827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4CON0 __attribute__((address(0x596))); + +__asm("DAC4CON0 equ 0596h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC4NSS :2; + unsigned DAC4PSS :2; + unsigned DAC4OE2 :1; + unsigned DAC4OE1 :1; + unsigned :1; + unsigned DAC4EN :1; + }; + struct { + unsigned DAC4NSS0 :1; + unsigned DAC4NSS1 :1; + unsigned DAC4PSS0 :1; + unsigned DAC4PSS1 :1; + }; +} DAC4CON0bits_t; +extern volatile DAC4CON0bits_t DAC4CON0bits __attribute__((address(0x596))); +# 16016 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC4REF __attribute__((address(0x597))); + +__asm("DAC4REF equ 0597h"); + + +extern volatile unsigned char DAC4CON1 __attribute__((address(0x597))); + +__asm("DAC4CON1 equ 0597h"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4REFbits_t; +extern volatile DAC4REFbits_t DAC4REFbits __attribute__((address(0x597))); +# 16207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC4R :5; + }; + struct { + unsigned DAC4R0 :1; + unsigned DAC4R1 :1; + unsigned DAC4R2 :1; + unsigned DAC4R3 :1; + unsigned DAC4R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC4REF0 :1; + unsigned DAC4REF1 :1; + unsigned DAC4REF2 :1; + unsigned DAC4REF3 :1; + unsigned DAC4REF4 :1; + }; +} DAC4CON1bits_t; +extern volatile DAC4CON1bits_t DAC4CON1bits __attribute__((address(0x597))); +# 16390 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5CON0 __attribute__((address(0x598))); + +__asm("DAC5CON0 equ 0598h"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned FM :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + unsigned :1; + unsigned OE :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned DACFM :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + unsigned :1; + unsigned DACOE :1; + }; + struct { + unsigned DAC5NSS :2; + unsigned DAC5PSS :2; + unsigned DAC5OE2 :1; + unsigned DAC5OE1 :1; + unsigned DAC5FM :1; + unsigned DAC5EN :1; + }; + struct { + unsigned DAC5NSS0 :1; + unsigned DAC5NSS1 :1; + unsigned DAC5PSS0 :1; + unsigned DAC5PSS1 :1; + }; +} DAC5CON0bits_t; +extern volatile DAC5CON0bits_t DAC5CON0bits __attribute__((address(0x598))); +# 16608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short DAC5REF __attribute__((address(0x599))); + +__asm("DAC5REF equ 0599h"); + + + + +extern volatile unsigned char DAC5REFL __attribute__((address(0x599))); + +__asm("DAC5REFL equ 0599h"); + + +extern volatile unsigned char DAC5CON1 __attribute__((address(0x599))); + +__asm("DAC5CON1 equ 0599h"); + + +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5REFLbits_t; +extern volatile DAC5REFLbits_t DAC5REFLbits __attribute__((address(0x599))); +# 16830 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + unsigned REF5 :1; + unsigned REF6 :1; + unsigned REF7 :1; + }; + struct { + unsigned DAC5REF0 :1; + unsigned DAC5REF1 :1; + unsigned DAC5REF2 :1; + unsigned DAC5REF3 :1; + unsigned DAC5REF4 :1; + unsigned DAC5REF5 :1; + unsigned DAC5REF6 :1; + unsigned DAC5REF7 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + unsigned R5 :1; + unsigned R6 :1; + unsigned R7 :1; + }; + struct { + unsigned DAC5R0 :1; + unsigned DAC5R1 :1; + unsigned DAC5R2 :1; + unsigned DAC5R3 :1; + unsigned DAC5R4 :1; + unsigned DAC5R5 :1; + unsigned DAC5R6 :1; + unsigned DAC5R7 :1; + }; +} DAC5CON1bits_t; +extern volatile DAC5CON1bits_t DAC5CON1bits __attribute__((address(0x599))); +# 17037 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC5REFH __attribute__((address(0x59A))); + +__asm("DAC5REFH equ 059Ah"); + + +extern volatile unsigned char DAC5CON2 __attribute__((address(0x59A))); + +__asm("DAC5CON2 equ 059Ah"); + + +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5REFHbits_t; +extern volatile DAC5REFHbits_t DAC5REFHbits __attribute__((address(0x59A))); +# 17252 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned REF8 :1; + unsigned REF9 :1; + unsigned REF10 :1; + unsigned REF11 :1; + unsigned REF12 :1; + unsigned REF13 :1; + unsigned REF14 :1; + unsigned REF15 :1; + }; + struct { + unsigned DAC5REF8 :1; + unsigned DAC5REF9 :1; + unsigned DAC5REF10 :1; + unsigned DAC5REF11 :1; + unsigned DAC5REF12 :1; + unsigned DAC5REF13 :1; + unsigned DAC5REF14 :1; + unsigned DAC5REF15 :1; + }; + struct { + unsigned R8 :1; + unsigned R9 :1; + unsigned R10 :1; + unsigned R11 :1; + unsigned R12 :1; + unsigned R13 :1; + unsigned R14 :1; + unsigned R15 :1; + }; + struct { + unsigned DAC5R8 :1; + unsigned DAC5R9 :1; + unsigned DAC5R10 :1; + unsigned DAC5R11 :1; + unsigned DAC5R12 :1; + unsigned DAC5R13 :1; + unsigned DAC5R14 :1; + unsigned DAC5R15 :1; + }; +} DAC5CON2bits_t; +extern volatile DAC5CON2bits_t DAC5CON2bits __attribute__((address(0x59A))); +# 17459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7CON0 __attribute__((address(0x59E))); + +__asm("DAC7CON0 equ 059Eh"); + + +typedef union { + struct { + unsigned NSS :2; + unsigned PSS :2; + unsigned OE2 :1; + unsigned OE1 :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned NSS0 :1; + unsigned NSS1 :1; + unsigned PSS0 :1; + unsigned PSS1 :1; + }; + struct { + unsigned DACNSS :2; + unsigned DACPSS :2; + unsigned DACOE2 :1; + unsigned DACOE1 :1; + unsigned :1; + unsigned DACEN :1; + }; + struct { + unsigned DACNSS0 :1; + unsigned DACNSS1 :1; + unsigned DACPSS0 :1; + unsigned DACPSS1 :1; + }; + struct { + unsigned DAC7NSS :2; + unsigned DAC7PSS :2; + unsigned DAC7OE2 :1; + unsigned DAC7OE1 :1; + unsigned :1; + unsigned DAC7EN :1; + }; + struct { + unsigned DAC7NSS0 :1; + unsigned DAC7NSS1 :1; + unsigned DAC7PSS0 :1; + unsigned DAC7PSS1 :1; + }; +} DAC7CON0bits_t; +extern volatile DAC7CON0bits_t DAC7CON0bits __attribute__((address(0x59E))); +# 17648 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char DAC7REF __attribute__((address(0x59F))); + +__asm("DAC7REF equ 059Fh"); + + +extern volatile unsigned char DAC7CON1 __attribute__((address(0x59F))); + +__asm("DAC7CON1 equ 059Fh"); + + +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7REFbits_t; +extern volatile DAC7REFbits_t DAC7REFbits __attribute__((address(0x59F))); +# 17839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned DACR :5; + }; + struct { + unsigned DACR0 :1; + unsigned DACR1 :1; + unsigned DACR2 :1; + unsigned DACR3 :1; + unsigned DACR4 :1; + }; + struct { + unsigned R0 :1; + unsigned R1 :1; + unsigned R2 :1; + unsigned R3 :1; + unsigned R4 :1; + }; + struct { + unsigned DAC7R :5; + }; + struct { + unsigned DAC7R0 :1; + unsigned DAC7R1 :1; + unsigned DAC7R2 :1; + unsigned DAC7R3 :1; + unsigned DAC7R4 :1; + }; + struct { + unsigned REF0 :1; + unsigned REF1 :1; + unsigned REF2 :1; + unsigned REF3 :1; + unsigned REF4 :1; + }; + struct { + unsigned DAC7REF0 :1; + unsigned DAC7REF1 :1; + unsigned DAC7REF2 :1; + unsigned DAC7REF3 :1; + unsigned DAC7REF4 :1; + }; +} DAC7CON1bits_t; +extern volatile DAC7CON1bits_t DAC7CON1bits __attribute__((address(0x59F))); +# 18022 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM3DC __attribute__((address(0x614))); + +__asm("PWM3DC equ 0614h"); + + + + +extern volatile unsigned char PWM3DCL __attribute__((address(0x614))); + +__asm("PWM3DCL equ 0614h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM3DC0 :1; + unsigned PWM3DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM3DCLbits_t; +extern volatile PWM3DCLbits_t PWM3DCLbits __attribute__((address(0x614))); +# 18095 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3DCH __attribute__((address(0x615))); + +__asm("PWM3DCH equ 0615h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM3DC2 :1; + unsigned PWM3DC3 :1; + unsigned PWM3DC4 :1; + unsigned PWM3DC5 :1; + unsigned PWM3DC6 :1; + unsigned PWM3DC7 :1; + unsigned PWM3DC8 :1; + unsigned PWM3DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM3DCHbits_t; +extern volatile PWM3DCHbits_t PWM3DCHbits __attribute__((address(0x615))); +# 18265 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM3CON __attribute__((address(0x616))); + +__asm("PWM3CON equ 0616h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM3POL :1; + unsigned PWM3OUT :1; + unsigned :1; + unsigned PWM3EN :1; + }; +} PWM3CONbits_t; +extern volatile PWM3CONbits_t PWM3CONbits __attribute__((address(0x616))); +# 18321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM4DC __attribute__((address(0x617))); + +__asm("PWM4DC equ 0617h"); + + + + +extern volatile unsigned char PWM4DCL __attribute__((address(0x617))); + +__asm("PWM4DCL equ 0617h"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM4DC0 :1; + unsigned PWM4DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM4DCLbits_t; +extern volatile PWM4DCLbits_t PWM4DCLbits __attribute__((address(0x617))); +# 18394 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4DCH __attribute__((address(0x618))); + +__asm("PWM4DCH equ 0618h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM4DC2 :1; + unsigned PWM4DC3 :1; + unsigned PWM4DC4 :1; + unsigned PWM4DC5 :1; + unsigned PWM4DC6 :1; + unsigned PWM4DC7 :1; + unsigned PWM4DC8 :1; + unsigned PWM4DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM4DCHbits_t; +extern volatile PWM4DCHbits_t PWM4DCHbits __attribute__((address(0x618))); +# 18564 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM4CON __attribute__((address(0x619))); + +__asm("PWM4CON equ 0619h"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM4POL :1; + unsigned PWM4OUT :1; + unsigned :1; + unsigned PWM4EN :1; + }; +} PWM4CONbits_t; +extern volatile PWM4CONbits_t PWM4CONbits __attribute__((address(0x619))); +# 18620 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM9DC __attribute__((address(0x61A))); + +__asm("PWM9DC equ 061Ah"); + + + + +extern volatile unsigned char PWM9DCL __attribute__((address(0x61A))); + +__asm("PWM9DCL equ 061Ah"); + + +typedef union { + struct { + unsigned :6; + unsigned DC :2; + }; + struct { + unsigned :6; + unsigned DC0 :1; + unsigned DC1 :1; + }; + struct { + unsigned :6; + unsigned PWM9DC0 :1; + unsigned PWM9DC1 :1; + }; + struct { + unsigned :6; + unsigned PWMPW0 :1; + unsigned PWMPW1 :1; + }; +} PWM9DCLbits_t; +extern volatile PWM9DCLbits_t PWM9DCLbits __attribute__((address(0x61A))); +# 18693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9DCH __attribute__((address(0x61B))); + +__asm("PWM9DCH equ 061Bh"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned DC2 :1; + unsigned DC3 :1; + unsigned DC4 :1; + unsigned DC5 :1; + unsigned DC6 :1; + unsigned DC7 :1; + unsigned DC8 :1; + unsigned DC9 :1; + }; + struct { + unsigned PWM9DC2 :1; + unsigned PWM9DC3 :1; + unsigned PWM9DC4 :1; + unsigned PWM9DC5 :1; + unsigned PWM9DC6 :1; + unsigned PWM9DC7 :1; + unsigned PWM9DC8 :1; + unsigned PWM9DC9 :1; + }; + struct { + unsigned PWMPW2 :1; + unsigned PWMPW3 :1; + unsigned PWMPW4 :1; + unsigned PWMPW5 :1; + unsigned PWMPW6 :1; + unsigned PWMPW7 :1; + unsigned PWMPW8 :1; + unsigned PWMPW9 :1; + }; +} PWM9DCHbits_t; +extern volatile PWM9DCHbits_t PWM9DCHbits __attribute__((address(0x61B))); +# 18863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM9CON __attribute__((address(0x61C))); + +__asm("PWM9CON equ 061Ch"); + + +typedef union { + struct { + unsigned :4; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :4; + unsigned PWM9POL :1; + unsigned PWM9OUT :1; + unsigned :1; + unsigned PWM9EN :1; + }; +} PWM9CONbits_t; +extern volatile PWM9CONbits_t PWM9CONbits __attribute__((address(0x61C))); +# 18919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHR __attribute__((address(0x68D))); + +__asm("COG1PHR equ 068Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G1PHR0 :1; + unsigned G1PHR1 :1; + unsigned G1PHR2 :1; + unsigned G1PHR3 :1; + unsigned G1PHR4 :1; + unsigned G1PHR5 :1; + }; +} COG1PHRbits_t; +extern volatile COG1PHRbits_t COG1PHRbits __attribute__((address(0x68D))); +# 19015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1PHF __attribute__((address(0x68E))); + +__asm("COG1PHF equ 068Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G1PHF0 :1; + unsigned G1PHF1 :1; + unsigned G1PHF2 :1; + unsigned G1PHF3 :1; + unsigned G1PHF4 :1; + unsigned G1PHF5 :1; + }; +} COG1PHFbits_t; +extern volatile COG1PHFbits_t COG1PHFbits __attribute__((address(0x68E))); +# 19111 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKR __attribute__((address(0x68F))); + +__asm("COG1BLKR equ 068Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G1BLKR0 :1; + unsigned G1BLKR1 :1; + unsigned G1BLKR2 :1; + unsigned G1BLKR3 :1; + unsigned G1BLKR4 :1; + unsigned G1BLKR5 :1; + }; +} COG1BLKRbits_t; +extern volatile COG1BLKRbits_t COG1BLKRbits __attribute__((address(0x68F))); +# 19207 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1BLKF __attribute__((address(0x690))); + +__asm("COG1BLKF equ 0690h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G1BLKF0 :1; + unsigned G1BLKF1 :1; + unsigned G1BLKF2 :1; + unsigned G1BLKF3 :1; + unsigned G1BLKF4 :1; + unsigned G1BLKF5 :1; + }; +} COG1BLKFbits_t; +extern volatile COG1BLKFbits_t COG1BLKFbits __attribute__((address(0x690))); +# 19303 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBR __attribute__((address(0x691))); + +__asm("COG1DBR equ 0691h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G1DBR0 :1; + unsigned G1DBR1 :1; + unsigned G1DBR2 :1; + unsigned G1DBR3 :1; + unsigned G1DBR4 :1; + unsigned G1DBR5 :1; + }; +} COG1DBRbits_t; +extern volatile COG1DBRbits_t COG1DBRbits __attribute__((address(0x691))); +# 19399 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1DBF __attribute__((address(0x692))); + +__asm("COG1DBF equ 0692h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G1DBF0 :1; + unsigned G1DBF1 :1; + unsigned G1DBF2 :1; + unsigned G1DBF3 :1; + unsigned G1DBF4 :1; + unsigned G1DBF5 :1; + }; + struct { + unsigned G1DBF :6; + }; +} COG1DBFbits_t; +extern volatile COG1DBFbits_t COG1DBFbits __attribute__((address(0x692))); +# 19495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON0 __attribute__((address(0x693))); + +__asm("COG1CON0 equ 0693h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G1MD :3; + unsigned G1CS :2; + unsigned :1; + unsigned G1LD :1; + unsigned G1EN :1; + }; + struct { + unsigned G1MD0 :1; + unsigned G1MD1 :1; + unsigned G1MD2 :1; + unsigned G1CS0 :1; + unsigned G1CS1 :1; + }; +} COG1CON0bits_t; +extern volatile COG1CON0bits_t COG1CON0bits __attribute__((address(0x693))); +# 19625 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1CON1 __attribute__((address(0x694))); + +__asm("COG1CON1 equ 0694h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G1POLA :1; + unsigned G1POLB :1; + unsigned G1POLC :1; + unsigned G1POLD :1; + unsigned :2; + unsigned G1FDBS :1; + unsigned G1RDBS :1; + }; +} COG1CON1bits_t; +extern volatile COG1CON1bits_t COG1CON1bits __attribute__((address(0x694))); +# 19715 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS0 __attribute__((address(0x695))); + +__asm("COG1RIS0 equ 0695h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G1RIS0 :1; + unsigned G1RIS1 :1; + unsigned G1RIS2 :1; + unsigned G1RIS3 :1; + unsigned G1RIS4 :1; + unsigned G1RIS5 :1; + unsigned G1RIS6 :1; + unsigned G1RIS7 :1; + }; +} COG1RIS0bits_t; +extern volatile COG1RIS0bits_t COG1RIS0bits __attribute__((address(0x695))); +# 19827 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RIS1 __attribute__((address(0x696))); + +__asm("COG1RIS1 equ 0696h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G1RIS8 :1; + unsigned G1RIS9 :1; + unsigned G1RIS10 :1; + unsigned G1RIS11 :1; + unsigned G1RIS12 :1; + unsigned G1RIS13 :1; + unsigned G1RIS14 :1; + unsigned G1RIS15 :1; + }; +} COG1RIS1bits_t; +extern volatile COG1RIS1bits_t COG1RIS1bits __attribute__((address(0x696))); +# 19939 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM0 __attribute__((address(0x697))); + +__asm("COG1RSIM0 equ 0697h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G1RSIM0 :1; + unsigned G1RSIM1 :1; + unsigned G1RSIM2 :1; + unsigned G1RSIM3 :1; + unsigned G1RSIM4 :1; + unsigned G1RSIM5 :1; + unsigned G1RSIM6 :1; + unsigned G1RSIM7 :1; + }; +} COG1RSIM0bits_t; +extern volatile COG1RSIM0bits_t COG1RSIM0bits __attribute__((address(0x697))); +# 20051 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1RSIM1 __attribute__((address(0x698))); + +__asm("COG1RSIM1 equ 0698h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G1RSIM8 :1; + unsigned G1RSIM9 :1; + unsigned G1RSIM10 :1; + unsigned G1RSIM11 :1; + unsigned G1RSIM12 :1; + unsigned G1RSIM13 :1; + unsigned G1RSIM14 :1; + unsigned G1RSIM15 :1; + }; +} COG1RSIM1bits_t; +extern volatile COG1RSIM1bits_t COG1RSIM1bits __attribute__((address(0x698))); +# 20163 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS0 __attribute__((address(0x699))); + +__asm("COG1FIS0 equ 0699h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G1FIS0 :1; + unsigned G1FIS1 :1; + unsigned G1FIS2 :1; + unsigned G1FIS3 :1; + unsigned G1FIS4 :1; + unsigned G1FIS5 :1; + unsigned G1FIS6 :1; + unsigned G1FIS7 :1; + }; +} COG1FIS0bits_t; +extern volatile COG1FIS0bits_t COG1FIS0bits __attribute__((address(0x699))); +# 20275 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FIS1 __attribute__((address(0x69A))); + +__asm("COG1FIS1 equ 069Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G1FIS8 :1; + unsigned G1FIS9 :1; + unsigned G1FIS10 :1; + unsigned G1FIS11 :1; + unsigned G1FIS12 :1; + unsigned G1FIS13 :1; + unsigned G1FIS14 :1; + unsigned G1FIS15 :1; + }; +} COG1FIS1bits_t; +extern volatile COG1FIS1bits_t COG1FIS1bits __attribute__((address(0x69A))); +# 20387 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM0 __attribute__((address(0x69B))); + +__asm("COG1FSIM0 equ 069Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G1FSIM0 :1; + unsigned G1FSIM1 :1; + unsigned G1FSIM2 :1; + unsigned G1FSIM3 :1; + unsigned G1FSIM4 :1; + unsigned G1FSIM5 :1; + unsigned G1FSIM6 :1; + unsigned G1FSIM7 :1; + }; +} COG1FSIM0bits_t; +extern volatile COG1FSIM0bits_t COG1FSIM0bits __attribute__((address(0x69B))); +# 20499 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1FSIM1 __attribute__((address(0x69C))); + +__asm("COG1FSIM1 equ 069Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G1FSIM8 :1; + unsigned G1FSIM9 :1; + unsigned G1FSIM10 :1; + unsigned G1FSIM11 :1; + unsigned G1FSIM12 :1; + unsigned G1FSIM13 :1; + unsigned G1FSIM14 :1; + unsigned G1FSIM15 :1; + }; +} COG1FSIM1bits_t; +extern volatile COG1FSIM1bits_t COG1FSIM1bits __attribute__((address(0x69C))); +# 20611 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD0 __attribute__((address(0x69D))); + +__asm("COG1ASD0 equ 069Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC :2; + unsigned G1ASDBD :2; + unsigned G1ARSEN :1; + unsigned G1ASE :1; + }; + struct { + unsigned :2; + unsigned G1ASDAC0 :1; + unsigned G1ASDAC1 :1; + unsigned G1ASDBD0 :1; + unsigned G1ASDBD1 :1; + unsigned G1ASREN :1; + }; +} COG1ASD0bits_t; +extern volatile COG1ASD0bits_t COG1ASD0bits __attribute__((address(0x69D))); +# 20743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1ASD1 __attribute__((address(0x69E))); + +__asm("COG1ASD1 equ 069Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G1AS0E :1; + unsigned G1AS1E :1; + unsigned G1AS2E :1; + unsigned G1AS3E :1; + unsigned G1AS4E :1; + unsigned G1AS5E :1; + unsigned G1AS6E :1; + unsigned G1AS7E :1; + }; +} COG1ASD1bits_t; +extern volatile COG1ASD1bits_t COG1ASD1bits __attribute__((address(0x69E))); +# 20855 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1STR __attribute__((address(0x69F))); + +__asm("COG1STR equ 069Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G1STRA :1; + unsigned G1STRB :1; + unsigned G1STRC :1; + unsigned G1STRD :1; + unsigned G1SDATA :1; + unsigned G1SDATB :1; + unsigned G1SDATC :1; + unsigned G1SDATD :1; + }; +} COG1STRbits_t; +extern volatile COG1STRbits_t COG1STRbits __attribute__((address(0x69F))); +# 20967 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHR __attribute__((address(0x70D))); + +__asm("COG2PHR equ 070Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G2PHR0 :1; + unsigned G2PHR1 :1; + unsigned G2PHR2 :1; + unsigned G2PHR3 :1; + unsigned G2PHR4 :1; + unsigned G2PHR5 :1; + }; +} COG2PHRbits_t; +extern volatile COG2PHRbits_t COG2PHRbits __attribute__((address(0x70D))); +# 21063 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2PHF __attribute__((address(0x70E))); + +__asm("COG2PHF equ 070Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G2PHF0 :1; + unsigned G2PHF1 :1; + unsigned G2PHF2 :1; + unsigned G2PHF3 :1; + unsigned G2PHF4 :1; + unsigned G2PHF5 :1; + }; +} COG2PHFbits_t; +extern volatile COG2PHFbits_t COG2PHFbits __attribute__((address(0x70E))); +# 21159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKR __attribute__((address(0x70F))); + +__asm("COG2BLKR equ 070Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G2BLKR0 :1; + unsigned G2BLKR1 :1; + unsigned G2BLKR2 :1; + unsigned G2BLKR3 :1; + unsigned G2BLKR4 :1; + unsigned G2BLKR5 :1; + }; +} COG2BLKRbits_t; +extern volatile COG2BLKRbits_t COG2BLKRbits __attribute__((address(0x70F))); +# 21255 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2BLKF __attribute__((address(0x710))); + +__asm("COG2BLKF equ 0710h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G2BLKF0 :1; + unsigned G2BLKF1 :1; + unsigned G2BLKF2 :1; + unsigned G2BLKF3 :1; + unsigned G2BLKF4 :1; + unsigned G2BLKF5 :1; + }; +} COG2BLKFbits_t; +extern volatile COG2BLKFbits_t COG2BLKFbits __attribute__((address(0x710))); +# 21351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBR __attribute__((address(0x711))); + +__asm("COG2DBR equ 0711h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G2DBR0 :1; + unsigned G2DBR1 :1; + unsigned G2DBR2 :1; + unsigned G2DBR3 :1; + unsigned G2DBR4 :1; + unsigned G2DBR5 :1; + }; +} COG2DBRbits_t; +extern volatile COG2DBRbits_t COG2DBRbits __attribute__((address(0x711))); +# 21447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2DBF __attribute__((address(0x712))); + +__asm("COG2DBF equ 0712h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G2DBF0 :1; + unsigned G2DBF1 :1; + unsigned G2DBF2 :1; + unsigned G2DBF3 :1; + unsigned G2DBF4 :1; + unsigned G2DBF5 :1; + }; + struct { + unsigned G2DBF :6; + }; +} COG2DBFbits_t; +extern volatile COG2DBFbits_t COG2DBFbits __attribute__((address(0x712))); +# 21543 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON0 __attribute__((address(0x713))); + +__asm("COG2CON0 equ 0713h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G2MD :3; + unsigned G2CS :2; + unsigned :1; + unsigned G2LD :1; + unsigned G2EN :1; + }; + struct { + unsigned G2MD0 :1; + unsigned G2MD1 :1; + unsigned G2MD2 :1; + unsigned G2CS0 :1; + unsigned G2CS1 :1; + }; +} COG2CON0bits_t; +extern volatile COG2CON0bits_t COG2CON0bits __attribute__((address(0x713))); +# 21673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2CON1 __attribute__((address(0x714))); + +__asm("COG2CON1 equ 0714h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G2POLA :1; + unsigned G2POLB :1; + unsigned G2POLC :1; + unsigned G2POLD :1; + unsigned :2; + unsigned G2FDBS :1; + unsigned G2RDBS :1; + }; +} COG2CON1bits_t; +extern volatile COG2CON1bits_t COG2CON1bits __attribute__((address(0x714))); +# 21763 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS0 __attribute__((address(0x715))); + +__asm("COG2RIS0 equ 0715h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G2RIS0 :1; + unsigned G2RIS1 :1; + unsigned G2RIS2 :1; + unsigned G2RIS3 :1; + unsigned G2RIS4 :1; + unsigned G2RIS5 :1; + unsigned G2RIS6 :1; + unsigned G2RIS7 :1; + }; +} COG2RIS0bits_t; +extern volatile COG2RIS0bits_t COG2RIS0bits __attribute__((address(0x715))); +# 21875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RIS1 __attribute__((address(0x716))); + +__asm("COG2RIS1 equ 0716h"); + + +typedef union { + struct { + unsigned RIS8 :1; + unsigned RIS9 :1; + unsigned RIS10 :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned G2RIS8 :1; + unsigned G2RIS9 :1; + unsigned G2RIS10 :1; + unsigned G2RIS11 :1; + unsigned G2RIS12 :1; + unsigned G2RIS13 :1; + unsigned G2RIS14 :1; + unsigned G2RIS15 :1; + }; +} COG2RIS1bits_t; +extern volatile COG2RIS1bits_t COG2RIS1bits __attribute__((address(0x716))); +# 21987 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM0 __attribute__((address(0x717))); + +__asm("COG2RSIM0 equ 0717h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G2RSIM0 :1; + unsigned G2RSIM1 :1; + unsigned G2RSIM2 :1; + unsigned G2RSIM3 :1; + unsigned G2RSIM4 :1; + unsigned G2RSIM5 :1; + unsigned G2RSIM6 :1; + unsigned G2RSIM7 :1; + }; +} COG2RSIM0bits_t; +extern volatile COG2RSIM0bits_t COG2RSIM0bits __attribute__((address(0x717))); +# 22099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2RSIM1 __attribute__((address(0x718))); + +__asm("COG2RSIM1 equ 0718h"); + + +typedef union { + struct { + unsigned RSIM8 :1; + unsigned RSIM9 :1; + unsigned RSIM10 :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned G2RSIM8 :1; + unsigned G2RSIM9 :1; + unsigned G2RSIM10 :1; + unsigned G2RSIM11 :1; + unsigned G2RSIM12 :1; + unsigned G2RSIM13 :1; + unsigned G2RSIM14 :1; + unsigned G2RSIM15 :1; + }; +} COG2RSIM1bits_t; +extern volatile COG2RSIM1bits_t COG2RSIM1bits __attribute__((address(0x718))); +# 22211 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS0 __attribute__((address(0x719))); + +__asm("COG2FIS0 equ 0719h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G2FIS0 :1; + unsigned G2FIS1 :1; + unsigned G2FIS2 :1; + unsigned G2FIS3 :1; + unsigned G2FIS4 :1; + unsigned G2FIS5 :1; + unsigned G2FIS6 :1; + unsigned G2FIS7 :1; + }; +} COG2FIS0bits_t; +extern volatile COG2FIS0bits_t COG2FIS0bits __attribute__((address(0x719))); +# 22323 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FIS1 __attribute__((address(0x71A))); + +__asm("COG2FIS1 equ 071Ah"); + + +typedef union { + struct { + unsigned FIS8 :1; + unsigned FIS9 :1; + unsigned FIS10 :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned G2FIS8 :1; + unsigned G2FIS9 :1; + unsigned G2FIS10 :1; + unsigned G2FIS11 :1; + unsigned G2FIS12 :1; + unsigned G2FIS13 :1; + unsigned G2FIS14 :1; + unsigned G2FIS15 :1; + }; +} COG2FIS1bits_t; +extern volatile COG2FIS1bits_t COG2FIS1bits __attribute__((address(0x71A))); +# 22435 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM0 __attribute__((address(0x71B))); + +__asm("COG2FSIM0 equ 071Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G2FSIM0 :1; + unsigned G2FSIM1 :1; + unsigned G2FSIM2 :1; + unsigned G2FSIM3 :1; + unsigned G2FSIM4 :1; + unsigned G2FSIM5 :1; + unsigned G2FSIM6 :1; + unsigned G2FSIM7 :1; + }; +} COG2FSIM0bits_t; +extern volatile COG2FSIM0bits_t COG2FSIM0bits __attribute__((address(0x71B))); +# 22547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2FSIM1 __attribute__((address(0x71C))); + +__asm("COG2FSIM1 equ 071Ch"); + + +typedef union { + struct { + unsigned FSIM8 :1; + unsigned FSIM9 :1; + unsigned FSIM10 :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned G2FSIM8 :1; + unsigned G2FSIM9 :1; + unsigned G2FSIM10 :1; + unsigned G2FSIM11 :1; + unsigned G2FSIM12 :1; + unsigned G2FSIM13 :1; + unsigned G2FSIM14 :1; + unsigned G2FSIM15 :1; + }; +} COG2FSIM1bits_t; +extern volatile COG2FSIM1bits_t COG2FSIM1bits __attribute__((address(0x71C))); +# 22659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD0 __attribute__((address(0x71D))); + +__asm("COG2ASD0 equ 071Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC :2; + unsigned G2ASDBD :2; + unsigned G2ARSEN :1; + unsigned G2ASE :1; + }; + struct { + unsigned :2; + unsigned G2ASDAC0 :1; + unsigned G2ASDAC1 :1; + unsigned G2ASDBD0 :1; + unsigned G2ASDBD1 :1; + unsigned G2ASREN :1; + }; +} COG2ASD0bits_t; +extern volatile COG2ASD0bits_t COG2ASD0bits __attribute__((address(0x71D))); +# 22791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2ASD1 __attribute__((address(0x71E))); + +__asm("COG2ASD1 equ 071Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G2AS0E :1; + unsigned G2AS1E :1; + unsigned G2AS2E :1; + unsigned G2AS3E :1; + unsigned G2AS4E :1; + unsigned G2AS5E :1; + unsigned G2AS6E :1; + unsigned G2AS7E :1; + }; +} COG2ASD1bits_t; +extern volatile COG2ASD1bits_t COG2ASD1bits __attribute__((address(0x71E))); +# 22903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2STR __attribute__((address(0x71F))); + +__asm("COG2STR equ 071Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G2STRA :1; + unsigned G2STRB :1; + unsigned G2STRC :1; + unsigned G2STRD :1; + unsigned G2SDATA :1; + unsigned G2SDATB :1; + unsigned G2SDATC :1; + unsigned G2SDATD :1; + }; +} COG2STRbits_t; +extern volatile COG2STRbits_t COG2STRbits __attribute__((address(0x71F))); +# 23015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RTSS __attribute__((address(0x78E))); + +__asm("PRG1RTSS equ 078Eh"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG1RTSS0 :1; + unsigned RG1RTSS1 :1; + unsigned RG1RTSS2 :1; + unsigned RG1RTSS3 :1; + }; +} PRG1RTSSbits_t; +extern volatile PRG1RTSSbits_t PRG1RTSSbits __attribute__((address(0x78E))); +# 23087 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FTSS __attribute__((address(0x78F))); + +__asm("PRG1FTSS equ 078Fh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG1FTSS0 :1; + unsigned RG1FTSS1 :1; + unsigned RG1FTSS2 :1; + unsigned RG1FTSS3 :1; + }; +} PRG1FTSSbits_t; +extern volatile PRG1FTSSbits_t PRG1FTSSbits __attribute__((address(0x78F))); +# 23159 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1INS __attribute__((address(0x790))); + +__asm("PRG1INS equ 0790h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG1INS0 :1; + unsigned RG1INS1 :1; + unsigned RG1INS2 :1; + unsigned RG1INS3 :1; + }; +} PRG1INSbits_t; +extern volatile PRG1INSbits_t PRG1INSbits __attribute__((address(0x790))); +# 23231 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON0 __attribute__((address(0x791))); + +__asm("PRG1CON0 equ 0791h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG1GO :1; + unsigned RG1OS :1; + unsigned RG1MODE :2; + unsigned RG1REDG :1; + unsigned RG1FEDG :1; + unsigned :1; + unsigned RG1EN :1; + }; + struct { + unsigned :2; + unsigned RG1MODE0 :1; + unsigned RG1MODE1 :1; + }; +} PRG1CON0bits_t; +extern volatile PRG1CON0bits_t PRG1CON0bits __attribute__((address(0x791))); +# 23351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON1 __attribute__((address(0x792))); + +__asm("PRG1CON1 equ 0792h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG1RPOL :1; + unsigned RG1FPOL :1; + unsigned RG1RDY :1; + }; +} PRG1CON1bits_t; +extern volatile PRG1CON1bits_t PRG1CON1bits __attribute__((address(0x792))); +# 23403 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1CON2 __attribute__((address(0x793))); + +__asm("PRG1CON2 equ 0793h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG1ISET :5; + }; + struct { + unsigned RG1ISET0 :1; + unsigned RG1ISET1 :1; + unsigned RG1ISET2 :1; + unsigned RG1ISET3 :1; + unsigned RG1ISET4 :1; + }; +} PRG1CON2bits_t; +extern volatile PRG1CON2bits_t PRG1CON2bits __attribute__((address(0x793))); +# 23495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RTSS __attribute__((address(0x794))); + +__asm("PRG2RTSS equ 0794h"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG2RTSS0 :1; + unsigned RG2RTSS1 :1; + unsigned RG2RTSS2 :1; + unsigned RG2RTSS3 :1; + }; +} PRG2RTSSbits_t; +extern volatile PRG2RTSSbits_t PRG2RTSSbits __attribute__((address(0x794))); +# 23567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FTSS __attribute__((address(0x795))); + +__asm("PRG2FTSS equ 0795h"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG2FTSS0 :1; + unsigned RG2FTSS1 :1; + unsigned RG2FTSS2 :1; + unsigned RG2FTSS3 :1; + }; +} PRG2FTSSbits_t; +extern volatile PRG2FTSSbits_t PRG2FTSSbits __attribute__((address(0x795))); +# 23639 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2INS __attribute__((address(0x796))); + +__asm("PRG2INS equ 0796h"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG2INS0 :1; + unsigned RG2INS1 :1; + unsigned RG2INS2 :1; + unsigned RG2INS3 :1; + }; +} PRG2INSbits_t; +extern volatile PRG2INSbits_t PRG2INSbits __attribute__((address(0x796))); +# 23711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON0 __attribute__((address(0x797))); + +__asm("PRG2CON0 equ 0797h"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG2GO :1; + unsigned RG2OS :1; + unsigned RG2MODE :2; + unsigned RG2REDG :1; + unsigned RG2FEDG :1; + unsigned :1; + unsigned RG2EN :1; + }; + struct { + unsigned :2; + unsigned RG2MODE0 :1; + unsigned RG2MODE1 :1; + }; +} PRG2CON0bits_t; +extern volatile PRG2CON0bits_t PRG2CON0bits __attribute__((address(0x797))); +# 23831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON1 __attribute__((address(0x798))); + +__asm("PRG2CON1 equ 0798h"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG2RPOL :1; + unsigned RG2FPOL :1; + unsigned RG2RDY :1; + }; +} PRG2CON1bits_t; +extern volatile PRG2CON1bits_t PRG2CON1bits __attribute__((address(0x798))); +# 23883 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2CON2 __attribute__((address(0x799))); + +__asm("PRG2CON2 equ 0799h"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG2ISET :5; + }; + struct { + unsigned RG2ISET0 :1; + unsigned RG2ISET1 :1; + unsigned RG2ISET2 :1; + unsigned RG2ISET3 :1; + unsigned RG2ISET4 :1; + }; +} PRG2CON2bits_t; +extern volatile PRG2CON2bits_t PRG2CON2bits __attribute__((address(0x799))); +# 23975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RTSS __attribute__((address(0x79A))); + +__asm("PRG3RTSS equ 079Ah"); + + +typedef union { + struct { + unsigned RTSS :8; + }; + struct { + unsigned RTSS0 :1; + unsigned RTSS1 :1; + unsigned RTSS2 :1; + unsigned RTSS3 :1; + }; + struct { + unsigned RG3RTSS0 :1; + unsigned RG3RTSS1 :1; + unsigned RG3RTSS2 :1; + unsigned RG3RTSS3 :1; + }; +} PRG3RTSSbits_t; +extern volatile PRG3RTSSbits_t PRG3RTSSbits __attribute__((address(0x79A))); +# 24047 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FTSS __attribute__((address(0x79B))); + +__asm("PRG3FTSS equ 079Bh"); + + +typedef union { + struct { + unsigned FTSS :8; + }; + struct { + unsigned FTSS0 :1; + unsigned FTSS1 :1; + unsigned FTSS2 :1; + unsigned FTSS3 :1; + }; + struct { + unsigned RG3FTSS0 :1; + unsigned RG3FTSS1 :1; + unsigned RG3FTSS2 :1; + unsigned RG3FTSS3 :1; + }; +} PRG3FTSSbits_t; +extern volatile PRG3FTSSbits_t PRG3FTSSbits __attribute__((address(0x79B))); +# 24119 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3INS __attribute__((address(0x79C))); + +__asm("PRG3INS equ 079Ch"); + + +typedef union { + struct { + unsigned INS :8; + }; + struct { + unsigned INS0 :1; + unsigned INS1 :1; + unsigned INS2 :1; + unsigned INS3 :1; + }; + struct { + unsigned RG3INS0 :1; + unsigned RG3INS1 :1; + unsigned RG3INS2 :1; + unsigned RG3INS3 :1; + }; +} PRG3INSbits_t; +extern volatile PRG3INSbits_t PRG3INSbits __attribute__((address(0x79C))); +# 24191 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON0 __attribute__((address(0x79D))); + +__asm("PRG3CON0 equ 079Dh"); + + +typedef union { + struct { + unsigned GO :1; + unsigned OS :1; + unsigned MODE :2; + unsigned REDG :1; + unsigned FEDG :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; + struct { + unsigned RG3GO :1; + unsigned RG3OS :1; + unsigned RG3MODE :2; + unsigned RG3REDG :1; + unsigned RG3FEDG :1; + unsigned :1; + unsigned RG3EN :1; + }; + struct { + unsigned :2; + unsigned RG3MODE0 :1; + unsigned RG3MODE1 :1; + }; +} PRG3CON0bits_t; +extern volatile PRG3CON0bits_t PRG3CON0bits __attribute__((address(0x79D))); +# 24311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON1 __attribute__((address(0x79E))); + +__asm("PRG3CON1 equ 079Eh"); + + +typedef union { + struct { + unsigned RPOL :1; + unsigned FPOL :1; + unsigned RDY :1; + }; + struct { + unsigned RG3RPOL :1; + unsigned RG3FPOL :1; + unsigned RG3RDY :1; + }; +} PRG3CON1bits_t; +extern volatile PRG3CON1bits_t PRG3CON1bits __attribute__((address(0x79E))); +# 24363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3CON2 __attribute__((address(0x79F))); + +__asm("PRG3CON2 equ 079Fh"); + + +typedef union { + struct { + unsigned ISET :5; + }; + struct { + unsigned ISET0 :1; + unsigned ISET1 :1; + unsigned ISET2 :1; + unsigned ISET3 :1; + unsigned ISET4 :1; + }; + struct { + unsigned RG3ISET :5; + }; + struct { + unsigned RG3ISET0 :1; + unsigned RG3ISET1 :1; + unsigned RG3ISET2 :1; + unsigned RG3ISET3 :1; + unsigned RG3ISET4 :1; + }; +} PRG3CON2bits_t; +extern volatile PRG3CON2bits_t PRG3CON2bits __attribute__((address(0x79F))); +# 24455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHR __attribute__((address(0x80D))); + +__asm("COG3PHR equ 080Dh"); + + +typedef union { + struct { + unsigned PHR :6; + }; + struct { + unsigned PHR0 :1; + unsigned PHR1 :1; + unsigned PHR2 :1; + unsigned PHR3 :1; + unsigned PHR4 :1; + unsigned PHR5 :1; + }; + struct { + unsigned G3PHR0 :1; + unsigned G3PHR1 :1; + unsigned G3PHR2 :1; + unsigned G3PHR3 :1; + unsigned G3PHR4 :1; + unsigned G3PHR5 :1; + }; +} COG3PHRbits_t; +extern volatile COG3PHRbits_t COG3PHRbits __attribute__((address(0x80D))); +# 24551 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3PHF __attribute__((address(0x80E))); + +__asm("COG3PHF equ 080Eh"); + + +typedef union { + struct { + unsigned PHF :6; + }; + struct { + unsigned PHF0 :1; + unsigned PHF1 :1; + unsigned PHF2 :1; + unsigned PHF3 :1; + unsigned PHF4 :1; + unsigned PHF5 :1; + }; + struct { + unsigned G3PHF0 :1; + unsigned G3PHF1 :1; + unsigned G3PHF2 :1; + unsigned G3PHF3 :1; + unsigned G3PHF4 :1; + unsigned G3PHF5 :1; + }; +} COG3PHFbits_t; +extern volatile COG3PHFbits_t COG3PHFbits __attribute__((address(0x80E))); +# 24647 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKR __attribute__((address(0x80F))); + +__asm("COG3BLKR equ 080Fh"); + + +typedef union { + struct { + unsigned BLKR :6; + }; + struct { + unsigned BLKR0 :1; + unsigned BLKR1 :1; + unsigned BLKR2 :1; + unsigned BLKR3 :1; + unsigned BLKR4 :1; + unsigned BLKR5 :1; + }; + struct { + unsigned G3BLKR0 :1; + unsigned G3BLKR1 :1; + unsigned G3BLKR2 :1; + unsigned G3BLKR3 :1; + unsigned G3BLKR4 :1; + unsigned G3BLKR5 :1; + }; +} COG3BLKRbits_t; +extern volatile COG3BLKRbits_t COG3BLKRbits __attribute__((address(0x80F))); +# 24743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3BLKF __attribute__((address(0x810))); + +__asm("COG3BLKF equ 0810h"); + + +typedef union { + struct { + unsigned BLKF :6; + }; + struct { + unsigned BLKF0 :1; + unsigned BLKF1 :1; + unsigned BLKF2 :1; + unsigned BLKF3 :1; + unsigned BLKF4 :1; + unsigned BLKF5 :1; + }; + struct { + unsigned G3BLKF0 :1; + unsigned G3BLKF1 :1; + unsigned G3BLKF2 :1; + unsigned G3BLKF3 :1; + unsigned G3BLKF4 :1; + unsigned G3BLKF5 :1; + }; +} COG3BLKFbits_t; +extern volatile COG3BLKFbits_t COG3BLKFbits __attribute__((address(0x810))); +# 24839 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBR __attribute__((address(0x811))); + +__asm("COG3DBR equ 0811h"); + + +typedef union { + struct { + unsigned DBR :6; + }; + struct { + unsigned DBR0 :1; + unsigned DBR1 :1; + unsigned DBR2 :1; + unsigned DBR3 :1; + unsigned DBR4 :1; + unsigned DBR5 :1; + }; + struct { + unsigned G3DBR0 :1; + unsigned G3DBR1 :1; + unsigned G3DBR2 :1; + unsigned G3DBR3 :1; + unsigned G3DBR4 :1; + unsigned G3DBR5 :1; + }; +} COG3DBRbits_t; +extern volatile COG3DBRbits_t COG3DBRbits __attribute__((address(0x811))); +# 24935 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3DBF __attribute__((address(0x812))); + +__asm("COG3DBF equ 0812h"); + + +typedef union { + struct { + unsigned DBF0 :1; + unsigned DBF1 :1; + unsigned DBF2 :1; + unsigned DBF3 :1; + unsigned DBF4 :1; + unsigned DBF5 :1; + }; + struct { + unsigned G3DBF0 :1; + unsigned G3DBF1 :1; + unsigned G3DBF2 :1; + unsigned G3DBF3 :1; + unsigned G3DBF4 :1; + unsigned G3DBF5 :1; + }; + struct { + unsigned G3DBF :6; + }; +} COG3DBFbits_t; +extern volatile COG3DBFbits_t COG3DBFbits __attribute__((address(0x812))); +# 25031 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON0 __attribute__((address(0x813))); + +__asm("COG3CON0 equ 0813h"); + + +typedef union { + struct { + unsigned MD :3; + unsigned CS :2; + unsigned :1; + unsigned LD :1; + unsigned EN :1; + }; + struct { + unsigned MD0 :1; + unsigned MD1 :1; + unsigned MD2 :1; + unsigned CS0 :1; + unsigned CS1 :1; + }; + struct { + unsigned G3MD :3; + unsigned G3CS :2; + unsigned :1; + unsigned G3LD :1; + unsigned G3EN :1; + }; + struct { + unsigned G3MD0 :1; + unsigned G3MD1 :1; + unsigned G3MD2 :1; + unsigned G3CS0 :1; + unsigned G3CS1 :1; + }; +} COG3CON0bits_t; +extern volatile COG3CON0bits_t COG3CON0bits __attribute__((address(0x813))); +# 25161 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3CON1 __attribute__((address(0x814))); + +__asm("COG3CON1 equ 0814h"); + + +typedef union { + struct { + unsigned POLA :1; + unsigned POLB :1; + unsigned POLC :1; + unsigned POLD :1; + unsigned :2; + unsigned FDBS :1; + unsigned RDBS :1; + }; + struct { + unsigned G3POLA :1; + unsigned G3POLB :1; + unsigned G3POLC :1; + unsigned G3POLD :1; + unsigned :2; + unsigned G3FDBS :1; + unsigned G3RDBS :1; + }; +} COG3CON1bits_t; +extern volatile COG3CON1bits_t COG3CON1bits __attribute__((address(0x814))); +# 25251 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS0 __attribute__((address(0x815))); + +__asm("COG3RIS0 equ 0815h"); + + +typedef union { + struct { + unsigned RIS0 :1; + unsigned RIS1 :1; + unsigned RIS2 :1; + unsigned RIS3 :1; + unsigned RIS4 :1; + unsigned RIS5 :1; + unsigned RIS6 :1; + unsigned RIS7 :1; + }; + struct { + unsigned G3RIS0 :1; + unsigned G3RIS1 :1; + unsigned G3RIS2 :1; + unsigned G3RIS3 :1; + unsigned G3RIS4 :1; + unsigned G3RIS5 :1; + unsigned G3RIS6 :1; + unsigned G3RIS7 :1; + }; +} COG3RIS0bits_t; +extern volatile COG3RIS0bits_t COG3RIS0bits __attribute__((address(0x815))); +# 25363 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RIS1 __attribute__((address(0x816))); + +__asm("COG3RIS1 equ 0816h"); + + +typedef union { + struct { + unsigned :1; + unsigned RIS9 :1; + unsigned :1; + unsigned RIS11 :1; + unsigned RIS12 :1; + unsigned RIS13 :1; + unsigned RIS14 :1; + unsigned RIS15 :1; + }; + struct { + unsigned :1; + unsigned G3RIS9 :1; + unsigned :1; + unsigned G3RIS11 :1; + unsigned G3RIS12 :1; + unsigned G3RIS13 :1; + unsigned G3RIS14 :1; + unsigned G3RIS15 :1; + }; +} COG3RIS1bits_t; +extern volatile COG3RIS1bits_t COG3RIS1bits __attribute__((address(0x816))); +# 25455 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM0 __attribute__((address(0x817))); + +__asm("COG3RSIM0 equ 0817h"); + + +typedef union { + struct { + unsigned RSIM0 :1; + unsigned RSIM1 :1; + unsigned RSIM2 :1; + unsigned RSIM3 :1; + unsigned RSIM4 :1; + unsigned RSIM5 :1; + unsigned RSIM6 :1; + unsigned RSIM7 :1; + }; + struct { + unsigned G3RSIM0 :1; + unsigned G3RSIM1 :1; + unsigned G3RSIM2 :1; + unsigned G3RSIM3 :1; + unsigned G3RSIM4 :1; + unsigned G3RSIM5 :1; + unsigned G3RSIM6 :1; + unsigned G3RSIM7 :1; + }; +} COG3RSIM0bits_t; +extern volatile COG3RSIM0bits_t COG3RSIM0bits __attribute__((address(0x817))); +# 25567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3RSIM1 __attribute__((address(0x818))); + +__asm("COG3RSIM1 equ 0818h"); + + +typedef union { + struct { + unsigned :1; + unsigned RSIM9 :1; + unsigned :1; + unsigned RSIM11 :1; + unsigned RSIM12 :1; + unsigned RSIM13 :1; + unsigned RSIM14 :1; + unsigned RSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3RSIM9 :1; + unsigned :1; + unsigned G3RSIM11 :1; + unsigned G3RSIM12 :1; + unsigned G3RSIM13 :1; + unsigned G3RSIM14 :1; + unsigned G3RSIM15 :1; + }; +} COG3RSIM1bits_t; +extern volatile COG3RSIM1bits_t COG3RSIM1bits __attribute__((address(0x818))); +# 25659 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS0 __attribute__((address(0x819))); + +__asm("COG3FIS0 equ 0819h"); + + +typedef union { + struct { + unsigned FIS0 :1; + unsigned FIS1 :1; + unsigned FIS2 :1; + unsigned FIS3 :1; + unsigned FIS4 :1; + unsigned FIS5 :1; + unsigned FIS6 :1; + unsigned FIS7 :1; + }; + struct { + unsigned G3FIS0 :1; + unsigned G3FIS1 :1; + unsigned G3FIS2 :1; + unsigned G3FIS3 :1; + unsigned G3FIS4 :1; + unsigned G3FIS5 :1; + unsigned G3FIS6 :1; + unsigned G3FIS7 :1; + }; +} COG3FIS0bits_t; +extern volatile COG3FIS0bits_t COG3FIS0bits __attribute__((address(0x819))); +# 25771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FIS1 __attribute__((address(0x81A))); + +__asm("COG3FIS1 equ 081Ah"); + + +typedef union { + struct { + unsigned :1; + unsigned FIS9 :1; + unsigned :1; + unsigned FIS11 :1; + unsigned FIS12 :1; + unsigned FIS13 :1; + unsigned FIS14 :1; + unsigned FIS15 :1; + }; + struct { + unsigned :1; + unsigned G3FIS9 :1; + unsigned :1; + unsigned G3FIS11 :1; + unsigned G3FIS12 :1; + unsigned G3FIS13 :1; + unsigned G3FIS14 :1; + unsigned G3FIS15 :1; + }; +} COG3FIS1bits_t; +extern volatile COG3FIS1bits_t COG3FIS1bits __attribute__((address(0x81A))); +# 25863 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM0 __attribute__((address(0x81B))); + +__asm("COG3FSIM0 equ 081Bh"); + + +typedef union { + struct { + unsigned FSIM0 :1; + unsigned FSIM1 :1; + unsigned FSIM2 :1; + unsigned FSIM3 :1; + unsigned FSIM4 :1; + unsigned FSIM5 :1; + unsigned FSIM6 :1; + unsigned FSIM7 :1; + }; + struct { + unsigned G3FSIM0 :1; + unsigned G3FSIM1 :1; + unsigned G3FSIM2 :1; + unsigned G3FSIM3 :1; + unsigned G3FSIM4 :1; + unsigned G3FSIM5 :1; + unsigned G3FSIM6 :1; + unsigned G3FSIM7 :1; + }; +} COG3FSIM0bits_t; +extern volatile COG3FSIM0bits_t COG3FSIM0bits __attribute__((address(0x81B))); +# 25975 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3FSIM1 __attribute__((address(0x81C))); + +__asm("COG3FSIM1 equ 081Ch"); + + +typedef union { + struct { + unsigned :1; + unsigned FSIM9 :1; + unsigned :1; + unsigned FSIM11 :1; + unsigned FSIM12 :1; + unsigned FSIM13 :1; + unsigned FSIM14 :1; + unsigned FSIM15 :1; + }; + struct { + unsigned :1; + unsigned G3FSIM9 :1; + unsigned :1; + unsigned G3FSIM11 :1; + unsigned G3FSIM12 :1; + unsigned G3FSIM13 :1; + unsigned G3FSIM14 :1; + unsigned G3FSIM15 :1; + }; +} COG3FSIM1bits_t; +extern volatile COG3FSIM1bits_t COG3FSIM1bits __attribute__((address(0x81C))); +# 26067 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD0 __attribute__((address(0x81D))); + +__asm("COG3ASD0 equ 081Dh"); + + +typedef union { + struct { + unsigned :2; + unsigned ASDAC :2; + unsigned ASDBD :2; + unsigned ASREN :1; + unsigned ASE :1; + }; + struct { + unsigned :2; + unsigned ASDAC0 :1; + unsigned ASDAC1 :1; + unsigned ASDBD0 :1; + unsigned ASDBD1 :1; + unsigned ARSEN :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC :2; + unsigned G3ASDBD :2; + unsigned G3ARSEN :1; + unsigned G3ASE :1; + }; + struct { + unsigned :2; + unsigned G3ASDAC0 :1; + unsigned G3ASDAC1 :1; + unsigned G3ASDBD0 :1; + unsigned G3ASDBD1 :1; + unsigned G3ASREN :1; + }; +} COG3ASD0bits_t; +extern volatile COG3ASD0bits_t COG3ASD0bits __attribute__((address(0x81D))); +# 26199 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3ASD1 __attribute__((address(0x81E))); + +__asm("COG3ASD1 equ 081Eh"); + + +typedef union { + struct { + unsigned AS0E :1; + unsigned AS1E :1; + unsigned AS2E :1; + unsigned AS3E :1; + unsigned AS4E :1; + unsigned AS5E :1; + unsigned AS6E :1; + unsigned AS7E :1; + }; + struct { + unsigned G3AS0E :1; + unsigned G3AS1E :1; + unsigned G3AS2E :1; + unsigned G3AS3E :1; + unsigned G3AS4E :1; + unsigned G3AS5E :1; + unsigned G3AS6E :1; + unsigned G3AS7E :1; + }; +} COG3ASD1bits_t; +extern volatile COG3ASD1bits_t COG3ASD1bits __attribute__((address(0x81E))); +# 26311 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3STR __attribute__((address(0x81F))); + +__asm("COG3STR equ 081Fh"); + + +typedef union { + struct { + unsigned STRA :1; + unsigned STRB :1; + unsigned STRC :1; + unsigned STRD :1; + unsigned SDATA :1; + unsigned SDATB :1; + unsigned SDATC :1; + unsigned SDATD :1; + }; + struct { + unsigned G3STRA :1; + unsigned G3STRB :1; + unsigned G3STRC :1; + unsigned G3STRD :1; + unsigned G3SDATA :1; + unsigned G3SDATB :1; + unsigned G3SDATC :1; + unsigned G3SDATD :1; + }; +} COG3STRbits_t; +extern volatile COG3STRbits_t COG3STRbits __attribute__((address(0x81F))); +# 26423 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON0 __attribute__((address(0x90C))); + +__asm("CM4CON0 equ 090Ch"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C4SYNC :1; + unsigned C4HYS :1; + unsigned C4SP :1; + unsigned C4ZLF :1; + unsigned C4POL :1; + unsigned :1; + unsigned C4OUT :1; + unsigned C4ON :1; + }; +} CM4CON0bits_t; +extern volatile CM4CON0bits_t CM4CON0bits __attribute__((address(0x90C))); +# 26520 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4CON1 __attribute__((address(0x90D))); + +__asm("CM4CON1 equ 090Dh"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C4INTN :1; + unsigned C4INTP :1; + }; +} CM4CON1bits_t; +extern volatile CM4CON1bits_t CM4CON1bits __attribute__((address(0x90D))); +# 26560 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4NSEL __attribute__((address(0x90E))); + +__asm("CM4NSEL equ 090Eh"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C4NCH :4; + }; + struct { + unsigned C4NCH0 :1; + unsigned C4NCH1 :1; + unsigned C4NCH2 :1; + unsigned C4NCH3 :1; + }; +} CM4NSELbits_t; +extern volatile CM4NSELbits_t CM4NSELbits __attribute__((address(0x90E))); +# 26614 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM4PSEL __attribute__((address(0x90F))); + +__asm("CM4PSEL equ 090Fh"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C4PCH :4; + }; + struct { + unsigned C4PCH0 :1; + unsigned C4PCH1 :1; + unsigned C4PCH2 :1; + unsigned C4PCH3 :1; + }; +} CM4PSELbits_t; +extern volatile CM4PSELbits_t CM4PSELbits __attribute__((address(0x90F))); +# 26694 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON0 __attribute__((address(0x910))); + +__asm("CM5CON0 equ 0910h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C5SYNC :1; + unsigned C5HYS :1; + unsigned C5SP :1; + unsigned C5ZLF :1; + unsigned C5POL :1; + unsigned :1; + unsigned C5OUT :1; + unsigned C5ON :1; + }; +} CM5CON0bits_t; +extern volatile CM5CON0bits_t CM5CON0bits __attribute__((address(0x910))); +# 26791 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5CON1 __attribute__((address(0x911))); + +__asm("CM5CON1 equ 0911h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C5INTN :1; + unsigned C5INTP :1; + }; +} CM5CON1bits_t; +extern volatile CM5CON1bits_t CM5CON1bits __attribute__((address(0x911))); +# 26831 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5NSEL __attribute__((address(0x912))); + +__asm("CM5NSEL equ 0912h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C5NCH :4; + }; + struct { + unsigned C5NCH0 :1; + unsigned C5NCH1 :1; + unsigned C5NCH2 :1; + unsigned C5NCH3 :1; + }; +} CM5NSELbits_t; +extern volatile CM5NSELbits_t CM5NSELbits __attribute__((address(0x912))); +# 26885 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM5PSEL __attribute__((address(0x913))); + +__asm("CM5PSEL equ 0913h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C5PCH :4; + }; + struct { + unsigned C5PCH0 :1; + unsigned C5PCH1 :1; + unsigned C5PCH2 :1; + unsigned C5PCH3 :1; + }; +} CM5PSELbits_t; +extern volatile CM5PSELbits_t CM5PSELbits __attribute__((address(0x913))); +# 26965 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON0 __attribute__((address(0x914))); + +__asm("CM6CON0 equ 0914h"); + + +typedef union { + struct { + unsigned SYNC :1; + unsigned HYS :1; + unsigned :1; + unsigned ZLF :1; + unsigned POL :1; + unsigned :1; + unsigned OUT :1; + unsigned ON :1; + }; + struct { + unsigned C6SYNC :1; + unsigned C6HYS :1; + unsigned C6SP :1; + unsigned C6ZLF :1; + unsigned C6POL :1; + unsigned :1; + unsigned C6OUT :1; + unsigned C6ON :1; + }; +} CM6CON0bits_t; +extern volatile CM6CON0bits_t CM6CON0bits __attribute__((address(0x914))); +# 27062 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6CON1 __attribute__((address(0x915))); + +__asm("CM6CON1 equ 0915h"); + + +typedef union { + struct { + unsigned INTN :1; + unsigned INTP :1; + }; + struct { + unsigned C6INTN :1; + unsigned C6INTP :1; + }; +} CM6CON1bits_t; +extern volatile CM6CON1bits_t CM6CON1bits __attribute__((address(0x915))); +# 27102 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6NSEL __attribute__((address(0x916))); + +__asm("CM6NSEL equ 0916h"); + + +typedef union { + struct { + unsigned NCH :4; + }; + struct { + unsigned C6NCH :4; + }; + struct { + unsigned C6NCH0 :1; + unsigned C6NCH1 :1; + unsigned C6NCH2 :1; + unsigned C6NCH3 :1; + }; +} CM6NSELbits_t; +extern volatile CM6NSELbits_t CM6NSELbits __attribute__((address(0x916))); +# 27156 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CM6PSEL __attribute__((address(0x917))); + +__asm("CM6PSEL equ 0917h"); + + +typedef union { + struct { + unsigned PCH :4; + }; + struct { + unsigned PCH0 :1; + unsigned PCH1 :1; + unsigned PCH2 :1; + unsigned PCH3 :1; + }; + struct { + unsigned C6PCH :4; + }; + struct { + unsigned C6PCH0 :1; + unsigned C6PCH1 :1; + unsigned C6PCH2 :1; + unsigned C6PCH3 :1; + }; +} CM6PSELbits_t; +extern volatile CM6PSELbits_t CM6PSELbits __attribute__((address(0x917))); +# 27236 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMEN __attribute__((address(0xD8E))); + +__asm("PWMEN equ 0D8Eh"); + + +typedef union { + struct { + unsigned MPWM5EN :1; + unsigned MPWM6EN :1; + unsigned MPWM11EN :1; + }; +} PWMENbits_t; +extern volatile PWMENbits_t PWMENbits __attribute__((address(0xD8E))); +# 27268 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMLD __attribute__((address(0xD8F))); + +__asm("PWMLD equ 0D8Fh"); + + +typedef union { + struct { + unsigned MPWM5LD :1; + unsigned MPWM6LD :1; + unsigned MPWM11LD :1; + }; +} PWMLDbits_t; +extern volatile PWMLDbits_t PWMLDbits __attribute__((address(0xD8F))); +# 27300 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWMOUT __attribute__((address(0xD90))); + +__asm("PWMOUT equ 0D90h"); + + +typedef union { + struct { + unsigned MPWM5OUT :1; + unsigned MPWM6OUT :1; + unsigned MPWM11OUT :1; + }; +} PWMOUTbits_t; +extern volatile PWMOUTbits_t PWMOUTbits __attribute__((address(0xD90))); +# 27332 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PH __attribute__((address(0xD91))); + +__asm("PWM5PH equ 0D91h"); + + + + +extern volatile unsigned char PWM5PHL __attribute__((address(0xD91))); + +__asm("PWM5PHL equ 0D91h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHL0 :1; + unsigned PWM5PHL1 :1; + unsigned PWM5PHL2 :1; + unsigned PWM5PHL3 :1; + unsigned PWM5PHL4 :1; + unsigned PWM5PHL5 :1; + unsigned PWM5PHL6 :1; + unsigned PWM5PHL7 :1; + }; + struct { + unsigned PWM5PHL :8; + }; +} PWM5PHLbits_t; +extern volatile PWM5PHLbits_t PWM5PHLbits __attribute__((address(0xD91))); +# 27417 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PHH __attribute__((address(0xD92))); + +__asm("PWM5PHH equ 0D92h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM5PHH0 :1; + unsigned PWM5PHH1 :1; + unsigned PWM5PHH2 :1; + unsigned PWM5PHH3 :1; + unsigned PWM5PHH4 :1; + unsigned PWM5PHH5 :1; + unsigned PWM5PHH6 :1; + unsigned PWM5PHH7 :1; + }; + struct { + unsigned PWM5PHH :8; + }; +} PWM5PHHbits_t; +extern volatile PWM5PHHbits_t PWM5PHHbits __attribute__((address(0xD92))); +# 27495 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5DC __attribute__((address(0xD93))); + +__asm("PWM5DC equ 0D93h"); + + + + +extern volatile unsigned char PWM5DCL __attribute__((address(0xD93))); + +__asm("PWM5DCL equ 0D93h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCL0 :1; + unsigned PWM5DCL1 :1; + unsigned PWM5DCL2 :1; + unsigned PWM5DCL3 :1; + unsigned PWM5DCL4 :1; + unsigned PWM5DCL5 :1; + unsigned PWM5DCL6 :1; + unsigned PWM5DCL7 :1; + }; + struct { + unsigned PWM5DCL :8; + }; +} PWM5DCLbits_t; +extern volatile PWM5DCLbits_t PWM5DCLbits __attribute__((address(0xD93))); +# 27580 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5DCH __attribute__((address(0xD94))); + +__asm("PWM5DCH equ 0D94h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM5DCH0 :1; + unsigned PWM5DCH1 :1; + unsigned PWM5DCH2 :1; + unsigned PWM5DCH3 :1; + unsigned PWM5DCH4 :1; + unsigned PWM5DCH5 :1; + unsigned PWM5DCH6 :1; + unsigned PWM5DCH7 :1; + }; + struct { + unsigned PWM5DCH :8; + }; +} PWM5DCHbits_t; +extern volatile PWM5DCHbits_t PWM5DCHbits __attribute__((address(0xD94))); +# 27658 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5PR __attribute__((address(0xD95))); + +__asm("PWM5PR equ 0D95h"); + + + + +extern volatile unsigned char PWM5PRL __attribute__((address(0xD95))); + +__asm("PWM5PRL equ 0D95h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRL0 :1; + unsigned PWM5PRL1 :1; + unsigned PWM5PRL2 :1; + unsigned PWM5PRL3 :1; + unsigned PWM5PRL4 :1; + unsigned PWM5PRL5 :1; + unsigned PWM5PRL6 :1; + unsigned PWM5PRL7 :1; + }; + struct { + unsigned PWM5PRL :8; + }; +} PWM5PRLbits_t; +extern volatile PWM5PRLbits_t PWM5PRLbits __attribute__((address(0xD95))); +# 27743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5PRH __attribute__((address(0xD96))); + +__asm("PWM5PRH equ 0D96h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM5PRH0 :1; + unsigned PWM5PRH1 :1; + unsigned PWM5PRH2 :1; + unsigned PWM5PRH3 :1; + unsigned PWM5PRH4 :1; + unsigned PWM5PRH5 :1; + unsigned PWM5PRH6 :1; + unsigned PWM5PRH7 :1; + }; + struct { + unsigned PWM5PRH :8; + }; +} PWM5PRHbits_t; +extern volatile PWM5PRHbits_t PWM5PRHbits __attribute__((address(0xD96))); +# 27821 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5OF __attribute__((address(0xD97))); + +__asm("PWM5OF equ 0D97h"); + + + + +extern volatile unsigned char PWM5OFL __attribute__((address(0xD97))); + +__asm("PWM5OFL equ 0D97h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFL0 :1; + unsigned PWM5OFL1 :1; + unsigned PWM5OFL2 :1; + unsigned PWM5OFL3 :1; + unsigned PWM5OFL4 :1; + unsigned PWM5OFL5 :1; + unsigned PWM5OFL6 :1; + unsigned PWM5OFL7 :1; + }; + struct { + unsigned PWM5OFL :8; + }; +} PWM5OFLbits_t; +extern volatile PWM5OFLbits_t PWM5OFLbits __attribute__((address(0xD97))); +# 27906 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFH __attribute__((address(0xD98))); + +__asm("PWM5OFH equ 0D98h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM5OFH0 :1; + unsigned PWM5OFH1 :1; + unsigned PWM5OFH2 :1; + unsigned PWM5OFH3 :1; + unsigned PWM5OFH4 :1; + unsigned PWM5OFH5 :1; + unsigned PWM5OFH6 :1; + unsigned PWM5OFH7 :1; + }; + struct { + unsigned PWM5OFH :8; + }; +} PWM5OFHbits_t; +extern volatile PWM5OFHbits_t PWM5OFHbits __attribute__((address(0xD98))); +# 27984 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM5TMR __attribute__((address(0xD99))); + +__asm("PWM5TMR equ 0D99h"); + + + + +extern volatile unsigned char PWM5TMRL __attribute__((address(0xD99))); + +__asm("PWM5TMRL equ 0D99h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRL0 :1; + unsigned PWM5TMRL1 :1; + unsigned PWM5TMRL2 :1; + unsigned PWM5TMRL3 :1; + unsigned PWM5TMRL4 :1; + unsigned PWM5TMRL5 :1; + unsigned PWM5TMRL6 :1; + unsigned PWM5TMRL7 :1; + }; + struct { + unsigned PWM5TMRL :8; + }; +} PWM5TMRLbits_t; +extern volatile PWM5TMRLbits_t PWM5TMRLbits __attribute__((address(0xD99))); +# 28069 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5TMRH __attribute__((address(0xD9A))); + +__asm("PWM5TMRH equ 0D9Ah"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM5TMRH0 :1; + unsigned PWM5TMRH1 :1; + unsigned PWM5TMRH2 :1; + unsigned PWM5TMRH3 :1; + unsigned PWM5TMRH4 :1; + unsigned PWM5TMRH5 :1; + unsigned PWM5TMRH6 :1; + unsigned PWM5TMRH7 :1; + }; + struct { + unsigned PWM5TMRH :8; + }; +} PWM5TMRHbits_t; +extern volatile PWM5TMRHbits_t PWM5TMRHbits __attribute__((address(0xD9A))); +# 28147 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CON __attribute__((address(0xD9B))); + +__asm("PWM5CON equ 0D9Bh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE0 :1; + unsigned PWM5MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM5MODE :2; + unsigned PWM5POL :1; + unsigned PWM5OUT :1; + unsigned :1; + unsigned PWM5EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM5CONbits_t; +extern volatile PWM5CONbits_t PWM5CONbits __attribute__((address(0xD9B))); +# 28245 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTE __attribute__((address(0xD9C))); + +__asm("PWM5INTE equ 0D9Ch"); + + +extern volatile unsigned char PWM5INTCON __attribute__((address(0xD9C))); + +__asm("PWM5INTCON equ 0D9Ch"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTEbits_t; +extern volatile PWM5INTEbits_t PWM5INTEbits __attribute__((address(0xD9C))); +# 28312 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM5PRIE :1; + unsigned PWM5DCIE :1; + unsigned PWM5PHIE :1; + unsigned PWM5OFIE :1; + }; +} PWM5INTCONbits_t; +extern volatile PWM5INTCONbits_t PWM5INTCONbits __attribute__((address(0xD9C))); +# 28371 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5INTF __attribute__((address(0xD9D))); + +__asm("PWM5INTF equ 0D9Dh"); + + +extern volatile unsigned char PWM5INTFLG __attribute__((address(0xD9D))); + +__asm("PWM5INTFLG equ 0D9Dh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFbits_t; +extern volatile PWM5INTFbits_t PWM5INTFbits __attribute__((address(0xD9D))); +# 28438 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM5PRIF :1; + unsigned PWM5DCIF :1; + unsigned PWM5PHIF :1; + unsigned PWM5OFIF :1; + }; +} PWM5INTFLGbits_t; +extern volatile PWM5INTFLGbits_t PWM5INTFLGbits __attribute__((address(0xD9D))); +# 28497 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5CLKCON __attribute__((address(0xD9E))); + +__asm("PWM5CLKCON equ 0D9Eh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM5CS0 :1; + unsigned PWM5CS1 :1; + unsigned PWM5CS2 :1; + unsigned :1; + unsigned PWM5PS0 :1; + unsigned PWM5PS1 :1; + unsigned PWM5PS2 :1; + }; + struct { + unsigned PWM5CS :3; + unsigned :1; + unsigned PWM5PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM5CLKCONbits_t; +extern volatile PWM5CLKCONbits_t PWM5CLKCONbits __attribute__((address(0xD9E))); +# 28617 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5LDCON __attribute__((address(0xD9F))); + +__asm("PWM5LDCON equ 0D9Fh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM5LDS0 :1; + unsigned PWM5LDS1 :1; + }; + struct { + unsigned PWM5LDS :2; + unsigned :4; + unsigned PWM5LDM :1; + unsigned PWM5LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM5LDCONbits_t; +extern volatile PWM5LDCONbits_t PWM5LDCONbits __attribute__((address(0xD9F))); +# 28699 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM5OFCON __attribute__((address(0xDA0))); + +__asm("PWM5OFCON equ 0DA0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM5OFS0 :1; + unsigned PWM5OFS1 :1; + unsigned :3; + unsigned PWM5OFM0 :1; + unsigned PWM5OFM1 :1; + }; + struct { + unsigned PWM5OFS :2; + unsigned :2; + unsigned PWM5OFMC :1; + unsigned PWM5OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM5OFCONbits_t; +extern volatile PWM5OFCONbits_t PWM5OFCONbits __attribute__((address(0xDA0))); +# 28807 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PH __attribute__((address(0xDA1))); + +__asm("PWM6PH equ 0DA1h"); + + + + +extern volatile unsigned char PWM6PHL __attribute__((address(0xDA1))); + +__asm("PWM6PHL equ 0DA1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHL0 :1; + unsigned PWM6PHL1 :1; + unsigned PWM6PHL2 :1; + unsigned PWM6PHL3 :1; + unsigned PWM6PHL4 :1; + unsigned PWM6PHL5 :1; + unsigned PWM6PHL6 :1; + unsigned PWM6PHL7 :1; + }; + struct { + unsigned PWM6PHL :8; + }; +} PWM6PHLbits_t; +extern volatile PWM6PHLbits_t PWM6PHLbits __attribute__((address(0xDA1))); +# 28892 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PHH __attribute__((address(0xDA2))); + +__asm("PWM6PHH equ 0DA2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM6PHH0 :1; + unsigned PWM6PHH1 :1; + unsigned PWM6PHH2 :1; + unsigned PWM6PHH3 :1; + unsigned PWM6PHH4 :1; + unsigned PWM6PHH5 :1; + unsigned PWM6PHH6 :1; + unsigned PWM6PHH7 :1; + }; + struct { + unsigned PWM6PHH :8; + }; +} PWM6PHHbits_t; +extern volatile PWM6PHHbits_t PWM6PHHbits __attribute__((address(0xDA2))); +# 28970 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6DC __attribute__((address(0xDA3))); + +__asm("PWM6DC equ 0DA3h"); + + + + +extern volatile unsigned char PWM6DCL __attribute__((address(0xDA3))); + +__asm("PWM6DCL equ 0DA3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCL0 :1; + unsigned PWM6DCL1 :1; + unsigned PWM6DCL2 :1; + unsigned PWM6DCL3 :1; + unsigned PWM6DCL4 :1; + unsigned PWM6DCL5 :1; + unsigned PWM6DCL6 :1; + unsigned PWM6DCL7 :1; + }; + struct { + unsigned PWM6DCL :8; + }; +} PWM6DCLbits_t; +extern volatile PWM6DCLbits_t PWM6DCLbits __attribute__((address(0xDA3))); +# 29055 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6DCH __attribute__((address(0xDA4))); + +__asm("PWM6DCH equ 0DA4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM6DCH0 :1; + unsigned PWM6DCH1 :1; + unsigned PWM6DCH2 :1; + unsigned PWM6DCH3 :1; + unsigned PWM6DCH4 :1; + unsigned PWM6DCH5 :1; + unsigned PWM6DCH6 :1; + unsigned PWM6DCH7 :1; + }; + struct { + unsigned PWM6DCH :8; + }; +} PWM6DCHbits_t; +extern volatile PWM6DCHbits_t PWM6DCHbits __attribute__((address(0xDA4))); +# 29133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6PR __attribute__((address(0xDA5))); + +__asm("PWM6PR equ 0DA5h"); + + + + +extern volatile unsigned char PWM6PRL __attribute__((address(0xDA5))); + +__asm("PWM6PRL equ 0DA5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRL0 :1; + unsigned PWM6PRL1 :1; + unsigned PWM6PRL2 :1; + unsigned PWM6PRL3 :1; + unsigned PWM6PRL4 :1; + unsigned PWM6PRL5 :1; + unsigned PWM6PRL6 :1; + unsigned PWM6PRL7 :1; + }; + struct { + unsigned PWM6PRL :8; + }; +} PWM6PRLbits_t; +extern volatile PWM6PRLbits_t PWM6PRLbits __attribute__((address(0xDA5))); +# 29218 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6PRH __attribute__((address(0xDA6))); + +__asm("PWM6PRH equ 0DA6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM6PRH0 :1; + unsigned PWM6PRH1 :1; + unsigned PWM6PRH2 :1; + unsigned PWM6PRH3 :1; + unsigned PWM6PRH4 :1; + unsigned PWM6PRH5 :1; + unsigned PWM6PRH6 :1; + unsigned PWM6PRH7 :1; + }; + struct { + unsigned PWM6PRH :8; + }; +} PWM6PRHbits_t; +extern volatile PWM6PRHbits_t PWM6PRHbits __attribute__((address(0xDA6))); +# 29296 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6OF __attribute__((address(0xDA7))); + +__asm("PWM6OF equ 0DA7h"); + + + + +extern volatile unsigned char PWM6OFL __attribute__((address(0xDA7))); + +__asm("PWM6OFL equ 0DA7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFL0 :1; + unsigned PWM6OFL1 :1; + unsigned PWM6OFL2 :1; + unsigned PWM6OFL3 :1; + unsigned PWM6OFL4 :1; + unsigned PWM6OFL5 :1; + unsigned PWM6OFL6 :1; + unsigned PWM6OFL7 :1; + }; + struct { + unsigned PWM6OFL :8; + }; +} PWM6OFLbits_t; +extern volatile PWM6OFLbits_t PWM6OFLbits __attribute__((address(0xDA7))); +# 29381 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFH __attribute__((address(0xDA8))); + +__asm("PWM6OFH equ 0DA8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM6OFH0 :1; + unsigned PWM6OFH1 :1; + unsigned PWM6OFH2 :1; + unsigned PWM6OFH3 :1; + unsigned PWM6OFH4 :1; + unsigned PWM6OFH5 :1; + unsigned PWM6OFH6 :1; + unsigned PWM6OFH7 :1; + }; + struct { + unsigned PWM6OFH :8; + }; +} PWM6OFHbits_t; +extern volatile PWM6OFHbits_t PWM6OFHbits __attribute__((address(0xDA8))); +# 29459 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM6TMR __attribute__((address(0xDA9))); + +__asm("PWM6TMR equ 0DA9h"); + + + + +extern volatile unsigned char PWM6TMRL __attribute__((address(0xDA9))); + +__asm("PWM6TMRL equ 0DA9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRL0 :1; + unsigned PWM6TMRL1 :1; + unsigned PWM6TMRL2 :1; + unsigned PWM6TMRL3 :1; + unsigned PWM6TMRL4 :1; + unsigned PWM6TMRL5 :1; + unsigned PWM6TMRL6 :1; + unsigned PWM6TMRL7 :1; + }; + struct { + unsigned PWM6TMRL :8; + }; +} PWM6TMRLbits_t; +extern volatile PWM6TMRLbits_t PWM6TMRLbits __attribute__((address(0xDA9))); +# 29544 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6TMRH __attribute__((address(0xDAA))); + +__asm("PWM6TMRH equ 0DAAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM6TMRH0 :1; + unsigned PWM6TMRH1 :1; + unsigned PWM6TMRH2 :1; + unsigned PWM6TMRH3 :1; + unsigned PWM6TMRH4 :1; + unsigned PWM6TMRH5 :1; + unsigned PWM6TMRH6 :1; + unsigned PWM6TMRH7 :1; + }; + struct { + unsigned PWM6TMRH :8; + }; +} PWM6TMRHbits_t; +extern volatile PWM6TMRHbits_t PWM6TMRHbits __attribute__((address(0xDAA))); +# 29622 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CON __attribute__((address(0xDAB))); + +__asm("PWM6CON equ 0DABh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE0 :1; + unsigned PWM6MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM6MODE :2; + unsigned PWM6POL :1; + unsigned PWM6OUT :1; + unsigned :1; + unsigned PWM6EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM6CONbits_t; +extern volatile PWM6CONbits_t PWM6CONbits __attribute__((address(0xDAB))); +# 29720 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTE __attribute__((address(0xDAC))); + +__asm("PWM6INTE equ 0DACh"); + + +extern volatile unsigned char PWM6INTCON __attribute__((address(0xDAC))); + +__asm("PWM6INTCON equ 0DACh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTEbits_t; +extern volatile PWM6INTEbits_t PWM6INTEbits __attribute__((address(0xDAC))); +# 29787 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM6PRIE :1; + unsigned PWM6DCIE :1; + unsigned PWM6PHIE :1; + unsigned PWM6OFIE :1; + }; +} PWM6INTCONbits_t; +extern volatile PWM6INTCONbits_t PWM6INTCONbits __attribute__((address(0xDAC))); +# 29846 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6INTF __attribute__((address(0xDAD))); + +__asm("PWM6INTF equ 0DADh"); + + +extern volatile unsigned char PWM6INTFLG __attribute__((address(0xDAD))); + +__asm("PWM6INTFLG equ 0DADh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFbits_t; +extern volatile PWM6INTFbits_t PWM6INTFbits __attribute__((address(0xDAD))); +# 29913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM6PRIF :1; + unsigned PWM6DCIF :1; + unsigned PWM6PHIF :1; + unsigned PWM6OFIF :1; + }; +} PWM6INTFLGbits_t; +extern volatile PWM6INTFLGbits_t PWM6INTFLGbits __attribute__((address(0xDAD))); +# 29972 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6CLKCON __attribute__((address(0xDAE))); + +__asm("PWM6CLKCON equ 0DAEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM6CS0 :1; + unsigned PWM6CS1 :1; + unsigned PWM6CS2 :1; + unsigned :1; + unsigned PWM6PS0 :1; + unsigned PWM6PS1 :1; + unsigned PWM6PS2 :1; + }; + struct { + unsigned PWM6CS :3; + unsigned :1; + unsigned PWM6PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM6CLKCONbits_t; +extern volatile PWM6CLKCONbits_t PWM6CLKCONbits __attribute__((address(0xDAE))); +# 30092 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6LDCON __attribute__((address(0xDAF))); + +__asm("PWM6LDCON equ 0DAFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM6LDS0 :1; + unsigned PWM6LDS1 :1; + }; + struct { + unsigned PWM6LDS :2; + unsigned :4; + unsigned PWM6LDM :1; + unsigned PWM6LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM6LDCONbits_t; +extern volatile PWM6LDCONbits_t PWM6LDCONbits __attribute__((address(0xDAF))); +# 30174 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM6OFCON __attribute__((address(0xDB0))); + +__asm("PWM6OFCON equ 0DB0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM6OFS0 :1; + unsigned PWM6OFS1 :1; + unsigned :3; + unsigned PWM6OFM0 :1; + unsigned PWM6OFM1 :1; + }; + struct { + unsigned PWM6OFS :2; + unsigned :2; + unsigned PWM6OFMC :1; + unsigned PWM6OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM6OFCONbits_t; +extern volatile PWM6OFCONbits_t PWM6OFCONbits __attribute__((address(0xDB0))); +# 30282 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PH __attribute__((address(0xDB1))); + +__asm("PWM11PH equ 0DB1h"); + + + + +extern volatile unsigned char PWM11PHL __attribute__((address(0xDB1))); + +__asm("PWM11PHL equ 0DB1h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHL0 :1; + unsigned PWM11PHL1 :1; + unsigned PWM11PHL2 :1; + unsigned PWM11PHL3 :1; + unsigned PWM11PHL4 :1; + unsigned PWM11PHL5 :1; + unsigned PWM11PHL6 :1; + unsigned PWM11PHL7 :1; + }; + struct { + unsigned PWM11PHL :8; + }; +} PWM11PHLbits_t; +extern volatile PWM11PHLbits_t PWM11PHLbits __attribute__((address(0xDB1))); +# 30367 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PHH __attribute__((address(0xDB2))); + +__asm("PWM11PHH equ 0DB2h"); + + +typedef union { + struct { + unsigned PH :8; + }; + struct { + unsigned PWM11PHH0 :1; + unsigned PWM11PHH1 :1; + unsigned PWM11PHH2 :1; + unsigned PWM11PHH3 :1; + unsigned PWM11PHH4 :1; + unsigned PWM11PHH5 :1; + unsigned PWM11PHH6 :1; + unsigned PWM11PHH7 :1; + }; + struct { + unsigned PWM11PHH :8; + }; +} PWM11PHHbits_t; +extern volatile PWM11PHHbits_t PWM11PHHbits __attribute__((address(0xDB2))); +# 30445 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11DC __attribute__((address(0xDB3))); + +__asm("PWM11DC equ 0DB3h"); + + + + +extern volatile unsigned char PWM11DCL __attribute__((address(0xDB3))); + +__asm("PWM11DCL equ 0DB3h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCL0 :1; + unsigned PWM11DCL1 :1; + unsigned PWM11DCL2 :1; + unsigned PWM11DCL3 :1; + unsigned PWM11DCL4 :1; + unsigned PWM11DCL5 :1; + unsigned PWM11DCL6 :1; + unsigned PWM11DCL7 :1; + }; + struct { + unsigned PWM11DCL :8; + }; +} PWM11DCLbits_t; +extern volatile PWM11DCLbits_t PWM11DCLbits __attribute__((address(0xDB3))); +# 30530 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11DCH __attribute__((address(0xDB4))); + +__asm("PWM11DCH equ 0DB4h"); + + +typedef union { + struct { + unsigned DC :8; + }; + struct { + unsigned PWM11DCH0 :1; + unsigned PWM11DCH1 :1; + unsigned PWM11DCH2 :1; + unsigned PWM11DCH3 :1; + unsigned PWM11DCH4 :1; + unsigned PWM11DCH5 :1; + unsigned PWM11DCH6 :1; + unsigned PWM11DCH7 :1; + }; + struct { + unsigned PWM11DCH :8; + }; +} PWM11DCHbits_t; +extern volatile PWM11DCHbits_t PWM11DCHbits __attribute__((address(0xDB4))); +# 30608 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11PR __attribute__((address(0xDB5))); + +__asm("PWM11PR equ 0DB5h"); + + + + +extern volatile unsigned char PWM11PRL __attribute__((address(0xDB5))); + +__asm("PWM11PRL equ 0DB5h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRL0 :1; + unsigned PWM11PRL1 :1; + unsigned PWM11PRL2 :1; + unsigned PWM11PRL3 :1; + unsigned PWM11PRL4 :1; + unsigned PWM11PRL5 :1; + unsigned PWM11PRL6 :1; + unsigned PWM11PRL7 :1; + }; + struct { + unsigned PWM11PRL :8; + }; +} PWM11PRLbits_t; +extern volatile PWM11PRLbits_t PWM11PRLbits __attribute__((address(0xDB5))); +# 30693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11PRH __attribute__((address(0xDB6))); + +__asm("PWM11PRH equ 0DB6h"); + + +typedef union { + struct { + unsigned PR :8; + }; + struct { + unsigned PWM11PRH0 :1; + unsigned PWM11PRH1 :1; + unsigned PWM11PRH2 :1; + unsigned PWM11PRH3 :1; + unsigned PWM11PRH4 :1; + unsigned PWM11PRH5 :1; + unsigned PWM11PRH6 :1; + unsigned PWM11PRH7 :1; + }; + struct { + unsigned PWM11PRH :8; + }; +} PWM11PRHbits_t; +extern volatile PWM11PRHbits_t PWM11PRHbits __attribute__((address(0xDB6))); +# 30771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11OF __attribute__((address(0xDB7))); + +__asm("PWM11OF equ 0DB7h"); + + + + +extern volatile unsigned char PWM11OFL __attribute__((address(0xDB7))); + +__asm("PWM11OFL equ 0DB7h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFL0 :1; + unsigned PWM11OFL1 :1; + unsigned PWM11OFL2 :1; + unsigned PWM11OFL3 :1; + unsigned PWM11OFL4 :1; + unsigned PWM11OFL5 :1; + unsigned PWM11OFL6 :1; + unsigned PWM11OFL7 :1; + }; + struct { + unsigned PWM11OFL :8; + }; +} PWM11OFLbits_t; +extern volatile PWM11OFLbits_t PWM11OFLbits __attribute__((address(0xDB7))); +# 30856 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFH __attribute__((address(0xDB8))); + +__asm("PWM11OFH equ 0DB8h"); + + +typedef union { + struct { + unsigned OF :8; + }; + struct { + unsigned PWM11OFH0 :1; + unsigned PWM11OFH1 :1; + unsigned PWM11OFH2 :1; + unsigned PWM11OFH3 :1; + unsigned PWM11OFH4 :1; + unsigned PWM11OFH5 :1; + unsigned PWM11OFH6 :1; + unsigned PWM11OFH7 :1; + }; + struct { + unsigned PWM11OFH :8; + }; +} PWM11OFHbits_t; +extern volatile PWM11OFHbits_t PWM11OFHbits __attribute__((address(0xDB8))); +# 30934 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned short PWM11TMR __attribute__((address(0xDB9))); + +__asm("PWM11TMR equ 0DB9h"); + + + + +extern volatile unsigned char PWM11TMRL __attribute__((address(0xDB9))); + +__asm("PWM11TMRL equ 0DB9h"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRL0 :1; + unsigned PWM11TMRL1 :1; + unsigned PWM11TMRL2 :1; + unsigned PWM11TMRL3 :1; + unsigned PWM11TMRL4 :1; + unsigned PWM11TMRL5 :1; + unsigned PWM11TMRL6 :1; + unsigned PWM11TMRL7 :1; + }; + struct { + unsigned PWM11TMRL :8; + }; +} PWM11TMRLbits_t; +extern volatile PWM11TMRLbits_t PWM11TMRLbits __attribute__((address(0xDB9))); +# 31019 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11TMRH __attribute__((address(0xDBA))); + +__asm("PWM11TMRH equ 0DBAh"); + + +typedef union { + struct { + unsigned TMR :8; + }; + struct { + unsigned PWM11TMRH0 :1; + unsigned PWM11TMRH1 :1; + unsigned PWM11TMRH2 :1; + unsigned PWM11TMRH3 :1; + unsigned PWM11TMRH4 :1; + unsigned PWM11TMRH5 :1; + unsigned PWM11TMRH6 :1; + unsigned PWM11TMRH7 :1; + }; + struct { + unsigned PWM11TMRH :8; + }; +} PWM11TMRHbits_t; +extern volatile PWM11TMRHbits_t PWM11TMRHbits __attribute__((address(0xDBA))); +# 31097 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CON __attribute__((address(0xDBB))); + +__asm("PWM11CON equ 0DBBh"); + + +typedef union { + struct { + unsigned :2; + unsigned MODE :2; + unsigned POL :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE0 :1; + unsigned PWM11MODE1 :1; + }; + struct { + unsigned :2; + unsigned PWM11MODE :2; + unsigned PWM11POL :1; + unsigned PWM11OUT :1; + unsigned :1; + unsigned PWM11EN :1; + }; + struct { + unsigned :2; + unsigned MODE0 :1; + unsigned MODE1 :1; + }; +} PWM11CONbits_t; +extern volatile PWM11CONbits_t PWM11CONbits __attribute__((address(0xDBB))); +# 31195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTE __attribute__((address(0xDBC))); + +__asm("PWM11INTE equ 0DBCh"); + + +extern volatile unsigned char PWM11INTCON __attribute__((address(0xDBC))); + +__asm("PWM11INTCON equ 0DBCh"); + + +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTEbits_t; +extern volatile PWM11INTEbits_t PWM11INTEbits __attribute__((address(0xDBC))); +# 31262 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIE :1; + unsigned DCIE :1; + unsigned PHIE :1; + unsigned OFIE :1; + }; + struct { + unsigned PWM11PRIE :1; + unsigned PWM11DCIE :1; + unsigned PWM11PHIE :1; + unsigned PWM11OFIE :1; + }; +} PWM11INTCONbits_t; +extern volatile PWM11INTCONbits_t PWM11INTCONbits __attribute__((address(0xDBC))); +# 31321 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11INTF __attribute__((address(0xDBD))); + +__asm("PWM11INTF equ 0DBDh"); + + +extern volatile unsigned char PWM11INTFLG __attribute__((address(0xDBD))); + +__asm("PWM11INTFLG equ 0DBDh"); + + +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFbits_t; +extern volatile PWM11INTFbits_t PWM11INTFbits __attribute__((address(0xDBD))); +# 31388 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +typedef union { + struct { + unsigned PRIF :1; + unsigned DCIF :1; + unsigned PHIF :1; + unsigned OFIF :1; + }; + struct { + unsigned PWM11PRIF :1; + unsigned PWM11DCIF :1; + unsigned PWM11PHIF :1; + unsigned PWM11OFIF :1; + }; +} PWM11INTFLGbits_t; +extern volatile PWM11INTFLGbits_t PWM11INTFLGbits __attribute__((address(0xDBD))); +# 31447 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11CLKCON __attribute__((address(0xDBE))); + +__asm("PWM11CLKCON equ 0DBEh"); + + +typedef union { + struct { + unsigned CS :2; + unsigned :2; + unsigned PS :3; + }; + struct { + unsigned PWM11CS0 :1; + unsigned PWM11CS1 :1; + unsigned PWM11CS2 :1; + unsigned :1; + unsigned PWM11PS0 :1; + unsigned PWM11PS1 :1; + unsigned PWM11PS2 :1; + }; + struct { + unsigned PWM11CS :3; + unsigned :1; + unsigned PWM11PS :3; + }; + struct { + unsigned CS0 :1; + unsigned CS1 :1; + unsigned CS2 :1; + unsigned :1; + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} PWM11CLKCONbits_t; +extern volatile PWM11CLKCONbits_t PWM11CLKCONbits __attribute__((address(0xDBE))); +# 31567 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11LDCON __attribute__((address(0xDBF))); + +__asm("PWM11LDCON equ 0DBFh"); + + +typedef union { + struct { + unsigned LDS :2; + unsigned :4; + unsigned LDT :1; + unsigned LDA :1; + }; + struct { + unsigned PWM11LDS0 :1; + unsigned PWM11LDS1 :1; + }; + struct { + unsigned PWM11LDS :2; + unsigned :4; + unsigned PWM11LDM :1; + unsigned PWM11LD :1; + }; + struct { + unsigned LDS0 :1; + unsigned LDS1 :1; + }; +} PWM11LDCONbits_t; +extern volatile PWM11LDCONbits_t PWM11LDCONbits __attribute__((address(0xDBF))); +# 31649 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PWM11OFCON __attribute__((address(0xDC0))); + +__asm("PWM11OFCON equ 0DC0h"); + + +typedef union { + struct { + unsigned OFS :2; + unsigned :2; + unsigned OFO :1; + unsigned OFM :2; + }; + struct { + unsigned PWM11OFS0 :1; + unsigned PWM11OFS1 :1; + unsigned :3; + unsigned PWM11OFM0 :1; + unsigned PWM11OFM1 :1; + }; + struct { + unsigned PWM11OFS :2; + unsigned :2; + unsigned PWM11OFMC :1; + unsigned PWM11OFM :2; + }; + struct { + unsigned OFS0 :1; + unsigned OFS1 :1; + unsigned :3; + unsigned OFM0 :1; + unsigned OFM1 :1; + }; +} PWM11OFCONbits_t; +extern volatile PWM11OFCONbits_t PWM11OFCONbits __attribute__((address(0xDC0))); +# 31757 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PPSLOCK __attribute__((address(0xE0C))); + +__asm("PPSLOCK equ 0E0Ch"); + + +typedef union { + struct { + unsigned PPSLOCKED :1; + }; +} PPSLOCKbits_t; +extern volatile PPSLOCKbits_t PPSLOCKbits __attribute__((address(0xE0C))); +# 31777 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char INTPPS __attribute__((address(0xE0D))); + +__asm("INTPPS equ 0E0Dh"); + + +typedef union { + struct { + unsigned INTPPS :6; + }; +} INTPPSbits_t; +extern volatile INTPPSbits_t INTPPSbits __attribute__((address(0xE0D))); +# 31797 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T0CKIPPS __attribute__((address(0xE0E))); + +__asm("T0CKIPPS equ 0E0Eh"); + + +typedef union { + struct { + unsigned T0CKIPPS :6; + }; +} T0CKIPPSbits_t; +extern volatile T0CKIPPSbits_t T0CKIPPSbits __attribute__((address(0xE0E))); +# 31817 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1CKIPPS __attribute__((address(0xE0F))); + +__asm("T1CKIPPS equ 0E0Fh"); + + +typedef union { + struct { + unsigned T1CKIPPS :6; + }; +} T1CKIPPSbits_t; +extern volatile T1CKIPPSbits_t T1CKIPPSbits __attribute__((address(0xE0F))); +# 31837 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T1GPPS __attribute__((address(0xE10))); + +__asm("T1GPPS equ 0E10h"); + + +typedef union { + struct { + unsigned T1GPPS :6; + }; +} T1GPPSbits_t; +extern volatile T1GPPSbits_t T1GPPSbits __attribute__((address(0xE10))); +# 31857 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3CKIPPS __attribute__((address(0xE11))); + +__asm("T3CKIPPS equ 0E11h"); + + +typedef union { + struct { + unsigned T3CKIPPS :6; + }; +} T3CKIPPSbits_t; +extern volatile T3CKIPPSbits_t T3CKIPPSbits __attribute__((address(0xE11))); +# 31877 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T3GPPS __attribute__((address(0xE12))); + +__asm("T3GPPS equ 0E12h"); + + +typedef union { + struct { + unsigned T3GPPS :6; + }; +} T3GPPSbits_t; +extern volatile T3GPPSbits_t T3GPPSbits __attribute__((address(0xE12))); +# 31897 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5CKIPPS __attribute__((address(0xE13))); + +__asm("T5CKIPPS equ 0E13h"); + + +typedef union { + struct { + unsigned T5CKIPPS :6; + }; +} T5CKIPPSbits_t; +extern volatile T5CKIPPSbits_t T5CKIPPSbits __attribute__((address(0xE13))); +# 31917 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T5GPPS __attribute__((address(0xE14))); + +__asm("T5GPPS equ 0E14h"); + + +typedef union { + struct { + unsigned T5GPPS :6; + }; +} T5GPPSbits_t; +extern volatile T5GPPSbits_t T5GPPSbits __attribute__((address(0xE14))); +# 31937 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T2INPPS __attribute__((address(0xE15))); + +__asm("T2INPPS equ 0E15h"); + + +extern volatile unsigned char T2CKIPPS __attribute__((address(0xE15))); + +__asm("T2CKIPPS equ 0E15h"); + +extern volatile unsigned char T2PPS __attribute__((address(0xE15))); + +__asm("T2PPS equ 0E15h"); + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2INPPSbits_t; +extern volatile T2INPPSbits_t T2INPPSbits __attribute__((address(0xE15))); + + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2CKIPPSbits_t; +extern volatile T2CKIPPSbits_t T2CKIPPSbits __attribute__((address(0xE15))); + + + + + + +typedef union { + struct { + unsigned T2INPPS :6; + }; +} T2PPSbits_t; +extern volatile T2PPSbits_t T2PPSbits __attribute__((address(0xE15))); +# 31991 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T4INPPS __attribute__((address(0xE16))); + +__asm("T4INPPS equ 0E16h"); + + +extern volatile unsigned char T4CKIPPS __attribute__((address(0xE16))); + +__asm("T4CKIPPS equ 0E16h"); + +extern volatile unsigned char T4PPS __attribute__((address(0xE16))); + +__asm("T4PPS equ 0E16h"); + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4INPPSbits_t; +extern volatile T4INPPSbits_t T4INPPSbits __attribute__((address(0xE16))); + + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4CKIPPSbits_t; +extern volatile T4CKIPPSbits_t T4CKIPPSbits __attribute__((address(0xE16))); + + + + + + +typedef union { + struct { + unsigned T4INPPS :6; + }; +} T4PPSbits_t; +extern volatile T4PPSbits_t T4PPSbits __attribute__((address(0xE16))); +# 32045 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T6INPPS __attribute__((address(0xE17))); + +__asm("T6INPPS equ 0E17h"); + + +extern volatile unsigned char T6CKIPPS __attribute__((address(0xE17))); + +__asm("T6CKIPPS equ 0E17h"); + +extern volatile unsigned char T6PPS __attribute__((address(0xE17))); + +__asm("T6PPS equ 0E17h"); + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6INPPSbits_t; +extern volatile T6INPPSbits_t T6INPPSbits __attribute__((address(0xE17))); + + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6CKIPPSbits_t; +extern volatile T6CKIPPSbits_t T6CKIPPSbits __attribute__((address(0xE17))); + + + + + + +typedef union { + struct { + unsigned T6INPPS :6; + }; +} T6PPSbits_t; +extern volatile T6PPSbits_t T6PPSbits __attribute__((address(0xE17))); +# 32099 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char T8INPPS __attribute__((address(0xE18))); + +__asm("T8INPPS equ 0E18h"); + + +extern volatile unsigned char T8CKIPPS __attribute__((address(0xE18))); + +__asm("T8CKIPPS equ 0E18h"); + +extern volatile unsigned char T8PPS __attribute__((address(0xE18))); + +__asm("T8PPS equ 0E18h"); + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8INPPSbits_t; +extern volatile T8INPPSbits_t T8INPPSbits __attribute__((address(0xE18))); + + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8CKIPPSbits_t; +extern volatile T8CKIPPSbits_t T8CKIPPSbits __attribute__((address(0xE18))); + + + + + + +typedef union { + struct { + unsigned T8INPPS :6; + }; +} T8PPSbits_t; +extern volatile T8PPSbits_t T8PPSbits __attribute__((address(0xE18))); +# 32153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP1PPS __attribute__((address(0xE19))); + +__asm("CCP1PPS equ 0E19h"); + + +typedef union { + struct { + unsigned CCP1PPS :6; + }; +} CCP1PPSbits_t; +extern volatile CCP1PPSbits_t CCP1PPSbits __attribute__((address(0xE19))); +# 32173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP2PPS __attribute__((address(0xE1A))); + +__asm("CCP2PPS equ 0E1Ah"); + + +typedef union { + struct { + unsigned CCP2PPS :6; + }; +} CCP2PPSbits_t; +extern volatile CCP2PPSbits_t CCP2PPSbits __attribute__((address(0xE1A))); +# 32193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CCP7PPS __attribute__((address(0xE1B))); + +__asm("CCP7PPS equ 0E1Bh"); + + +typedef union { + struct { + unsigned CCP7PPS :6; + }; +} CCP7PPSbits_t; +extern volatile CCP7PPSbits_t CCP7PPSbits __attribute__((address(0xE1B))); +# 32213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG1INPPS __attribute__((address(0xE1D))); + +__asm("COG1INPPS equ 0E1Dh"); + + +typedef union { + struct { + unsigned COG1INPPS :6; + }; +} COG1INPPSbits_t; +extern volatile COG1INPPSbits_t COG1INPPSbits __attribute__((address(0xE1D))); +# 32233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG2INPPS __attribute__((address(0xE1E))); + +__asm("COG2INPPS equ 0E1Eh"); + + +typedef union { + struct { + unsigned COG2INPPS :6; + }; +} COG2INPPSbits_t; +extern volatile COG2INPPSbits_t COG2INPPSbits __attribute__((address(0xE1E))); +# 32253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char COG3INPPS __attribute__((address(0xE1F))); + +__asm("COG3INPPS equ 0E1Fh"); + + +typedef union { + struct { + unsigned COG3INPPS :6; + }; +} COG3INPPSbits_t; +extern volatile COG3INPPSbits_t COG3INPPSbits __attribute__((address(0xE1F))); +# 32273 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CLPPS __attribute__((address(0xE21))); + +__asm("MD1CLPPS equ 0E21h"); + + +typedef union { + struct { + unsigned MD1CLPPS :6; + }; +} MD1CLPPSbits_t; +extern volatile MD1CLPPSbits_t MD1CLPPSbits __attribute__((address(0xE21))); +# 32293 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1CHPPS __attribute__((address(0xE22))); + +__asm("MD1CHPPS equ 0E22h"); + + +typedef union { + struct { + unsigned MD1CHPPS :6; + }; +} MD1CHPPSbits_t; +extern volatile MD1CHPPSbits_t MD1CHPPSbits __attribute__((address(0xE22))); +# 32313 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD1MODPPS __attribute__((address(0xE23))); + +__asm("MD1MODPPS equ 0E23h"); + + +typedef union { + struct { + unsigned MD1MODPPS :6; + }; +} MD1MODPPSbits_t; +extern volatile MD1MODPPSbits_t MD1MODPPSbits __attribute__((address(0xE23))); +# 32333 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CLPPS __attribute__((address(0xE24))); + +__asm("MD2CLPPS equ 0E24h"); + + +typedef union { + struct { + unsigned MD2CLPPS :6; + }; +} MD2CLPPSbits_t; +extern volatile MD2CLPPSbits_t MD2CLPPSbits __attribute__((address(0xE24))); +# 32353 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2CHPPS __attribute__((address(0xE25))); + +__asm("MD2CHPPS equ 0E25h"); + + +typedef union { + struct { + unsigned MD2CHPPS :6; + }; +} MD2CHPPSbits_t; +extern volatile MD2CHPPSbits_t MD2CHPPSbits __attribute__((address(0xE25))); +# 32373 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD2MODPPS __attribute__((address(0xE26))); + +__asm("MD2MODPPS equ 0E26h"); + + +typedef union { + struct { + unsigned MD2MODPPS :6; + }; +} MD2MODPPSbits_t; +extern volatile MD2MODPPSbits_t MD2MODPPSbits __attribute__((address(0xE26))); +# 32393 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CLPPS __attribute__((address(0xE27))); + +__asm("MD3CLPPS equ 0E27h"); + + +typedef union { + struct { + unsigned MD3CLPPS :6; + }; +} MD3CLPPSbits_t; +extern volatile MD3CLPPSbits_t MD3CLPPSbits __attribute__((address(0xE27))); +# 32413 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3CHPPS __attribute__((address(0xE28))); + +__asm("MD3CHPPS equ 0E28h"); + + +typedef union { + struct { + unsigned MD3CHPPS :6; + }; +} MD3CHPPSbits_t; +extern volatile MD3CHPPSbits_t MD3CHPPSbits __attribute__((address(0xE28))); +# 32433 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char MD3MODPPS __attribute__((address(0xE29))); + +__asm("MD3MODPPS equ 0E29h"); + + +typedef union { + struct { + unsigned MD3MODPPS :6; + }; +} MD3MODPPSbits_t; +extern volatile MD3MODPPSbits_t MD3MODPPSbits __attribute__((address(0xE29))); +# 32453 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1RPPS __attribute__((address(0xE2D))); + +__asm("PRG1RPPS equ 0E2Dh"); + + +typedef union { + struct { + unsigned PRG1RPPS :6; + }; +} PRG1RPPSbits_t; +extern volatile PRG1RPPSbits_t PRG1RPPSbits __attribute__((address(0xE2D))); +# 32473 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG1FPPS __attribute__((address(0xE2E))); + +__asm("PRG1FPPS equ 0E2Eh"); + + +typedef union { + struct { + unsigned PRG1FPPS :6; + }; +} PRG1FPPSbits_t; +extern volatile PRG1FPPSbits_t PRG1FPPSbits __attribute__((address(0xE2E))); +# 32493 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2RPPS __attribute__((address(0xE2F))); + +__asm("PRG2RPPS equ 0E2Fh"); + + +typedef union { + struct { + unsigned PRG2RPPS :6; + }; +} PRG2RPPSbits_t; +extern volatile PRG2RPPSbits_t PRG2RPPSbits __attribute__((address(0xE2F))); +# 32513 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG2FPPS __attribute__((address(0xE30))); + +__asm("PRG2FPPS equ 0E30h"); + + +typedef union { + struct { + unsigned PRG2FPPS :6; + }; +} PRG2FPPSbits_t; +extern volatile PRG2FPPSbits_t PRG2FPPSbits __attribute__((address(0xE30))); +# 32533 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3RPPS __attribute__((address(0xE31))); + +__asm("PRG3RPPS equ 0E31h"); + + +typedef union { + struct { + unsigned PRG3RPPS :6; + }; +} PRG3RPPSbits_t; +extern volatile PRG3RPPSbits_t PRG3RPPSbits __attribute__((address(0xE31))); +# 32553 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PRG3FPPS __attribute__((address(0xE32))); + +__asm("PRG3FPPS equ 0E32h"); + + +typedef union { + struct { + unsigned PRG3FPPS :6; + }; +} PRG3FPPSbits_t; +extern volatile PRG3FPPSbits_t PRG3FPPSbits __attribute__((address(0xE32))); +# 32573 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN0PPS __attribute__((address(0xE35))); + +__asm("CLCIN0PPS equ 0E35h"); + + +typedef union { + struct { + unsigned CLCIN0PPS :6; + }; +} CLCIN0PPSbits_t; +extern volatile CLCIN0PPSbits_t CLCIN0PPSbits __attribute__((address(0xE35))); +# 32593 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN1PPS __attribute__((address(0xE36))); + +__asm("CLCIN1PPS equ 0E36h"); + + +typedef union { + struct { + unsigned CLCIN1PPS :6; + }; +} CLCIN1PPSbits_t; +extern volatile CLCIN1PPSbits_t CLCIN1PPSbits __attribute__((address(0xE36))); +# 32613 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN2PPS __attribute__((address(0xE37))); + +__asm("CLCIN2PPS equ 0E37h"); + + +typedef union { + struct { + unsigned CLCIN2PPS :6; + }; +} CLCIN2PPSbits_t; +extern volatile CLCIN2PPSbits_t CLCIN2PPSbits __attribute__((address(0xE37))); +# 32633 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCIN3PPS __attribute__((address(0xE38))); + +__asm("CLCIN3PPS equ 0E38h"); + + +typedef union { + struct { + unsigned CLCIN3PPS :6; + }; +} CLCIN3PPSbits_t; +extern volatile CLCIN3PPSbits_t CLCIN3PPSbits __attribute__((address(0xE38))); +# 32653 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char ADCACTPPS __attribute__((address(0xE39))); + +__asm("ADCACTPPS equ 0E39h"); + + +typedef union { + struct { + unsigned ADCACTPPS :6; + }; +} ADCACTPPSbits_t; +extern volatile ADCACTPPSbits_t ADCACTPPSbits __attribute__((address(0xE39))); +# 32673 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPCLKPPS __attribute__((address(0xE3A))); + +__asm("SSPCLKPPS equ 0E3Ah"); + + +typedef union { + struct { + unsigned SSPCLKPPS :6; + }; +} SSPCLKPPSbits_t; +extern volatile SSPCLKPPSbits_t SSPCLKPPSbits __attribute__((address(0xE3A))); +# 32693 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPDATPPS __attribute__((address(0xE3B))); + +__asm("SSPDATPPS equ 0E3Bh"); + + +typedef union { + struct { + unsigned SSPDATPPS :6; + }; +} SSPDATPPSbits_t; +extern volatile SSPDATPPSbits_t SSPDATPPSbits __attribute__((address(0xE3B))); +# 32713 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char SSPSSPPS __attribute__((address(0xE3C))); + +__asm("SSPSSPPS equ 0E3Ch"); + + +typedef union { + struct { + unsigned SSPSSPPS :6; + }; +} SSPSSPPSbits_t; +extern volatile SSPSSPPSbits_t SSPSSPPSbits __attribute__((address(0xE3C))); +# 32733 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RXPPS __attribute__((address(0xE3D))); + +__asm("RXPPS equ 0E3Dh"); + + +typedef union { + struct { + unsigned RXPPS :6; + }; +} RXPPSbits_t; +extern volatile RXPPSbits_t RXPPSbits __attribute__((address(0xE3D))); +# 32753 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CKPPS __attribute__((address(0xE3E))); + +__asm("CKPPS equ 0E3Eh"); + + +typedef union { + struct { + unsigned CKPPS :6; + }; +} CKPPSbits_t; +extern volatile CKPPSbits_t CKPPSbits __attribute__((address(0xE3E))); +# 32773 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA0PPS __attribute__((address(0xE90))); + +__asm("RA0PPS equ 0E90h"); + + +typedef union { + struct { + unsigned RA0PPS :6; + }; +} RA0PPSbits_t; +extern volatile RA0PPSbits_t RA0PPSbits __attribute__((address(0xE90))); +# 32793 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA1PPS __attribute__((address(0xE91))); + +__asm("RA1PPS equ 0E91h"); + + +typedef union { + struct { + unsigned RA1PPS :6; + }; +} RA1PPSbits_t; +extern volatile RA1PPSbits_t RA1PPSbits __attribute__((address(0xE91))); +# 32813 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA2PPS __attribute__((address(0xE92))); + +__asm("RA2PPS equ 0E92h"); + + +typedef union { + struct { + unsigned RA2PPS :6; + }; +} RA2PPSbits_t; +extern volatile RA2PPSbits_t RA2PPSbits __attribute__((address(0xE92))); +# 32833 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA3PPS __attribute__((address(0xE93))); + +__asm("RA3PPS equ 0E93h"); + + +typedef union { + struct { + unsigned RA3PPS :6; + }; +} RA3PPSbits_t; +extern volatile RA3PPSbits_t RA3PPSbits __attribute__((address(0xE93))); +# 32853 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA4PPS __attribute__((address(0xE94))); + +__asm("RA4PPS equ 0E94h"); + + +typedef union { + struct { + unsigned RA4PPS :6; + }; +} RA4PPSbits_t; +extern volatile RA4PPSbits_t RA4PPSbits __attribute__((address(0xE94))); +# 32873 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA5PPS __attribute__((address(0xE95))); + +__asm("RA5PPS equ 0E95h"); + + +typedef union { + struct { + unsigned RA5PPS :6; + }; +} RA5PPSbits_t; +extern volatile RA5PPSbits_t RA5PPSbits __attribute__((address(0xE95))); +# 32893 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA6PPS __attribute__((address(0xE96))); + +__asm("RA6PPS equ 0E96h"); + + +typedef union { + struct { + unsigned RA6PPS :6; + }; +} RA6PPSbits_t; +extern volatile RA6PPSbits_t RA6PPSbits __attribute__((address(0xE96))); +# 32913 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RA7PPS __attribute__((address(0xE97))); + +__asm("RA7PPS equ 0E97h"); + + +typedef union { + struct { + unsigned RA7PPS :6; + }; +} RA7PPSbits_t; +extern volatile RA7PPSbits_t RA7PPSbits __attribute__((address(0xE97))); +# 32933 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB0PPS __attribute__((address(0xE98))); + +__asm("RB0PPS equ 0E98h"); + + +typedef union { + struct { + unsigned RB0PPS :6; + }; +} RB0PPSbits_t; +extern volatile RB0PPSbits_t RB0PPSbits __attribute__((address(0xE98))); +# 32953 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB1PPS __attribute__((address(0xE99))); + +__asm("RB1PPS equ 0E99h"); + + +typedef union { + struct { + unsigned RB1PPS :6; + }; +} RB1PPSbits_t; +extern volatile RB1PPSbits_t RB1PPSbits __attribute__((address(0xE99))); +# 32973 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB2PPS __attribute__((address(0xE9A))); + +__asm("RB2PPS equ 0E9Ah"); + + +typedef union { + struct { + unsigned RB2PPS :6; + }; +} RB2PPSbits_t; +extern volatile RB2PPSbits_t RB2PPSbits __attribute__((address(0xE9A))); +# 32993 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB3PPS __attribute__((address(0xE9B))); + +__asm("RB3PPS equ 0E9Bh"); + + +typedef union { + struct { + unsigned RB3PPS :6; + }; +} RB3PPSbits_t; +extern volatile RB3PPSbits_t RB3PPSbits __attribute__((address(0xE9B))); +# 33013 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB4PPS __attribute__((address(0xE9C))); + +__asm("RB4PPS equ 0E9Ch"); + + +typedef union { + struct { + unsigned RB4PPS :6; + }; +} RB4PPSbits_t; +extern volatile RB4PPSbits_t RB4PPSbits __attribute__((address(0xE9C))); +# 33033 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB5PPS __attribute__((address(0xE9D))); + +__asm("RB5PPS equ 0E9Dh"); + + +typedef union { + struct { + unsigned RB5PPS :6; + }; +} RB5PPSbits_t; +extern volatile RB5PPSbits_t RB5PPSbits __attribute__((address(0xE9D))); +# 33053 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB6PPS __attribute__((address(0xE9E))); + +__asm("RB6PPS equ 0E9Eh"); + + +typedef union { + struct { + unsigned RB6PPS :6; + }; +} RB6PPSbits_t; +extern volatile RB6PPSbits_t RB6PPSbits __attribute__((address(0xE9E))); +# 33073 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RB7PPS __attribute__((address(0xE9F))); + +__asm("RB7PPS equ 0E9Fh"); + + +typedef union { + struct { + unsigned RB7PPS :6; + }; +} RB7PPSbits_t; +extern volatile RB7PPSbits_t RB7PPSbits __attribute__((address(0xE9F))); +# 33093 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC0PPS __attribute__((address(0xEA0))); + +__asm("RC0PPS equ 0EA0h"); + + +typedef union { + struct { + unsigned RC0PPS :6; + }; +} RC0PPSbits_t; +extern volatile RC0PPSbits_t RC0PPSbits __attribute__((address(0xEA0))); +# 33113 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC1PPS __attribute__((address(0xEA1))); + +__asm("RC1PPS equ 0EA1h"); + + +typedef union { + struct { + unsigned RC1PPS :6; + }; +} RC1PPSbits_t; +extern volatile RC1PPSbits_t RC1PPSbits __attribute__((address(0xEA1))); +# 33133 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC2PPS __attribute__((address(0xEA2))); + +__asm("RC2PPS equ 0EA2h"); + + +typedef union { + struct { + unsigned RC2PPS :6; + }; +} RC2PPSbits_t; +extern volatile RC2PPSbits_t RC2PPSbits __attribute__((address(0xEA2))); +# 33153 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC3PPS __attribute__((address(0xEA3))); + +__asm("RC3PPS equ 0EA3h"); + + +typedef union { + struct { + unsigned RC3PPS :6; + }; +} RC3PPSbits_t; +extern volatile RC3PPSbits_t RC3PPSbits __attribute__((address(0xEA3))); +# 33173 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC4PPS __attribute__((address(0xEA4))); + +__asm("RC4PPS equ 0EA4h"); + + +typedef union { + struct { + unsigned RC4PPS :6; + }; +} RC4PPSbits_t; +extern volatile RC4PPSbits_t RC4PPSbits __attribute__((address(0xEA4))); +# 33193 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC5PPS __attribute__((address(0xEA5))); + +__asm("RC5PPS equ 0EA5h"); + + +typedef union { + struct { + unsigned RC5PPS :6; + }; +} RC5PPSbits_t; +extern volatile RC5PPSbits_t RC5PPSbits __attribute__((address(0xEA5))); +# 33213 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC6PPS __attribute__((address(0xEA6))); + +__asm("RC6PPS equ 0EA6h"); + + +typedef union { + struct { + unsigned RC6PPS :6; + }; +} RC6PPSbits_t; +extern volatile RC6PPSbits_t RC6PPSbits __attribute__((address(0xEA6))); +# 33233 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char RC7PPS __attribute__((address(0xEA7))); + +__asm("RC7PPS equ 0EA7h"); + + +typedef union { + struct { + unsigned RC7PPS :6; + }; +} RC7PPSbits_t; +extern volatile RC7PPSbits_t RC7PPSbits __attribute__((address(0xEA7))); +# 33253 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLCDATA __attribute__((address(0xF0F))); + +__asm("CLCDATA equ 0F0Fh"); + + +typedef union { + struct { + unsigned MCLC1OUT :1; + unsigned MCLC2OUT :1; + unsigned MCLC3OUT :1; + unsigned MLC4OUT :1; + }; +} CLCDATAbits_t; +extern volatile CLCDATAbits_t CLCDATAbits __attribute__((address(0xF0F))); +# 33291 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1CON __attribute__((address(0xF10))); + +__asm("CLC1CON equ 0F10h"); + + +typedef union { + struct { + unsigned LC1MODE :3; + unsigned LC1INTN :1; + unsigned LC1INTP :1; + unsigned LC1OUT :1; + unsigned :1; + unsigned LC1EN :1; + }; + struct { + unsigned LC1MODE0 :1; + unsigned LC1MODE1 :1; + unsigned LC1MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC1CONbits_t; +extern volatile CLC1CONbits_t CLC1CONbits __attribute__((address(0xF10))); +# 33409 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1POL __attribute__((address(0xF11))); + +__asm("CLC1POL equ 0F11h"); + + +typedef union { + struct { + unsigned LC1G1POL :1; + unsigned LC1G2POL :1; + unsigned LC1G3POL :1; + unsigned LC1G4POL :1; + unsigned :3; + unsigned LC1POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC1POLbits_t; +extern volatile CLC1POLbits_t CLC1POLbits __attribute__((address(0xF11))); +# 33487 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL0 __attribute__((address(0xF12))); + +__asm("CLC1SEL0 equ 0F12h"); + + +typedef union { + struct { + unsigned LC1D1S0 :1; + unsigned LC1D1S1 :1; + unsigned LC1D1S2 :1; + unsigned LC1D1S3 :1; + unsigned LC1D1S4 :1; + unsigned LC1D1S5 :1; + }; + struct { + unsigned LC1D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC1SEL0bits_t; +extern volatile CLC1SEL0bits_t CLC1SEL0bits __attribute__((address(0xF12))); +# 33591 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL1 __attribute__((address(0xF13))); + +__asm("CLC1SEL1 equ 0F13h"); + + +typedef union { + struct { + unsigned LC1D2S0 :1; + unsigned LC1D2S1 :1; + unsigned LC1D2S2 :1; + unsigned LC1D2S3 :1; + unsigned LC1D2S4 :1; + unsigned LC1D2S5 :1; + }; + struct { + unsigned LC1D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC1SEL1bits_t; +extern volatile CLC1SEL1bits_t CLC1SEL1bits __attribute__((address(0xF13))); +# 33695 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL2 __attribute__((address(0xF14))); + +__asm("CLC1SEL2 equ 0F14h"); + + +typedef union { + struct { + unsigned LC1D3S0 :1; + unsigned LC1D3S1 :1; + unsigned LC1D3S2 :1; + unsigned LC1D3S3 :1; + unsigned LC1D3S4 :1; + unsigned LC1D3S5 :1; + }; + struct { + unsigned LC1D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC1SEL2bits_t; +extern volatile CLC1SEL2bits_t CLC1SEL2bits __attribute__((address(0xF14))); +# 33799 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1SEL3 __attribute__((address(0xF15))); + +__asm("CLC1SEL3 equ 0F15h"); + + +typedef union { + struct { + unsigned LC1D4S0 :1; + unsigned LC1D4S1 :1; + unsigned LC1D4S2 :1; + unsigned LC1D4S3 :1; + unsigned LC1D4S4 :1; + unsigned LC1D4S5 :1; + }; + struct { + unsigned LC1D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC1SEL3bits_t; +extern volatile CLC1SEL3bits_t CLC1SEL3bits __attribute__((address(0xF15))); +# 33903 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS0 __attribute__((address(0xF16))); + +__asm("CLC1GLS0 equ 0F16h"); + + +typedef union { + struct { + unsigned LC1G1D1N :1; + unsigned LC1G1D1T :1; + unsigned LC1G1D2N :1; + unsigned LC1G1D2T :1; + unsigned LC1G1D3N :1; + unsigned LC1G1D3T :1; + unsigned LC1G1D4N :1; + unsigned LC1G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS0bits_t; +extern volatile CLC1GLS0bits_t CLC1GLS0bits __attribute__((address(0xF16))); +# 34015 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS1 __attribute__((address(0xF17))); + +__asm("CLC1GLS1 equ 0F17h"); + + +typedef union { + struct { + unsigned LC1G2D1N :1; + unsigned LC1G2D1T :1; + unsigned LC1G2D2N :1; + unsigned LC1G2D2T :1; + unsigned LC1G2D3N :1; + unsigned LC1G2D3T :1; + unsigned LC1G2D4N :1; + unsigned LC1G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS1bits_t; +extern volatile CLC1GLS1bits_t CLC1GLS1bits __attribute__((address(0xF17))); +# 34127 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS2 __attribute__((address(0xF18))); + +__asm("CLC1GLS2 equ 0F18h"); + + +typedef union { + struct { + unsigned LC1G3D1N :1; + unsigned LC1G3D1T :1; + unsigned LC1G3D2N :1; + unsigned LC1G3D2T :1; + unsigned LC1G3D3N :1; + unsigned LC1G3D3T :1; + unsigned LC1G3D4N :1; + unsigned LC1G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC1GLS2bits_t; +extern volatile CLC1GLS2bits_t CLC1GLS2bits __attribute__((address(0xF18))); +# 34239 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC1GLS3 __attribute__((address(0xF19))); + +__asm("CLC1GLS3 equ 0F19h"); + + +typedef union { + struct { + unsigned LC1G4D1N :1; + unsigned LC1G4D1T :1; + unsigned LC1G4D2N :1; + unsigned LC1G4D2T :1; + unsigned LC1G4D3N :1; + unsigned LC1G4D3T :1; + unsigned LC1G4D4N :1; + unsigned LC1G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC1GLS3bits_t; +extern volatile CLC1GLS3bits_t CLC1GLS3bits __attribute__((address(0xF19))); +# 34351 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2CON __attribute__((address(0xF1A))); + +__asm("CLC2CON equ 0F1Ah"); + + +typedef union { + struct { + unsigned LC2MODE :3; + unsigned LC2INTN :1; + unsigned LC2INTP :1; + unsigned LC2OUT :1; + unsigned :1; + unsigned LC2EN :1; + }; + struct { + unsigned LC2MODE0 :1; + unsigned LC2MODE1 :1; + unsigned LC2MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC2CONbits_t; +extern volatile CLC2CONbits_t CLC2CONbits __attribute__((address(0xF1A))); +# 34469 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2POL __attribute__((address(0xF1B))); + +__asm("CLC2POL equ 0F1Bh"); + + +typedef union { + struct { + unsigned LC2G1POL :1; + unsigned LC2G2POL :1; + unsigned LC2G3POL :1; + unsigned LC2G4POL :1; + unsigned :3; + unsigned LC2POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC2POLbits_t; +extern volatile CLC2POLbits_t CLC2POLbits __attribute__((address(0xF1B))); +# 34547 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL0 __attribute__((address(0xF1C))); + +__asm("CLC2SEL0 equ 0F1Ch"); + + +typedef union { + struct { + unsigned LC2D1S0 :1; + unsigned LC2D1S1 :1; + unsigned LC2D1S2 :1; + unsigned LC2D1S3 :1; + unsigned LC2D1S4 :1; + unsigned LC2D1S5 :1; + }; + struct { + unsigned LC2D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC2SEL0bits_t; +extern volatile CLC2SEL0bits_t CLC2SEL0bits __attribute__((address(0xF1C))); +# 34651 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL1 __attribute__((address(0xF1D))); + +__asm("CLC2SEL1 equ 0F1Dh"); + + +typedef union { + struct { + unsigned LC2D2S0 :1; + unsigned LC2D2S1 :1; + unsigned LC2D2S2 :1; + unsigned LC2D2S3 :1; + unsigned LC2D2S4 :1; + unsigned LC2D2S5 :1; + }; + struct { + unsigned LC2D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC2SEL1bits_t; +extern volatile CLC2SEL1bits_t CLC2SEL1bits __attribute__((address(0xF1D))); +# 34755 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL2 __attribute__((address(0xF1E))); + +__asm("CLC2SEL2 equ 0F1Eh"); + + +typedef union { + struct { + unsigned LC2D3S0 :1; + unsigned LC2D3S1 :1; + unsigned LC2D3S2 :1; + unsigned LC2D3S3 :1; + unsigned LC2D3S4 :1; + unsigned LC2D3S5 :1; + }; + struct { + unsigned LC2D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC2SEL2bits_t; +extern volatile CLC2SEL2bits_t CLC2SEL2bits __attribute__((address(0xF1E))); +# 34859 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2SEL3 __attribute__((address(0xF1F))); + +__asm("CLC2SEL3 equ 0F1Fh"); + + +typedef union { + struct { + unsigned LC2D4S0 :1; + unsigned LC2D4S1 :1; + unsigned LC2D4S2 :1; + unsigned LC2D4S3 :1; + unsigned LC2D4S4 :1; + unsigned LC2D4S5 :1; + }; + struct { + unsigned LC2D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC2SEL3bits_t; +extern volatile CLC2SEL3bits_t CLC2SEL3bits __attribute__((address(0xF1F))); +# 34963 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS0 __attribute__((address(0xF20))); + +__asm("CLC2GLS0 equ 0F20h"); + + +typedef union { + struct { + unsigned LC2G1D1N :1; + unsigned LC2G1D1T :1; + unsigned LC2G1D2N :1; + unsigned LC2G1D2T :1; + unsigned LC2G1D3N :1; + unsigned LC2G1D3T :1; + unsigned LC2G1D4N :1; + unsigned LC2G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS0bits_t; +extern volatile CLC2GLS0bits_t CLC2GLS0bits __attribute__((address(0xF20))); +# 35075 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS1 __attribute__((address(0xF21))); + +__asm("CLC2GLS1 equ 0F21h"); + + +typedef union { + struct { + unsigned LC2G2D1N :1; + unsigned LC2G2D1T :1; + unsigned LC2G2D2N :1; + unsigned LC2G2D2T :1; + unsigned LC2G2D3N :1; + unsigned LC2G2D3T :1; + unsigned LC2G2D4N :1; + unsigned LC2G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS1bits_t; +extern volatile CLC2GLS1bits_t CLC2GLS1bits __attribute__((address(0xF21))); +# 35187 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS2 __attribute__((address(0xF22))); + +__asm("CLC2GLS2 equ 0F22h"); + + +typedef union { + struct { + unsigned LC2G3D1N :1; + unsigned LC2G3D1T :1; + unsigned LC2G3D2N :1; + unsigned LC2G3D2T :1; + unsigned LC2G3D3N :1; + unsigned LC2G3D3T :1; + unsigned LC2G3D4N :1; + unsigned LC2G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC2GLS2bits_t; +extern volatile CLC2GLS2bits_t CLC2GLS2bits __attribute__((address(0xF22))); +# 35299 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC2GLS3 __attribute__((address(0xF23))); + +__asm("CLC2GLS3 equ 0F23h"); + + +typedef union { + struct { + unsigned LC2G4D1N :1; + unsigned LC2G4D1T :1; + unsigned LC2G4D2N :1; + unsigned LC2G4D2T :1; + unsigned LC2G4D3N :1; + unsigned LC2G4D3T :1; + unsigned LC2G4D4N :1; + unsigned LC2G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC2GLS3bits_t; +extern volatile CLC2GLS3bits_t CLC2GLS3bits __attribute__((address(0xF23))); +# 35411 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3CON __attribute__((address(0xF24))); + +__asm("CLC3CON equ 0F24h"); + + +typedef union { + struct { + unsigned LC3MODE :3; + unsigned LC3INTN :1; + unsigned LC3INTP :1; + unsigned LC3OUT :1; + unsigned :1; + unsigned LC3EN :1; + }; + struct { + unsigned LC3MODE0 :1; + unsigned LC3MODE1 :1; + unsigned LC3MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC3CONbits_t; +extern volatile CLC3CONbits_t CLC3CONbits __attribute__((address(0xF24))); +# 35529 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3POL __attribute__((address(0xF25))); + +__asm("CLC3POL equ 0F25h"); + + +typedef union { + struct { + unsigned LC3G1POL :1; + unsigned LC3G2POL :1; + unsigned LC3G3POL :1; + unsigned LC3G4POL :1; + unsigned :3; + unsigned LC3POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC3POLbits_t; +extern volatile CLC3POLbits_t CLC3POLbits __attribute__((address(0xF25))); +# 35607 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL0 __attribute__((address(0xF26))); + +__asm("CLC3SEL0 equ 0F26h"); + + +typedef union { + struct { + unsigned LC3D1S0 :1; + unsigned LC3D1S1 :1; + unsigned LC3D1S2 :1; + unsigned LC3D1S3 :1; + unsigned LC3D1S4 :1; + unsigned LC3D1S5 :1; + }; + struct { + unsigned LC3D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC3SEL0bits_t; +extern volatile CLC3SEL0bits_t CLC3SEL0bits __attribute__((address(0xF26))); +# 35711 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL1 __attribute__((address(0xF27))); + +__asm("CLC3SEL1 equ 0F27h"); + + +typedef union { + struct { + unsigned LC3D2S0 :1; + unsigned LC3D2S1 :1; + unsigned LC3D2S2 :1; + unsigned LC3D2S3 :1; + unsigned LC3D2S4 :1; + unsigned LC3D2S5 :1; + }; + struct { + unsigned LC3D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC3SEL1bits_t; +extern volatile CLC3SEL1bits_t CLC3SEL1bits __attribute__((address(0xF27))); +# 35815 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL2 __attribute__((address(0xF28))); + +__asm("CLC3SEL2 equ 0F28h"); + + +typedef union { + struct { + unsigned LC3D3S0 :1; + unsigned LC3D3S1 :1; + unsigned LC3D3S2 :1; + unsigned LC3D3S3 :1; + unsigned LC3D3S4 :1; + unsigned LC3D3S5 :1; + }; + struct { + unsigned LC3D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC3SEL2bits_t; +extern volatile CLC3SEL2bits_t CLC3SEL2bits __attribute__((address(0xF28))); +# 35919 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3SEL3 __attribute__((address(0xF29))); + +__asm("CLC3SEL3 equ 0F29h"); + + +typedef union { + struct { + unsigned LC3D4S0 :1; + unsigned LC3D4S1 :1; + unsigned LC3D4S2 :1; + unsigned LC3D4S3 :1; + unsigned LC3D4S4 :1; + unsigned LC3D4S5 :1; + }; + struct { + unsigned LC3D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC3SEL3bits_t; +extern volatile CLC3SEL3bits_t CLC3SEL3bits __attribute__((address(0xF29))); +# 36023 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS0 __attribute__((address(0xF2A))); + +__asm("CLC3GLS0 equ 0F2Ah"); + + +typedef union { + struct { + unsigned LC3G1D1N :1; + unsigned LC3G1D1T :1; + unsigned LC3G1D2N :1; + unsigned LC3G1D2T :1; + unsigned LC3G1D3N :1; + unsigned LC3G1D3T :1; + unsigned LC3G1D4N :1; + unsigned LC3G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS0bits_t; +extern volatile CLC3GLS0bits_t CLC3GLS0bits __attribute__((address(0xF2A))); +# 36135 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS1 __attribute__((address(0xF2B))); + +__asm("CLC3GLS1 equ 0F2Bh"); + + +typedef union { + struct { + unsigned LC3G2D1N :1; + unsigned LC3G2D1T :1; + unsigned LC3G2D2N :1; + unsigned LC3G2D2T :1; + unsigned LC3G2D3N :1; + unsigned LC3G2D3T :1; + unsigned LC3G2D4N :1; + unsigned LC3G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS1bits_t; +extern volatile CLC3GLS1bits_t CLC3GLS1bits __attribute__((address(0xF2B))); +# 36247 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS2 __attribute__((address(0xF2C))); + +__asm("CLC3GLS2 equ 0F2Ch"); + + +typedef union { + struct { + unsigned LC3G3D1N :1; + unsigned LC3G3D1T :1; + unsigned LC3G3D2N :1; + unsigned LC3G3D2T :1; + unsigned LC3G3D3N :1; + unsigned LC3G3D3T :1; + unsigned LC3G3D4N :1; + unsigned LC3G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC3GLS2bits_t; +extern volatile CLC3GLS2bits_t CLC3GLS2bits __attribute__((address(0xF2C))); +# 36359 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC3GLS3 __attribute__((address(0xF2D))); + +__asm("CLC3GLS3 equ 0F2Dh"); + + +typedef union { + struct { + unsigned LC3G4D1N :1; + unsigned LC3G4D1T :1; + unsigned LC3G4D2N :1; + unsigned LC3G4D2T :1; + unsigned LC3G4D3N :1; + unsigned LC3G4D3T :1; + unsigned LC3G4D4N :1; + unsigned LC3G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC3GLS3bits_t; +extern volatile CLC3GLS3bits_t CLC3GLS3bits __attribute__((address(0xF2D))); +# 36471 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4CON __attribute__((address(0xF2E))); + +__asm("CLC4CON equ 0F2Eh"); + + +typedef union { + struct { + unsigned LC4MODE :3; + unsigned LC4INTN :1; + unsigned LC4INTP :1; + unsigned LC4OUT :1; + unsigned :1; + unsigned LC4EN :1; + }; + struct { + unsigned LC4MODE0 :1; + unsigned LC4MODE1 :1; + unsigned LC4MODE2 :1; + }; + struct { + unsigned MODE :3; + unsigned INTN :1; + unsigned INTP :1; + unsigned OUT :1; + unsigned :1; + unsigned EN :1; + }; + struct { + unsigned MODE0 :1; + unsigned MODE1 :1; + unsigned MODE2 :1; + }; +} CLC4CONbits_t; +extern volatile CLC4CONbits_t CLC4CONbits __attribute__((address(0xF2E))); +# 36589 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4POL __attribute__((address(0xF2F))); + +__asm("CLC4POL equ 0F2Fh"); + + +typedef union { + struct { + unsigned LC4G1POL :1; + unsigned LC4G2POL :1; + unsigned LC4G3POL :1; + unsigned LC4G4POL :1; + unsigned :3; + unsigned LC4POL :1; + }; + struct { + unsigned G1POL :1; + unsigned G2POL :1; + unsigned G3POL :1; + unsigned G4POL :1; + unsigned :3; + unsigned POL :1; + }; +} CLC4POLbits_t; +extern volatile CLC4POLbits_t CLC4POLbits __attribute__((address(0xF2F))); +# 36667 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL0 __attribute__((address(0xF30))); + +__asm("CLC4SEL0 equ 0F30h"); + + +typedef union { + struct { + unsigned LC4D1S0 :1; + unsigned LC4D1S1 :1; + unsigned LC4D1S2 :1; + unsigned LC4D1S3 :1; + unsigned LC4D1S4 :1; + unsigned LC4D1S5 :1; + }; + struct { + unsigned LC4D1S :8; + }; + struct { + unsigned D1S :8; + }; + struct { + unsigned D1S0 :1; + unsigned D1S1 :1; + unsigned D1S2 :1; + unsigned D1S3 :1; + unsigned D1S4 :1; + unsigned D1S5 :1; + }; +} CLC4SEL0bits_t; +extern volatile CLC4SEL0bits_t CLC4SEL0bits __attribute__((address(0xF30))); +# 36771 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL1 __attribute__((address(0xF31))); + +__asm("CLC4SEL1 equ 0F31h"); + + +typedef union { + struct { + unsigned LC4D2S0 :1; + unsigned LC4D2S1 :1; + unsigned LC4D2S2 :1; + unsigned LC4D2S3 :1; + unsigned LC4D2S4 :1; + unsigned LC4D2S5 :1; + }; + struct { + unsigned LC4D2S :8; + }; + struct { + unsigned D2S :8; + }; + struct { + unsigned D2S0 :1; + unsigned D2S1 :1; + unsigned D2S2 :1; + unsigned D2S3 :1; + unsigned D2S4 :1; + unsigned D2S5 :1; + }; +} CLC4SEL1bits_t; +extern volatile CLC4SEL1bits_t CLC4SEL1bits __attribute__((address(0xF31))); +# 36875 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL2 __attribute__((address(0xF32))); + +__asm("CLC4SEL2 equ 0F32h"); + + +typedef union { + struct { + unsigned LC4D3S0 :1; + unsigned LC4D3S1 :1; + unsigned LC4D3S2 :1; + unsigned LC4D3S3 :1; + unsigned LC4D3S4 :1; + unsigned LC4D3S5 :1; + }; + struct { + unsigned LC4D3S :8; + }; + struct { + unsigned D3S :8; + }; + struct { + unsigned D3S0 :1; + unsigned D3S1 :1; + unsigned D3S2 :1; + unsigned D3S3 :1; + unsigned D3S4 :1; + unsigned D3S5 :1; + }; +} CLC4SEL2bits_t; +extern volatile CLC4SEL2bits_t CLC4SEL2bits __attribute__((address(0xF32))); +# 36979 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4SEL3 __attribute__((address(0xF33))); + +__asm("CLC4SEL3 equ 0F33h"); + + +typedef union { + struct { + unsigned LC4D4S0 :1; + unsigned LC4D4S1 :1; + unsigned LC4D4S2 :1; + unsigned LC4D4S3 :1; + unsigned LC4D4S4 :1; + unsigned LC4D4S5 :1; + }; + struct { + unsigned LC4D4S :8; + }; + struct { + unsigned D4S :8; + }; + struct { + unsigned D4S0 :1; + unsigned D4S1 :1; + unsigned D4S2 :1; + unsigned D4S3 :1; + unsigned D4S4 :1; + unsigned D4S5 :1; + }; +} CLC4SEL3bits_t; +extern volatile CLC4SEL3bits_t CLC4SEL3bits __attribute__((address(0xF33))); +# 37083 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS0 __attribute__((address(0xF34))); + +__asm("CLC4GLS0 equ 0F34h"); + + +typedef union { + struct { + unsigned LC4G1D1N :1; + unsigned LC4G1D1T :1; + unsigned LC4G1D2N :1; + unsigned LC4G1D2T :1; + unsigned LC4G1D3N :1; + unsigned LC4G1D3T :1; + unsigned LC4G1D4N :1; + unsigned LC4G1D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS0bits_t; +extern volatile CLC4GLS0bits_t CLC4GLS0bits __attribute__((address(0xF34))); +# 37195 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS1 __attribute__((address(0xF35))); + +__asm("CLC4GLS1 equ 0F35h"); + + +typedef union { + struct { + unsigned LC4G2D1N :1; + unsigned LC4G2D1T :1; + unsigned LC4G2D2N :1; + unsigned LC4G2D2T :1; + unsigned LC4G2D3N :1; + unsigned LC4G2D3T :1; + unsigned LC4G2D4N :1; + unsigned LC4G2D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS1bits_t; +extern volatile CLC4GLS1bits_t CLC4GLS1bits __attribute__((address(0xF35))); +# 37307 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS2 __attribute__((address(0xF36))); + +__asm("CLC4GLS2 equ 0F36h"); + + +typedef union { + struct { + unsigned LC4G3D1N :1; + unsigned LC4G3D1T :1; + unsigned LC4G3D2N :1; + unsigned LC4G3D2T :1; + unsigned LC4G3D3N :1; + unsigned LC4G3D3T :1; + unsigned LC4G3D4N :1; + unsigned LC4G3D4T :1; + }; + struct { + unsigned D1N :1; + unsigned D1T :1; + unsigned D2N :1; + unsigned D2T :1; + unsigned D3N :1; + unsigned D3T :1; + unsigned D4N :1; + unsigned D4T :1; + }; +} CLC4GLS2bits_t; +extern volatile CLC4GLS2bits_t CLC4GLS2bits __attribute__((address(0xF36))); +# 37419 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char CLC4GLS3 __attribute__((address(0xF37))); + +__asm("CLC4GLS3 equ 0F37h"); + + +typedef union { + struct { + unsigned LC4G4D1N :1; + unsigned LC4G4D1T :1; + unsigned LC4G4D2N :1; + unsigned LC4G4D2T :1; + unsigned LC4G4D3N :1; + unsigned LC4G4D3T :1; + unsigned LC4G4D4N :1; + unsigned LC4G4D4T :1; + }; + struct { + unsigned G4D1N :1; + unsigned G4D1T :1; + unsigned G4D2N :1; + unsigned G4D2T :1; + unsigned G4D3N :1; + unsigned G4D3T :1; + unsigned G4D4N :1; + unsigned G4D4T :1; + }; +} CLC4GLS3bits_t; +extern volatile CLC4GLS3bits_t CLC4GLS3bits __attribute__((address(0xF37))); +# 37531 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STATUS_SHAD __attribute__((address(0xFE4))); + +__asm("STATUS_SHAD equ 0FE4h"); + + +typedef union { + struct { + unsigned C_SHAD :1; + unsigned DC_SHAD :1; + unsigned Z_SHAD :1; + }; +} STATUS_SHADbits_t; +extern volatile STATUS_SHADbits_t STATUS_SHADbits __attribute__((address(0xFE4))); +# 37563 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char WREG_SHAD __attribute__((address(0xFE5))); + +__asm("WREG_SHAD equ 0FE5h"); + + +typedef union { + struct { + unsigned WREG_SHAD :8; + }; +} WREG_SHADbits_t; +extern volatile WREG_SHADbits_t WREG_SHADbits __attribute__((address(0xFE5))); +# 37583 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char BSR_SHAD __attribute__((address(0xFE6))); + +__asm("BSR_SHAD equ 0FE6h"); + + +typedef union { + struct { + unsigned BSR_SHAD :5; + }; +} BSR_SHADbits_t; +extern volatile BSR_SHADbits_t BSR_SHADbits __attribute__((address(0xFE6))); +# 37603 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char PCLATH_SHAD __attribute__((address(0xFE7))); + +__asm("PCLATH_SHAD equ 0FE7h"); + + +typedef union { + struct { + unsigned PCLATH_SHAD :7; + }; +} PCLATH_SHADbits_t; +extern volatile PCLATH_SHADbits_t PCLATH_SHADbits __attribute__((address(0xFE7))); +# 37623 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0L_SHAD __attribute__((address(0xFE8))); + +__asm("FSR0L_SHAD equ 0FE8h"); + + +typedef union { + struct { + unsigned FSR0L_SHAD :8; + }; +} FSR0L_SHADbits_t; +extern volatile FSR0L_SHADbits_t FSR0L_SHADbits __attribute__((address(0xFE8))); +# 37643 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR0H_SHAD __attribute__((address(0xFE9))); + +__asm("FSR0H_SHAD equ 0FE9h"); + + +typedef union { + struct { + unsigned FSR0H_SHAD :8; + }; +} FSR0H_SHADbits_t; +extern volatile FSR0H_SHADbits_t FSR0H_SHADbits __attribute__((address(0xFE9))); +# 37663 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1L_SHAD __attribute__((address(0xFEA))); + +__asm("FSR1L_SHAD equ 0FEAh"); + + +typedef union { + struct { + unsigned FSR1L_SHAD :8; + }; +} FSR1L_SHADbits_t; +extern volatile FSR1L_SHADbits_t FSR1L_SHADbits __attribute__((address(0xFEA))); +# 37683 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char FSR1H_SHAD __attribute__((address(0xFEB))); + +__asm("FSR1H_SHAD equ 0FEBh"); + + +typedef union { + struct { + unsigned FSR1H_SHAD :8; + }; +} FSR1H_SHADbits_t; +extern volatile FSR1H_SHADbits_t FSR1H_SHADbits __attribute__((address(0xFEB))); +# 37703 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char STKPTR __attribute__((address(0xFED))); + +__asm("STKPTR equ 0FEDh"); + + +typedef union { + struct { + unsigned STKPTR :5; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFED))); +# 37723 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSL __attribute__((address(0xFEE))); + +__asm("TOSL equ 0FEEh"); + + +typedef union { + struct { + unsigned TOSL :8; + }; +} TOSLbits_t; +extern volatile TOSLbits_t TOSLbits __attribute__((address(0xFEE))); +# 37743 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile unsigned char TOSH __attribute__((address(0xFEF))); + +__asm("TOSH equ 0FEFh"); + + +typedef union { + struct { + unsigned TOSH :7; + }; +} TOSHbits_t; +extern volatile TOSHbits_t TOSHbits __attribute__((address(0xFEF))); +# 37769 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h" 3 +extern volatile __bit ABDEN __attribute__((address(0xCF8))); + + +extern volatile __bit ABDOVF __attribute__((address(0xCFF))); + + +extern volatile __bit ACKDT __attribute__((address(0x10B5))); + + +extern volatile __bit ACKEN __attribute__((address(0x10B4))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x10B6))); + + +extern volatile __bit ACKTIM __attribute__((address(0x10BF))); + + +extern volatile __bit ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit ADDEN __attribute__((address(0xCEB))); + + +extern volatile __bit ADFM __attribute__((address(0x248F))); + + +extern volatile __bit ADIE __attribute__((address(0x48E))); + + +extern volatile __bit ADIF __attribute__((address(0x8E))); + + +extern volatile __bit ADNREF __attribute__((address(0x248A))); + + +extern volatile __bit ADON __attribute__((address(0x2480))); + + +extern volatile __bit AHEN __attribute__((address(0x10B9))); + + +extern volatile __bit ANSA0 __attribute__((address(0xC60))); + + +extern volatile __bit ANSA1 __attribute__((address(0xC61))); + + +extern volatile __bit ANSA2 __attribute__((address(0xC62))); + + +extern volatile __bit ANSA3 __attribute__((address(0xC63))); + + +extern volatile __bit ANSA4 __attribute__((address(0xC64))); + + +extern volatile __bit ANSA5 __attribute__((address(0xC65))); + + +extern volatile __bit ANSB0 __attribute__((address(0xC68))); + + +extern volatile __bit ANSB1 __attribute__((address(0xC69))); + + +extern volatile __bit ANSB2 __attribute__((address(0xC6A))); + + +extern volatile __bit ANSB3 __attribute__((address(0xC6B))); + + +extern volatile __bit ANSB4 __attribute__((address(0xC6C))); + + +extern volatile __bit ANSB5 __attribute__((address(0xC6D))); + + +extern volatile __bit ANSC2 __attribute__((address(0xC72))); + + +extern volatile __bit ANSC3 __attribute__((address(0xC73))); + + +extern volatile __bit ANSC4 __attribute__((address(0xC74))); + + +extern volatile __bit ANSC5 __attribute__((address(0xC75))); + + +extern volatile __bit ANSC6 __attribute__((address(0xC76))); + + +extern volatile __bit ANSC7 __attribute__((address(0xC77))); + + +extern volatile __bit BCL1IE __attribute__((address(0x493))); + + +extern volatile __bit BCL1IF __attribute__((address(0x93))); + + +extern volatile __bit BF __attribute__((address(0x10A0))); + + +extern volatile __bit BOEN __attribute__((address(0x10BC))); + + +extern volatile __bit BORFS __attribute__((address(0x4EE))); + + +extern volatile __bit BORRDY __attribute__((address(0x4E8))); + + +extern volatile __bit BRG16 __attribute__((address(0xCFB))); + + +extern volatile __bit BRGH __attribute__((address(0xCF2))); + + +extern volatile __bit BSR0 __attribute__((address(0x40))); + + +extern volatile __bit BSR1 __attribute__((address(0x41))); + + +extern volatile __bit BSR2 __attribute__((address(0x42))); + + +extern volatile __bit BSR3 __attribute__((address(0x43))); + + +extern volatile __bit BSR4 __attribute__((address(0x44))); + + +extern volatile __bit BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit C1HYS __attribute__((address(0x891))); + + +extern volatile __bit C1IE __attribute__((address(0x495))); + + +extern volatile __bit C1IF __attribute__((address(0x95))); + + +extern volatile __bit C1INTN __attribute__((address(0x898))); + + +extern volatile __bit C1INTP __attribute__((address(0x899))); + + +extern volatile __bit C1NCH0 __attribute__((address(0x8A0))); + + +extern volatile __bit C1NCH1 __attribute__((address(0x8A1))); + + +extern volatile __bit C1NCH2 __attribute__((address(0x8A2))); + + +extern volatile __bit C1NCH3 __attribute__((address(0x8A3))); + + +extern volatile __bit C1ON __attribute__((address(0x897))); + + +extern volatile __bit C1OUT __attribute__((address(0x896))); + + +extern volatile __bit C1PCH0 __attribute__((address(0x8A8))); + + +extern volatile __bit C1PCH1 __attribute__((address(0x8A9))); + + +extern volatile __bit C1PCH2 __attribute__((address(0x8AA))); + + +extern volatile __bit C1PCH3 __attribute__((address(0x8AB))); + + +extern volatile __bit C1POL __attribute__((address(0x894))); + + +extern volatile __bit C1SP __attribute__((address(0x892))); + + +extern volatile __bit C1SYNC __attribute__((address(0x890))); + + +extern volatile __bit C1TSEL0 __attribute__((address(0x14F0))); + + +extern volatile __bit C1TSEL1 __attribute__((address(0x14F1))); + + +extern volatile __bit C1ZLF __attribute__((address(0x893))); + + +extern volatile __bit C2HYS __attribute__((address(0x8B1))); + + +extern volatile __bit C2IE __attribute__((address(0x496))); + + +extern volatile __bit C2IF __attribute__((address(0x96))); + + +extern volatile __bit C2INTN __attribute__((address(0x8B8))); + + +extern volatile __bit C2INTP __attribute__((address(0x8B9))); + + +extern volatile __bit C2NCH0 __attribute__((address(0x8C0))); + + +extern volatile __bit C2NCH1 __attribute__((address(0x8C1))); + + +extern volatile __bit C2NCH2 __attribute__((address(0x8C2))); + + +extern volatile __bit C2NCH3 __attribute__((address(0x8C3))); + + +extern volatile __bit C2ON __attribute__((address(0x8B7))); + + +extern volatile __bit C2OUT __attribute__((address(0x8B6))); + + +extern volatile __bit C2PCH0 __attribute__((address(0x8C8))); + + +extern volatile __bit C2PCH1 __attribute__((address(0x8C9))); + + +extern volatile __bit C2PCH2 __attribute__((address(0x8CA))); + + +extern volatile __bit C2PCH3 __attribute__((address(0x8CB))); + + +extern volatile __bit C2POL __attribute__((address(0x8B4))); + + +extern volatile __bit C2SP __attribute__((address(0x8B2))); + + +extern volatile __bit C2SYNC __attribute__((address(0x8B0))); + + +extern volatile __bit C2TSEL0 __attribute__((address(0x14F2))); + + +extern volatile __bit C2TSEL1 __attribute__((address(0x14F3))); + + +extern volatile __bit C2ZLF __attribute__((address(0x8B3))); + + +extern volatile __bit C3HYS __attribute__((address(0x8D1))); + + +extern volatile __bit C3IE __attribute__((address(0x491))); + + +extern volatile __bit C3IF __attribute__((address(0x91))); + + +extern volatile __bit C3INTN __attribute__((address(0x8D8))); + + +extern volatile __bit C3INTP __attribute__((address(0x8D9))); + + +extern volatile __bit C3NCH0 __attribute__((address(0x8E0))); + + +extern volatile __bit C3NCH1 __attribute__((address(0x8E1))); + + +extern volatile __bit C3NCH2 __attribute__((address(0x8E2))); + + +extern volatile __bit C3NCH3 __attribute__((address(0x8E3))); + + +extern volatile __bit C3ON __attribute__((address(0x8D7))); + + +extern volatile __bit C3OUT __attribute__((address(0x8D6))); + + +extern volatile __bit C3PCH0 __attribute__((address(0x8E8))); + + +extern volatile __bit C3PCH1 __attribute__((address(0x8E9))); + + +extern volatile __bit C3PCH2 __attribute__((address(0x8EA))); + + +extern volatile __bit C3PCH3 __attribute__((address(0x8EB))); + + +extern volatile __bit C3POL __attribute__((address(0x8D4))); + + +extern volatile __bit C3SP __attribute__((address(0x8D2))); + + +extern volatile __bit C3SYNC __attribute__((address(0x8D0))); + + +extern volatile __bit C3ZLF __attribute__((address(0x8D3))); + + +extern volatile __bit C4HYS __attribute__((address(0x4861))); + + +extern volatile __bit C4IE __attribute__((address(0x492))); + + +extern volatile __bit C4IF __attribute__((address(0x92))); + + +extern volatile __bit C4INTN __attribute__((address(0x4868))); + + +extern volatile __bit C4INTP __attribute__((address(0x4869))); + + +extern volatile __bit C4NCH0 __attribute__((address(0x4870))); + + +extern volatile __bit C4NCH1 __attribute__((address(0x4871))); + + +extern volatile __bit C4NCH2 __attribute__((address(0x4872))); + + +extern volatile __bit C4NCH3 __attribute__((address(0x4873))); + + +extern volatile __bit C4ON __attribute__((address(0x4867))); + + +extern volatile __bit C4OUT __attribute__((address(0x4866))); + + +extern volatile __bit C4PCH0 __attribute__((address(0x4878))); + + +extern volatile __bit C4PCH1 __attribute__((address(0x4879))); + + +extern volatile __bit C4PCH2 __attribute__((address(0x487A))); + + +extern volatile __bit C4PCH3 __attribute__((address(0x487B))); + + +extern volatile __bit C4POL __attribute__((address(0x4864))); + + +extern volatile __bit C4SP __attribute__((address(0x4862))); + + +extern volatile __bit C4SYNC __attribute__((address(0x4860))); + + +extern volatile __bit C4ZLF __attribute__((address(0x4863))); + + +extern volatile __bit C5HYS __attribute__((address(0x4881))); + + +extern volatile __bit C5IE __attribute__((address(0x4A8))); + + +extern volatile __bit C5IF __attribute__((address(0xA8))); + + +extern volatile __bit C5INTN __attribute__((address(0x4888))); + + +extern volatile __bit C5INTP __attribute__((address(0x4889))); + + +extern volatile __bit C5NCH0 __attribute__((address(0x4890))); + + +extern volatile __bit C5NCH1 __attribute__((address(0x4891))); + + +extern volatile __bit C5NCH2 __attribute__((address(0x4892))); + + +extern volatile __bit C5NCH3 __attribute__((address(0x4893))); + + +extern volatile __bit C5ON __attribute__((address(0x4887))); + + +extern volatile __bit C5OUT __attribute__((address(0x4886))); + + +extern volatile __bit C5PCH0 __attribute__((address(0x4898))); + + +extern volatile __bit C5PCH1 __attribute__((address(0x4899))); + + +extern volatile __bit C5PCH2 __attribute__((address(0x489A))); + + +extern volatile __bit C5PCH3 __attribute__((address(0x489B))); + + +extern volatile __bit C5POL __attribute__((address(0x4884))); + + +extern volatile __bit C5SP __attribute__((address(0x4882))); + + +extern volatile __bit C5SYNC __attribute__((address(0x4880))); + + +extern volatile __bit C5ZLF __attribute__((address(0x4883))); + + +extern volatile __bit C6HYS __attribute__((address(0x48A1))); + + +extern volatile __bit C6IE __attribute__((address(0x4A9))); + + +extern volatile __bit C6IF __attribute__((address(0xA9))); + + +extern volatile __bit C6INTN __attribute__((address(0x48A8))); + + +extern volatile __bit C6INTP __attribute__((address(0x48A9))); + + +extern volatile __bit C6NCH0 __attribute__((address(0x48B0))); + + +extern volatile __bit C6NCH1 __attribute__((address(0x48B1))); + + +extern volatile __bit C6NCH2 __attribute__((address(0x48B2))); + + +extern volatile __bit C6NCH3 __attribute__((address(0x48B3))); + + +extern volatile __bit C6ON __attribute__((address(0x48A7))); + + +extern volatile __bit C6OUT __attribute__((address(0x48A6))); + + +extern volatile __bit C6PCH0 __attribute__((address(0x48B8))); + + +extern volatile __bit C6PCH1 __attribute__((address(0x48B9))); + + +extern volatile __bit C6PCH2 __attribute__((address(0x48BA))); + + +extern volatile __bit C6PCH3 __attribute__((address(0x48BB))); + + +extern volatile __bit C6POL __attribute__((address(0x48A4))); + + +extern volatile __bit C6SP __attribute__((address(0x48A2))); + + +extern volatile __bit C6SYNC __attribute__((address(0x48A0))); + + +extern volatile __bit C6ZLF __attribute__((address(0x48A3))); + + +extern volatile __bit C7TSEL0 __attribute__((address(0x14F4))); + + +extern volatile __bit C7TSEL1 __attribute__((address(0x14F5))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1CTS0 __attribute__((address(0x14A0))); + + +extern volatile __bit CCP1CTS1 __attribute__((address(0x14A1))); + + +extern volatile __bit CCP1CTS2 __attribute__((address(0x14A2))); + + +extern volatile __bit CCP1CTS3 __attribute__((address(0x14A3))); + + +extern volatile __bit CCP1EN __attribute__((address(0x149F))); + + +extern volatile __bit CCP1FMT __attribute__((address(0x149C))); + + +extern volatile __bit CCP1IE __attribute__((address(0x48A))); + + +extern volatile __bit CCP1IF __attribute__((address(0x8A))); + + +extern volatile __bit CCP1MODE0 __attribute__((address(0x1498))); + + +extern volatile __bit CCP1MODE1 __attribute__((address(0x1499))); + + +extern volatile __bit CCP1MODE2 __attribute__((address(0x149A))); + + +extern volatile __bit CCP1MODE3 __attribute__((address(0x149B))); + + +extern volatile __bit CCP1OUT __attribute__((address(0x149D))); + + +extern volatile __bit CCP2CTS0 __attribute__((address(0x14C0))); + + +extern volatile __bit CCP2CTS1 __attribute__((address(0x14C1))); + + +extern volatile __bit CCP2CTS2 __attribute__((address(0x14C2))); + + +extern volatile __bit CCP2CTS3 __attribute__((address(0x14C3))); + + +extern volatile __bit CCP2EN __attribute__((address(0x14BF))); + + +extern volatile __bit CCP2FMT __attribute__((address(0x14BC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x490))); + + +extern volatile __bit CCP2IF __attribute__((address(0x90))); + + +extern volatile __bit CCP2MODE0 __attribute__((address(0x14B8))); + + +extern volatile __bit CCP2MODE1 __attribute__((address(0x14B9))); + + +extern volatile __bit CCP2MODE2 __attribute__((address(0x14BA))); + + +extern volatile __bit CCP2MODE3 __attribute__((address(0x14BB))); + + +extern volatile __bit CCP2OUT __attribute__((address(0x14BD))); + + +extern volatile __bit CCP7CTS0 __attribute__((address(0x14E0))); + + +extern volatile __bit CCP7CTS1 __attribute__((address(0x14E1))); + + +extern volatile __bit CCP7CTS2 __attribute__((address(0x14E2))); + + +extern volatile __bit CCP7CTS3 __attribute__((address(0x14E3))); + + +extern volatile __bit CCP7EN __attribute__((address(0x14DF))); + + +extern volatile __bit CCP7FMT __attribute__((address(0x14DC))); + + +extern volatile __bit CCP7IE __attribute__((address(0x4AE))); + + +extern volatile __bit CCP7IF __attribute__((address(0xAE))); + + +extern volatile __bit CCP7MODE0 __attribute__((address(0x14D8))); + + +extern volatile __bit CCP7MODE1 __attribute__((address(0x14D9))); + + +extern volatile __bit CCP7MODE2 __attribute__((address(0x14DA))); + + +extern volatile __bit CCP7MODE3 __attribute__((address(0x14DB))); + + +extern volatile __bit CCP7OUT __attribute__((address(0x14DD))); + + +extern volatile __bit CCPIE __attribute__((address(0x48A))); + + +extern volatile __bit CCPIF __attribute__((address(0x8A))); + + +extern volatile __bit CFGS __attribute__((address(0xCAE))); + + +extern volatile __bit CKE __attribute__((address(0x10A6))); + + +extern volatile __bit CKP __attribute__((address(0x10AC))); + + +extern volatile __bit CLC1IE __attribute__((address(0x498))); + + +extern volatile __bit CLC1IF __attribute__((address(0x98))); + + +extern volatile __bit CLC2IE __attribute__((address(0x499))); + + +extern volatile __bit CLC2IF __attribute__((address(0x99))); + + +extern volatile __bit CLC3IE __attribute__((address(0x49A))); + + +extern volatile __bit CLC3IF __attribute__((address(0x9A))); + + +extern volatile __bit CLC4IE __attribute__((address(0x49B))); + + +extern volatile __bit CLC4IF __attribute__((address(0x9B))); + + +extern volatile __bit COG1IF __attribute__((address(0x94))); + + +extern volatile __bit COG2IE __attribute__((address(0x49D))); + + +extern volatile __bit COG2IF __attribute__((address(0x9D))); + + +extern volatile __bit COG3IE __attribute__((address(0x4AC))); + + +extern volatile __bit COG3IF __attribute__((address(0xAC))); + + +extern volatile __bit COGIE __attribute__((address(0x494))); + + +extern volatile __bit CREN __attribute__((address(0xCEC))); + + +extern volatile __bit CSRC __attribute__((address(0xCF7))); + + +extern volatile __bit C_SHAD __attribute__((address(0x7F20))); + + +extern volatile __bit DAC1EN __attribute__((address(0x2C77))); + + +extern volatile __bit DAC1FM __attribute__((address(0x2C76))); + + +extern volatile __bit DAC1LD __attribute__((address(0x2C68))); + + +extern volatile __bit DAC1NSS0 __attribute__((address(0x2C70))); + + +extern volatile __bit DAC1NSS1 __attribute__((address(0x2C71))); + + +extern volatile __bit DAC1OE1 __attribute__((address(0x2C75))); + + +extern volatile __bit DAC1OE2 __attribute__((address(0x2C74))); + + +extern volatile __bit DAC1PSS0 __attribute__((address(0x2C72))); + + +extern volatile __bit DAC1PSS1 __attribute__((address(0x2C73))); + + +extern volatile __bit DAC1R0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1R1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1R10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1R11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1R12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1R13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1R14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1R15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1R2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1R3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1R4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1R5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1R6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1R7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1R8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1R9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC1REF0 __attribute__((address(0x2C78))); + + +extern volatile __bit DAC1REF1 __attribute__((address(0x2C79))); + + +extern volatile __bit DAC1REF10 __attribute__((address(0x2C82))); + + +extern volatile __bit DAC1REF11 __attribute__((address(0x2C83))); + + +extern volatile __bit DAC1REF12 __attribute__((address(0x2C84))); + + +extern volatile __bit DAC1REF13 __attribute__((address(0x2C85))); + + +extern volatile __bit DAC1REF14 __attribute__((address(0x2C86))); + + +extern volatile __bit DAC1REF15 __attribute__((address(0x2C87))); + + +extern volatile __bit DAC1REF2 __attribute__((address(0x2C7A))); + + +extern volatile __bit DAC1REF3 __attribute__((address(0x2C7B))); + + +extern volatile __bit DAC1REF4 __attribute__((address(0x2C7C))); + + +extern volatile __bit DAC1REF5 __attribute__((address(0x2C7D))); + + +extern volatile __bit DAC1REF6 __attribute__((address(0x2C7E))); + + +extern volatile __bit DAC1REF7 __attribute__((address(0x2C7F))); + + +extern volatile __bit DAC1REF8 __attribute__((address(0x2C80))); + + +extern volatile __bit DAC1REF9 __attribute__((address(0x2C81))); + + +extern volatile __bit DAC2EN __attribute__((address(0x2C8F))); + + +extern volatile __bit DAC2FM __attribute__((address(0x2C8E))); + + +extern volatile __bit DAC2LD __attribute__((address(0x2C69))); + + +extern volatile __bit DAC2NSS0 __attribute__((address(0x2C88))); + + +extern volatile __bit DAC2NSS1 __attribute__((address(0x2C89))); + + +extern volatile __bit DAC2OE1 __attribute__((address(0x2C8D))); + + +extern volatile __bit DAC2OE2 __attribute__((address(0x2C8C))); + + +extern volatile __bit DAC2PSS0 __attribute__((address(0x2C8A))); + + +extern volatile __bit DAC2PSS1 __attribute__((address(0x2C8B))); + + +extern volatile __bit DAC2R0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2R1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2R10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2R11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2R12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2R13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2R14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2R15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2R2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2R3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2R4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2R5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2R6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2R7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2R8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2R9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC2REF0 __attribute__((address(0x2C90))); + + +extern volatile __bit DAC2REF1 __attribute__((address(0x2C91))); + + +extern volatile __bit DAC2REF10 __attribute__((address(0x2C9A))); + + +extern volatile __bit DAC2REF11 __attribute__((address(0x2C9B))); + + +extern volatile __bit DAC2REF12 __attribute__((address(0x2C9C))); + + +extern volatile __bit DAC2REF13 __attribute__((address(0x2C9D))); + + +extern volatile __bit DAC2REF14 __attribute__((address(0x2C9E))); + + +extern volatile __bit DAC2REF15 __attribute__((address(0x2C9F))); + + +extern volatile __bit DAC2REF2 __attribute__((address(0x2C92))); + + +extern volatile __bit DAC2REF3 __attribute__((address(0x2C93))); + + +extern volatile __bit DAC2REF4 __attribute__((address(0x2C94))); + + +extern volatile __bit DAC2REF5 __attribute__((address(0x2C95))); + + +extern volatile __bit DAC2REF6 __attribute__((address(0x2C96))); + + +extern volatile __bit DAC2REF7 __attribute__((address(0x2C97))); + + +extern volatile __bit DAC2REF8 __attribute__((address(0x2C98))); + + +extern volatile __bit DAC2REF9 __attribute__((address(0x2C99))); + + +extern volatile __bit DAC3EN __attribute__((address(0x2CA7))); + + +extern volatile __bit DAC3NSS0 __attribute__((address(0x2CA0))); + + +extern volatile __bit DAC3NSS1 __attribute__((address(0x2CA1))); + + +extern volatile __bit DAC3OE1 __attribute__((address(0x2CA5))); + + +extern volatile __bit DAC3OE2 __attribute__((address(0x2CA4))); + + +extern volatile __bit DAC3PSS0 __attribute__((address(0x2CA2))); + + +extern volatile __bit DAC3PSS1 __attribute__((address(0x2CA3))); + + +extern volatile __bit DAC3R0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3R1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3R2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3R3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3R4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC3REF0 __attribute__((address(0x2CA8))); + + +extern volatile __bit DAC3REF1 __attribute__((address(0x2CA9))); + + +extern volatile __bit DAC3REF2 __attribute__((address(0x2CAA))); + + +extern volatile __bit DAC3REF3 __attribute__((address(0x2CAB))); + + +extern volatile __bit DAC3REF4 __attribute__((address(0x2CAC))); + + +extern volatile __bit DAC4EN __attribute__((address(0x2CB7))); + + +extern volatile __bit DAC4NSS0 __attribute__((address(0x2CB0))); + + +extern volatile __bit DAC4NSS1 __attribute__((address(0x2CB1))); + + +extern volatile __bit DAC4OE1 __attribute__((address(0x2CB5))); + + +extern volatile __bit DAC4OE2 __attribute__((address(0x2CB4))); + + +extern volatile __bit DAC4PSS0 __attribute__((address(0x2CB2))); + + +extern volatile __bit DAC4PSS1 __attribute__((address(0x2CB3))); + + +extern volatile __bit DAC4R0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4R1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4R2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4R3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4R4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC4REF0 __attribute__((address(0x2CB8))); + + +extern volatile __bit DAC4REF1 __attribute__((address(0x2CB9))); + + +extern volatile __bit DAC4REF2 __attribute__((address(0x2CBA))); + + +extern volatile __bit DAC4REF3 __attribute__((address(0x2CBB))); + + +extern volatile __bit DAC4REF4 __attribute__((address(0x2CBC))); + + +extern volatile __bit DAC5EN __attribute__((address(0x2CC7))); + + +extern volatile __bit DAC5FM __attribute__((address(0x2CC6))); + + +extern volatile __bit DAC5LD __attribute__((address(0x2C6C))); + + +extern volatile __bit DAC5NSS0 __attribute__((address(0x2CC0))); + + +extern volatile __bit DAC5NSS1 __attribute__((address(0x2CC1))); + + +extern volatile __bit DAC5OE1 __attribute__((address(0x2CC5))); + + +extern volatile __bit DAC5OE2 __attribute__((address(0x2CC4))); + + +extern volatile __bit DAC5PSS0 __attribute__((address(0x2CC2))); + + +extern volatile __bit DAC5PSS1 __attribute__((address(0x2CC3))); + + +extern volatile __bit DAC5R0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5R1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5R10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5R11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5R12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5R13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5R14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5R15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5R2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5R3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5R4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5R5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5R6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5R7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5R8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5R9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC5REF0 __attribute__((address(0x2CC8))); + + +extern volatile __bit DAC5REF1 __attribute__((address(0x2CC9))); + + +extern volatile __bit DAC5REF10 __attribute__((address(0x2CD2))); + + +extern volatile __bit DAC5REF11 __attribute__((address(0x2CD3))); + + +extern volatile __bit DAC5REF12 __attribute__((address(0x2CD4))); + + +extern volatile __bit DAC5REF13 __attribute__((address(0x2CD5))); + + +extern volatile __bit DAC5REF14 __attribute__((address(0x2CD6))); + + +extern volatile __bit DAC5REF15 __attribute__((address(0x2CD7))); + + +extern volatile __bit DAC5REF2 __attribute__((address(0x2CCA))); + + +extern volatile __bit DAC5REF3 __attribute__((address(0x2CCB))); + + +extern volatile __bit DAC5REF4 __attribute__((address(0x2CCC))); + + +extern volatile __bit DAC5REF5 __attribute__((address(0x2CCD))); + + +extern volatile __bit DAC5REF6 __attribute__((address(0x2CCE))); + + +extern volatile __bit DAC5REF7 __attribute__((address(0x2CCF))); + + +extern volatile __bit DAC5REF8 __attribute__((address(0x2CD0))); + + +extern volatile __bit DAC5REF9 __attribute__((address(0x2CD1))); + + +extern volatile __bit DAC7EN __attribute__((address(0x2CF7))); + + +extern volatile __bit DAC7NSS0 __attribute__((address(0x2CF0))); + + +extern volatile __bit DAC7NSS1 __attribute__((address(0x2CF1))); + + +extern volatile __bit DAC7OE1 __attribute__((address(0x2CF5))); + + +extern volatile __bit DAC7OE2 __attribute__((address(0x2CF4))); + + +extern volatile __bit DAC7PSS0 __attribute__((address(0x2CF2))); + + +extern volatile __bit DAC7PSS1 __attribute__((address(0x2CF3))); + + +extern volatile __bit DAC7R0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7R1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7R2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7R3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7R4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DAC7REF0 __attribute__((address(0x2CF8))); + + +extern volatile __bit DAC7REF1 __attribute__((address(0x2CF9))); + + +extern volatile __bit DAC7REF2 __attribute__((address(0x2CFA))); + + +extern volatile __bit DAC7REF3 __attribute__((address(0x2CFB))); + + +extern volatile __bit DAC7REF4 __attribute__((address(0x2CFC))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit DC_SHAD __attribute__((address(0x7F21))); + + +extern volatile __bit DHEN __attribute__((address(0x10B8))); + + +extern volatile __bit D_nA __attribute__((address(0x10A5))); + + +extern volatile __bit FERR __attribute__((address(0xCEA))); + + +extern volatile __bit FREE __attribute__((address(0xCAC))); + + +extern volatile __bit FVREN __attribute__((address(0x4F7))); + + +extern volatile __bit FVRRDY __attribute__((address(0x4F6))); + + +extern volatile __bit G1ARSEN __attribute__((address(0x34EE))); + + +extern volatile __bit G1AS0E __attribute__((address(0x34F0))); + + +extern volatile __bit G1AS1E __attribute__((address(0x34F1))); + + +extern volatile __bit G1AS2E __attribute__((address(0x34F2))); + + +extern volatile __bit G1AS3E __attribute__((address(0x34F3))); + + +extern volatile __bit G1AS4E __attribute__((address(0x34F4))); + + +extern volatile __bit G1AS5E __attribute__((address(0x34F5))); + + +extern volatile __bit G1AS6E __attribute__((address(0x34F6))); + + +extern volatile __bit G1AS7E __attribute__((address(0x34F7))); + + +extern volatile __bit G1ASDAC0 __attribute__((address(0x34EA))); + + +extern volatile __bit G1ASDAC1 __attribute__((address(0x34EB))); + + +extern volatile __bit G1ASDBD0 __attribute__((address(0x34EC))); + + +extern volatile __bit G1ASDBD1 __attribute__((address(0x34ED))); + + +extern volatile __bit G1ASE __attribute__((address(0x34EF))); + + +extern volatile __bit G1ASREN __attribute__((address(0x34EE))); + + +extern volatile __bit G1BLKF0 __attribute__((address(0x3480))); + + +extern volatile __bit G1BLKF1 __attribute__((address(0x3481))); + + +extern volatile __bit G1BLKF2 __attribute__((address(0x3482))); + + +extern volatile __bit G1BLKF3 __attribute__((address(0x3483))); + + +extern volatile __bit G1BLKF4 __attribute__((address(0x3484))); + + +extern volatile __bit G1BLKF5 __attribute__((address(0x3485))); + + +extern volatile __bit G1BLKR0 __attribute__((address(0x3478))); + + +extern volatile __bit G1BLKR1 __attribute__((address(0x3479))); + + +extern volatile __bit G1BLKR2 __attribute__((address(0x347A))); + + +extern volatile __bit G1BLKR3 __attribute__((address(0x347B))); + + +extern volatile __bit G1BLKR4 __attribute__((address(0x347C))); + + +extern volatile __bit G1BLKR5 __attribute__((address(0x347D))); + + +extern volatile __bit G1CS0 __attribute__((address(0x349B))); + + +extern volatile __bit G1CS1 __attribute__((address(0x349C))); + + +extern volatile __bit G1DBF0 __attribute__((address(0x3490))); + + +extern volatile __bit G1DBF1 __attribute__((address(0x3491))); + + +extern volatile __bit G1DBF2 __attribute__((address(0x3492))); + + +extern volatile __bit G1DBF3 __attribute__((address(0x3493))); + + +extern volatile __bit G1DBF4 __attribute__((address(0x3494))); + + +extern volatile __bit G1DBF5 __attribute__((address(0x3495))); + + +extern volatile __bit G1DBR0 __attribute__((address(0x3488))); + + +extern volatile __bit G1DBR1 __attribute__((address(0x3489))); + + +extern volatile __bit G1DBR2 __attribute__((address(0x348A))); + + +extern volatile __bit G1DBR3 __attribute__((address(0x348B))); + + +extern volatile __bit G1DBR4 __attribute__((address(0x348C))); + + +extern volatile __bit G1DBR5 __attribute__((address(0x348D))); + + +extern volatile __bit G1EN __attribute__((address(0x349F))); + + +extern volatile __bit G1FDBS __attribute__((address(0x34A6))); + + +extern volatile __bit G1FIS0 __attribute__((address(0x34C8))); + + +extern volatile __bit G1FIS1 __attribute__((address(0x34C9))); + + +extern volatile __bit G1FIS10 __attribute__((address(0x34D2))); + + +extern volatile __bit G1FIS11 __attribute__((address(0x34D3))); + + +extern volatile __bit G1FIS12 __attribute__((address(0x34D4))); + + +extern volatile __bit G1FIS13 __attribute__((address(0x34D5))); + + +extern volatile __bit G1FIS14 __attribute__((address(0x34D6))); + + +extern volatile __bit G1FIS15 __attribute__((address(0x34D7))); + + +extern volatile __bit G1FIS2 __attribute__((address(0x34CA))); + + +extern volatile __bit G1FIS3 __attribute__((address(0x34CB))); + + +extern volatile __bit G1FIS4 __attribute__((address(0x34CC))); + + +extern volatile __bit G1FIS5 __attribute__((address(0x34CD))); + + +extern volatile __bit G1FIS6 __attribute__((address(0x34CE))); + + +extern volatile __bit G1FIS7 __attribute__((address(0x34CF))); + + +extern volatile __bit G1FIS8 __attribute__((address(0x34D0))); + + +extern volatile __bit G1FIS9 __attribute__((address(0x34D1))); + + +extern volatile __bit G1FSIM0 __attribute__((address(0x34D8))); + + +extern volatile __bit G1FSIM1 __attribute__((address(0x34D9))); + + +extern volatile __bit G1FSIM10 __attribute__((address(0x34E2))); + + +extern volatile __bit G1FSIM11 __attribute__((address(0x34E3))); + + +extern volatile __bit G1FSIM12 __attribute__((address(0x34E4))); + + +extern volatile __bit G1FSIM13 __attribute__((address(0x34E5))); + + +extern volatile __bit G1FSIM14 __attribute__((address(0x34E6))); + + +extern volatile __bit G1FSIM15 __attribute__((address(0x34E7))); + + +extern volatile __bit G1FSIM2 __attribute__((address(0x34DA))); + + +extern volatile __bit G1FSIM3 __attribute__((address(0x34DB))); + + +extern volatile __bit G1FSIM4 __attribute__((address(0x34DC))); + + +extern volatile __bit G1FSIM5 __attribute__((address(0x34DD))); + + +extern volatile __bit G1FSIM6 __attribute__((address(0x34DE))); + + +extern volatile __bit G1FSIM7 __attribute__((address(0x34DF))); + + +extern volatile __bit G1FSIM8 __attribute__((address(0x34E0))); + + +extern volatile __bit G1FSIM9 __attribute__((address(0x34E1))); + + +extern volatile __bit G1LD __attribute__((address(0x349E))); + + +extern volatile __bit G1MD0 __attribute__((address(0x3498))); + + +extern volatile __bit G1MD1 __attribute__((address(0x3499))); + + +extern volatile __bit G1MD2 __attribute__((address(0x349A))); + + +extern volatile __bit G1PHF0 __attribute__((address(0x3470))); + + +extern volatile __bit G1PHF1 __attribute__((address(0x3471))); + + +extern volatile __bit G1PHF2 __attribute__((address(0x3472))); + + +extern volatile __bit G1PHF3 __attribute__((address(0x3473))); + + +extern volatile __bit G1PHF4 __attribute__((address(0x3474))); + + +extern volatile __bit G1PHF5 __attribute__((address(0x3475))); + + +extern volatile __bit G1PHR0 __attribute__((address(0x3468))); + + +extern volatile __bit G1PHR1 __attribute__((address(0x3469))); + + +extern volatile __bit G1PHR2 __attribute__((address(0x346A))); + + +extern volatile __bit G1PHR3 __attribute__((address(0x346B))); + + +extern volatile __bit G1PHR4 __attribute__((address(0x346C))); + + +extern volatile __bit G1PHR5 __attribute__((address(0x346D))); + + +extern volatile __bit G1POLA __attribute__((address(0x34A0))); + + +extern volatile __bit G1POLB __attribute__((address(0x34A1))); + + +extern volatile __bit G1POLC __attribute__((address(0x34A2))); + + +extern volatile __bit G1POLD __attribute__((address(0x34A3))); + + +extern volatile __bit G1RDBS __attribute__((address(0x34A7))); + + +extern volatile __bit G1RIS0 __attribute__((address(0x34A8))); + + +extern volatile __bit G1RIS1 __attribute__((address(0x34A9))); + + +extern volatile __bit G1RIS10 __attribute__((address(0x34B2))); + + +extern volatile __bit G1RIS11 __attribute__((address(0x34B3))); + + +extern volatile __bit G1RIS12 __attribute__((address(0x34B4))); + + +extern volatile __bit G1RIS13 __attribute__((address(0x34B5))); + + +extern volatile __bit G1RIS14 __attribute__((address(0x34B6))); + + +extern volatile __bit G1RIS15 __attribute__((address(0x34B7))); + + +extern volatile __bit G1RIS2 __attribute__((address(0x34AA))); + + +extern volatile __bit G1RIS3 __attribute__((address(0x34AB))); + + +extern volatile __bit G1RIS4 __attribute__((address(0x34AC))); + + +extern volatile __bit G1RIS5 __attribute__((address(0x34AD))); + + +extern volatile __bit G1RIS6 __attribute__((address(0x34AE))); + + +extern volatile __bit G1RIS7 __attribute__((address(0x34AF))); + + +extern volatile __bit G1RIS8 __attribute__((address(0x34B0))); + + +extern volatile __bit G1RIS9 __attribute__((address(0x34B1))); + + +extern volatile __bit G1RSIM0 __attribute__((address(0x34B8))); + + +extern volatile __bit G1RSIM1 __attribute__((address(0x34B9))); + + +extern volatile __bit G1RSIM10 __attribute__((address(0x34C2))); + + +extern volatile __bit G1RSIM11 __attribute__((address(0x34C3))); + + +extern volatile __bit G1RSIM12 __attribute__((address(0x34C4))); + + +extern volatile __bit G1RSIM13 __attribute__((address(0x34C5))); + + +extern volatile __bit G1RSIM14 __attribute__((address(0x34C6))); + + +extern volatile __bit G1RSIM15 __attribute__((address(0x34C7))); + + +extern volatile __bit G1RSIM2 __attribute__((address(0x34BA))); + + +extern volatile __bit G1RSIM3 __attribute__((address(0x34BB))); + + +extern volatile __bit G1RSIM4 __attribute__((address(0x34BC))); + + +extern volatile __bit G1RSIM5 __attribute__((address(0x34BD))); + + +extern volatile __bit G1RSIM6 __attribute__((address(0x34BE))); + + +extern volatile __bit G1RSIM7 __attribute__((address(0x34BF))); + + +extern volatile __bit G1RSIM8 __attribute__((address(0x34C0))); + + +extern volatile __bit G1RSIM9 __attribute__((address(0x34C1))); + + +extern volatile __bit G1SDATA __attribute__((address(0x34FC))); + + +extern volatile __bit G1SDATB __attribute__((address(0x34FD))); + + +extern volatile __bit G1SDATC __attribute__((address(0x34FE))); + + +extern volatile __bit G1SDATD __attribute__((address(0x34FF))); + + +extern volatile __bit G1STRA __attribute__((address(0x34F8))); + + +extern volatile __bit G1STRB __attribute__((address(0x34F9))); + + +extern volatile __bit G1STRC __attribute__((address(0x34FA))); + + +extern volatile __bit G1STRD __attribute__((address(0x34FB))); + + +extern volatile __bit G2ARSEN __attribute__((address(0x38EE))); + + +extern volatile __bit G2AS0E __attribute__((address(0x38F0))); + + +extern volatile __bit G2AS1E __attribute__((address(0x38F1))); + + +extern volatile __bit G2AS2E __attribute__((address(0x38F2))); + + +extern volatile __bit G2AS3E __attribute__((address(0x38F3))); + + +extern volatile __bit G2AS4E __attribute__((address(0x38F4))); + + +extern volatile __bit G2AS5E __attribute__((address(0x38F5))); + + +extern volatile __bit G2AS6E __attribute__((address(0x38F6))); + + +extern volatile __bit G2AS7E __attribute__((address(0x38F7))); + + +extern volatile __bit G2ASDAC0 __attribute__((address(0x38EA))); + + +extern volatile __bit G2ASDAC1 __attribute__((address(0x38EB))); + + +extern volatile __bit G2ASDBD0 __attribute__((address(0x38EC))); + + +extern volatile __bit G2ASDBD1 __attribute__((address(0x38ED))); + + +extern volatile __bit G2ASE __attribute__((address(0x38EF))); + + +extern volatile __bit G2ASREN __attribute__((address(0x38EE))); + + +extern volatile __bit G2BLKF0 __attribute__((address(0x3880))); + + +extern volatile __bit G2BLKF1 __attribute__((address(0x3881))); + + +extern volatile __bit G2BLKF2 __attribute__((address(0x3882))); + + +extern volatile __bit G2BLKF3 __attribute__((address(0x3883))); + + +extern volatile __bit G2BLKF4 __attribute__((address(0x3884))); + + +extern volatile __bit G2BLKF5 __attribute__((address(0x3885))); + + +extern volatile __bit G2BLKR0 __attribute__((address(0x3878))); + + +extern volatile __bit G2BLKR1 __attribute__((address(0x3879))); + + +extern volatile __bit G2BLKR2 __attribute__((address(0x387A))); + + +extern volatile __bit G2BLKR3 __attribute__((address(0x387B))); + + +extern volatile __bit G2BLKR4 __attribute__((address(0x387C))); + + +extern volatile __bit G2BLKR5 __attribute__((address(0x387D))); + + +extern volatile __bit G2CS0 __attribute__((address(0x389B))); + + +extern volatile __bit G2CS1 __attribute__((address(0x389C))); + + +extern volatile __bit G2DBF0 __attribute__((address(0x3890))); + + +extern volatile __bit G2DBF1 __attribute__((address(0x3891))); + + +extern volatile __bit G2DBF2 __attribute__((address(0x3892))); + + +extern volatile __bit G2DBF3 __attribute__((address(0x3893))); + + +extern volatile __bit G2DBF4 __attribute__((address(0x3894))); + + +extern volatile __bit G2DBF5 __attribute__((address(0x3895))); + + +extern volatile __bit G2DBR0 __attribute__((address(0x3888))); + + +extern volatile __bit G2DBR1 __attribute__((address(0x3889))); + + +extern volatile __bit G2DBR2 __attribute__((address(0x388A))); + + +extern volatile __bit G2DBR3 __attribute__((address(0x388B))); + + +extern volatile __bit G2DBR4 __attribute__((address(0x388C))); + + +extern volatile __bit G2DBR5 __attribute__((address(0x388D))); + + +extern volatile __bit G2EN __attribute__((address(0x389F))); + + +extern volatile __bit G2FDBS __attribute__((address(0x38A6))); + + +extern volatile __bit G2FIS0 __attribute__((address(0x38C8))); + + +extern volatile __bit G2FIS1 __attribute__((address(0x38C9))); + + +extern volatile __bit G2FIS10 __attribute__((address(0x38D2))); + + +extern volatile __bit G2FIS11 __attribute__((address(0x38D3))); + + +extern volatile __bit G2FIS12 __attribute__((address(0x38D4))); + + +extern volatile __bit G2FIS13 __attribute__((address(0x38D5))); + + +extern volatile __bit G2FIS14 __attribute__((address(0x38D6))); + + +extern volatile __bit G2FIS15 __attribute__((address(0x38D7))); + + +extern volatile __bit G2FIS2 __attribute__((address(0x38CA))); + + +extern volatile __bit G2FIS3 __attribute__((address(0x38CB))); + + +extern volatile __bit G2FIS4 __attribute__((address(0x38CC))); + + +extern volatile __bit G2FIS5 __attribute__((address(0x38CD))); + + +extern volatile __bit G2FIS6 __attribute__((address(0x38CE))); + + +extern volatile __bit G2FIS7 __attribute__((address(0x38CF))); + + +extern volatile __bit G2FIS8 __attribute__((address(0x38D0))); + + +extern volatile __bit G2FIS9 __attribute__((address(0x38D1))); + + +extern volatile __bit G2FSIM0 __attribute__((address(0x38D8))); + + +extern volatile __bit G2FSIM1 __attribute__((address(0x38D9))); + + +extern volatile __bit G2FSIM10 __attribute__((address(0x38E2))); + + +extern volatile __bit G2FSIM11 __attribute__((address(0x38E3))); + + +extern volatile __bit G2FSIM12 __attribute__((address(0x38E4))); + + +extern volatile __bit G2FSIM13 __attribute__((address(0x38E5))); + + +extern volatile __bit G2FSIM14 __attribute__((address(0x38E6))); + + +extern volatile __bit G2FSIM15 __attribute__((address(0x38E7))); + + +extern volatile __bit G2FSIM2 __attribute__((address(0x38DA))); + + +extern volatile __bit G2FSIM3 __attribute__((address(0x38DB))); + + +extern volatile __bit G2FSIM4 __attribute__((address(0x38DC))); + + +extern volatile __bit G2FSIM5 __attribute__((address(0x38DD))); + + +extern volatile __bit G2FSIM6 __attribute__((address(0x38DE))); + + +extern volatile __bit G2FSIM7 __attribute__((address(0x38DF))); + + +extern volatile __bit G2FSIM8 __attribute__((address(0x38E0))); + + +extern volatile __bit G2FSIM9 __attribute__((address(0x38E1))); + + +extern volatile __bit G2LD __attribute__((address(0x389E))); + + +extern volatile __bit G2MD0 __attribute__((address(0x3898))); + + +extern volatile __bit G2MD1 __attribute__((address(0x3899))); + + +extern volatile __bit G2MD2 __attribute__((address(0x389A))); + + +extern volatile __bit G2PHF0 __attribute__((address(0x3870))); + + +extern volatile __bit G2PHF1 __attribute__((address(0x3871))); + + +extern volatile __bit G2PHF2 __attribute__((address(0x3872))); + + +extern volatile __bit G2PHF3 __attribute__((address(0x3873))); + + +extern volatile __bit G2PHF4 __attribute__((address(0x3874))); + + +extern volatile __bit G2PHF5 __attribute__((address(0x3875))); + + +extern volatile __bit G2PHR0 __attribute__((address(0x3868))); + + +extern volatile __bit G2PHR1 __attribute__((address(0x3869))); + + +extern volatile __bit G2PHR2 __attribute__((address(0x386A))); + + +extern volatile __bit G2PHR3 __attribute__((address(0x386B))); + + +extern volatile __bit G2PHR4 __attribute__((address(0x386C))); + + +extern volatile __bit G2PHR5 __attribute__((address(0x386D))); + + +extern volatile __bit G2POLA __attribute__((address(0x38A0))); + + +extern volatile __bit G2POLB __attribute__((address(0x38A1))); + + +extern volatile __bit G2POLC __attribute__((address(0x38A2))); + + +extern volatile __bit G2POLD __attribute__((address(0x38A3))); + + +extern volatile __bit G2RDBS __attribute__((address(0x38A7))); + + +extern volatile __bit G2RIS0 __attribute__((address(0x38A8))); + + +extern volatile __bit G2RIS1 __attribute__((address(0x38A9))); + + +extern volatile __bit G2RIS10 __attribute__((address(0x38B2))); + + +extern volatile __bit G2RIS11 __attribute__((address(0x38B3))); + + +extern volatile __bit G2RIS12 __attribute__((address(0x38B4))); + + +extern volatile __bit G2RIS13 __attribute__((address(0x38B5))); + + +extern volatile __bit G2RIS14 __attribute__((address(0x38B6))); + + +extern volatile __bit G2RIS15 __attribute__((address(0x38B7))); + + +extern volatile __bit G2RIS2 __attribute__((address(0x38AA))); + + +extern volatile __bit G2RIS3 __attribute__((address(0x38AB))); + + +extern volatile __bit G2RIS4 __attribute__((address(0x38AC))); + + +extern volatile __bit G2RIS5 __attribute__((address(0x38AD))); + + +extern volatile __bit G2RIS6 __attribute__((address(0x38AE))); + + +extern volatile __bit G2RIS7 __attribute__((address(0x38AF))); + + +extern volatile __bit G2RIS8 __attribute__((address(0x38B0))); + + +extern volatile __bit G2RIS9 __attribute__((address(0x38B1))); + + +extern volatile __bit G2RSIM0 __attribute__((address(0x38B8))); + + +extern volatile __bit G2RSIM1 __attribute__((address(0x38B9))); + + +extern volatile __bit G2RSIM10 __attribute__((address(0x38C2))); + + +extern volatile __bit G2RSIM11 __attribute__((address(0x38C3))); + + +extern volatile __bit G2RSIM12 __attribute__((address(0x38C4))); + + +extern volatile __bit G2RSIM13 __attribute__((address(0x38C5))); + + +extern volatile __bit G2RSIM14 __attribute__((address(0x38C6))); + + +extern volatile __bit G2RSIM15 __attribute__((address(0x38C7))); + + +extern volatile __bit G2RSIM2 __attribute__((address(0x38BA))); + + +extern volatile __bit G2RSIM3 __attribute__((address(0x38BB))); + + +extern volatile __bit G2RSIM4 __attribute__((address(0x38BC))); + + +extern volatile __bit G2RSIM5 __attribute__((address(0x38BD))); + + +extern volatile __bit G2RSIM6 __attribute__((address(0x38BE))); + + +extern volatile __bit G2RSIM7 __attribute__((address(0x38BF))); + + +extern volatile __bit G2RSIM8 __attribute__((address(0x38C0))); + + +extern volatile __bit G2RSIM9 __attribute__((address(0x38C1))); + + +extern volatile __bit G2SDATA __attribute__((address(0x38FC))); + + +extern volatile __bit G2SDATB __attribute__((address(0x38FD))); + + +extern volatile __bit G2SDATC __attribute__((address(0x38FE))); + + +extern volatile __bit G2SDATD __attribute__((address(0x38FF))); + + +extern volatile __bit G2STRA __attribute__((address(0x38F8))); + + +extern volatile __bit G2STRB __attribute__((address(0x38F9))); + + +extern volatile __bit G2STRC __attribute__((address(0x38FA))); + + +extern volatile __bit G2STRD __attribute__((address(0x38FB))); + + +extern volatile __bit G3ARSEN __attribute__((address(0x40EE))); + + +extern volatile __bit G3AS0E __attribute__((address(0x40F0))); + + +extern volatile __bit G3AS1E __attribute__((address(0x40F1))); + + +extern volatile __bit G3AS2E __attribute__((address(0x40F2))); + + +extern volatile __bit G3AS3E __attribute__((address(0x40F3))); + + +extern volatile __bit G3AS4E __attribute__((address(0x40F4))); + + +extern volatile __bit G3AS5E __attribute__((address(0x40F5))); + + +extern volatile __bit G3AS6E __attribute__((address(0x40F6))); + + +extern volatile __bit G3AS7E __attribute__((address(0x40F7))); + + +extern volatile __bit G3ASDAC0 __attribute__((address(0x40EA))); + + +extern volatile __bit G3ASDAC1 __attribute__((address(0x40EB))); + + +extern volatile __bit G3ASDBD0 __attribute__((address(0x40EC))); + + +extern volatile __bit G3ASDBD1 __attribute__((address(0x40ED))); + + +extern volatile __bit G3ASE __attribute__((address(0x40EF))); + + +extern volatile __bit G3ASREN __attribute__((address(0x40EE))); + + +extern volatile __bit G3BLKF0 __attribute__((address(0x4080))); + + +extern volatile __bit G3BLKF1 __attribute__((address(0x4081))); + + +extern volatile __bit G3BLKF2 __attribute__((address(0x4082))); + + +extern volatile __bit G3BLKF3 __attribute__((address(0x4083))); + + +extern volatile __bit G3BLKF4 __attribute__((address(0x4084))); + + +extern volatile __bit G3BLKF5 __attribute__((address(0x4085))); + + +extern volatile __bit G3BLKR0 __attribute__((address(0x4078))); + + +extern volatile __bit G3BLKR1 __attribute__((address(0x4079))); + + +extern volatile __bit G3BLKR2 __attribute__((address(0x407A))); + + +extern volatile __bit G3BLKR3 __attribute__((address(0x407B))); + + +extern volatile __bit G3BLKR4 __attribute__((address(0x407C))); + + +extern volatile __bit G3BLKR5 __attribute__((address(0x407D))); + + +extern volatile __bit G3CS0 __attribute__((address(0x409B))); + + +extern volatile __bit G3CS1 __attribute__((address(0x409C))); + + +extern volatile __bit G3DBF0 __attribute__((address(0x4090))); + + +extern volatile __bit G3DBF1 __attribute__((address(0x4091))); + + +extern volatile __bit G3DBF2 __attribute__((address(0x4092))); + + +extern volatile __bit G3DBF3 __attribute__((address(0x4093))); + + +extern volatile __bit G3DBF4 __attribute__((address(0x4094))); + + +extern volatile __bit G3DBF5 __attribute__((address(0x4095))); + + +extern volatile __bit G3DBR0 __attribute__((address(0x4088))); + + +extern volatile __bit G3DBR1 __attribute__((address(0x4089))); + + +extern volatile __bit G3DBR2 __attribute__((address(0x408A))); + + +extern volatile __bit G3DBR3 __attribute__((address(0x408B))); + + +extern volatile __bit G3DBR4 __attribute__((address(0x408C))); + + +extern volatile __bit G3DBR5 __attribute__((address(0x408D))); + + +extern volatile __bit G3EN __attribute__((address(0x409F))); + + +extern volatile __bit G3FDBS __attribute__((address(0x40A6))); + + +extern volatile __bit G3FIS0 __attribute__((address(0x40C8))); + + +extern volatile __bit G3FIS1 __attribute__((address(0x40C9))); + + +extern volatile __bit G3FIS11 __attribute__((address(0x40D3))); + + +extern volatile __bit G3FIS12 __attribute__((address(0x40D4))); + + +extern volatile __bit G3FIS13 __attribute__((address(0x40D5))); + + +extern volatile __bit G3FIS14 __attribute__((address(0x40D6))); + + +extern volatile __bit G3FIS15 __attribute__((address(0x40D7))); + + +extern volatile __bit G3FIS2 __attribute__((address(0x40CA))); + + +extern volatile __bit G3FIS3 __attribute__((address(0x40CB))); + + +extern volatile __bit G3FIS4 __attribute__((address(0x40CC))); + + +extern volatile __bit G3FIS5 __attribute__((address(0x40CD))); + + +extern volatile __bit G3FIS6 __attribute__((address(0x40CE))); + + +extern volatile __bit G3FIS7 __attribute__((address(0x40CF))); + + +extern volatile __bit G3FIS9 __attribute__((address(0x40D1))); + + +extern volatile __bit G3FSIM0 __attribute__((address(0x40D8))); + + +extern volatile __bit G3FSIM1 __attribute__((address(0x40D9))); + + +extern volatile __bit G3FSIM11 __attribute__((address(0x40E3))); + + +extern volatile __bit G3FSIM12 __attribute__((address(0x40E4))); + + +extern volatile __bit G3FSIM13 __attribute__((address(0x40E5))); + + +extern volatile __bit G3FSIM14 __attribute__((address(0x40E6))); + + +extern volatile __bit G3FSIM15 __attribute__((address(0x40E7))); + + +extern volatile __bit G3FSIM2 __attribute__((address(0x40DA))); + + +extern volatile __bit G3FSIM3 __attribute__((address(0x40DB))); + + +extern volatile __bit G3FSIM4 __attribute__((address(0x40DC))); + + +extern volatile __bit G3FSIM5 __attribute__((address(0x40DD))); + + +extern volatile __bit G3FSIM6 __attribute__((address(0x40DE))); + + +extern volatile __bit G3FSIM7 __attribute__((address(0x40DF))); + + +extern volatile __bit G3FSIM9 __attribute__((address(0x40E1))); + + +extern volatile __bit G3LD __attribute__((address(0x409E))); + + +extern volatile __bit G3MD0 __attribute__((address(0x4098))); + + +extern volatile __bit G3MD1 __attribute__((address(0x4099))); + + +extern volatile __bit G3MD2 __attribute__((address(0x409A))); + + +extern volatile __bit G3PHF0 __attribute__((address(0x4070))); + + +extern volatile __bit G3PHF1 __attribute__((address(0x4071))); + + +extern volatile __bit G3PHF2 __attribute__((address(0x4072))); + + +extern volatile __bit G3PHF3 __attribute__((address(0x4073))); + + +extern volatile __bit G3PHF4 __attribute__((address(0x4074))); + + +extern volatile __bit G3PHF5 __attribute__((address(0x4075))); + + +extern volatile __bit G3PHR0 __attribute__((address(0x4068))); + + +extern volatile __bit G3PHR1 __attribute__((address(0x4069))); + + +extern volatile __bit G3PHR2 __attribute__((address(0x406A))); + + +extern volatile __bit G3PHR3 __attribute__((address(0x406B))); + + +extern volatile __bit G3PHR4 __attribute__((address(0x406C))); + + +extern volatile __bit G3PHR5 __attribute__((address(0x406D))); + + +extern volatile __bit G3POLA __attribute__((address(0x40A0))); + + +extern volatile __bit G3POLB __attribute__((address(0x40A1))); + + +extern volatile __bit G3POLC __attribute__((address(0x40A2))); + + +extern volatile __bit G3POLD __attribute__((address(0x40A3))); + + +extern volatile __bit G3RDBS __attribute__((address(0x40A7))); + + +extern volatile __bit G3RIS0 __attribute__((address(0x40A8))); + + +extern volatile __bit G3RIS1 __attribute__((address(0x40A9))); + + +extern volatile __bit G3RIS11 __attribute__((address(0x40B3))); + + +extern volatile __bit G3RIS12 __attribute__((address(0x40B4))); + + +extern volatile __bit G3RIS13 __attribute__((address(0x40B5))); + + +extern volatile __bit G3RIS14 __attribute__((address(0x40B6))); + + +extern volatile __bit G3RIS15 __attribute__((address(0x40B7))); + + +extern volatile __bit G3RIS2 __attribute__((address(0x40AA))); + + +extern volatile __bit G3RIS3 __attribute__((address(0x40AB))); + + +extern volatile __bit G3RIS4 __attribute__((address(0x40AC))); + + +extern volatile __bit G3RIS5 __attribute__((address(0x40AD))); + + +extern volatile __bit G3RIS6 __attribute__((address(0x40AE))); + + +extern volatile __bit G3RIS7 __attribute__((address(0x40AF))); + + +extern volatile __bit G3RIS9 __attribute__((address(0x40B1))); + + +extern volatile __bit G3RSIM0 __attribute__((address(0x40B8))); + + +extern volatile __bit G3RSIM1 __attribute__((address(0x40B9))); + + +extern volatile __bit G3RSIM11 __attribute__((address(0x40C3))); + + +extern volatile __bit G3RSIM12 __attribute__((address(0x40C4))); + + +extern volatile __bit G3RSIM13 __attribute__((address(0x40C5))); + + +extern volatile __bit G3RSIM14 __attribute__((address(0x40C6))); + + +extern volatile __bit G3RSIM15 __attribute__((address(0x40C7))); + + +extern volatile __bit G3RSIM2 __attribute__((address(0x40BA))); + + +extern volatile __bit G3RSIM3 __attribute__((address(0x40BB))); + + +extern volatile __bit G3RSIM4 __attribute__((address(0x40BC))); + + +extern volatile __bit G3RSIM5 __attribute__((address(0x40BD))); + + +extern volatile __bit G3RSIM6 __attribute__((address(0x40BE))); + + +extern volatile __bit G3RSIM7 __attribute__((address(0x40BF))); + + +extern volatile __bit G3RSIM9 __attribute__((address(0x40C1))); + + +extern volatile __bit G3SDATA __attribute__((address(0x40FC))); + + +extern volatile __bit G3SDATB __attribute__((address(0x40FD))); + + +extern volatile __bit G3SDATC __attribute__((address(0x40FE))); + + +extern volatile __bit G3SDATD __attribute__((address(0x40FF))); + + +extern volatile __bit G3STRA __attribute__((address(0x40F8))); + + +extern volatile __bit G3STRB __attribute__((address(0x40F9))); + + +extern volatile __bit G3STRC __attribute__((address(0x40FA))); + + +extern volatile __bit G3STRD __attribute__((address(0x40FB))); + + +extern volatile __bit GCEN __attribute__((address(0x10B7))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit HFIOFL __attribute__((address(0x4E3))); + + +extern volatile __bit HFIOFR __attribute__((address(0x4E4))); + + +extern volatile __bit HFIOFS __attribute__((address(0x4E0))); + + +extern volatile __bit HIDB0 __attribute__((address(0x2068))); + + +extern volatile __bit HIDB1 __attribute__((address(0x2069))); + + +extern volatile __bit INLVA6 __attribute__((address(0x1C66))); + + +extern volatile __bit INLVA7 __attribute__((address(0x1C67))); + + +extern volatile __bit INLVB0 __attribute__((address(0x1C68))); + + +extern volatile __bit INLVB1 __attribute__((address(0x1C69))); + + +extern volatile __bit INLVB2 __attribute__((address(0x1C6A))); + + +extern volatile __bit INLVB3 __attribute__((address(0x1C6B))); + + +extern volatile __bit INLVE3 __attribute__((address(0x1C83))); + + +extern volatile __bit INLVLA0 __attribute__((address(0x1C60))); + + +extern volatile __bit INLVLA1 __attribute__((address(0x1C61))); + + +extern volatile __bit INLVLA2 __attribute__((address(0x1C62))); + + +extern volatile __bit INLVLA3 __attribute__((address(0x1C63))); + + +extern volatile __bit INLVLA4 __attribute__((address(0x1C64))); + + +extern volatile __bit INLVLA5 __attribute__((address(0x1C65))); + + +extern volatile __bit INLVLB4 __attribute__((address(0x1C6C))); + + +extern volatile __bit INLVLB5 __attribute__((address(0x1C6D))); + + +extern volatile __bit INLVLB6 __attribute__((address(0x1C6E))); + + +extern volatile __bit INLVLB7 __attribute__((address(0x1C6F))); + + +extern volatile __bit INLVLC0 __attribute__((address(0x1C70))); + + +extern volatile __bit INLVLC1 __attribute__((address(0x1C71))); + + +extern volatile __bit INLVLC2 __attribute__((address(0x1C72))); + + +extern volatile __bit INLVLC3 __attribute__((address(0x1C73))); + + +extern volatile __bit INLVLC4 __attribute__((address(0x1C74))); + + +extern volatile __bit INLVLC5 __attribute__((address(0x1C75))); + + +extern volatile __bit INLVLC6 __attribute__((address(0x1C76))); + + +extern volatile __bit INLVLC7 __attribute__((address(0x1C77))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x4BE))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IOCAF0 __attribute__((address(0x1C98))); + + +extern volatile __bit IOCAF1 __attribute__((address(0x1C99))); + + +extern volatile __bit IOCAF2 __attribute__((address(0x1C9A))); + + +extern volatile __bit IOCAF3 __attribute__((address(0x1C9B))); + + +extern volatile __bit IOCAF4 __attribute__((address(0x1C9C))); + + +extern volatile __bit IOCAF5 __attribute__((address(0x1C9D))); + + +extern volatile __bit IOCAF6 __attribute__((address(0x1C9E))); + + +extern volatile __bit IOCAF7 __attribute__((address(0x1C9F))); + + +extern volatile __bit IOCAN0 __attribute__((address(0x1C90))); + + +extern volatile __bit IOCAN1 __attribute__((address(0x1C91))); + + +extern volatile __bit IOCAN2 __attribute__((address(0x1C92))); + + +extern volatile __bit IOCAN3 __attribute__((address(0x1C93))); + + +extern volatile __bit IOCAN4 __attribute__((address(0x1C94))); + + +extern volatile __bit IOCAN5 __attribute__((address(0x1C95))); + + +extern volatile __bit IOCAN6 __attribute__((address(0x1C96))); + + +extern volatile __bit IOCAN7 __attribute__((address(0x1C97))); + + +extern volatile __bit IOCAP0 __attribute__((address(0x1C88))); + + +extern volatile __bit IOCAP1 __attribute__((address(0x1C89))); + + +extern volatile __bit IOCAP2 __attribute__((address(0x1C8A))); + + +extern volatile __bit IOCAP3 __attribute__((address(0x1C8B))); + + +extern volatile __bit IOCAP4 __attribute__((address(0x1C8C))); + + +extern volatile __bit IOCAP5 __attribute__((address(0x1C8D))); + + +extern volatile __bit IOCAP6 __attribute__((address(0x1C8E))); + + +extern volatile __bit IOCAP7 __attribute__((address(0x1C8F))); + + +extern volatile __bit IOCBF0 __attribute__((address(0x1CB0))); + + +extern volatile __bit IOCBF1 __attribute__((address(0x1CB1))); + + +extern volatile __bit IOCBF2 __attribute__((address(0x1CB2))); + + +extern volatile __bit IOCBF3 __attribute__((address(0x1CB3))); + + +extern volatile __bit IOCBF4 __attribute__((address(0x1CB4))); + + +extern volatile __bit IOCBF5 __attribute__((address(0x1CB5))); + + +extern volatile __bit IOCBF6 __attribute__((address(0x1CB6))); + + +extern volatile __bit IOCBF7 __attribute__((address(0x1CB7))); + + +extern volatile __bit IOCBN0 __attribute__((address(0x1CA8))); + + +extern volatile __bit IOCBN1 __attribute__((address(0x1CA9))); + + +extern volatile __bit IOCBN2 __attribute__((address(0x1CAA))); + + +extern volatile __bit IOCBN3 __attribute__((address(0x1CAB))); + + +extern volatile __bit IOCBN4 __attribute__((address(0x1CAC))); + + +extern volatile __bit IOCBN5 __attribute__((address(0x1CAD))); + + +extern volatile __bit IOCBN6 __attribute__((address(0x1CAE))); + + +extern volatile __bit IOCBN7 __attribute__((address(0x1CAF))); + + +extern volatile __bit IOCBP0 __attribute__((address(0x1CA0))); + + +extern volatile __bit IOCBP1 __attribute__((address(0x1CA1))); + + +extern volatile __bit IOCBP2 __attribute__((address(0x1CA2))); + + +extern volatile __bit IOCBP3 __attribute__((address(0x1CA3))); + + +extern volatile __bit IOCBP4 __attribute__((address(0x1CA4))); + + +extern volatile __bit IOCBP5 __attribute__((address(0x1CA5))); + + +extern volatile __bit IOCBP6 __attribute__((address(0x1CA6))); + + +extern volatile __bit IOCBP7 __attribute__((address(0x1CA7))); + + +extern volatile __bit IOCCF0 __attribute__((address(0x1CC8))); + + +extern volatile __bit IOCCF1 __attribute__((address(0x1CC9))); + + +extern volatile __bit IOCCF2 __attribute__((address(0x1CCA))); + + +extern volatile __bit IOCCF3 __attribute__((address(0x1CCB))); + + +extern volatile __bit IOCCF4 __attribute__((address(0x1CCC))); + + +extern volatile __bit IOCCF5 __attribute__((address(0x1CCD))); + + +extern volatile __bit IOCCF6 __attribute__((address(0x1CCE))); + + +extern volatile __bit IOCCF7 __attribute__((address(0x1CCF))); + + +extern volatile __bit IOCCN0 __attribute__((address(0x1CC0))); + + +extern volatile __bit IOCCN1 __attribute__((address(0x1CC1))); + + +extern volatile __bit IOCCN2 __attribute__((address(0x1CC2))); + + +extern volatile __bit IOCCN3 __attribute__((address(0x1CC3))); + + +extern volatile __bit IOCCN4 __attribute__((address(0x1CC4))); + + +extern volatile __bit IOCCN5 __attribute__((address(0x1CC5))); + + +extern volatile __bit IOCCN6 __attribute__((address(0x1CC6))); + + +extern volatile __bit IOCCN7 __attribute__((address(0x1CC7))); + + +extern volatile __bit IOCCP0 __attribute__((address(0x1CB8))); + + +extern volatile __bit IOCCP1 __attribute__((address(0x1CB9))); + + +extern volatile __bit IOCCP2 __attribute__((address(0x1CBA))); + + +extern volatile __bit IOCCP3 __attribute__((address(0x1CBB))); + + +extern volatile __bit IOCCP4 __attribute__((address(0x1CBC))); + + +extern volatile __bit IOCCP5 __attribute__((address(0x1CBD))); + + +extern volatile __bit IOCCP6 __attribute__((address(0x1CBE))); + + +extern volatile __bit IOCCP7 __attribute__((address(0x1CBF))); + + +extern volatile __bit IOCEF3 __attribute__((address(0x1CFB))); + + +extern volatile __bit IOCEN3 __attribute__((address(0x1CF3))); + + +extern volatile __bit IOCEP3 __attribute__((address(0x1CEB))); + + +extern volatile __bit IOCIE __attribute__((address(0x5B))); + + +extern volatile __bit IOCIF __attribute__((address(0x58))); + + +extern volatile __bit IRCF0 __attribute__((address(0x4DB))); + + +extern volatile __bit IRCF1 __attribute__((address(0x4DC))); + + +extern volatile __bit IRCF2 __attribute__((address(0x4DD))); + + +extern volatile __bit IRCF3 __attribute__((address(0x4DE))); + + +extern volatile __bit LATA0 __attribute__((address(0x860))); + + +extern volatile __bit LATA1 __attribute__((address(0x861))); + + +extern volatile __bit LATA2 __attribute__((address(0x862))); + + +extern volatile __bit LATA3 __attribute__((address(0x863))); + + +extern volatile __bit LATA4 __attribute__((address(0x864))); + + +extern volatile __bit LATA5 __attribute__((address(0x865))); + + +extern volatile __bit LATA6 __attribute__((address(0x866))); + + +extern volatile __bit LATA7 __attribute__((address(0x867))); + + +extern volatile __bit LATB0 __attribute__((address(0x868))); + + +extern volatile __bit LATB1 __attribute__((address(0x869))); + + +extern volatile __bit LATB2 __attribute__((address(0x86A))); + + +extern volatile __bit LATB3 __attribute__((address(0x86B))); + + +extern volatile __bit LATB4 __attribute__((address(0x86C))); + + +extern volatile __bit LATB5 __attribute__((address(0x86D))); + + +extern volatile __bit LATB6 __attribute__((address(0x86E))); + + +extern volatile __bit LATB7 __attribute__((address(0x86F))); + + +extern volatile __bit LATC0 __attribute__((address(0x870))); + + +extern volatile __bit LATC1 __attribute__((address(0x871))); + + +extern volatile __bit LATC2 __attribute__((address(0x872))); + + +extern volatile __bit LATC3 __attribute__((address(0x873))); + + +extern volatile __bit LATC4 __attribute__((address(0x874))); + + +extern volatile __bit LATC5 __attribute__((address(0x875))); + + +extern volatile __bit LATC6 __attribute__((address(0x876))); + + +extern volatile __bit LATC7 __attribute__((address(0x877))); + + +extern volatile __bit LC1D1S0 __attribute__((address(0x7890))); + + +extern volatile __bit LC1D1S1 __attribute__((address(0x7891))); + + +extern volatile __bit LC1D1S2 __attribute__((address(0x7892))); + + +extern volatile __bit LC1D1S3 __attribute__((address(0x7893))); + + +extern volatile __bit LC1D1S4 __attribute__((address(0x7894))); + + +extern volatile __bit LC1D1S5 __attribute__((address(0x7895))); + + +extern volatile __bit LC1D2S0 __attribute__((address(0x7898))); + + +extern volatile __bit LC1D2S1 __attribute__((address(0x7899))); + + +extern volatile __bit LC1D2S2 __attribute__((address(0x789A))); + + +extern volatile __bit LC1D2S3 __attribute__((address(0x789B))); + + +extern volatile __bit LC1D2S4 __attribute__((address(0x789C))); + + +extern volatile __bit LC1D2S5 __attribute__((address(0x789D))); + + +extern volatile __bit LC1D3S0 __attribute__((address(0x78A0))); + + +extern volatile __bit LC1D3S1 __attribute__((address(0x78A1))); + + +extern volatile __bit LC1D3S2 __attribute__((address(0x78A2))); + + +extern volatile __bit LC1D3S3 __attribute__((address(0x78A3))); + + +extern volatile __bit LC1D3S4 __attribute__((address(0x78A4))); + + +extern volatile __bit LC1D3S5 __attribute__((address(0x78A5))); + + +extern volatile __bit LC1D4S0 __attribute__((address(0x78A8))); + + +extern volatile __bit LC1D4S1 __attribute__((address(0x78A9))); + + +extern volatile __bit LC1D4S2 __attribute__((address(0x78AA))); + + +extern volatile __bit LC1D4S3 __attribute__((address(0x78AB))); + + +extern volatile __bit LC1D4S4 __attribute__((address(0x78AC))); + + +extern volatile __bit LC1D4S5 __attribute__((address(0x78AD))); + + +extern volatile __bit LC1EN __attribute__((address(0x7887))); + + +extern volatile __bit LC1G1D1N __attribute__((address(0x78B0))); + + +extern volatile __bit LC1G1D1T __attribute__((address(0x78B1))); + + +extern volatile __bit LC1G1D2N __attribute__((address(0x78B2))); + + +extern volatile __bit LC1G1D2T __attribute__((address(0x78B3))); + + +extern volatile __bit LC1G1D3N __attribute__((address(0x78B4))); + + +extern volatile __bit LC1G1D3T __attribute__((address(0x78B5))); + + +extern volatile __bit LC1G1D4N __attribute__((address(0x78B6))); + + +extern volatile __bit LC1G1D4T __attribute__((address(0x78B7))); + + +extern volatile __bit LC1G1POL __attribute__((address(0x7888))); + + +extern volatile __bit LC1G2D1N __attribute__((address(0x78B8))); + + +extern volatile __bit LC1G2D1T __attribute__((address(0x78B9))); + + +extern volatile __bit LC1G2D2N __attribute__((address(0x78BA))); + + +extern volatile __bit LC1G2D2T __attribute__((address(0x78BB))); + + +extern volatile __bit LC1G2D3N __attribute__((address(0x78BC))); + + +extern volatile __bit LC1G2D3T __attribute__((address(0x78BD))); + + +extern volatile __bit LC1G2D4N __attribute__((address(0x78BE))); + + +extern volatile __bit LC1G2D4T __attribute__((address(0x78BF))); + + +extern volatile __bit LC1G2POL __attribute__((address(0x7889))); + + +extern volatile __bit LC1G3D1N __attribute__((address(0x78C0))); + + +extern volatile __bit LC1G3D1T __attribute__((address(0x78C1))); + + +extern volatile __bit LC1G3D2N __attribute__((address(0x78C2))); + + +extern volatile __bit LC1G3D2T __attribute__((address(0x78C3))); + + +extern volatile __bit LC1G3D3N __attribute__((address(0x78C4))); + + +extern volatile __bit LC1G3D3T __attribute__((address(0x78C5))); + + +extern volatile __bit LC1G3D4N __attribute__((address(0x78C6))); + + +extern volatile __bit LC1G3D4T __attribute__((address(0x78C7))); + + +extern volatile __bit LC1G3POL __attribute__((address(0x788A))); + + +extern volatile __bit LC1G4D1N __attribute__((address(0x78C8))); + + +extern volatile __bit LC1G4D1T __attribute__((address(0x78C9))); + + +extern volatile __bit LC1G4D2N __attribute__((address(0x78CA))); + + +extern volatile __bit LC1G4D2T __attribute__((address(0x78CB))); + + +extern volatile __bit LC1G4D3N __attribute__((address(0x78CC))); + + +extern volatile __bit LC1G4D3T __attribute__((address(0x78CD))); + + +extern volatile __bit LC1G4D4N __attribute__((address(0x78CE))); + + +extern volatile __bit LC1G4D4T __attribute__((address(0x78CF))); + + +extern volatile __bit LC1G4POL __attribute__((address(0x788B))); + + +extern volatile __bit LC1INTN __attribute__((address(0x7883))); + + +extern volatile __bit LC1INTP __attribute__((address(0x7884))); + + +extern volatile __bit LC1MODE0 __attribute__((address(0x7880))); + + +extern volatile __bit LC1MODE1 __attribute__((address(0x7881))); + + +extern volatile __bit LC1MODE2 __attribute__((address(0x7882))); + + +extern volatile __bit LC1OUT __attribute__((address(0x7885))); + + +extern volatile __bit LC1POL __attribute__((address(0x788F))); + + +extern volatile __bit LC2D1S0 __attribute__((address(0x78E0))); + + +extern volatile __bit LC2D1S1 __attribute__((address(0x78E1))); + + +extern volatile __bit LC2D1S2 __attribute__((address(0x78E2))); + + +extern volatile __bit LC2D1S3 __attribute__((address(0x78E3))); + + +extern volatile __bit LC2D1S4 __attribute__((address(0x78E4))); + + +extern volatile __bit LC2D1S5 __attribute__((address(0x78E5))); + + +extern volatile __bit LC2D2S0 __attribute__((address(0x78E8))); + + +extern volatile __bit LC2D2S1 __attribute__((address(0x78E9))); + + +extern volatile __bit LC2D2S2 __attribute__((address(0x78EA))); + + +extern volatile __bit LC2D2S3 __attribute__((address(0x78EB))); + + +extern volatile __bit LC2D2S4 __attribute__((address(0x78EC))); + + +extern volatile __bit LC2D2S5 __attribute__((address(0x78ED))); + + +extern volatile __bit LC2D3S0 __attribute__((address(0x78F0))); + + +extern volatile __bit LC2D3S1 __attribute__((address(0x78F1))); + + +extern volatile __bit LC2D3S2 __attribute__((address(0x78F2))); + + +extern volatile __bit LC2D3S3 __attribute__((address(0x78F3))); + + +extern volatile __bit LC2D3S4 __attribute__((address(0x78F4))); + + +extern volatile __bit LC2D3S5 __attribute__((address(0x78F5))); + + +extern volatile __bit LC2D4S0 __attribute__((address(0x78F8))); + + +extern volatile __bit LC2D4S1 __attribute__((address(0x78F9))); + + +extern volatile __bit LC2D4S2 __attribute__((address(0x78FA))); + + +extern volatile __bit LC2D4S3 __attribute__((address(0x78FB))); + + +extern volatile __bit LC2D4S4 __attribute__((address(0x78FC))); + + +extern volatile __bit LC2D4S5 __attribute__((address(0x78FD))); + + +extern volatile __bit LC2EN __attribute__((address(0x78D7))); + + +extern volatile __bit LC2G1D1N __attribute__((address(0x7900))); + + +extern volatile __bit LC2G1D1T __attribute__((address(0x7901))); + + +extern volatile __bit LC2G1D2N __attribute__((address(0x7902))); + + +extern volatile __bit LC2G1D2T __attribute__((address(0x7903))); + + +extern volatile __bit LC2G1D3N __attribute__((address(0x7904))); + + +extern volatile __bit LC2G1D3T __attribute__((address(0x7905))); + + +extern volatile __bit LC2G1D4N __attribute__((address(0x7906))); + + +extern volatile __bit LC2G1D4T __attribute__((address(0x7907))); + + +extern volatile __bit LC2G1POL __attribute__((address(0x78D8))); + + +extern volatile __bit LC2G2D1N __attribute__((address(0x7908))); + + +extern volatile __bit LC2G2D1T __attribute__((address(0x7909))); + + +extern volatile __bit LC2G2D2N __attribute__((address(0x790A))); + + +extern volatile __bit LC2G2D2T __attribute__((address(0x790B))); + + +extern volatile __bit LC2G2D3N __attribute__((address(0x790C))); + + +extern volatile __bit LC2G2D3T __attribute__((address(0x790D))); + + +extern volatile __bit LC2G2D4N __attribute__((address(0x790E))); + + +extern volatile __bit LC2G2D4T __attribute__((address(0x790F))); + + +extern volatile __bit LC2G2POL __attribute__((address(0x78D9))); + + +extern volatile __bit LC2G3D1N __attribute__((address(0x7910))); + + +extern volatile __bit LC2G3D1T __attribute__((address(0x7911))); + + +extern volatile __bit LC2G3D2N __attribute__((address(0x7912))); + + +extern volatile __bit LC2G3D2T __attribute__((address(0x7913))); + + +extern volatile __bit LC2G3D3N __attribute__((address(0x7914))); + + +extern volatile __bit LC2G3D3T __attribute__((address(0x7915))); + + +extern volatile __bit LC2G3D4N __attribute__((address(0x7916))); + + +extern volatile __bit LC2G3D4T __attribute__((address(0x7917))); + + +extern volatile __bit LC2G3POL __attribute__((address(0x78DA))); + + +extern volatile __bit LC2G4D1N __attribute__((address(0x7918))); + + +extern volatile __bit LC2G4D1T __attribute__((address(0x7919))); + + +extern volatile __bit LC2G4D2N __attribute__((address(0x791A))); + + +extern volatile __bit LC2G4D2T __attribute__((address(0x791B))); + + +extern volatile __bit LC2G4D3N __attribute__((address(0x791C))); + + +extern volatile __bit LC2G4D3T __attribute__((address(0x791D))); + + +extern volatile __bit LC2G4D4N __attribute__((address(0x791E))); + + +extern volatile __bit LC2G4D4T __attribute__((address(0x791F))); + + +extern volatile __bit LC2G4POL __attribute__((address(0x78DB))); + + +extern volatile __bit LC2INTN __attribute__((address(0x78D3))); + + +extern volatile __bit LC2INTP __attribute__((address(0x78D4))); + + +extern volatile __bit LC2MODE0 __attribute__((address(0x78D0))); + + +extern volatile __bit LC2MODE1 __attribute__((address(0x78D1))); + + +extern volatile __bit LC2MODE2 __attribute__((address(0x78D2))); + + +extern volatile __bit LC2OUT __attribute__((address(0x78D5))); + + +extern volatile __bit LC2POL __attribute__((address(0x78DF))); + + +extern volatile __bit LC3D1S0 __attribute__((address(0x7930))); + + +extern volatile __bit LC3D1S1 __attribute__((address(0x7931))); + + +extern volatile __bit LC3D1S2 __attribute__((address(0x7932))); + + +extern volatile __bit LC3D1S3 __attribute__((address(0x7933))); + + +extern volatile __bit LC3D1S4 __attribute__((address(0x7934))); + + +extern volatile __bit LC3D1S5 __attribute__((address(0x7935))); + + +extern volatile __bit LC3D2S0 __attribute__((address(0x7938))); + + +extern volatile __bit LC3D2S1 __attribute__((address(0x7939))); + + +extern volatile __bit LC3D2S2 __attribute__((address(0x793A))); + + +extern volatile __bit LC3D2S3 __attribute__((address(0x793B))); + + +extern volatile __bit LC3D2S4 __attribute__((address(0x793C))); + + +extern volatile __bit LC3D2S5 __attribute__((address(0x793D))); + + +extern volatile __bit LC3D3S0 __attribute__((address(0x7940))); + + +extern volatile __bit LC3D3S1 __attribute__((address(0x7941))); + + +extern volatile __bit LC3D3S2 __attribute__((address(0x7942))); + + +extern volatile __bit LC3D3S3 __attribute__((address(0x7943))); + + +extern volatile __bit LC3D3S4 __attribute__((address(0x7944))); + + +extern volatile __bit LC3D3S5 __attribute__((address(0x7945))); + + +extern volatile __bit LC3D4S0 __attribute__((address(0x7948))); + + +extern volatile __bit LC3D4S1 __attribute__((address(0x7949))); + + +extern volatile __bit LC3D4S2 __attribute__((address(0x794A))); + + +extern volatile __bit LC3D4S3 __attribute__((address(0x794B))); + + +extern volatile __bit LC3D4S4 __attribute__((address(0x794C))); + + +extern volatile __bit LC3D4S5 __attribute__((address(0x794D))); + + +extern volatile __bit LC3EN __attribute__((address(0x7927))); + + +extern volatile __bit LC3G1D1N __attribute__((address(0x7950))); + + +extern volatile __bit LC3G1D1T __attribute__((address(0x7951))); + + +extern volatile __bit LC3G1D2N __attribute__((address(0x7952))); + + +extern volatile __bit LC3G1D2T __attribute__((address(0x7953))); + + +extern volatile __bit LC3G1D3N __attribute__((address(0x7954))); + + +extern volatile __bit LC3G1D3T __attribute__((address(0x7955))); + + +extern volatile __bit LC3G1D4N __attribute__((address(0x7956))); + + +extern volatile __bit LC3G1D4T __attribute__((address(0x7957))); + + +extern volatile __bit LC3G1POL __attribute__((address(0x7928))); + + +extern volatile __bit LC3G2D1N __attribute__((address(0x7958))); + + +extern volatile __bit LC3G2D1T __attribute__((address(0x7959))); + + +extern volatile __bit LC3G2D2N __attribute__((address(0x795A))); + + +extern volatile __bit LC3G2D2T __attribute__((address(0x795B))); + + +extern volatile __bit LC3G2D3N __attribute__((address(0x795C))); + + +extern volatile __bit LC3G2D3T __attribute__((address(0x795D))); + + +extern volatile __bit LC3G2D4N __attribute__((address(0x795E))); + + +extern volatile __bit LC3G2D4T __attribute__((address(0x795F))); + + +extern volatile __bit LC3G2POL __attribute__((address(0x7929))); + + +extern volatile __bit LC3G3D1N __attribute__((address(0x7960))); + + +extern volatile __bit LC3G3D1T __attribute__((address(0x7961))); + + +extern volatile __bit LC3G3D2N __attribute__((address(0x7962))); + + +extern volatile __bit LC3G3D2T __attribute__((address(0x7963))); + + +extern volatile __bit LC3G3D3N __attribute__((address(0x7964))); + + +extern volatile __bit LC3G3D3T __attribute__((address(0x7965))); + + +extern volatile __bit LC3G3D4N __attribute__((address(0x7966))); + + +extern volatile __bit LC3G3D4T __attribute__((address(0x7967))); + + +extern volatile __bit LC3G3POL __attribute__((address(0x792A))); + + +extern volatile __bit LC3G4D1N __attribute__((address(0x7968))); + + +extern volatile __bit LC3G4D1T __attribute__((address(0x7969))); + + +extern volatile __bit LC3G4D2N __attribute__((address(0x796A))); + + +extern volatile __bit LC3G4D2T __attribute__((address(0x796B))); + + +extern volatile __bit LC3G4D3N __attribute__((address(0x796C))); + + +extern volatile __bit LC3G4D3T __attribute__((address(0x796D))); + + +extern volatile __bit LC3G4D4N __attribute__((address(0x796E))); + + +extern volatile __bit LC3G4D4T __attribute__((address(0x796F))); + + +extern volatile __bit LC3G4POL __attribute__((address(0x792B))); + + +extern volatile __bit LC3INTN __attribute__((address(0x7923))); + + +extern volatile __bit LC3INTP __attribute__((address(0x7924))); + + +extern volatile __bit LC3MODE0 __attribute__((address(0x7920))); + + +extern volatile __bit LC3MODE1 __attribute__((address(0x7921))); + + +extern volatile __bit LC3MODE2 __attribute__((address(0x7922))); + + +extern volatile __bit LC3OUT __attribute__((address(0x7925))); + + +extern volatile __bit LC3POL __attribute__((address(0x792F))); + + +extern volatile __bit LC4D1S0 __attribute__((address(0x7980))); + + +extern volatile __bit LC4D1S1 __attribute__((address(0x7981))); + + +extern volatile __bit LC4D1S2 __attribute__((address(0x7982))); + + +extern volatile __bit LC4D1S3 __attribute__((address(0x7983))); + + +extern volatile __bit LC4D1S4 __attribute__((address(0x7984))); + + +extern volatile __bit LC4D1S5 __attribute__((address(0x7985))); + + +extern volatile __bit LC4D2S0 __attribute__((address(0x7988))); + + +extern volatile __bit LC4D2S1 __attribute__((address(0x7989))); + + +extern volatile __bit LC4D2S2 __attribute__((address(0x798A))); + + +extern volatile __bit LC4D2S3 __attribute__((address(0x798B))); + + +extern volatile __bit LC4D2S4 __attribute__((address(0x798C))); + + +extern volatile __bit LC4D2S5 __attribute__((address(0x798D))); + + +extern volatile __bit LC4D3S0 __attribute__((address(0x7990))); + + +extern volatile __bit LC4D3S1 __attribute__((address(0x7991))); + + +extern volatile __bit LC4D3S2 __attribute__((address(0x7992))); + + +extern volatile __bit LC4D3S3 __attribute__((address(0x7993))); + + +extern volatile __bit LC4D3S4 __attribute__((address(0x7994))); + + +extern volatile __bit LC4D3S5 __attribute__((address(0x7995))); + + +extern volatile __bit LC4D4S0 __attribute__((address(0x7998))); + + +extern volatile __bit LC4D4S1 __attribute__((address(0x7999))); + + +extern volatile __bit LC4D4S2 __attribute__((address(0x799A))); + + +extern volatile __bit LC4D4S3 __attribute__((address(0x799B))); + + +extern volatile __bit LC4D4S4 __attribute__((address(0x799C))); + + +extern volatile __bit LC4D4S5 __attribute__((address(0x799D))); + + +extern volatile __bit LC4EN __attribute__((address(0x7977))); + + +extern volatile __bit LC4G1D1N __attribute__((address(0x79A0))); + + +extern volatile __bit LC4G1D1T __attribute__((address(0x79A1))); + + +extern volatile __bit LC4G1D2N __attribute__((address(0x79A2))); + + +extern volatile __bit LC4G1D2T __attribute__((address(0x79A3))); + + +extern volatile __bit LC4G1D3N __attribute__((address(0x79A4))); + + +extern volatile __bit LC4G1D3T __attribute__((address(0x79A5))); + + +extern volatile __bit LC4G1D4N __attribute__((address(0x79A6))); + + +extern volatile __bit LC4G1D4T __attribute__((address(0x79A7))); + + +extern volatile __bit LC4G1POL __attribute__((address(0x7978))); + + +extern volatile __bit LC4G2D1N __attribute__((address(0x79A8))); + + +extern volatile __bit LC4G2D1T __attribute__((address(0x79A9))); + + +extern volatile __bit LC4G2D2N __attribute__((address(0x79AA))); + + +extern volatile __bit LC4G2D2T __attribute__((address(0x79AB))); + + +extern volatile __bit LC4G2D3N __attribute__((address(0x79AC))); + + +extern volatile __bit LC4G2D3T __attribute__((address(0x79AD))); + + +extern volatile __bit LC4G2D4N __attribute__((address(0x79AE))); + + +extern volatile __bit LC4G2D4T __attribute__((address(0x79AF))); + + +extern volatile __bit LC4G2POL __attribute__((address(0x7979))); + + +extern volatile __bit LC4G3D1N __attribute__((address(0x79B0))); + + +extern volatile __bit LC4G3D1T __attribute__((address(0x79B1))); + + +extern volatile __bit LC4G3D2N __attribute__((address(0x79B2))); + + +extern volatile __bit LC4G3D2T __attribute__((address(0x79B3))); + + +extern volatile __bit LC4G3D3N __attribute__((address(0x79B4))); + + +extern volatile __bit LC4G3D3T __attribute__((address(0x79B5))); + + +extern volatile __bit LC4G3D4N __attribute__((address(0x79B6))); + + +extern volatile __bit LC4G3D4T __attribute__((address(0x79B7))); + + +extern volatile __bit LC4G3POL __attribute__((address(0x797A))); + + +extern volatile __bit LC4G4D1N __attribute__((address(0x79B8))); + + +extern volatile __bit LC4G4D1T __attribute__((address(0x79B9))); + + +extern volatile __bit LC4G4D2N __attribute__((address(0x79BA))); + + +extern volatile __bit LC4G4D2T __attribute__((address(0x79BB))); + + +extern volatile __bit LC4G4D3N __attribute__((address(0x79BC))); + + +extern volatile __bit LC4G4D3T __attribute__((address(0x79BD))); + + +extern volatile __bit LC4G4D4N __attribute__((address(0x79BE))); + + +extern volatile __bit LC4G4D4T __attribute__((address(0x79BF))); + + +extern volatile __bit LC4G4POL __attribute__((address(0x797B))); + + +extern volatile __bit LC4INTN __attribute__((address(0x7973))); + + +extern volatile __bit LC4INTP __attribute__((address(0x7974))); + + +extern volatile __bit LC4MODE0 __attribute__((address(0x7970))); + + +extern volatile __bit LC4MODE1 __attribute__((address(0x7971))); + + +extern volatile __bit LC4MODE2 __attribute__((address(0x7972))); + + +extern volatile __bit LC4OUT __attribute__((address(0x7975))); + + +extern volatile __bit LC4POL __attribute__((address(0x797F))); + + +extern volatile __bit LFIOFR __attribute__((address(0x4E1))); + + +extern volatile __bit LWLO __attribute__((address(0xCAD))); + + +extern volatile __bit MC1OUT __attribute__((address(0x888))); + + +extern volatile __bit MC2OUT __attribute__((address(0x889))); + + +extern volatile __bit MC3OUT __attribute__((address(0x88A))); + + +extern volatile __bit MC4OUT __attribute__((address(0x88B))); + + +extern volatile __bit MC5OUT __attribute__((address(0x88C))); + + +extern volatile __bit MC6OUT __attribute__((address(0x88D))); + + +extern volatile __bit MCLC1OUT __attribute__((address(0x7878))); + + +extern volatile __bit MCLC2OUT __attribute__((address(0x7879))); + + +extern volatile __bit MCLC3OUT __attribute__((address(0x787A))); + + +extern volatile __bit MD1BIT __attribute__((address(0x18A8))); + + +extern volatile __bit MD1CH0 __attribute__((address(0x18C8))); + + +extern volatile __bit MD1CH1 __attribute__((address(0x18C9))); + + +extern volatile __bit MD1CH2 __attribute__((address(0x18CA))); + + +extern volatile __bit MD1CH3 __attribute__((address(0x18CB))); + + +extern volatile __bit MD1CH4 __attribute__((address(0x18CC))); + + +extern volatile __bit MD1CHPOL __attribute__((address(0x18B5))); + + +extern volatile __bit MD1CHSYNC __attribute__((address(0x18B4))); + + +extern volatile __bit MD1CL0 __attribute__((address(0x18C0))); + + +extern volatile __bit MD1CL1 __attribute__((address(0x18C1))); + + +extern volatile __bit MD1CL2 __attribute__((address(0x18C2))); + + +extern volatile __bit MD1CL3 __attribute__((address(0x18C3))); + + +extern volatile __bit MD1CL4 __attribute__((address(0x18C4))); + + +extern volatile __bit MD1CLPOL __attribute__((address(0x18B1))); + + +extern volatile __bit MD1CLSYNC __attribute__((address(0x18B0))); + + +extern volatile __bit MD1EN __attribute__((address(0x18AF))); + + +extern volatile __bit MD1MS0 __attribute__((address(0x18B8))); + + +extern volatile __bit MD1MS1 __attribute__((address(0x18B9))); + + +extern volatile __bit MD1MS2 __attribute__((address(0x18BA))); + + +extern volatile __bit MD1MS3 __attribute__((address(0x18BB))); + + +extern volatile __bit MD1MS4 __attribute__((address(0x18BC))); + + +extern volatile __bit MD1OPOL __attribute__((address(0x18AC))); + + +extern volatile __bit MD1OUT __attribute__((address(0x18AD))); + + +extern volatile __bit MD2BIT __attribute__((address(0x18D8))); + + +extern volatile __bit MD2CH0 __attribute__((address(0x18F8))); + + +extern volatile __bit MD2CH1 __attribute__((address(0x18F9))); + + +extern volatile __bit MD2CH2 __attribute__((address(0x18FA))); + + +extern volatile __bit MD2CH3 __attribute__((address(0x18FB))); + + +extern volatile __bit MD2CH4 __attribute__((address(0x18FC))); + + +extern volatile __bit MD2CHPOL __attribute__((address(0x18E5))); + + +extern volatile __bit MD2CHSYNC __attribute__((address(0x18E4))); + + +extern volatile __bit MD2CL0 __attribute__((address(0x18F0))); + + +extern volatile __bit MD2CL1 __attribute__((address(0x18F1))); + + +extern volatile __bit MD2CL2 __attribute__((address(0x18F2))); + + +extern volatile __bit MD2CL3 __attribute__((address(0x18F3))); + + +extern volatile __bit MD2CL4 __attribute__((address(0x18F4))); + + +extern volatile __bit MD2CLPOL __attribute__((address(0x18E1))); + + +extern volatile __bit MD2CLSYNC __attribute__((address(0x18E0))); + + +extern volatile __bit MD2EN __attribute__((address(0x18DF))); + + +extern volatile __bit MD2MS0 __attribute__((address(0x18E8))); + + +extern volatile __bit MD2MS1 __attribute__((address(0x18E9))); + + +extern volatile __bit MD2MS2 __attribute__((address(0x18EA))); + + +extern volatile __bit MD2MS3 __attribute__((address(0x18EB))); + + +extern volatile __bit MD2MS4 __attribute__((address(0x18EC))); + + +extern volatile __bit MD2OPOL __attribute__((address(0x18DC))); + + +extern volatile __bit MD2OUT __attribute__((address(0x18DD))); + + +extern volatile __bit MD3BIT __attribute__((address(0x10D8))); + + +extern volatile __bit MD3CH0 __attribute__((address(0x10F8))); + + +extern volatile __bit MD3CH1 __attribute__((address(0x10F9))); + + +extern volatile __bit MD3CH2 __attribute__((address(0x10FA))); + + +extern volatile __bit MD3CH3 __attribute__((address(0x10FB))); + + +extern volatile __bit MD3CH4 __attribute__((address(0x10FC))); + + +extern volatile __bit MD3CHPOL __attribute__((address(0x10E5))); + + +extern volatile __bit MD3CHSYNC __attribute__((address(0x10E4))); + + +extern volatile __bit MD3CL0 __attribute__((address(0x10F0))); + + +extern volatile __bit MD3CL1 __attribute__((address(0x10F1))); + + +extern volatile __bit MD3CL2 __attribute__((address(0x10F2))); + + +extern volatile __bit MD3CL3 __attribute__((address(0x10F3))); + + +extern volatile __bit MD3CL4 __attribute__((address(0x10F4))); + + +extern volatile __bit MD3CLPOL __attribute__((address(0x10E1))); + + +extern volatile __bit MD3CLSYNC __attribute__((address(0x10E0))); + + +extern volatile __bit MD3EN __attribute__((address(0x10DF))); + + +extern volatile __bit MD3MS0 __attribute__((address(0x10E8))); + + +extern volatile __bit MD3MS1 __attribute__((address(0x10E9))); + + +extern volatile __bit MD3MS2 __attribute__((address(0x10EA))); + + +extern volatile __bit MD3MS3 __attribute__((address(0x10EB))); + + +extern volatile __bit MD3MS4 __attribute__((address(0x10EC))); + + +extern volatile __bit MD3OPOL __attribute__((address(0x10DC))); + + +extern volatile __bit MD3OUT __attribute__((address(0x10DD))); + + +extern volatile __bit MFIOFR __attribute__((address(0x4E2))); + + +extern volatile __bit MLC4OUT __attribute__((address(0x787B))); + + +extern volatile __bit MPWM11EN __attribute__((address(0x6C72))); + + +extern volatile __bit MPWM11LD __attribute__((address(0x6C7A))); + + +extern volatile __bit MPWM11OUT __attribute__((address(0x6C82))); + + +extern volatile __bit MPWM5EN __attribute__((address(0x6C70))); + + +extern volatile __bit MPWM5LD __attribute__((address(0x6C78))); + + +extern volatile __bit MPWM5OUT __attribute__((address(0x6C80))); + + +extern volatile __bit MPWM6EN __attribute__((address(0x6C71))); + + +extern volatile __bit MPWM6LD __attribute__((address(0x6C79))); + + +extern volatile __bit MPWM6OUT __attribute__((address(0x6C81))); + + +extern volatile __bit MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit ODA4 __attribute__((address(0x1464))); + + +extern volatile __bit ODA5 __attribute__((address(0x1465))); + + +extern volatile __bit ODA6 __attribute__((address(0x1466))); + + +extern volatile __bit ODA7 __attribute__((address(0x1467))); + + +extern volatile __bit ODB4 __attribute__((address(0x146C))); + + +extern volatile __bit ODB5 __attribute__((address(0x146D))); + + +extern volatile __bit ODB6 __attribute__((address(0x146E))); + + +extern volatile __bit ODB7 __attribute__((address(0x146F))); + + +extern volatile __bit ODC0 __attribute__((address(0x1470))); + + +extern volatile __bit ODC1 __attribute__((address(0x1471))); + + +extern volatile __bit ODC2 __attribute__((address(0x1472))); + + +extern volatile __bit ODC3 __attribute__((address(0x1473))); + + +extern volatile __bit ODC4 __attribute__((address(0x1474))); + + +extern volatile __bit ODC5 __attribute__((address(0x1475))); + + +extern volatile __bit ODC6 __attribute__((address(0x1476))); + + +extern volatile __bit ODC7 __attribute__((address(0x1477))); + + +extern volatile __bit OERR __attribute__((address(0xCE9))); + + +extern volatile __bit OPA1EN __attribute__((address(0x288F))); + + +extern volatile __bit OPA1ORM0 __attribute__((address(0x2888))); + + +extern volatile __bit OPA1ORM1 __attribute__((address(0x2889))); + + +extern volatile __bit OPA1ORPOL __attribute__((address(0x288A))); + + +extern volatile __bit OPA1UG __attribute__((address(0x288C))); + + +extern volatile __bit OPA2EN __attribute__((address(0x28AF))); + + +extern volatile __bit OPA2ORM0 __attribute__((address(0x28A8))); + + +extern volatile __bit OPA2ORM1 __attribute__((address(0x28A9))); + + +extern volatile __bit OPA2ORPOL __attribute__((address(0x28AA))); + + +extern volatile __bit OPA2UG __attribute__((address(0x28AC))); + + +extern volatile __bit OPA3EN __attribute__((address(0x28CF))); + + +extern volatile __bit OPA3ORM0 __attribute__((address(0x28C8))); + + +extern volatile __bit OPA3ORM1 __attribute__((address(0x28C9))); + + +extern volatile __bit OPA3ORPOL __attribute__((address(0x28CA))); + + +extern volatile __bit OPA3SP __attribute__((address(0x28CE))); + + +extern volatile __bit OPA3UG __attribute__((address(0x28CC))); + + +extern volatile __bit OSFIE __attribute__((address(0x497))); + + +extern volatile __bit OSFIF __attribute__((address(0x97))); + + +extern volatile __bit OSTS __attribute__((address(0x4E5))); + + +extern volatile __bit P1M1 __attribute__((address(0x149F))); + + +extern volatile __bit P2M1 __attribute__((address(0x14BF))); + + +extern volatile __bit P3TSEL0 __attribute__((address(0x14F8))); + + +extern volatile __bit P3TSEL1 __attribute__((address(0x14F9))); + + +extern volatile __bit P4TSEL0 __attribute__((address(0x14FA))); + + +extern volatile __bit P4TSEL1 __attribute__((address(0x14FB))); + + +extern volatile __bit P7M1 __attribute__((address(0x14DF))); + + +extern volatile __bit P9TSEL0 __attribute__((address(0x14FC))); + + +extern volatile __bit P9TSEL1 __attribute__((address(0x14FD))); + + +extern volatile __bit PCIE __attribute__((address(0x10BE))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x10B2))); + + +extern volatile __bit PLLR __attribute__((address(0x4E6))); + + +extern volatile __bit PPSLOCKED __attribute__((address(0x7060))); + + +extern volatile __bit PSA __attribute__((address(0x4BB))); + + +extern volatile __bit PWM11CS0 __attribute__((address(0x6DF0))); + + +extern volatile __bit PWM11CS1 __attribute__((address(0x6DF1))); + + +extern volatile __bit PWM11CS2 __attribute__((address(0x6DF2))); + + +extern volatile __bit PWM11DCH0 __attribute__((address(0x6DA0))); + + +extern volatile __bit PWM11DCH1 __attribute__((address(0x6DA1))); + + +extern volatile __bit PWM11DCH2 __attribute__((address(0x6DA2))); + + +extern volatile __bit PWM11DCH3 __attribute__((address(0x6DA3))); + + +extern volatile __bit PWM11DCH4 __attribute__((address(0x6DA4))); + + +extern volatile __bit PWM11DCH5 __attribute__((address(0x6DA5))); + + +extern volatile __bit PWM11DCH6 __attribute__((address(0x6DA6))); + + +extern volatile __bit PWM11DCH7 __attribute__((address(0x6DA7))); + + +extern volatile __bit PWM11DCIE __attribute__((address(0x6DE1))); + + +extern volatile __bit PWM11DCIF __attribute__((address(0x6DE9))); + + +extern volatile __bit PWM11DCL0 __attribute__((address(0x6D98))); + + +extern volatile __bit PWM11DCL1 __attribute__((address(0x6D99))); + + +extern volatile __bit PWM11DCL2 __attribute__((address(0x6D9A))); + + +extern volatile __bit PWM11DCL3 __attribute__((address(0x6D9B))); + + +extern volatile __bit PWM11DCL4 __attribute__((address(0x6D9C))); + + +extern volatile __bit PWM11DCL5 __attribute__((address(0x6D9D))); + + +extern volatile __bit PWM11DCL6 __attribute__((address(0x6D9E))); + + +extern volatile __bit PWM11DCL7 __attribute__((address(0x6D9F))); + + +extern volatile __bit PWM11EN __attribute__((address(0x6DDF))); + + +extern volatile __bit PWM11IE __attribute__((address(0x4B2))); + + +extern volatile __bit PWM11IF __attribute__((address(0xB2))); + + +extern volatile __bit PWM11LD __attribute__((address(0x6DFF))); + + +extern volatile __bit PWM11LDM __attribute__((address(0x6DFE))); + + +extern volatile __bit PWM11LDS0 __attribute__((address(0x6DF8))); + + +extern volatile __bit PWM11LDS1 __attribute__((address(0x6DF9))); + + +extern volatile __bit PWM11MODE0 __attribute__((address(0x6DDA))); + + +extern volatile __bit PWM11MODE1 __attribute__((address(0x6DDB))); + + +extern volatile __bit PWM11OFH0 __attribute__((address(0x6DC0))); + + +extern volatile __bit PWM11OFH1 __attribute__((address(0x6DC1))); + + +extern volatile __bit PWM11OFH2 __attribute__((address(0x6DC2))); + + +extern volatile __bit PWM11OFH3 __attribute__((address(0x6DC3))); + + +extern volatile __bit PWM11OFH4 __attribute__((address(0x6DC4))); + + +extern volatile __bit PWM11OFH5 __attribute__((address(0x6DC5))); + + +extern volatile __bit PWM11OFH6 __attribute__((address(0x6DC6))); + + +extern volatile __bit PWM11OFH7 __attribute__((address(0x6DC7))); + + +extern volatile __bit PWM11OFIE __attribute__((address(0x6DE3))); + + +extern volatile __bit PWM11OFIF __attribute__((address(0x6DEB))); + + +extern volatile __bit PWM11OFL0 __attribute__((address(0x6DB8))); + + +extern volatile __bit PWM11OFL1 __attribute__((address(0x6DB9))); + + +extern volatile __bit PWM11OFL2 __attribute__((address(0x6DBA))); + + +extern volatile __bit PWM11OFL3 __attribute__((address(0x6DBB))); + + +extern volatile __bit PWM11OFL4 __attribute__((address(0x6DBC))); + + +extern volatile __bit PWM11OFL5 __attribute__((address(0x6DBD))); + + +extern volatile __bit PWM11OFL6 __attribute__((address(0x6DBE))); + + +extern volatile __bit PWM11OFL7 __attribute__((address(0x6DBF))); + + +extern volatile __bit PWM11OFM0 __attribute__((address(0x6E05))); + + +extern volatile __bit PWM11OFM1 __attribute__((address(0x6E06))); + + +extern volatile __bit PWM11OFMC __attribute__((address(0x6E04))); + + +extern volatile __bit PWM11OFS0 __attribute__((address(0x6E00))); + + +extern volatile __bit PWM11OFS1 __attribute__((address(0x6E01))); + + +extern volatile __bit PWM11OUT __attribute__((address(0x6DDD))); + + +extern volatile __bit PWM11PHH0 __attribute__((address(0x6D90))); + + +extern volatile __bit PWM11PHH1 __attribute__((address(0x6D91))); + + +extern volatile __bit PWM11PHH2 __attribute__((address(0x6D92))); + + +extern volatile __bit PWM11PHH3 __attribute__((address(0x6D93))); + + +extern volatile __bit PWM11PHH4 __attribute__((address(0x6D94))); + + +extern volatile __bit PWM11PHH5 __attribute__((address(0x6D95))); + + +extern volatile __bit PWM11PHH6 __attribute__((address(0x6D96))); + + +extern volatile __bit PWM11PHH7 __attribute__((address(0x6D97))); + + +extern volatile __bit PWM11PHIE __attribute__((address(0x6DE2))); + + +extern volatile __bit PWM11PHIF __attribute__((address(0x6DEA))); + + +extern volatile __bit PWM11PHL0 __attribute__((address(0x6D88))); + + +extern volatile __bit PWM11PHL1 __attribute__((address(0x6D89))); + + +extern volatile __bit PWM11PHL2 __attribute__((address(0x6D8A))); + + +extern volatile __bit PWM11PHL3 __attribute__((address(0x6D8B))); + + +extern volatile __bit PWM11PHL4 __attribute__((address(0x6D8C))); + + +extern volatile __bit PWM11PHL5 __attribute__((address(0x6D8D))); + + +extern volatile __bit PWM11PHL6 __attribute__((address(0x6D8E))); + + +extern volatile __bit PWM11PHL7 __attribute__((address(0x6D8F))); + + +extern volatile __bit PWM11POL __attribute__((address(0x6DDC))); + + +extern volatile __bit PWM11PRH0 __attribute__((address(0x6DB0))); + + +extern volatile __bit PWM11PRH1 __attribute__((address(0x6DB1))); + + +extern volatile __bit PWM11PRH2 __attribute__((address(0x6DB2))); + + +extern volatile __bit PWM11PRH3 __attribute__((address(0x6DB3))); + + +extern volatile __bit PWM11PRH4 __attribute__((address(0x6DB4))); + + +extern volatile __bit PWM11PRH5 __attribute__((address(0x6DB5))); + + +extern volatile __bit PWM11PRH6 __attribute__((address(0x6DB6))); + + +extern volatile __bit PWM11PRH7 __attribute__((address(0x6DB7))); + + +extern volatile __bit PWM11PRIE __attribute__((address(0x6DE0))); + + +extern volatile __bit PWM11PRIF __attribute__((address(0x6DE8))); + + +extern volatile __bit PWM11PRL0 __attribute__((address(0x6DA8))); + + +extern volatile __bit PWM11PRL1 __attribute__((address(0x6DA9))); + + +extern volatile __bit PWM11PRL2 __attribute__((address(0x6DAA))); + + +extern volatile __bit PWM11PRL3 __attribute__((address(0x6DAB))); + + +extern volatile __bit PWM11PRL4 __attribute__((address(0x6DAC))); + + +extern volatile __bit PWM11PRL5 __attribute__((address(0x6DAD))); + + +extern volatile __bit PWM11PRL6 __attribute__((address(0x6DAE))); + + +extern volatile __bit PWM11PRL7 __attribute__((address(0x6DAF))); + + +extern volatile __bit PWM11PS0 __attribute__((address(0x6DF4))); + + +extern volatile __bit PWM11PS1 __attribute__((address(0x6DF5))); + + +extern volatile __bit PWM11PS2 __attribute__((address(0x6DF6))); + + +extern volatile __bit PWM11TMRH0 __attribute__((address(0x6DD0))); + + +extern volatile __bit PWM11TMRH1 __attribute__((address(0x6DD1))); + + +extern volatile __bit PWM11TMRH2 __attribute__((address(0x6DD2))); + + +extern volatile __bit PWM11TMRH3 __attribute__((address(0x6DD3))); + + +extern volatile __bit PWM11TMRH4 __attribute__((address(0x6DD4))); + + +extern volatile __bit PWM11TMRH5 __attribute__((address(0x6DD5))); + + +extern volatile __bit PWM11TMRH6 __attribute__((address(0x6DD6))); + + +extern volatile __bit PWM11TMRH7 __attribute__((address(0x6DD7))); + + +extern volatile __bit PWM11TMRL0 __attribute__((address(0x6DC8))); + + +extern volatile __bit PWM11TMRL1 __attribute__((address(0x6DC9))); + + +extern volatile __bit PWM11TMRL2 __attribute__((address(0x6DCA))); + + +extern volatile __bit PWM11TMRL3 __attribute__((address(0x6DCB))); + + +extern volatile __bit PWM11TMRL4 __attribute__((address(0x6DCC))); + + +extern volatile __bit PWM11TMRL5 __attribute__((address(0x6DCD))); + + +extern volatile __bit PWM11TMRL6 __attribute__((address(0x6DCE))); + + +extern volatile __bit PWM11TMRL7 __attribute__((address(0x6DCF))); + + +extern volatile __bit PWM3DC0 __attribute__((address(0x30A6))); + + +extern volatile __bit PWM3DC1 __attribute__((address(0x30A7))); + + +extern volatile __bit PWM3DC2 __attribute__((address(0x30A8))); + + +extern volatile __bit PWM3DC3 __attribute__((address(0x30A9))); + + +extern volatile __bit PWM3DC4 __attribute__((address(0x30AA))); + + +extern volatile __bit PWM3DC5 __attribute__((address(0x30AB))); + + +extern volatile __bit PWM3DC6 __attribute__((address(0x30AC))); + + +extern volatile __bit PWM3DC7 __attribute__((address(0x30AD))); + + +extern volatile __bit PWM3DC8 __attribute__((address(0x30AE))); + + +extern volatile __bit PWM3DC9 __attribute__((address(0x30AF))); + + +extern volatile __bit PWM3EN __attribute__((address(0x30B7))); + + +extern volatile __bit PWM3OUT __attribute__((address(0x30B5))); + + +extern volatile __bit PWM3POL __attribute__((address(0x30B4))); + + +extern volatile __bit PWM4DC0 __attribute__((address(0x30BE))); + + +extern volatile __bit PWM4DC1 __attribute__((address(0x30BF))); + + +extern volatile __bit PWM4DC2 __attribute__((address(0x30C0))); + + +extern volatile __bit PWM4DC3 __attribute__((address(0x30C1))); + + +extern volatile __bit PWM4DC4 __attribute__((address(0x30C2))); + + +extern volatile __bit PWM4DC5 __attribute__((address(0x30C3))); + + +extern volatile __bit PWM4DC6 __attribute__((address(0x30C4))); + + +extern volatile __bit PWM4DC7 __attribute__((address(0x30C5))); + + +extern volatile __bit PWM4DC8 __attribute__((address(0x30C6))); + + +extern volatile __bit PWM4DC9 __attribute__((address(0x30C7))); + + +extern volatile __bit PWM4EN __attribute__((address(0x30CF))); + + +extern volatile __bit PWM4OUT __attribute__((address(0x30CD))); + + +extern volatile __bit PWM4POL __attribute__((address(0x30CC))); + + +extern volatile __bit PWM5CS0 __attribute__((address(0x6CF0))); + + +extern volatile __bit PWM5CS1 __attribute__((address(0x6CF1))); + + +extern volatile __bit PWM5CS2 __attribute__((address(0x6CF2))); + + +extern volatile __bit PWM5DCH0 __attribute__((address(0x6CA0))); + + +extern volatile __bit PWM5DCH1 __attribute__((address(0x6CA1))); + + +extern volatile __bit PWM5DCH2 __attribute__((address(0x6CA2))); + + +extern volatile __bit PWM5DCH3 __attribute__((address(0x6CA3))); + + +extern volatile __bit PWM5DCH4 __attribute__((address(0x6CA4))); + + +extern volatile __bit PWM5DCH5 __attribute__((address(0x6CA5))); + + +extern volatile __bit PWM5DCH6 __attribute__((address(0x6CA6))); + + +extern volatile __bit PWM5DCH7 __attribute__((address(0x6CA7))); + + +extern volatile __bit PWM5DCIE __attribute__((address(0x6CE1))); + + +extern volatile __bit PWM5DCIF __attribute__((address(0x6CE9))); + + +extern volatile __bit PWM5DCL0 __attribute__((address(0x6C98))); + + +extern volatile __bit PWM5DCL1 __attribute__((address(0x6C99))); + + +extern volatile __bit PWM5DCL2 __attribute__((address(0x6C9A))); + + +extern volatile __bit PWM5DCL3 __attribute__((address(0x6C9B))); + + +extern volatile __bit PWM5DCL4 __attribute__((address(0x6C9C))); + + +extern volatile __bit PWM5DCL5 __attribute__((address(0x6C9D))); + + +extern volatile __bit PWM5DCL6 __attribute__((address(0x6C9E))); + + +extern volatile __bit PWM5DCL7 __attribute__((address(0x6C9F))); + + +extern volatile __bit PWM5EN __attribute__((address(0x6CDF))); + + +extern volatile __bit PWM5IE __attribute__((address(0x4B0))); + + +extern volatile __bit PWM5IF __attribute__((address(0xB0))); + + +extern volatile __bit PWM5LD __attribute__((address(0x6CFF))); + + +extern volatile __bit PWM5LDM __attribute__((address(0x6CFE))); + + +extern volatile __bit PWM5LDS0 __attribute__((address(0x6CF8))); + + +extern volatile __bit PWM5LDS1 __attribute__((address(0x6CF9))); + + +extern volatile __bit PWM5MODE0 __attribute__((address(0x6CDA))); + + +extern volatile __bit PWM5MODE1 __attribute__((address(0x6CDB))); + + +extern volatile __bit PWM5OFH0 __attribute__((address(0x6CC0))); + + +extern volatile __bit PWM5OFH1 __attribute__((address(0x6CC1))); + + +extern volatile __bit PWM5OFH2 __attribute__((address(0x6CC2))); + + +extern volatile __bit PWM5OFH3 __attribute__((address(0x6CC3))); + + +extern volatile __bit PWM5OFH4 __attribute__((address(0x6CC4))); + + +extern volatile __bit PWM5OFH5 __attribute__((address(0x6CC5))); + + +extern volatile __bit PWM5OFH6 __attribute__((address(0x6CC6))); + + +extern volatile __bit PWM5OFH7 __attribute__((address(0x6CC7))); + + +extern volatile __bit PWM5OFIE __attribute__((address(0x6CE3))); + + +extern volatile __bit PWM5OFIF __attribute__((address(0x6CEB))); + + +extern volatile __bit PWM5OFL0 __attribute__((address(0x6CB8))); + + +extern volatile __bit PWM5OFL1 __attribute__((address(0x6CB9))); + + +extern volatile __bit PWM5OFL2 __attribute__((address(0x6CBA))); + + +extern volatile __bit PWM5OFL3 __attribute__((address(0x6CBB))); + + +extern volatile __bit PWM5OFL4 __attribute__((address(0x6CBC))); + + +extern volatile __bit PWM5OFL5 __attribute__((address(0x6CBD))); + + +extern volatile __bit PWM5OFL6 __attribute__((address(0x6CBE))); + + +extern volatile __bit PWM5OFL7 __attribute__((address(0x6CBF))); + + +extern volatile __bit PWM5OFM0 __attribute__((address(0x6D05))); + + +extern volatile __bit PWM5OFM1 __attribute__((address(0x6D06))); + + +extern volatile __bit PWM5OFMC __attribute__((address(0x6D04))); + + +extern volatile __bit PWM5OFS0 __attribute__((address(0x6D00))); + + +extern volatile __bit PWM5OFS1 __attribute__((address(0x6D01))); + + +extern volatile __bit PWM5OUT __attribute__((address(0x6CDD))); + + +extern volatile __bit PWM5PHH0 __attribute__((address(0x6C90))); + + +extern volatile __bit PWM5PHH1 __attribute__((address(0x6C91))); + + +extern volatile __bit PWM5PHH2 __attribute__((address(0x6C92))); + + +extern volatile __bit PWM5PHH3 __attribute__((address(0x6C93))); + + +extern volatile __bit PWM5PHH4 __attribute__((address(0x6C94))); + + +extern volatile __bit PWM5PHH5 __attribute__((address(0x6C95))); + + +extern volatile __bit PWM5PHH6 __attribute__((address(0x6C96))); + + +extern volatile __bit PWM5PHH7 __attribute__((address(0x6C97))); + + +extern volatile __bit PWM5PHIE __attribute__((address(0x6CE2))); + + +extern volatile __bit PWM5PHIF __attribute__((address(0x6CEA))); + + +extern volatile __bit PWM5PHL0 __attribute__((address(0x6C88))); + + +extern volatile __bit PWM5PHL1 __attribute__((address(0x6C89))); + + +extern volatile __bit PWM5PHL2 __attribute__((address(0x6C8A))); + + +extern volatile __bit PWM5PHL3 __attribute__((address(0x6C8B))); + + +extern volatile __bit PWM5PHL4 __attribute__((address(0x6C8C))); + + +extern volatile __bit PWM5PHL5 __attribute__((address(0x6C8D))); + + +extern volatile __bit PWM5PHL6 __attribute__((address(0x6C8E))); + + +extern volatile __bit PWM5PHL7 __attribute__((address(0x6C8F))); + + +extern volatile __bit PWM5POL __attribute__((address(0x6CDC))); + + +extern volatile __bit PWM5PRH0 __attribute__((address(0x6CB0))); + + +extern volatile __bit PWM5PRH1 __attribute__((address(0x6CB1))); + + +extern volatile __bit PWM5PRH2 __attribute__((address(0x6CB2))); + + +extern volatile __bit PWM5PRH3 __attribute__((address(0x6CB3))); + + +extern volatile __bit PWM5PRH4 __attribute__((address(0x6CB4))); + + +extern volatile __bit PWM5PRH5 __attribute__((address(0x6CB5))); + + +extern volatile __bit PWM5PRH6 __attribute__((address(0x6CB6))); + + +extern volatile __bit PWM5PRH7 __attribute__((address(0x6CB7))); + + +extern volatile __bit PWM5PRIE __attribute__((address(0x6CE0))); + + +extern volatile __bit PWM5PRIF __attribute__((address(0x6CE8))); + + +extern volatile __bit PWM5PRL0 __attribute__((address(0x6CA8))); + + +extern volatile __bit PWM5PRL1 __attribute__((address(0x6CA9))); + + +extern volatile __bit PWM5PRL2 __attribute__((address(0x6CAA))); + + +extern volatile __bit PWM5PRL3 __attribute__((address(0x6CAB))); + + +extern volatile __bit PWM5PRL4 __attribute__((address(0x6CAC))); + + +extern volatile __bit PWM5PRL5 __attribute__((address(0x6CAD))); + + +extern volatile __bit PWM5PRL6 __attribute__((address(0x6CAE))); + + +extern volatile __bit PWM5PRL7 __attribute__((address(0x6CAF))); + + +extern volatile __bit PWM5PS0 __attribute__((address(0x6CF4))); + + +extern volatile __bit PWM5PS1 __attribute__((address(0x6CF5))); + + +extern volatile __bit PWM5PS2 __attribute__((address(0x6CF6))); + + +extern volatile __bit PWM5TMRH0 __attribute__((address(0x6CD0))); + + +extern volatile __bit PWM5TMRH1 __attribute__((address(0x6CD1))); + + +extern volatile __bit PWM5TMRH2 __attribute__((address(0x6CD2))); + + +extern volatile __bit PWM5TMRH3 __attribute__((address(0x6CD3))); + + +extern volatile __bit PWM5TMRH4 __attribute__((address(0x6CD4))); + + +extern volatile __bit PWM5TMRH5 __attribute__((address(0x6CD5))); + + +extern volatile __bit PWM5TMRH6 __attribute__((address(0x6CD6))); + + +extern volatile __bit PWM5TMRH7 __attribute__((address(0x6CD7))); + + +extern volatile __bit PWM5TMRL0 __attribute__((address(0x6CC8))); + + +extern volatile __bit PWM5TMRL1 __attribute__((address(0x6CC9))); + + +extern volatile __bit PWM5TMRL2 __attribute__((address(0x6CCA))); + + +extern volatile __bit PWM5TMRL3 __attribute__((address(0x6CCB))); + + +extern volatile __bit PWM5TMRL4 __attribute__((address(0x6CCC))); + + +extern volatile __bit PWM5TMRL5 __attribute__((address(0x6CCD))); + + +extern volatile __bit PWM5TMRL6 __attribute__((address(0x6CCE))); + + +extern volatile __bit PWM5TMRL7 __attribute__((address(0x6CCF))); + + +extern volatile __bit PWM6CS0 __attribute__((address(0x6D70))); + + +extern volatile __bit PWM6CS1 __attribute__((address(0x6D71))); + + +extern volatile __bit PWM6CS2 __attribute__((address(0x6D72))); + + +extern volatile __bit PWM6DCH0 __attribute__((address(0x6D20))); + + +extern volatile __bit PWM6DCH1 __attribute__((address(0x6D21))); + + +extern volatile __bit PWM6DCH2 __attribute__((address(0x6D22))); + + +extern volatile __bit PWM6DCH3 __attribute__((address(0x6D23))); + + +extern volatile __bit PWM6DCH4 __attribute__((address(0x6D24))); + + +extern volatile __bit PWM6DCH5 __attribute__((address(0x6D25))); + + +extern volatile __bit PWM6DCH6 __attribute__((address(0x6D26))); + + +extern volatile __bit PWM6DCH7 __attribute__((address(0x6D27))); + + +extern volatile __bit PWM6DCIE __attribute__((address(0x6D61))); + + +extern volatile __bit PWM6DCIF __attribute__((address(0x6D69))); + + +extern volatile __bit PWM6DCL0 __attribute__((address(0x6D18))); + + +extern volatile __bit PWM6DCL1 __attribute__((address(0x6D19))); + + +extern volatile __bit PWM6DCL2 __attribute__((address(0x6D1A))); + + +extern volatile __bit PWM6DCL3 __attribute__((address(0x6D1B))); + + +extern volatile __bit PWM6DCL4 __attribute__((address(0x6D1C))); + + +extern volatile __bit PWM6DCL5 __attribute__((address(0x6D1D))); + + +extern volatile __bit PWM6DCL6 __attribute__((address(0x6D1E))); + + +extern volatile __bit PWM6DCL7 __attribute__((address(0x6D1F))); + + +extern volatile __bit PWM6EN __attribute__((address(0x6D5F))); + + +extern volatile __bit PWM6IE __attribute__((address(0x4B1))); + + +extern volatile __bit PWM6IF __attribute__((address(0xB1))); + + +extern volatile __bit PWM6LD __attribute__((address(0x6D7F))); + + +extern volatile __bit PWM6LDM __attribute__((address(0x6D7E))); + + +extern volatile __bit PWM6LDS0 __attribute__((address(0x6D78))); + + +extern volatile __bit PWM6LDS1 __attribute__((address(0x6D79))); + + +extern volatile __bit PWM6MODE0 __attribute__((address(0x6D5A))); + + +extern volatile __bit PWM6MODE1 __attribute__((address(0x6D5B))); + + +extern volatile __bit PWM6OFH0 __attribute__((address(0x6D40))); + + +extern volatile __bit PWM6OFH1 __attribute__((address(0x6D41))); + + +extern volatile __bit PWM6OFH2 __attribute__((address(0x6D42))); + + +extern volatile __bit PWM6OFH3 __attribute__((address(0x6D43))); + + +extern volatile __bit PWM6OFH4 __attribute__((address(0x6D44))); + + +extern volatile __bit PWM6OFH5 __attribute__((address(0x6D45))); + + +extern volatile __bit PWM6OFH6 __attribute__((address(0x6D46))); + + +extern volatile __bit PWM6OFH7 __attribute__((address(0x6D47))); + + +extern volatile __bit PWM6OFIE __attribute__((address(0x6D63))); + + +extern volatile __bit PWM6OFIF __attribute__((address(0x6D6B))); + + +extern volatile __bit PWM6OFL0 __attribute__((address(0x6D38))); + + +extern volatile __bit PWM6OFL1 __attribute__((address(0x6D39))); + + +extern volatile __bit PWM6OFL2 __attribute__((address(0x6D3A))); + + +extern volatile __bit PWM6OFL3 __attribute__((address(0x6D3B))); + + +extern volatile __bit PWM6OFL4 __attribute__((address(0x6D3C))); + + +extern volatile __bit PWM6OFL5 __attribute__((address(0x6D3D))); + + +extern volatile __bit PWM6OFL6 __attribute__((address(0x6D3E))); + + +extern volatile __bit PWM6OFL7 __attribute__((address(0x6D3F))); + + +extern volatile __bit PWM6OFM0 __attribute__((address(0x6D85))); + + +extern volatile __bit PWM6OFM1 __attribute__((address(0x6D86))); + + +extern volatile __bit PWM6OFMC __attribute__((address(0x6D84))); + + +extern volatile __bit PWM6OFS0 __attribute__((address(0x6D80))); + + +extern volatile __bit PWM6OFS1 __attribute__((address(0x6D81))); + + +extern volatile __bit PWM6OUT __attribute__((address(0x6D5D))); + + +extern volatile __bit PWM6PHH0 __attribute__((address(0x6D10))); + + +extern volatile __bit PWM6PHH1 __attribute__((address(0x6D11))); + + +extern volatile __bit PWM6PHH2 __attribute__((address(0x6D12))); + + +extern volatile __bit PWM6PHH3 __attribute__((address(0x6D13))); + + +extern volatile __bit PWM6PHH4 __attribute__((address(0x6D14))); + + +extern volatile __bit PWM6PHH5 __attribute__((address(0x6D15))); + + +extern volatile __bit PWM6PHH6 __attribute__((address(0x6D16))); + + +extern volatile __bit PWM6PHH7 __attribute__((address(0x6D17))); + + +extern volatile __bit PWM6PHIE __attribute__((address(0x6D62))); + + +extern volatile __bit PWM6PHIF __attribute__((address(0x6D6A))); + + +extern volatile __bit PWM6PHL0 __attribute__((address(0x6D08))); + + +extern volatile __bit PWM6PHL1 __attribute__((address(0x6D09))); + + +extern volatile __bit PWM6PHL2 __attribute__((address(0x6D0A))); + + +extern volatile __bit PWM6PHL3 __attribute__((address(0x6D0B))); + + +extern volatile __bit PWM6PHL4 __attribute__((address(0x6D0C))); + + +extern volatile __bit PWM6PHL5 __attribute__((address(0x6D0D))); + + +extern volatile __bit PWM6PHL6 __attribute__((address(0x6D0E))); + + +extern volatile __bit PWM6PHL7 __attribute__((address(0x6D0F))); + + +extern volatile __bit PWM6POL __attribute__((address(0x6D5C))); + + +extern volatile __bit PWM6PRH0 __attribute__((address(0x6D30))); + + +extern volatile __bit PWM6PRH1 __attribute__((address(0x6D31))); + + +extern volatile __bit PWM6PRH2 __attribute__((address(0x6D32))); + + +extern volatile __bit PWM6PRH3 __attribute__((address(0x6D33))); + + +extern volatile __bit PWM6PRH4 __attribute__((address(0x6D34))); + + +extern volatile __bit PWM6PRH5 __attribute__((address(0x6D35))); + + +extern volatile __bit PWM6PRH6 __attribute__((address(0x6D36))); + + +extern volatile __bit PWM6PRH7 __attribute__((address(0x6D37))); + + +extern volatile __bit PWM6PRIE __attribute__((address(0x6D60))); + + +extern volatile __bit PWM6PRIF __attribute__((address(0x6D68))); + + +extern volatile __bit PWM6PRL0 __attribute__((address(0x6D28))); + + +extern volatile __bit PWM6PRL1 __attribute__((address(0x6D29))); + + +extern volatile __bit PWM6PRL2 __attribute__((address(0x6D2A))); + + +extern volatile __bit PWM6PRL3 __attribute__((address(0x6D2B))); + + +extern volatile __bit PWM6PRL4 __attribute__((address(0x6D2C))); + + +extern volatile __bit PWM6PRL5 __attribute__((address(0x6D2D))); + + +extern volatile __bit PWM6PRL6 __attribute__((address(0x6D2E))); + + +extern volatile __bit PWM6PRL7 __attribute__((address(0x6D2F))); + + +extern volatile __bit PWM6PS0 __attribute__((address(0x6D74))); + + +extern volatile __bit PWM6PS1 __attribute__((address(0x6D75))); + + +extern volatile __bit PWM6PS2 __attribute__((address(0x6D76))); + + +extern volatile __bit PWM6TMRH0 __attribute__((address(0x6D50))); + + +extern volatile __bit PWM6TMRH1 __attribute__((address(0x6D51))); + + +extern volatile __bit PWM6TMRH2 __attribute__((address(0x6D52))); + + +extern volatile __bit PWM6TMRH3 __attribute__((address(0x6D53))); + + +extern volatile __bit PWM6TMRH4 __attribute__((address(0x6D54))); + + +extern volatile __bit PWM6TMRH5 __attribute__((address(0x6D55))); + + +extern volatile __bit PWM6TMRH6 __attribute__((address(0x6D56))); + + +extern volatile __bit PWM6TMRH7 __attribute__((address(0x6D57))); + + +extern volatile __bit PWM6TMRL0 __attribute__((address(0x6D48))); + + +extern volatile __bit PWM6TMRL1 __attribute__((address(0x6D49))); + + +extern volatile __bit PWM6TMRL2 __attribute__((address(0x6D4A))); + + +extern volatile __bit PWM6TMRL3 __attribute__((address(0x6D4B))); + + +extern volatile __bit PWM6TMRL4 __attribute__((address(0x6D4C))); + + +extern volatile __bit PWM6TMRL5 __attribute__((address(0x6D4D))); + + +extern volatile __bit PWM6TMRL6 __attribute__((address(0x6D4E))); + + +extern volatile __bit PWM6TMRL7 __attribute__((address(0x6D4F))); + + +extern volatile __bit PWM9DC0 __attribute__((address(0x30D6))); + + +extern volatile __bit PWM9DC1 __attribute__((address(0x30D7))); + + +extern volatile __bit PWM9DC2 __attribute__((address(0x30D8))); + + +extern volatile __bit PWM9DC3 __attribute__((address(0x30D9))); + + +extern volatile __bit PWM9DC4 __attribute__((address(0x30DA))); + + +extern volatile __bit PWM9DC5 __attribute__((address(0x30DB))); + + +extern volatile __bit PWM9DC6 __attribute__((address(0x30DC))); + + +extern volatile __bit PWM9DC7 __attribute__((address(0x30DD))); + + +extern volatile __bit PWM9DC8 __attribute__((address(0x30DE))); + + +extern volatile __bit PWM9DC9 __attribute__((address(0x30DF))); + + +extern volatile __bit PWM9EN __attribute__((address(0x30E7))); + + +extern volatile __bit PWM9OUT __attribute__((address(0x30E5))); + + +extern volatile __bit PWM9POL __attribute__((address(0x30E4))); + + +extern volatile __bit RA0 __attribute__((address(0x60))); + + +extern volatile __bit RA1 __attribute__((address(0x61))); + + +extern volatile __bit RA2 __attribute__((address(0x62))); + + +extern volatile __bit RA3 __attribute__((address(0x63))); + + +extern volatile __bit RA4 __attribute__((address(0x64))); + + +extern volatile __bit RA5 __attribute__((address(0x65))); + + +extern volatile __bit RA6 __attribute__((address(0x66))); + + +extern volatile __bit RA7 __attribute__((address(0x67))); + + +extern volatile __bit RB0 __attribute__((address(0x68))); + + +extern volatile __bit RB1 __attribute__((address(0x69))); + + +extern volatile __bit RB2 __attribute__((address(0x6A))); + + +extern volatile __bit RB3 __attribute__((address(0x6B))); + + +extern volatile __bit RB4 __attribute__((address(0x6C))); + + +extern volatile __bit RB5 __attribute__((address(0x6D))); + + +extern volatile __bit RB6 __attribute__((address(0x6E))); + + +extern volatile __bit RB7 __attribute__((address(0x6F))); + + +extern volatile __bit RC0 __attribute__((address(0x70))); + + +extern volatile __bit RC1 __attribute__((address(0x71))); + + +extern volatile __bit RC2 __attribute__((address(0x72))); + + +extern volatile __bit RC3 __attribute__((address(0x73))); + + +extern volatile __bit RC4 __attribute__((address(0x74))); + + +extern volatile __bit RC5 __attribute__((address(0x75))); + + +extern volatile __bit RC6 __attribute__((address(0x76))); + + +extern volatile __bit RC7 __attribute__((address(0x77))); + + +extern volatile __bit RCEN __attribute__((address(0x10B3))); + + +extern volatile __bit RCIDL __attribute__((address(0xCFE))); + + +extern volatile __bit RCIE __attribute__((address(0x48D))); + + +extern volatile __bit RCIF __attribute__((address(0x8D))); + + +extern volatile __bit RD __attribute__((address(0xCA8))); + + +extern volatile __bit RE3 __attribute__((address(0x83))); + + +extern volatile __bit RG1EN __attribute__((address(0x3C8F))); + + +extern volatile __bit RG1FEDG __attribute__((address(0x3C8D))); + + +extern volatile __bit RG1FPOL __attribute__((address(0x3C91))); + + +extern volatile __bit RG1FTSS0 __attribute__((address(0x3C78))); + + +extern volatile __bit RG1FTSS1 __attribute__((address(0x3C79))); + + +extern volatile __bit RG1FTSS2 __attribute__((address(0x3C7A))); + + +extern volatile __bit RG1FTSS3 __attribute__((address(0x3C7B))); + + +extern volatile __bit RG1GO __attribute__((address(0x3C88))); + + +extern volatile __bit RG1INS0 __attribute__((address(0x3C80))); + + +extern volatile __bit RG1INS1 __attribute__((address(0x3C81))); + + +extern volatile __bit RG1INS2 __attribute__((address(0x3C82))); + + +extern volatile __bit RG1INS3 __attribute__((address(0x3C83))); + + +extern volatile __bit RG1ISET0 __attribute__((address(0x3C98))); + + +extern volatile __bit RG1ISET1 __attribute__((address(0x3C99))); + + +extern volatile __bit RG1ISET2 __attribute__((address(0x3C9A))); + + +extern volatile __bit RG1ISET3 __attribute__((address(0x3C9B))); + + +extern volatile __bit RG1ISET4 __attribute__((address(0x3C9C))); + + +extern volatile __bit RG1MODE0 __attribute__((address(0x3C8A))); + + +extern volatile __bit RG1MODE1 __attribute__((address(0x3C8B))); + + +extern volatile __bit RG1OS __attribute__((address(0x3C89))); + + +extern volatile __bit RG1RDY __attribute__((address(0x3C92))); + + +extern volatile __bit RG1REDG __attribute__((address(0x3C8C))); + + +extern volatile __bit RG1RPOL __attribute__((address(0x3C90))); + + +extern volatile __bit RG1RTSS0 __attribute__((address(0x3C70))); + + +extern volatile __bit RG1RTSS1 __attribute__((address(0x3C71))); + + +extern volatile __bit RG1RTSS2 __attribute__((address(0x3C72))); + + +extern volatile __bit RG1RTSS3 __attribute__((address(0x3C73))); + + +extern volatile __bit RG2EN __attribute__((address(0x3CBF))); + + +extern volatile __bit RG2FEDG __attribute__((address(0x3CBD))); + + +extern volatile __bit RG2FPOL __attribute__((address(0x3CC1))); + + +extern volatile __bit RG2FTSS0 __attribute__((address(0x3CA8))); + + +extern volatile __bit RG2FTSS1 __attribute__((address(0x3CA9))); + + +extern volatile __bit RG2FTSS2 __attribute__((address(0x3CAA))); + + +extern volatile __bit RG2FTSS3 __attribute__((address(0x3CAB))); + + +extern volatile __bit RG2GO __attribute__((address(0x3CB8))); + + +extern volatile __bit RG2INS0 __attribute__((address(0x3CB0))); + + +extern volatile __bit RG2INS1 __attribute__((address(0x3CB1))); + + +extern volatile __bit RG2INS2 __attribute__((address(0x3CB2))); + + +extern volatile __bit RG2INS3 __attribute__((address(0x3CB3))); + + +extern volatile __bit RG2ISET0 __attribute__((address(0x3CC8))); + + +extern volatile __bit RG2ISET1 __attribute__((address(0x3CC9))); + + +extern volatile __bit RG2ISET2 __attribute__((address(0x3CCA))); + + +extern volatile __bit RG2ISET3 __attribute__((address(0x3CCB))); + + +extern volatile __bit RG2ISET4 __attribute__((address(0x3CCC))); + + +extern volatile __bit RG2MODE0 __attribute__((address(0x3CBA))); + + +extern volatile __bit RG2MODE1 __attribute__((address(0x3CBB))); + + +extern volatile __bit RG2OS __attribute__((address(0x3CB9))); + + +extern volatile __bit RG2RDY __attribute__((address(0x3CC2))); + + +extern volatile __bit RG2REDG __attribute__((address(0x3CBC))); + + +extern volatile __bit RG2RPOL __attribute__((address(0x3CC0))); + + +extern volatile __bit RG2RTSS0 __attribute__((address(0x3CA0))); + + +extern volatile __bit RG2RTSS1 __attribute__((address(0x3CA1))); + + +extern volatile __bit RG2RTSS2 __attribute__((address(0x3CA2))); + + +extern volatile __bit RG2RTSS3 __attribute__((address(0x3CA3))); + + +extern volatile __bit RG3EN __attribute__((address(0x3CEF))); + + +extern volatile __bit RG3FEDG __attribute__((address(0x3CED))); + + +extern volatile __bit RG3FPOL __attribute__((address(0x3CF1))); + + +extern volatile __bit RG3FTSS0 __attribute__((address(0x3CD8))); + + +extern volatile __bit RG3FTSS1 __attribute__((address(0x3CD9))); + + +extern volatile __bit RG3FTSS2 __attribute__((address(0x3CDA))); + + +extern volatile __bit RG3FTSS3 __attribute__((address(0x3CDB))); + + +extern volatile __bit RG3GO __attribute__((address(0x3CE8))); + + +extern volatile __bit RG3INS0 __attribute__((address(0x3CE0))); + + +extern volatile __bit RG3INS1 __attribute__((address(0x3CE1))); + + +extern volatile __bit RG3INS2 __attribute__((address(0x3CE2))); + + +extern volatile __bit RG3INS3 __attribute__((address(0x3CE3))); + + +extern volatile __bit RG3ISET0 __attribute__((address(0x3CF8))); + + +extern volatile __bit RG3ISET1 __attribute__((address(0x3CF9))); + + +extern volatile __bit RG3ISET2 __attribute__((address(0x3CFA))); + + +extern volatile __bit RG3ISET3 __attribute__((address(0x3CFB))); + + +extern volatile __bit RG3ISET4 __attribute__((address(0x3CFC))); + + +extern volatile __bit RG3MODE0 __attribute__((address(0x3CEA))); + + +extern volatile __bit RG3MODE1 __attribute__((address(0x3CEB))); + + +extern volatile __bit RG3OS __attribute__((address(0x3CE9))); + + +extern volatile __bit RG3RDY __attribute__((address(0x3CF2))); + + +extern volatile __bit RG3REDG __attribute__((address(0x3CEC))); + + +extern volatile __bit RG3RPOL __attribute__((address(0x3CF0))); + + +extern volatile __bit RG3RTSS0 __attribute__((address(0x3CD0))); + + +extern volatile __bit RG3RTSS1 __attribute__((address(0x3CD1))); + + +extern volatile __bit RG3RTSS2 __attribute__((address(0x3CD2))); + + +extern volatile __bit RG3RTSS3 __attribute__((address(0x3CD3))); + + +extern volatile __bit RSEN __attribute__((address(0x10B1))); + + +extern volatile __bit RX9 __attribute__((address(0xCEE))); + + +extern volatile __bit RX9D __attribute__((address(0xCE8))); + + +extern volatile __bit R_nW __attribute__((address(0x10A2))); + + +extern volatile __bit SBCDE __attribute__((address(0x10BA))); + + +extern volatile __bit SBOREN __attribute__((address(0x4EF))); + + +extern volatile __bit SCIE __attribute__((address(0x10BD))); + + +extern volatile __bit SCKP __attribute__((address(0xCFC))); + + +extern volatile __bit SCS0 __attribute__((address(0x4D8))); + + +extern volatile __bit SCS1 __attribute__((address(0x4D9))); + + +extern volatile __bit SDAHT __attribute__((address(0x10BB))); + + +extern volatile __bit SEN __attribute__((address(0x10B0))); + + +extern volatile __bit SENDB __attribute__((address(0xCF3))); + + +extern volatile __bit SLRA0 __attribute__((address(0x1860))); + + +extern volatile __bit SLRA1 __attribute__((address(0x1861))); + + +extern volatile __bit SLRA2 __attribute__((address(0x1862))); + + +extern volatile __bit SLRA3 __attribute__((address(0x1863))); + + +extern volatile __bit SLRA4 __attribute__((address(0x1864))); + + +extern volatile __bit SLRA5 __attribute__((address(0x1865))); + + +extern volatile __bit SLRA6 __attribute__((address(0x1866))); + + +extern volatile __bit SLRA7 __attribute__((address(0x1867))); + + +extern volatile __bit SLRB0 __attribute__((address(0x1868))); + + +extern volatile __bit SLRB1 __attribute__((address(0x1869))); + + +extern volatile __bit SLRB2 __attribute__((address(0x186A))); + + +extern volatile __bit SLRB3 __attribute__((address(0x186B))); + + +extern volatile __bit SLRB4 __attribute__((address(0x186C))); + + +extern volatile __bit SLRB5 __attribute__((address(0x186D))); + + +extern volatile __bit SLRB6 __attribute__((address(0x186E))); + + +extern volatile __bit SLRB7 __attribute__((address(0x186F))); + + +extern volatile __bit SLRC0 __attribute__((address(0x1870))); + + +extern volatile __bit SLRC1 __attribute__((address(0x1871))); + + +extern volatile __bit SLRC2 __attribute__((address(0x1872))); + + +extern volatile __bit SLRC3 __attribute__((address(0x1873))); + + +extern volatile __bit SLRC4 __attribute__((address(0x1874))); + + +extern volatile __bit SLRC5 __attribute__((address(0x1875))); + + +extern volatile __bit SLRC6 __attribute__((address(0x1876))); + + +extern volatile __bit SLRC7 __attribute__((address(0x1877))); + + +extern volatile __bit SMP __attribute__((address(0x10A7))); + + +extern volatile __bit SOSCR __attribute__((address(0x4E7))); + + +extern volatile __bit SP __attribute__((address(0x28CE))); + + +extern volatile __bit SPEN __attribute__((address(0xCEF))); + + +extern volatile __bit SPLLEN __attribute__((address(0x4DF))); + + +extern volatile __bit SREN __attribute__((address(0xCED))); + + +extern volatile __bit SSP1ADD0 __attribute__((address(0x1090))); + + +extern volatile __bit SSP1ADD1 __attribute__((address(0x1091))); + + +extern volatile __bit SSP1ADD2 __attribute__((address(0x1092))); + + +extern volatile __bit SSP1ADD3 __attribute__((address(0x1093))); + + +extern volatile __bit SSP1ADD4 __attribute__((address(0x1094))); + + +extern volatile __bit SSP1ADD5 __attribute__((address(0x1095))); + + +extern volatile __bit SSP1ADD6 __attribute__((address(0x1096))); + + +extern volatile __bit SSP1ADD7 __attribute__((address(0x1097))); + + +extern volatile __bit SSP1BUF0 __attribute__((address(0x1088))); + + +extern volatile __bit SSP1BUF1 __attribute__((address(0x1089))); + + +extern volatile __bit SSP1BUF2 __attribute__((address(0x108A))); + + +extern volatile __bit SSP1BUF3 __attribute__((address(0x108B))); + + +extern volatile __bit SSP1BUF4 __attribute__((address(0x108C))); + + +extern volatile __bit SSP1BUF5 __attribute__((address(0x108D))); + + +extern volatile __bit SSP1BUF6 __attribute__((address(0x108E))); + + +extern volatile __bit SSP1BUF7 __attribute__((address(0x108F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x48B))); + + +extern volatile __bit SSP1IF __attribute__((address(0x8B))); + + +extern volatile __bit SSP1MSK0 __attribute__((address(0x1098))); + + +extern volatile __bit SSP1MSK1 __attribute__((address(0x1099))); + + +extern volatile __bit SSP1MSK2 __attribute__((address(0x109A))); + + +extern volatile __bit SSP1MSK3 __attribute__((address(0x109B))); + + +extern volatile __bit SSP1MSK4 __attribute__((address(0x109C))); + + +extern volatile __bit SSP1MSK5 __attribute__((address(0x109D))); + + +extern volatile __bit SSP1MSK6 __attribute__((address(0x109E))); + + +extern volatile __bit SSP1MSK7 __attribute__((address(0x109F))); + + +extern volatile __bit SSPEN __attribute__((address(0x10AD))); + + +extern volatile __bit SSPM0 __attribute__((address(0x10A8))); + + +extern volatile __bit SSPM1 __attribute__((address(0x10A9))); + + +extern volatile __bit SSPM2 __attribute__((address(0x10AA))); + + +extern volatile __bit SSPM3 __attribute__((address(0x10AB))); + + +extern volatile __bit SSPOV __attribute__((address(0x10AE))); + + +extern volatile __bit STKOVF __attribute__((address(0x4C7))); + + +extern volatile __bit STKUNF __attribute__((address(0x4C6))); + + +extern volatile __bit SWDTEN __attribute__((address(0x4C8))); + + +extern volatile __bit T0CS __attribute__((address(0x4BD))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x4BC))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0xD4))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0xD5))); + + +extern volatile __bit T1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit T1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit T1GE __attribute__((address(0xDF))); + + +extern volatile __bit T1GGO_nDONE __attribute__((address(0xDB))); + + +extern volatile __bit T1GPOL __attribute__((address(0xDE))); + + +extern volatile __bit T1GSPM __attribute__((address(0xDC))); + + +extern volatile __bit T1GSS0 __attribute__((address(0xD8))); + + +extern volatile __bit T1GSS1 __attribute__((address(0xD9))); + + +extern volatile __bit T1GTM __attribute__((address(0xDD))); + + +extern volatile __bit T1GVAL __attribute__((address(0xDA))); + + +extern volatile __bit T1ON __attribute__((address(0xD0))); + + +extern volatile __bit T1OSCEN __attribute__((address(0xD3))); + + +extern volatile __bit T2CKPOL __attribute__((address(0x24B6))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x24AC))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x24AD))); + + +extern volatile __bit T2CKPS2 __attribute__((address(0x24AE))); + + +extern volatile __bit T2CKSYNC __attribute__((address(0x24B5))); + + +extern volatile __bit T2CS0 __attribute__((address(0x24B8))); + + +extern volatile __bit T2CS1 __attribute__((address(0x24B9))); + + +extern volatile __bit T2CS2 __attribute__((address(0x24BA))); + + +extern volatile __bit T2CS3 __attribute__((address(0x24BB))); + + +extern volatile __bit T2MODE0 __attribute__((address(0x24B0))); + + +extern volatile __bit T2MODE1 __attribute__((address(0x24B1))); + + +extern volatile __bit T2MODE2 __attribute__((address(0x24B2))); + + +extern volatile __bit T2MODE3 __attribute__((address(0x24B3))); + + +extern volatile __bit T2MODE4 __attribute__((address(0x24B4))); + + +extern volatile __bit T2ON __attribute__((address(0x24AF))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x24A8))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x24A9))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x24AA))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x24AB))); + + +extern volatile __bit T2PSYNC __attribute__((address(0x24B7))); + + +extern volatile __bit T2RSEL0 __attribute__((address(0x24C0))); + + +extern volatile __bit T2RSEL1 __attribute__((address(0x24C1))); + + +extern volatile __bit T2RSEL2 __attribute__((address(0x24C2))); + + +extern volatile __bit T2RSEL3 __attribute__((address(0x24C3))); + + +extern volatile __bit T2RSEL4 __attribute__((address(0x24C4))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0xF4))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0xF5))); + + +extern volatile __bit T3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit T3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit T3GE __attribute__((address(0xFF))); + + +extern volatile __bit T3GGO_nDONE __attribute__((address(0xFB))); + + +extern volatile __bit T3GPOL __attribute__((address(0xFE))); + + +extern volatile __bit T3GSPM __attribute__((address(0xFC))); + + +extern volatile __bit T3GSS0 __attribute__((address(0xF8))); + + +extern volatile __bit T3GSS1 __attribute__((address(0xF9))); + + +extern volatile __bit T3GTM __attribute__((address(0xFD))); + + +extern volatile __bit T3GVAL __attribute__((address(0xFA))); + + +extern volatile __bit T3ON __attribute__((address(0xF0))); + + +extern volatile __bit T3OSCEN __attribute__((address(0xF3))); + + +extern volatile __bit T4CKPOL __attribute__((address(0x20B6))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x20AC))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x20AD))); + + +extern volatile __bit T4CKPS2 __attribute__((address(0x20AE))); + + +extern volatile __bit T4CKSYNC __attribute__((address(0x20B5))); + + +extern volatile __bit T4CS0 __attribute__((address(0x20B8))); + + +extern volatile __bit T4CS1 __attribute__((address(0x20B9))); + + +extern volatile __bit T4CS2 __attribute__((address(0x20BA))); + + +extern volatile __bit T4CS3 __attribute__((address(0x20BB))); + + +extern volatile __bit T4MODE0 __attribute__((address(0x20B0))); + + +extern volatile __bit T4MODE1 __attribute__((address(0x20B1))); + + +extern volatile __bit T4MODE2 __attribute__((address(0x20B2))); + + +extern volatile __bit T4MODE3 __attribute__((address(0x20B3))); + + +extern volatile __bit T4MODE4 __attribute__((address(0x20B4))); + + +extern volatile __bit T4ON __attribute__((address(0x20AF))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x20A8))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x20A9))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x20AA))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x20AB))); + + +extern volatile __bit T4PSYNC __attribute__((address(0x20B7))); + + +extern volatile __bit T4RSEL0 __attribute__((address(0x20C0))); + + +extern volatile __bit T4RSEL1 __attribute__((address(0x20C1))); + + +extern volatile __bit T4RSEL2 __attribute__((address(0x20C2))); + + +extern volatile __bit T4RSEL3 __attribute__((address(0x20C3))); + + +extern volatile __bit T4RSEL4 __attribute__((address(0x20C4))); + + +extern volatile __bit T5CKPS0 __attribute__((address(0x208C))); + + +extern volatile __bit T5CKPS1 __attribute__((address(0x208D))); + + +extern volatile __bit T5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit T5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit T5GE __attribute__((address(0x2097))); + + +extern volatile __bit T5GGO_nDONE __attribute__((address(0x2093))); + + +extern volatile __bit T5GPOL __attribute__((address(0x2096))); + + +extern volatile __bit T5GSPM __attribute__((address(0x2094))); + + +extern volatile __bit T5GSS0 __attribute__((address(0x2090))); + + +extern volatile __bit T5GSS1 __attribute__((address(0x2091))); + + +extern volatile __bit T5GTM __attribute__((address(0x2095))); + + +extern volatile __bit T5GVAL __attribute__((address(0x2092))); + + +extern volatile __bit T5ON __attribute__((address(0x2088))); + + +extern volatile __bit T5OSCEN __attribute__((address(0x208B))); + + +extern volatile __bit T6CKPOL __attribute__((address(0x20EE))); + + +extern volatile __bit T6CKPS0 __attribute__((address(0x20E4))); + + +extern volatile __bit T6CKPS1 __attribute__((address(0x20E5))); + + +extern volatile __bit T6CKPS2 __attribute__((address(0x20E6))); + + +extern volatile __bit T6CKSYNC __attribute__((address(0x20ED))); + + +extern volatile __bit T6CS0 __attribute__((address(0x20F0))); + + +extern volatile __bit T6CS1 __attribute__((address(0x20F1))); + + +extern volatile __bit T6CS2 __attribute__((address(0x20F2))); + + +extern volatile __bit T6CS3 __attribute__((address(0x20F3))); + + +extern volatile __bit T6MODE0 __attribute__((address(0x20E8))); + + +extern volatile __bit T6MODE1 __attribute__((address(0x20E9))); + + +extern volatile __bit T6MODE2 __attribute__((address(0x20EA))); + + +extern volatile __bit T6MODE3 __attribute__((address(0x20EB))); + + +extern volatile __bit T6MODE4 __attribute__((address(0x20EC))); + + +extern volatile __bit T6ON __attribute__((address(0x20E7))); + + +extern volatile __bit T6OUTPS0 __attribute__((address(0x20E0))); + + +extern volatile __bit T6OUTPS1 __attribute__((address(0x20E1))); + + +extern volatile __bit T6OUTPS2 __attribute__((address(0x20E2))); + + +extern volatile __bit T6OUTPS3 __attribute__((address(0x20E3))); + + +extern volatile __bit T6PSYNC __attribute__((address(0x20EF))); + + +extern volatile __bit T6RSEL0 __attribute__((address(0x20F8))); + + +extern volatile __bit T6RSEL1 __attribute__((address(0x20F9))); + + +extern volatile __bit T6RSEL2 __attribute__((address(0x20FA))); + + +extern volatile __bit T6RSEL3 __attribute__((address(0x20FB))); + + +extern volatile __bit T6RSEL4 __attribute__((address(0x20FC))); + + +extern volatile __bit T8CKPOL __attribute__((address(0x24EE))); + + +extern volatile __bit T8CKPS0 __attribute__((address(0x24E4))); + + +extern volatile __bit T8CKPS1 __attribute__((address(0x24E5))); + + +extern volatile __bit T8CKPS2 __attribute__((address(0x24E6))); + + +extern volatile __bit T8CKSYNC __attribute__((address(0x24ED))); + + +extern volatile __bit T8CS0 __attribute__((address(0x24F0))); + + +extern volatile __bit T8CS1 __attribute__((address(0x24F1))); + + +extern volatile __bit T8CS2 __attribute__((address(0x24F2))); + + +extern volatile __bit T8CS3 __attribute__((address(0x24F3))); + + +extern volatile __bit T8MODE0 __attribute__((address(0x24E8))); + + +extern volatile __bit T8MODE1 __attribute__((address(0x24E9))); + + +extern volatile __bit T8MODE2 __attribute__((address(0x24EA))); + + +extern volatile __bit T8MODE3 __attribute__((address(0x24EB))); + + +extern volatile __bit T8MODE4 __attribute__((address(0x24EC))); + + +extern volatile __bit T8ON __attribute__((address(0x24E7))); + + +extern volatile __bit T8OUTPS0 __attribute__((address(0x24E0))); + + +extern volatile __bit T8OUTPS1 __attribute__((address(0x24E1))); + + +extern volatile __bit T8OUTPS2 __attribute__((address(0x24E2))); + + +extern volatile __bit T8OUTPS3 __attribute__((address(0x24E3))); + + +extern volatile __bit T8PSYNC __attribute__((address(0x24EF))); + + +extern volatile __bit T8RSEL0 __attribute__((address(0x24F8))); + + +extern volatile __bit T8RSEL1 __attribute__((address(0x24F9))); + + +extern volatile __bit T8RSEL2 __attribute__((address(0x24FA))); + + +extern volatile __bit T8RSEL3 __attribute__((address(0x24FB))); + + +extern volatile __bit T8RSEL4 __attribute__((address(0x24FC))); + + +extern volatile __bit TMR0CS __attribute__((address(0x4BD))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR0SE __attribute__((address(0x4BC))); + + +extern volatile __bit TMR1CS0 __attribute__((address(0xD6))); + + +extern volatile __bit TMR1CS1 __attribute__((address(0xD7))); + + +extern volatile __bit TMR1GE __attribute__((address(0xDF))); + + +extern volatile __bit TMR1GIE __attribute__((address(0x48F))); + + +extern volatile __bit TMR1GIF __attribute__((address(0x8F))); + + +extern volatile __bit TMR1IE __attribute__((address(0x488))); + + +extern volatile __bit TMR1IF __attribute__((address(0x88))); + + +extern volatile __bit TMR1ON __attribute__((address(0xD0))); + + +extern volatile __bit TMR2IE __attribute__((address(0x489))); + + +extern volatile __bit TMR2IF __attribute__((address(0x89))); + + +extern volatile __bit TMR2ON __attribute__((address(0x24AF))); + + +extern volatile __bit TMR3CS0 __attribute__((address(0xF6))); + + +extern volatile __bit TMR3CS1 __attribute__((address(0xF7))); + + +extern volatile __bit TMR3GE __attribute__((address(0xFF))); + + +extern volatile __bit TMR3GIE __attribute__((address(0x4A3))); + + +extern volatile __bit TMR3GIF __attribute__((address(0xA3))); + + +extern volatile __bit TMR3IE __attribute__((address(0x4A2))); + + +extern volatile __bit TMR3IF __attribute__((address(0xA2))); + + +extern volatile __bit TMR3ON __attribute__((address(0xF0))); + + +extern volatile __bit TMR4IE __attribute__((address(0x4A0))); + + +extern volatile __bit TMR4IF __attribute__((address(0xA0))); + + +extern volatile __bit TMR4ON __attribute__((address(0x20AF))); + + +extern volatile __bit TMR5CS0 __attribute__((address(0x208E))); + + +extern volatile __bit TMR5CS1 __attribute__((address(0x208F))); + + +extern volatile __bit TMR5GE __attribute__((address(0x2097))); + + +extern volatile __bit TMR5GIE __attribute__((address(0x4A5))); + + +extern volatile __bit TMR5GIF __attribute__((address(0xA5))); + + +extern volatile __bit TMR5IE __attribute__((address(0x4A4))); + + +extern volatile __bit TMR5IF __attribute__((address(0xA4))); + + +extern volatile __bit TMR5ON __attribute__((address(0x2088))); + + +extern volatile __bit TMR6IE __attribute__((address(0x4A1))); + + +extern volatile __bit TMR6IF __attribute__((address(0xA1))); + + +extern volatile __bit TMR6ON __attribute__((address(0x20E7))); + + +extern volatile __bit TMR8IE __attribute__((address(0x4A6))); + + +extern volatile __bit TMR8IF __attribute__((address(0xA6))); + + +extern volatile __bit TMR8ON __attribute__((address(0x24E7))); + + +extern volatile __bit TRISA0 __attribute__((address(0x460))); + + +extern volatile __bit TRISA1 __attribute__((address(0x461))); + + +extern volatile __bit TRISA2 __attribute__((address(0x462))); + + +extern volatile __bit TRISA3 __attribute__((address(0x463))); + + +extern volatile __bit TRISA4 __attribute__((address(0x464))); + + +extern volatile __bit TRISA5 __attribute__((address(0x465))); + + +extern volatile __bit TRISA6 __attribute__((address(0x466))); + + +extern volatile __bit TRISA7 __attribute__((address(0x467))); + + +extern volatile __bit TRISB0 __attribute__((address(0x468))); + + +extern volatile __bit TRISB1 __attribute__((address(0x469))); + + +extern volatile __bit TRISB2 __attribute__((address(0x46A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x46B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x46C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x46D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x46E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x46F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x470))); + + +extern volatile __bit TRISC1 __attribute__((address(0x471))); + + +extern volatile __bit TRISC2 __attribute__((address(0x472))); + + +extern volatile __bit TRISC3 __attribute__((address(0x473))); + + +extern volatile __bit TRISC4 __attribute__((address(0x474))); + + +extern volatile __bit TRISC5 __attribute__((address(0x475))); + + +extern volatile __bit TRISC6 __attribute__((address(0x476))); + + +extern volatile __bit TRISC7 __attribute__((address(0x477))); + + +extern volatile __bit TRISE3 __attribute__((address(0x483))); + + +extern volatile __bit TRMT __attribute__((address(0xCF1))); + + +extern volatile __bit TSEN __attribute__((address(0x4F5))); + + +extern volatile __bit TSRNG __attribute__((address(0x4F4))); + + +extern volatile __bit TUN0 __attribute__((address(0x4D0))); + + +extern volatile __bit TUN1 __attribute__((address(0x4D1))); + + +extern volatile __bit TUN2 __attribute__((address(0x4D2))); + + +extern volatile __bit TUN3 __attribute__((address(0x4D3))); + + +extern volatile __bit TUN4 __attribute__((address(0x4D4))); + + +extern volatile __bit TUN5 __attribute__((address(0x4D5))); + + +extern volatile __bit TX9 __attribute__((address(0xCF6))); + + +extern volatile __bit TX9D __attribute__((address(0xCF0))); + + +extern volatile __bit TXEN __attribute__((address(0xCF5))); + + +extern volatile __bit TXIE __attribute__((address(0x48C))); + + +extern volatile __bit TXIF __attribute__((address(0x8C))); + + +extern volatile __bit UA __attribute__((address(0x10A1))); + + +extern volatile __bit VREGPM0 __attribute__((address(0xCB8))); + + +extern volatile __bit VREGPM1 __attribute__((address(0xCB9))); + + +extern volatile __bit WCOL __attribute__((address(0x10AF))); + + +extern volatile __bit WDTPS0 __attribute__((address(0x4C9))); + + +extern volatile __bit WDTPS1 __attribute__((address(0x4CA))); + + +extern volatile __bit WDTPS2 __attribute__((address(0x4CB))); + + +extern volatile __bit WDTPS3 __attribute__((address(0x4CC))); + + +extern volatile __bit WDTPS4 __attribute__((address(0x4CD))); + + +extern volatile __bit WPUA0 __attribute__((address(0x1060))); + + +extern volatile __bit WPUA1 __attribute__((address(0x1061))); + + +extern volatile __bit WPUA2 __attribute__((address(0x1062))); + + +extern volatile __bit WPUA3 __attribute__((address(0x1063))); + + +extern volatile __bit WPUA4 __attribute__((address(0x1064))); + + +extern volatile __bit WPUA5 __attribute__((address(0x1065))); + + +extern volatile __bit WPUA6 __attribute__((address(0x1066))); + + +extern volatile __bit WPUA7 __attribute__((address(0x1067))); + + +extern volatile __bit WPUB0 __attribute__((address(0x1068))); + + +extern volatile __bit WPUB1 __attribute__((address(0x1069))); + + +extern volatile __bit WPUB2 __attribute__((address(0x106A))); + + +extern volatile __bit WPUB3 __attribute__((address(0x106B))); + + +extern volatile __bit WPUB4 __attribute__((address(0x106C))); + + +extern volatile __bit WPUB5 __attribute__((address(0x106D))); + + +extern volatile __bit WPUB6 __attribute__((address(0x106E))); + + +extern volatile __bit WPUB7 __attribute__((address(0x106F))); + + +extern volatile __bit WPUC0 __attribute__((address(0x1070))); + + +extern volatile __bit WPUC1 __attribute__((address(0x1071))); + + +extern volatile __bit WPUC2 __attribute__((address(0x1072))); + + +extern volatile __bit WPUC3 __attribute__((address(0x1073))); + + +extern volatile __bit WPUC4 __attribute__((address(0x1074))); + + +extern volatile __bit WPUC5 __attribute__((address(0x1075))); + + +extern volatile __bit WPUC6 __attribute__((address(0x1076))); + + +extern volatile __bit WPUC7 __attribute__((address(0x1077))); + + +extern volatile __bit WPUE3 __attribute__((address(0x1083))); + + +extern volatile __bit WR __attribute__((address(0xCA9))); + + +extern volatile __bit WREN __attribute__((address(0xCAA))); + + +extern volatile __bit WRERR __attribute__((address(0xCAB))); + + +extern volatile __bit WUE __attribute__((address(0xCF9))); + + +extern volatile __bit ZCD1EN __attribute__((address(0x4FF))); + + +extern volatile __bit ZCD1INTN __attribute__((address(0x4F8))); + + +extern volatile __bit ZCD1INTP __attribute__((address(0x4F9))); + + +extern volatile __bit ZCD1OUT __attribute__((address(0x4FD))); + + +extern volatile __bit ZCD1POL __attribute__((address(0x4FC))); + + +extern volatile __bit ZCDIE __attribute__((address(0x49C))); + + +extern volatile __bit ZCDIF __attribute__((address(0x9C))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit Z_SHAD __attribute__((address(0x7F22))); + + +extern volatile __bit nBOR __attribute__((address(0x4C0))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x4C1))); + + +extern volatile __bit nRI __attribute__((address(0x4C2))); + + +extern volatile __bit nRMCLR __attribute__((address(0x4C3))); + + +extern volatile __bit nRWDT __attribute__((address(0x4C4))); + + +extern volatile __bit nT1SYNC __attribute__((address(0xD2))); + + +extern volatile __bit nT3SYNC __attribute__((address(0xF2))); + + +extern volatile __bit nT5SYNC __attribute__((address(0x208A))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nWPUEN __attribute__((address(0x4BF))); +# 315 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic_chip_select.h" 2 3 +# 14 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 +# 30 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/eeprom_routines.h" 1 3 +# 86 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 2 3 + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(unsigned char); +# 137 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 28 "/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/xc.h" 2 3 +# 54 "mcc_generated_files/pin_manager.h" 2 +# 413 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 425 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 438 "mcc_generated_files/pin_manager.h" +void IOCBF0_ISR(void); +# 461 "mcc_generated_files/pin_manager.h" +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +# 485 "mcc_generated_files/pin_manager.h" +extern void (*IOCBF0_InterruptHandler)(void); +# 509 "mcc_generated_files/pin_manager.h" +void IOCBF0_DefaultInterruptHandler(void); +# 522 "mcc_generated_files/pin_manager.h" +void IOCCF7_ISR(void); +# 545 "mcc_generated_files/pin_manager.h" +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +# 569 "mcc_generated_files/pin_manager.h" +extern void (*IOCCF7_InterruptHandler)(void); +# 593 "mcc_generated_files/pin_manager.h" +void IOCCF7_DefaultInterruptHandler(void); +# 49 "mcc_generated_files/pin_manager.c" 2 + + + + + +void (*IOCBF0_InterruptHandler)(void); +void (*IOCCF7_InterruptHandler)(void); + + +void PIN_MANAGER_Initialize(void) +{ + + + + LATA = 0x00; + LATB = 0x00; + LATC = 0x00; + + + + + TRISE = 0x08; + TRISA = 0x39; + TRISB = 0xED; + TRISC = 0x8C; + + + + + ANSELC = 0x7C; + ANSELB = 0x3E; + ANSELA = 0x3F; + + + + + WPUE = 0x00; + WPUB = 0x00; + WPUA = 0x00; + WPUC = 0x00; + OPTION_REGbits.nWPUEN = 1; + + + + + ODCONA = 0x00; + ODCONB = 0x00; + ODCONC = 0x00; + + + + + SLRCONA = 0xFF; + SLRCONB = 0xFF; + SLRCONC = 0xFF; + + + + + INLVLA = 0x3F; + INLVLB = 0xF0; + INLVLC = 0xFF; + + + + + + + IOCBFbits.IOCBF0 = 0; + + IOCBNbits.IOCBN0 = 1; + + IOCBPbits.IOCBP0 = 0; + + IOCCFbits.IOCCF7 = 0; + + IOCCNbits.IOCCN7 = 1; + + IOCCPbits.IOCCP7 = 0; + + + + + IOCBF0_SetInterruptHandler(IOCBF0_DefaultInterruptHandler); + IOCCF7_SetInterruptHandler(IOCCF7_DefaultInterruptHandler); + + + INTCONbits.IOCIE = 1; + +} + +void PIN_MANAGER_IOC(void) +{ + + if(IOCBFbits.IOCBF0 == 1) + { + IOCBF0_ISR(); + } + + if(IOCCFbits.IOCCF7 == 1) + { + IOCCF7_ISR(); + } +} + + + + +void IOCBF0_ISR(void) { + + + + + if(IOCBF0_InterruptHandler) + { + IOCBF0_InterruptHandler(); + } + IOCBFbits.IOCBF0 = 0; +} + + + + +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)){ + IOCBF0_InterruptHandler = InterruptHandler; +} + + + + +void IOCBF0_DefaultInterruptHandler(void){ + + +} + + + + +void IOCCF7_ISR(void) { + + + + + if(IOCCF7_InterruptHandler) + { + IOCCF7_InterruptHandler(); + } + IOCCFbits.IOCCF7 = 0; +} + + + + +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)){ + IOCCF7_InterruptHandler = InterruptHandler; +} + + + + +void IOCCF7_DefaultInterruptHandler(void){ + + +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1 b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1 new file mode 100644 index 0000000..aac9a0f --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1 @@ -0,0 +1,2135 @@ +Version 4.0 HI-TECH Software Intermediate Code +[v F11997 `(v ~T0 @X0 0 tf ] +[v F11999 `(v ~T0 @X0 0 tf ] +"2673 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2673: extern volatile unsigned char LATA __attribute__((address(0x10C))); +[v _LATA `Vuc ~T0 @X0 0 e@268 ] +"2735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2735: extern volatile unsigned char LATB __attribute__((address(0x10D))); +[v _LATB `Vuc ~T0 @X0 0 e@269 ] +"2797 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2797: extern volatile unsigned char LATC __attribute__((address(0x10E))); +[v _LATC `Vuc ~T0 @X0 0 e@270 ] +"1821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1821: extern volatile unsigned char TRISE __attribute__((address(0x090))); +[v _TRISE `Vuc ~T0 @X0 0 e@144 ] +"1635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1635: extern volatile unsigned char TRISA __attribute__((address(0x08C))); +[v _TRISA `Vuc ~T0 @X0 0 e@140 ] +"1697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1697: extern volatile unsigned char TRISB __attribute__((address(0x08D))); +[v _TRISB `Vuc ~T0 @X0 0 e@141 ] +"1759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1759: extern volatile unsigned char TRISC __attribute__((address(0x08E))); +[v _TRISC `Vuc ~T0 @X0 0 e@142 ] +"3822 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3822: extern volatile unsigned char ANSELC __attribute__((address(0x18E))); +[v _ANSELC `Vuc ~T0 @X0 0 e@398 ] +"3772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3772: extern volatile unsigned char ANSELB __attribute__((address(0x18D))); +[v _ANSELB `Vuc ~T0 @X0 0 e@397 ] +"3722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3722: extern volatile unsigned char ANSELA __attribute__((address(0x18C))); +[v _ANSELA `Vuc ~T0 @X0 0 e@396 ] +"5100 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5100: extern volatile unsigned char WPUE __attribute__((address(0x210))); +[v _WPUE `Vuc ~T0 @X0 0 e@528 ] +"4976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4976: extern volatile unsigned char WPUB __attribute__((address(0x20D))); +[v _WPUB `Vuc ~T0 @X0 0 e@525 ] +"4914 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4914: extern volatile unsigned char WPUA __attribute__((address(0x20C))); +[v _WPUA `Vuc ~T0 @X0 0 e@524 ] +"5038 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5038: extern volatile unsigned char WPUC __attribute__((address(0x20E))); +[v _WPUC `Vuc ~T0 @X0 0 e@526 ] +"2159 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2159: struct { +[s S106 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S106 . PS PSA TMR0SE TMR0CS INTEDG nWPUEN ] +"2167 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2167: struct { +[s S107 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S107 . PS0 PS1 PS2 . T0SE T0CS ] +"2158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2158: typedef union { +[u S105 `S106 1 `S107 1 ] +[n S105 . . . ] +"2176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2176: extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x097))); +[v _OPTION_REGbits `VS105 ~T0 @X0 0 e@151 ] +"6929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6929: extern volatile unsigned char ODCONA __attribute__((address(0x28C))); +[v _ODCONA `Vuc ~T0 @X0 0 e@652 ] +"6991 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6991: extern volatile unsigned char ODCONB __attribute__((address(0x28D))); +[v _ODCONB `Vuc ~T0 @X0 0 e@653 ] +"7053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7053: extern volatile unsigned char ODCONC __attribute__((address(0x28E))); +[v _ODCONC `Vuc ~T0 @X0 0 e@654 ] +"8017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8017: extern volatile unsigned char SLRCONA __attribute__((address(0x30C))); +[v _SLRCONA `Vuc ~T0 @X0 0 e@780 ] +"8079 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8079: extern volatile unsigned char SLRCONB __attribute__((address(0x30D))); +[v _SLRCONB `Vuc ~T0 @X0 0 e@781 ] +"8141 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8141: extern volatile unsigned char SLRCONC __attribute__((address(0x30E))); +[v _SLRCONC `Vuc ~T0 @X0 0 e@782 ] +"9023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9023: extern volatile unsigned char INLVLA __attribute__((address(0x38C))); +[v _INLVLA `Vuc ~T0 @X0 0 e@908 ] +"9085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9085: extern volatile unsigned char INLVLB __attribute__((address(0x38D))); +[v _INLVLB `Vuc ~T0 @X0 0 e@909 ] +"9147 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9147: extern volatile unsigned char INLVLC __attribute__((address(0x38E))); +[v _INLVLC `Vuc ~T0 @X0 0 e@910 ] +"9546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9546: struct { +[s S455 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S455 . IOCBF0 IOCBF1 IOCBF2 IOCBF3 IOCBF4 IOCBF5 IOCBF6 IOCBF7 ] +"9545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9545: typedef union { +[u S454 `S455 1 ] +[n S454 . . ] +"9557 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9557: extern volatile IOCBFbits_t IOCBFbits __attribute__((address(0x396))); +[v _IOCBFbits `VS454 ~T0 @X0 0 e@918 ] +"9484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9484: struct { +[s S453 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S453 . IOCBN0 IOCBN1 IOCBN2 IOCBN3 IOCBN4 IOCBN5 IOCBN6 IOCBN7 ] +"9483 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9483: typedef union { +[u S452 `S453 1 ] +[n S452 . . ] +"9495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9495: extern volatile IOCBNbits_t IOCBNbits __attribute__((address(0x395))); +[v _IOCBNbits `VS452 ~T0 @X0 0 e@917 ] +"9422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9422: struct { +[s S451 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S451 . IOCBP0 IOCBP1 IOCBP2 IOCBP3 IOCBP4 IOCBP5 IOCBP6 IOCBP7 ] +"9421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9421: typedef union { +[u S450 `S451 1 ] +[n S450 . . ] +"9433 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9433: extern volatile IOCBPbits_t IOCBPbits __attribute__((address(0x394))); +[v _IOCBPbits `VS450 ~T0 @X0 0 e@916 ] +"9732 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9732: struct { +[s S461 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S461 . IOCCF0 IOCCF1 IOCCF2 IOCCF3 IOCCF4 IOCCF5 IOCCF6 IOCCF7 ] +"9731 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9731: typedef union { +[u S460 `S461 1 ] +[n S460 . . ] +"9743 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9743: extern volatile IOCCFbits_t IOCCFbits __attribute__((address(0x399))); +[v _IOCCFbits `VS460 ~T0 @X0 0 e@921 ] +"9670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9670: struct { +[s S459 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S459 . IOCCN0 IOCCN1 IOCCN2 IOCCN3 IOCCN4 IOCCN5 IOCCN6 IOCCN7 ] +"9669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9669: typedef union { +[u S458 `S459 1 ] +[n S458 . . ] +"9681 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9681: extern volatile IOCCNbits_t IOCCNbits __attribute__((address(0x398))); +[v _IOCCNbits `VS458 ~T0 @X0 0 e@920 ] +"9608 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9608: struct { +[s S457 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S457 . IOCCP0 IOCCP1 IOCCP2 IOCCP3 IOCCP4 IOCCP5 IOCCP6 IOCCP7 ] +"9607 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9607: typedef union { +[u S456 `S457 1 ] +[n S456 . . ] +"9619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9619: extern volatile IOCCPbits_t IOCCPbits __attribute__((address(0x397))); +[v _IOCCPbits `VS456 ~T0 @X0 0 e@919 ] +[v F11982 `(v ~T0 @X0 0 tf ] +"461 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 461: void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); +[v _IOCBF0_SetInterruptHandler `(v ~T0 @X0 0 ef1`*F11982 ] +"509 +[; ;mcc_generated_files/pin_manager.h: 509: void IOCBF0_DefaultInterruptHandler(void); +[v _IOCBF0_DefaultInterruptHandler `(v ~T0 @X0 0 ef ] +[v F11990 `(v ~T0 @X0 0 tf ] +"545 +[; ;mcc_generated_files/pin_manager.h: 545: void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); +[v _IOCCF7_SetInterruptHandler `(v ~T0 @X0 0 ef1`*F11990 ] +"593 +[; ;mcc_generated_files/pin_manager.h: 593: void IOCCF7_DefaultInterruptHandler(void); +[v _IOCCF7_DefaultInterruptHandler `(v ~T0 @X0 0 ef ] +"357 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 357: struct { +[s S31 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S31 . IOCIF INTF TMR0IF IOCIE INTE TMR0IE PEIE GIE ] +"367 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 367: struct { +[s S32 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S32 . . T0IF . T0IE ] +"356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 356: typedef union { +[u S30 `S31 1 `S32 1 ] +[n S30 . . . ] +"374 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 374: extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +[v _INTCONbits `VS30 ~T0 @X0 0 e@11 ] +"438 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 438: void IOCBF0_ISR(void); +[v _IOCBF0_ISR `(v ~T0 @X0 0 ef ] +"522 +[; ;mcc_generated_files/pin_manager.h: 522: void IOCCF7_ISR(void); +[v _IOCCF7_ISR `(v ~T0 @X0 0 ef ] +[v F12005 `(v ~T0 @X0 0 tf ] +[v F12007 `(v ~T0 @X0 0 tf ] +[v F12009 `(v ~T0 @X0 0 tf ] +[v F12013 `(v ~T0 @X0 0 tf ] +[v F12015 `(v ~T0 @X0 0 tf ] +[v F12017 `(v ~T0 @X0 0 tf ] +"54 /opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 54: __asm("INDF0 equ 00h"); +[; <" INDF0 equ 00h ;# "> +"74 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 74: __asm("INDF1 equ 01h"); +[; <" INDF1 equ 01h ;# "> +"94 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 94: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"114 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 114: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"177 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 177: __asm("FSR0L equ 04h"); +[; <" FSR0L equ 04h ;# "> +"197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 197: __asm("FSR0H equ 05h"); +[; <" FSR0H equ 05h ;# "> +"221 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 221: __asm("FSR1L equ 06h"); +[; <" FSR1L equ 06h ;# "> +"241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 241: __asm("FSR1H equ 07h"); +[; <" FSR1H equ 07h ;# "> +"261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 261: __asm("BSR equ 08h"); +[; <" BSR equ 08h ;# "> +"313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 313: __asm("WREG equ 09h"); +[; <" WREG equ 09h ;# "> +"333 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 333: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 353: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 431: __asm("PORTA equ 0Ch"); +[; <" PORTA equ 0Ch ;# "> +"493 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 493: __asm("PORTB equ 0Dh"); +[; <" PORTB equ 0Dh ;# "> +"555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 555: __asm("PORTC equ 0Eh"); +[; <" PORTC equ 0Eh ;# "> +"617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 617: __asm("PORTE equ 010h"); +[; <" PORTE equ 010h ;# "> +"638 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 638: __asm("PIR1 equ 011h"); +[; <" PIR1 equ 011h ;# "> +"709 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 709: __asm("PIR2 equ 012h"); +[; <" PIR2 equ 012h ;# "> +"771 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 771: __asm("PIR3 equ 013h"); +[; <" PIR3 equ 013h ;# "> +"821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 821: __asm("PIR4 equ 014h"); +[; <" PIR4 equ 014h ;# "> +"877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 877: __asm("PIR5 equ 015h"); +[; <" PIR5 equ 015h ;# "> +"917 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 917: __asm("PIR6 equ 016h"); +[; <" PIR6 equ 016h ;# "> +"949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 949: __asm("TMR0 equ 017h"); +[; <" TMR0 equ 017h ;# "> +"969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 969: __asm("TMR1 equ 018h"); +[; <" TMR1 equ 018h ;# "> +"976 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 976: __asm("TMR1L equ 018h"); +[; <" TMR1L equ 018h ;# "> +"996 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 996: __asm("TMR1H equ 019h"); +[; <" TMR1H equ 019h ;# "> +"1016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1016: __asm("T1CON equ 01Ah"); +[; <" T1CON equ 01Ah ;# "> +"1173 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1173: __asm("T1GCON equ 01Bh"); +[; <" T1GCON equ 01Bh ;# "> +"1303 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1303: __asm("TMR3 equ 01Ch"); +[; <" TMR3 equ 01Ch ;# "> +"1310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1310: __asm("TMR3L equ 01Ch"); +[; <" TMR3L equ 01Ch ;# "> +"1330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1330: __asm("TMR3H equ 01Dh"); +[; <" TMR3H equ 01Dh ;# "> +"1350 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1350: __asm("T3CON equ 01Eh"); +[; <" T3CON equ 01Eh ;# "> +"1507 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1507: __asm("T3GCON equ 01Fh"); +[; <" T3GCON equ 01Fh ;# "> +"1637 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1637: __asm("TRISA equ 08Ch"); +[; <" TRISA equ 08Ch ;# "> +"1699 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1699: __asm("TRISB equ 08Dh"); +[; <" TRISB equ 08Dh ;# "> +"1761 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1761: __asm("TRISC equ 08Eh"); +[; <" TRISC equ 08Eh ;# "> +"1823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1823: __asm("TRISE equ 090h"); +[; <" TRISE equ 090h ;# "> +"1844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1844: __asm("PIE1 equ 091h"); +[; <" PIE1 equ 091h ;# "> +"1915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1915: __asm("PIE2 equ 092h"); +[; <" PIE2 equ 092h ;# "> +"1977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 1977: __asm("PIE3 equ 093h"); +[; <" PIE3 equ 093h ;# "> +"2027 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2027: __asm("PIE4 equ 094h"); +[; <" PIE4 equ 094h ;# "> +"2083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2083: __asm("PIE5 equ 095h"); +[; <" PIE5 equ 095h ;# "> +"2123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2123: __asm("PIE6 equ 096h"); +[; <" PIE6 equ 096h ;# "> +"2155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2155: __asm("OPTION_REG equ 097h"); +[; <" OPTION_REG equ 097h ;# "> +"2238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2238: __asm("PCON equ 098h"); +[; <" PCON equ 098h ;# "> +"2295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2295: __asm("WDTCON equ 099h"); +[; <" WDTCON equ 099h ;# "> +"2354 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2354: __asm("OSCTUNE equ 09Ah"); +[; <" OSCTUNE equ 09Ah ;# "> +"2412 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2412: __asm("OSCCON equ 09Bh"); +[; <" OSCCON equ 09Bh ;# "> +"2484 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2484: __asm("OSCSTAT equ 09Ch"); +[; <" OSCSTAT equ 09Ch ;# "> +"2546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2546: __asm("BORCON equ 09Dh"); +[; <" BORCON equ 09Dh ;# "> +"2579 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2579: __asm("FVRCON equ 09Eh"); +[; <" FVRCON equ 09Eh ;# "> +"2629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2629: __asm("ZCD1CON equ 09Fh"); +[; <" ZCD1CON equ 09Fh ;# "> +"2675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2675: __asm("LATA equ 010Ch"); +[; <" LATA equ 010Ch ;# "> +"2737 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2737: __asm("LATB equ 010Dh"); +[; <" LATB equ 010Dh ;# "> +"2799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2799: __asm("LATC equ 010Eh"); +[; <" LATC equ 010Eh ;# "> +"2861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2861: __asm("CMOUT equ 0111h"); +[; <" CMOUT equ 0111h ;# "> +"2911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 2911: __asm("CM1CON0 equ 0112h"); +[; <" CM1CON0 equ 0112h ;# "> +"3008 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3008: __asm("CM1CON1 equ 0113h"); +[; <" CM1CON1 equ 0113h ;# "> +"3048 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3048: __asm("CM1NSEL equ 0114h"); +[; <" CM1NSEL equ 0114h ;# "> +"3102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3102: __asm("CM1PSEL equ 0115h"); +[; <" CM1PSEL equ 0115h ;# "> +"3182 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3182: __asm("CM2CON0 equ 0116h"); +[; <" CM2CON0 equ 0116h ;# "> +"3279 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3279: __asm("CM2CON1 equ 0117h"); +[; <" CM2CON1 equ 0117h ;# "> +"3319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3319: __asm("CM2NSEL equ 0118h"); +[; <" CM2NSEL equ 0118h ;# "> +"3373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3373: __asm("CM2PSEL equ 0119h"); +[; <" CM2PSEL equ 0119h ;# "> +"3453 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3453: __asm("CM3CON0 equ 011Ah"); +[; <" CM3CON0 equ 011Ah ;# "> +"3550 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3550: __asm("CM3CON1 equ 011Bh"); +[; <" CM3CON1 equ 011Bh ;# "> +"3590 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3590: __asm("CM3NSEL equ 011Ch"); +[; <" CM3NSEL equ 011Ch ;# "> +"3644 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3644: __asm("CM3PSEL equ 011Dh"); +[; <" CM3PSEL equ 011Dh ;# "> +"3724 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3724: __asm("ANSELA equ 018Ch"); +[; <" ANSELA equ 018Ch ;# "> +"3774 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3774: __asm("ANSELB equ 018Dh"); +[; <" ANSELB equ 018Dh ;# "> +"3824 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3824: __asm("ANSELC equ 018Eh"); +[; <" ANSELC equ 018Eh ;# "> +"3875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3875: __asm("PMADR equ 0191h"); +[; <" PMADR equ 0191h ;# "> +"3882 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3882: __asm("PMADRL equ 0191h"); +[; <" PMADRL equ 0191h ;# "> +"3902 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3902: __asm("PMADRH equ 0192h"); +[; <" PMADRH equ 0192h ;# "> +"3922 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3922: __asm("PMDAT equ 0193h"); +[; <" PMDAT equ 0193h ;# "> +"3929 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3929: __asm("PMDATL equ 0193h"); +[; <" PMDATL equ 0193h ;# "> +"3949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3949: __asm("PMDATH equ 0194h"); +[; <" PMDATH equ 0194h ;# "> +"3969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 3969: __asm("PMCON1 equ 0195h"); +[; <" PMCON1 equ 0195h ;# "> +"4025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4025: __asm("PMCON2 equ 0196h"); +[; <" PMCON2 equ 0196h ;# "> +"4045 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4045: __asm("VREGCON equ 0197h"); +[; <" VREGCON equ 0197h ;# "> +"4071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4071: __asm("RC1REG equ 0199h"); +[; <" RC1REG equ 0199h ;# "> +"4076 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4076: __asm("RCREG equ 0199h"); +[; <" RCREG equ 0199h ;# "> +"4080 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4080: __asm("RCREG1 equ 0199h"); +[; <" RCREG1 equ 0199h ;# "> +"4125 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4125: __asm("TX1REG equ 019Ah"); +[; <" TX1REG equ 019Ah ;# "> +"4130 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4130: __asm("TXREG1 equ 019Ah"); +[; <" TXREG1 equ 019Ah ;# "> +"4134 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4134: __asm("TXREG equ 019Ah"); +[; <" TXREG equ 019Ah ;# "> +"4179 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4179: __asm("SP1BRG equ 019Bh"); +[; <" SP1BRG equ 019Bh ;# "> +"4186 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4186: __asm("SP1BRGL equ 019Bh"); +[; <" SP1BRGL equ 019Bh ;# "> +"4191 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4191: __asm("SPBRG equ 019Bh"); +[; <" SPBRG equ 019Bh ;# "> +"4195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4195: __asm("SPBRG1 equ 019Bh"); +[; <" SPBRG1 equ 019Bh ;# "> +"4199 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4199: __asm("SPBRGL equ 019Bh"); +[; <" SPBRGL equ 019Bh ;# "> +"4256 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4256: __asm("SP1BRGH equ 019Ch"); +[; <" SP1BRGH equ 019Ch ;# "> +"4261 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4261: __asm("SPBRGH equ 019Ch"); +[; <" SPBRGH equ 019Ch ;# "> +"4265 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4265: __asm("SPBRGH1 equ 019Ch"); +[; <" SPBRGH1 equ 019Ch ;# "> +"4310 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4310: __asm("RC1STA equ 019Dh"); +[; <" RC1STA equ 019Dh ;# "> +"4315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4315: __asm("RCSTA1 equ 019Dh"); +[; <" RCSTA1 equ 019Dh ;# "> +"4319 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4319: __asm("RCSTA equ 019Dh"); +[; <" RCSTA equ 019Dh ;# "> +"4490 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4490: __asm("TX1STA equ 019Eh"); +[; <" TX1STA equ 019Eh ;# "> +"4495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4495: __asm("TXSTA1 equ 019Eh"); +[; <" TXSTA1 equ 019Eh ;# "> +"4499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4499: __asm("TXSTA equ 019Eh"); +[; <" TXSTA equ 019Eh ;# "> +"4670 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4670: __asm("BAUD1CON equ 019Fh"); +[; <" BAUD1CON equ 019Fh ;# "> +"4675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4675: __asm("BAUDCON1 equ 019Fh"); +[; <" BAUDCON1 equ 019Fh ;# "> +"4679 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4679: __asm("BAUDCTL1 equ 019Fh"); +[; <" BAUDCTL1 equ 019Fh ;# "> +"4683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4683: __asm("BAUDCON equ 019Fh"); +[; <" BAUDCON equ 019Fh ;# "> +"4687 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4687: __asm("BAUDCTL equ 019Fh"); +[; <" BAUDCTL equ 019Fh ;# "> +"4916 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4916: __asm("WPUA equ 020Ch"); +[; <" WPUA equ 020Ch ;# "> +"4978 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 4978: __asm("WPUB equ 020Dh"); +[; <" WPUB equ 020Dh ;# "> +"5040 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5040: __asm("WPUC equ 020Eh"); +[; <" WPUC equ 020Eh ;# "> +"5102 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5102: __asm("WPUE equ 0210h"); +[; <" WPUE equ 0210h ;# "> +"5123 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5123: __asm("SSP1BUF equ 0211h"); +[; <" SSP1BUF equ 0211h ;# "> +"5128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5128: __asm("SSPBUF equ 0211h"); +[; <" SSPBUF equ 0211h ;# "> +"5377 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5377: __asm("SSP1ADD equ 0212h"); +[; <" SSP1ADD equ 0212h ;# "> +"5382 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5382: __asm("SSPADD equ 0212h"); +[; <" SSPADD equ 0212h ;# "> +"5631 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5631: __asm("SSP1MSK equ 0213h"); +[; <" SSP1MSK equ 0213h ;# "> +"5636 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5636: __asm("SSPMSK equ 0213h"); +[; <" SSPMSK equ 0213h ;# "> +"5885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5885: __asm("SSP1STAT equ 0214h"); +[; <" SSP1STAT equ 0214h ;# "> +"5890 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 5890: __asm("SSPSTAT equ 0214h"); +[; <" SSPSTAT equ 0214h ;# "> +"6007 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6007: __asm("SSP1CON1 equ 0215h"); +[; <" SSP1CON1 equ 0215h ;# "> +"6012 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6012: __asm("SSPCON equ 0215h"); +[; <" SSPCON equ 0215h ;# "> +"6016 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6016: __asm("SSPCON1 equ 0215h"); +[; <" SSPCON1 equ 0215h ;# "> +"6020 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6020: __asm("SSP1CON equ 0215h"); +[; <" SSP1CON equ 0215h ;# "> +"6277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6277: __asm("SSP1CON2 equ 0216h"); +[; <" SSP1CON2 equ 0216h ;# "> +"6282 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6282: __asm("SSPCON2 equ 0216h"); +[; <" SSPCON2 equ 0216h ;# "> +"6399 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6399: __asm("SSP1CON3 equ 0217h"); +[; <" SSP1CON3 equ 0217h ;# "> +"6404 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6404: __asm("SSPCON3 equ 0217h"); +[; <" SSPCON3 equ 0217h ;# "> +"6521 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6521: __asm("MD3CON0 equ 021Bh"); +[; <" MD3CON0 equ 021Bh ;# "> +"6589 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6589: __asm("MD3CON1 equ 021Ch"); +[; <" MD3CON1 equ 021Ch ;# "> +"6655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6655: __asm("MD3SRC equ 021Dh"); +[; <" MD3SRC equ 021Dh ;# "> +"6747 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6747: __asm("MD3CARL equ 021Eh"); +[; <" MD3CARL equ 021Eh ;# "> +"6839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6839: __asm("MD3CARH equ 021Fh"); +[; <" MD3CARH equ 021Fh ;# "> +"6931 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6931: __asm("ODCONA equ 028Ch"); +[; <" ODCONA equ 028Ch ;# "> +"6993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 6993: __asm("ODCONB equ 028Dh"); +[; <" ODCONB equ 028Dh ;# "> +"7055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7055: __asm("ODCONC equ 028Eh"); +[; <" ODCONC equ 028Eh ;# "> +"7117 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7117: __asm("CCPR1 equ 0291h"); +[; <" CCPR1 equ 0291h ;# "> +"7124 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7124: __asm("CCPR1L equ 0291h"); +[; <" CCPR1L equ 0291h ;# "> +"7144 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7144: __asm("CCPR1H equ 0292h"); +[; <" CCPR1H equ 0292h ;# "> +"7164 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7164: __asm("CCP1CON equ 0293h"); +[; <" CCP1CON equ 0293h ;# "> +"7291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7291: __asm("CCP1CAP equ 0294h"); +[; <" CCP1CAP equ 0294h ;# "> +"7371 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7371: __asm("CCPR2 equ 0295h"); +[; <" CCPR2 equ 0295h ;# "> +"7378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7378: __asm("CCPR2L equ 0295h"); +[; <" CCPR2L equ 0295h ;# "> +"7398 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7398: __asm("CCPR2H equ 0296h"); +[; <" CCPR2H equ 0296h ;# "> +"7418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7418: __asm("CCP2CON equ 0297h"); +[; <" CCP2CON equ 0297h ;# "> +"7545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7545: __asm("CCP2CAP equ 0298h"); +[; <" CCP2CAP equ 0298h ;# "> +"7625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7625: __asm("CCPR7 equ 0299h"); +[; <" CCPR7 equ 0299h ;# "> +"7632 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7632: __asm("CCPR7L equ 0299h"); +[; <" CCPR7L equ 0299h ;# "> +"7652 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7652: __asm("CCPR7H equ 029Ah"); +[; <" CCPR7H equ 029Ah ;# "> +"7672 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7672: __asm("CCP7CON equ 029Bh"); +[; <" CCP7CON equ 029Bh ;# "> +"7799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7799: __asm("CCP7CAP equ 029Ch"); +[; <" CCP7CAP equ 029Ch ;# "> +"7879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7879: __asm("CCPTMRS1 equ 029Eh"); +[; <" CCPTMRS1 equ 029Eh ;# "> +"7949 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 7949: __asm("CCPTMRS2 equ 029Fh"); +[; <" CCPTMRS2 equ 029Fh ;# "> +"8019 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8019: __asm("SLRCONA equ 030Ch"); +[; <" SLRCONA equ 030Ch ;# "> +"8081 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8081: __asm("SLRCONB equ 030Dh"); +[; <" SLRCONB equ 030Dh ;# "> +"8143 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8143: __asm("SLRCONC equ 030Eh"); +[; <" SLRCONC equ 030Eh ;# "> +"8205 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8205: __asm("MD1CON0 equ 0315h"); +[; <" MD1CON0 equ 0315h ;# "> +"8273 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8273: __asm("MD1CON1 equ 0316h"); +[; <" MD1CON1 equ 0316h ;# "> +"8339 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8339: __asm("MD1SRC equ 0317h"); +[; <" MD1SRC equ 0317h ;# "> +"8431 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8431: __asm("MD1CARL equ 0318h"); +[; <" MD1CARL equ 0318h ;# "> +"8523 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8523: __asm("MD1CARH equ 0319h"); +[; <" MD1CARH equ 0319h ;# "> +"8615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8615: __asm("MD2CON0 equ 031Bh"); +[; <" MD2CON0 equ 031Bh ;# "> +"8683 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8683: __asm("MD2CON1 equ 031Ch"); +[; <" MD2CON1 equ 031Ch ;# "> +"8749 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8749: __asm("MD2SRC equ 031Dh"); +[; <" MD2SRC equ 031Dh ;# "> +"8841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8841: __asm("MD2CARL equ 031Eh"); +[; <" MD2CARL equ 031Eh ;# "> +"8933 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 8933: __asm("MD2CARH equ 031Fh"); +[; <" MD2CARH equ 031Fh ;# "> +"9025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9025: __asm("INLVLA equ 038Ch"); +[; <" INLVLA equ 038Ch ;# "> +"9087 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9087: __asm("INLVLB equ 038Dh"); +[; <" INLVLB equ 038Dh ;# "> +"9149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9149: __asm("INLVLC equ 038Eh"); +[; <" INLVLC equ 038Eh ;# "> +"9211 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9211: __asm("INLVE equ 0390h"); +[; <" INLVE equ 0390h ;# "> +"9232 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9232: __asm("IOCAP equ 0391h"); +[; <" IOCAP equ 0391h ;# "> +"9294 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9294: __asm("IOCAN equ 0392h"); +[; <" IOCAN equ 0392h ;# "> +"9356 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9356: __asm("IOCAF equ 0393h"); +[; <" IOCAF equ 0393h ;# "> +"9418 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9418: __asm("IOCBP equ 0394h"); +[; <" IOCBP equ 0394h ;# "> +"9480 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9480: __asm("IOCBN equ 0395h"); +[; <" IOCBN equ 0395h ;# "> +"9542 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9542: __asm("IOCBF equ 0396h"); +[; <" IOCBF equ 0396h ;# "> +"9604 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9604: __asm("IOCCP equ 0397h"); +[; <" IOCCP equ 0397h ;# "> +"9666 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9666: __asm("IOCCN equ 0398h"); +[; <" IOCCN equ 0398h ;# "> +"9728 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9728: __asm("IOCCF equ 0399h"); +[; <" IOCCF equ 0399h ;# "> +"9790 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9790: __asm("IOCEP equ 039Dh"); +[; <" IOCEP equ 039Dh ;# "> +"9811 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9811: __asm("IOCEN equ 039Eh"); +[; <" IOCEN equ 039Eh ;# "> +"9832 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9832: __asm("IOCEF equ 039Fh"); +[; <" IOCEF equ 039Fh ;# "> +"9853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9853: __asm("HIDRVB equ 040Dh"); +[; <" HIDRVB equ 040Dh ;# "> +"9879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9879: __asm("TMR5 equ 040Fh"); +[; <" TMR5 equ 040Fh ;# "> +"9886 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9886: __asm("TMR5L equ 040Fh"); +[; <" TMR5L equ 040Fh ;# "> +"9906 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9906: __asm("TMR5H equ 0410h"); +[; <" TMR5H equ 0410h ;# "> +"9926 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 9926: __asm("T5CON equ 0411h"); +[; <" T5CON equ 0411h ;# "> +"10083 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10083: __asm("T5GCON equ 0412h"); +[; <" T5GCON equ 0412h ;# "> +"10213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10213: __asm("T4TMR equ 0413h"); +[; <" T4TMR equ 0413h ;# "> +"10218 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10218: __asm("TMR4 equ 0413h"); +[; <" TMR4 equ 0413h ;# "> +"10267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10267: __asm("T4PR equ 0414h"); +[; <" T4PR equ 0414h ;# "> +"10272 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10272: __asm("PR4 equ 0414h"); +[; <" PR4 equ 0414h ;# "> +"10321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10321: __asm("T4CON equ 0415h"); +[; <" T4CON equ 0415h ;# "> +"10467 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10467: __asm("T4HLT equ 0416h"); +[; <" T4HLT equ 0416h ;# "> +"10595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10595: __asm("T4CLKCON equ 0417h"); +[; <" T4CLKCON equ 0417h ;# "> +"10675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10675: __asm("T4RST equ 0418h"); +[; <" T4RST equ 0418h ;# "> +"10767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10767: __asm("T6TMR equ 041Ah"); +[; <" T6TMR equ 041Ah ;# "> +"10772 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10772: __asm("TMR6 equ 041Ah"); +[; <" TMR6 equ 041Ah ;# "> +"10821 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10821: __asm("T6PR equ 041Bh"); +[; <" T6PR equ 041Bh ;# "> +"10826 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10826: __asm("PR6 equ 041Bh"); +[; <" PR6 equ 041Bh ;# "> +"10875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 10875: __asm("T6CON equ 041Ch"); +[; <" T6CON equ 041Ch ;# "> +"11021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11021: __asm("T6HLT equ 041Dh"); +[; <" T6HLT equ 041Dh ;# "> +"11149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11149: __asm("T6CLKCON equ 041Eh"); +[; <" T6CLKCON equ 041Eh ;# "> +"11229 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11229: __asm("T6RST equ 041Fh"); +[; <" T6RST equ 041Fh ;# "> +"11321 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11321: __asm("ADRES equ 048Eh"); +[; <" ADRES equ 048Eh ;# "> +"11328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11328: __asm("ADRESL equ 048Eh"); +[; <" ADRESL equ 048Eh ;# "> +"11348 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11348: __asm("ADRESH equ 048Fh"); +[; <" ADRESH equ 048Fh ;# "> +"11368 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11368: __asm("ADCON0 equ 0490h"); +[; <" ADCON0 equ 0490h ;# "> +"11400 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11400: __asm("ADCON1 equ 0491h"); +[; <" ADCON1 equ 0491h ;# "> +"11439 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11439: __asm("ADCON2 equ 0492h"); +[; <" ADCON2 equ 0492h ;# "> +"11459 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11459: __asm("T2TMR equ 0493h"); +[; <" T2TMR equ 0493h ;# "> +"11464 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11464: __asm("TMR2 equ 0493h"); +[; <" TMR2 equ 0493h ;# "> +"11513 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11513: __asm("T2PR equ 0494h"); +[; <" T2PR equ 0494h ;# "> +"11518 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11518: __asm("PR2 equ 0494h"); +[; <" PR2 equ 0494h ;# "> +"11567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11567: __asm("T2CON equ 0495h"); +[; <" T2CON equ 0495h ;# "> +"11713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11713: __asm("T2HLT equ 0496h"); +[; <" T2HLT equ 0496h ;# "> +"11841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11841: __asm("T2CLKCON equ 0497h"); +[; <" T2CLKCON equ 0497h ;# "> +"11921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 11921: __asm("T2RST equ 0498h"); +[; <" T2RST equ 0498h ;# "> +"12013 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12013: __asm("T8TMR equ 049Ah"); +[; <" T8TMR equ 049Ah ;# "> +"12018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12018: __asm("TMR8 equ 049Ah"); +[; <" TMR8 equ 049Ah ;# "> +"12067 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12067: __asm("T8PR equ 049Bh"); +[; <" T8PR equ 049Bh ;# "> +"12072 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12072: __asm("PR8 equ 049Bh"); +[; <" PR8 equ 049Bh ;# "> +"12121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12121: __asm("T8CON equ 049Ch"); +[; <" T8CON equ 049Ch ;# "> +"12267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12267: __asm("T8HLT equ 049Dh"); +[; <" T8HLT equ 049Dh ;# "> +"12395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12395: __asm("T8CLKCON equ 049Eh"); +[; <" T8CLKCON equ 049Eh ;# "> +"12475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12475: __asm("T8RST equ 049Fh"); +[; <" T8RST equ 049Fh ;# "> +"12567 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12567: __asm("OPA1NCHS equ 050Fh"); +[; <" OPA1NCHS equ 050Fh ;# "> +"12595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12595: __asm("OPA1PCHS equ 0510h"); +[; <" OPA1PCHS equ 0510h ;# "> +"12623 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12623: __asm("OPA1CON equ 0511h"); +[; <" OPA1CON equ 0511h ;# "> +"12719 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12719: __asm("OPA1ORS equ 0512h"); +[; <" OPA1ORS equ 0512h ;# "> +"12739 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12739: __asm("OPA2NCHS equ 0513h"); +[; <" OPA2NCHS equ 0513h ;# "> +"12767 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12767: __asm("OPA2PCHS equ 0514h"); +[; <" OPA2PCHS equ 0514h ;# "> +"12795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12795: __asm("OPA2CON equ 0515h"); +[; <" OPA2CON equ 0515h ;# "> +"12891 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12891: __asm("OPA2ORS equ 0516h"); +[; <" OPA2ORS equ 0516h ;# "> +"12911 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12911: __asm("OPA3NCHS equ 0517h"); +[; <" OPA3NCHS equ 0517h ;# "> +"12939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12939: __asm("OPA3PCHS equ 0518h"); +[; <" OPA3PCHS equ 0518h ;# "> +"12967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 12967: __asm("OPA3CON equ 0519h"); +[; <" OPA3CON equ 0519h ;# "> +"13075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13075: __asm("OPA3ORS equ 051Ah"); +[; <" OPA3ORS equ 051Ah ;# "> +"13095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13095: __asm("DACLD equ 058Dh"); +[; <" DACLD equ 058Dh ;# "> +"13128 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13128: __asm("DAC1CON0 equ 058Eh"); +[; <" DAC1CON0 equ 058Eh ;# "> +"13346 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13346: __asm("DAC1REF equ 058Fh"); +[; <" DAC1REF equ 058Fh ;# "> +"13353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13353: __asm("DAC1REFL equ 058Fh"); +[; <" DAC1REFL equ 058Fh ;# "> +"13358 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13358: __asm("DAC1CON1 equ 058Fh"); +[; <" DAC1CON1 equ 058Fh ;# "> +"13775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13775: __asm("DAC1REFH equ 0590h"); +[; <" DAC1REFH equ 0590h ;# "> +"13780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 13780: __asm("DAC1CON2 equ 0590h"); +[; <" DAC1CON2 equ 0590h ;# "> +"14197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14197: __asm("DAC2CON0 equ 0591h"); +[; <" DAC2CON0 equ 0591h ;# "> +"14415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14415: __asm("DAC2REF equ 0592h"); +[; <" DAC2REF equ 0592h ;# "> +"14422 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14422: __asm("DAC2REFL equ 0592h"); +[; <" DAC2REFL equ 0592h ;# "> +"14427 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14427: __asm("DAC2CON1 equ 0592h"); +[; <" DAC2CON1 equ 0592h ;# "> +"14844 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14844: __asm("DAC2REFH equ 0593h"); +[; <" DAC2REFH equ 0593h ;# "> +"14849 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 14849: __asm("DAC2CON2 equ 0593h"); +[; <" DAC2CON2 equ 0593h ;# "> +"15266 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15266: __asm("DAC3CON0 equ 0594h"); +[; <" DAC3CON0 equ 0594h ;# "> +"15455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15455: __asm("DAC3REF equ 0595h"); +[; <" DAC3REF equ 0595h ;# "> +"15460 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15460: __asm("DAC3CON1 equ 0595h"); +[; <" DAC3CON1 equ 0595h ;# "> +"15829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 15829: __asm("DAC4CON0 equ 0596h"); +[; <" DAC4CON0 equ 0596h ;# "> +"16018 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16018: __asm("DAC4REF equ 0597h"); +[; <" DAC4REF equ 0597h ;# "> +"16023 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16023: __asm("DAC4CON1 equ 0597h"); +[; <" DAC4CON1 equ 0597h ;# "> +"16392 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16392: __asm("DAC5CON0 equ 0598h"); +[; <" DAC5CON0 equ 0598h ;# "> +"16610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16610: __asm("DAC5REF equ 0599h"); +[; <" DAC5REF equ 0599h ;# "> +"16617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16617: __asm("DAC5REFL equ 0599h"); +[; <" DAC5REFL equ 0599h ;# "> +"16622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 16622: __asm("DAC5CON1 equ 0599h"); +[; <" DAC5CON1 equ 0599h ;# "> +"17039 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17039: __asm("DAC5REFH equ 059Ah"); +[; <" DAC5REFH equ 059Ah ;# "> +"17044 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17044: __asm("DAC5CON2 equ 059Ah"); +[; <" DAC5CON2 equ 059Ah ;# "> +"17461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17461: __asm("DAC7CON0 equ 059Eh"); +[; <" DAC7CON0 equ 059Eh ;# "> +"17650 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17650: __asm("DAC7REF equ 059Fh"); +[; <" DAC7REF equ 059Fh ;# "> +"17655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 17655: __asm("DAC7CON1 equ 059Fh"); +[; <" DAC7CON1 equ 059Fh ;# "> +"18024 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18024: __asm("PWM3DC equ 0614h"); +[; <" PWM3DC equ 0614h ;# "> +"18031 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18031: __asm("PWM3DCL equ 0614h"); +[; <" PWM3DCL equ 0614h ;# "> +"18097 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18097: __asm("PWM3DCH equ 0615h"); +[; <" PWM3DCH equ 0615h ;# "> +"18267 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18267: __asm("PWM3CON equ 0616h"); +[; <" PWM3CON equ 0616h ;# "> +"18323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18323: __asm("PWM4DC equ 0617h"); +[; <" PWM4DC equ 0617h ;# "> +"18330 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18330: __asm("PWM4DCL equ 0617h"); +[; <" PWM4DCL equ 0617h ;# "> +"18396 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18396: __asm("PWM4DCH equ 0618h"); +[; <" PWM4DCH equ 0618h ;# "> +"18566 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18566: __asm("PWM4CON equ 0619h"); +[; <" PWM4CON equ 0619h ;# "> +"18622 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18622: __asm("PWM9DC equ 061Ah"); +[; <" PWM9DC equ 061Ah ;# "> +"18629 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18629: __asm("PWM9DCL equ 061Ah"); +[; <" PWM9DCL equ 061Ah ;# "> +"18695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18695: __asm("PWM9DCH equ 061Bh"); +[; <" PWM9DCH equ 061Bh ;# "> +"18865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18865: __asm("PWM9CON equ 061Ch"); +[; <" PWM9CON equ 061Ch ;# "> +"18921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 18921: __asm("COG1PHR equ 068Dh"); +[; <" COG1PHR equ 068Dh ;# "> +"19017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19017: __asm("COG1PHF equ 068Eh"); +[; <" COG1PHF equ 068Eh ;# "> +"19113 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19113: __asm("COG1BLKR equ 068Fh"); +[; <" COG1BLKR equ 068Fh ;# "> +"19209 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19209: __asm("COG1BLKF equ 0690h"); +[; <" COG1BLKF equ 0690h ;# "> +"19305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19305: __asm("COG1DBR equ 0691h"); +[; <" COG1DBR equ 0691h ;# "> +"19401 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19401: __asm("COG1DBF equ 0692h"); +[; <" COG1DBF equ 0692h ;# "> +"19497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19497: __asm("COG1CON0 equ 0693h"); +[; <" COG1CON0 equ 0693h ;# "> +"19627 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19627: __asm("COG1CON1 equ 0694h"); +[; <" COG1CON1 equ 0694h ;# "> +"19717 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19717: __asm("COG1RIS0 equ 0695h"); +[; <" COG1RIS0 equ 0695h ;# "> +"19829 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19829: __asm("COG1RIS1 equ 0696h"); +[; <" COG1RIS1 equ 0696h ;# "> +"19941 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 19941: __asm("COG1RSIM0 equ 0697h"); +[; <" COG1RSIM0 equ 0697h ;# "> +"20053 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20053: __asm("COG1RSIM1 equ 0698h"); +[; <" COG1RSIM1 equ 0698h ;# "> +"20165 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20165: __asm("COG1FIS0 equ 0699h"); +[; <" COG1FIS0 equ 0699h ;# "> +"20277 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20277: __asm("COG1FIS1 equ 069Ah"); +[; <" COG1FIS1 equ 069Ah ;# "> +"20389 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20389: __asm("COG1FSIM0 equ 069Bh"); +[; <" COG1FSIM0 equ 069Bh ;# "> +"20501 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20501: __asm("COG1FSIM1 equ 069Ch"); +[; <" COG1FSIM1 equ 069Ch ;# "> +"20613 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20613: __asm("COG1ASD0 equ 069Dh"); +[; <" COG1ASD0 equ 069Dh ;# "> +"20745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20745: __asm("COG1ASD1 equ 069Eh"); +[; <" COG1ASD1 equ 069Eh ;# "> +"20857 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20857: __asm("COG1STR equ 069Fh"); +[; <" COG1STR equ 069Fh ;# "> +"20969 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 20969: __asm("COG2PHR equ 070Dh"); +[; <" COG2PHR equ 070Dh ;# "> +"21065 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21065: __asm("COG2PHF equ 070Eh"); +[; <" COG2PHF equ 070Eh ;# "> +"21161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21161: __asm("COG2BLKR equ 070Fh"); +[; <" COG2BLKR equ 070Fh ;# "> +"21257 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21257: __asm("COG2BLKF equ 0710h"); +[; <" COG2BLKF equ 0710h ;# "> +"21353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21353: __asm("COG2DBR equ 0711h"); +[; <" COG2DBR equ 0711h ;# "> +"21449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21449: __asm("COG2DBF equ 0712h"); +[; <" COG2DBF equ 0712h ;# "> +"21545 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21545: __asm("COG2CON0 equ 0713h"); +[; <" COG2CON0 equ 0713h ;# "> +"21675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21675: __asm("COG2CON1 equ 0714h"); +[; <" COG2CON1 equ 0714h ;# "> +"21765 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21765: __asm("COG2RIS0 equ 0715h"); +[; <" COG2RIS0 equ 0715h ;# "> +"21877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21877: __asm("COG2RIS1 equ 0716h"); +[; <" COG2RIS1 equ 0716h ;# "> +"21989 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 21989: __asm("COG2RSIM0 equ 0717h"); +[; <" COG2RSIM0 equ 0717h ;# "> +"22101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22101: __asm("COG2RSIM1 equ 0718h"); +[; <" COG2RSIM1 equ 0718h ;# "> +"22213 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22213: __asm("COG2FIS0 equ 0719h"); +[; <" COG2FIS0 equ 0719h ;# "> +"22325 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22325: __asm("COG2FIS1 equ 071Ah"); +[; <" COG2FIS1 equ 071Ah ;# "> +"22437 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22437: __asm("COG2FSIM0 equ 071Bh"); +[; <" COG2FSIM0 equ 071Bh ;# "> +"22549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22549: __asm("COG2FSIM1 equ 071Ch"); +[; <" COG2FSIM1 equ 071Ch ;# "> +"22661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22661: __asm("COG2ASD0 equ 071Dh"); +[; <" COG2ASD0 equ 071Dh ;# "> +"22793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22793: __asm("COG2ASD1 equ 071Eh"); +[; <" COG2ASD1 equ 071Eh ;# "> +"22905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 22905: __asm("COG2STR equ 071Fh"); +[; <" COG2STR equ 071Fh ;# "> +"23017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23017: __asm("PRG1RTSS equ 078Eh"); +[; <" PRG1RTSS equ 078Eh ;# "> +"23089 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23089: __asm("PRG1FTSS equ 078Fh"); +[; <" PRG1FTSS equ 078Fh ;# "> +"23161 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23161: __asm("PRG1INS equ 0790h"); +[; <" PRG1INS equ 0790h ;# "> +"23233 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23233: __asm("PRG1CON0 equ 0791h"); +[; <" PRG1CON0 equ 0791h ;# "> +"23353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23353: __asm("PRG1CON1 equ 0792h"); +[; <" PRG1CON1 equ 0792h ;# "> +"23405 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23405: __asm("PRG1CON2 equ 0793h"); +[; <" PRG1CON2 equ 0793h ;# "> +"23497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23497: __asm("PRG2RTSS equ 0794h"); +[; <" PRG2RTSS equ 0794h ;# "> +"23569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23569: __asm("PRG2FTSS equ 0795h"); +[; <" PRG2FTSS equ 0795h ;# "> +"23641 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23641: __asm("PRG2INS equ 0796h"); +[; <" PRG2INS equ 0796h ;# "> +"23713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23713: __asm("PRG2CON0 equ 0797h"); +[; <" PRG2CON0 equ 0797h ;# "> +"23833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23833: __asm("PRG2CON1 equ 0798h"); +[; <" PRG2CON1 equ 0798h ;# "> +"23885 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23885: __asm("PRG2CON2 equ 0799h"); +[; <" PRG2CON2 equ 0799h ;# "> +"23977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 23977: __asm("PRG3RTSS equ 079Ah"); +[; <" PRG3RTSS equ 079Ah ;# "> +"24049 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24049: __asm("PRG3FTSS equ 079Bh"); +[; <" PRG3FTSS equ 079Bh ;# "> +"24121 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24121: __asm("PRG3INS equ 079Ch"); +[; <" PRG3INS equ 079Ch ;# "> +"24193 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24193: __asm("PRG3CON0 equ 079Dh"); +[; <" PRG3CON0 equ 079Dh ;# "> +"24313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24313: __asm("PRG3CON1 equ 079Eh"); +[; <" PRG3CON1 equ 079Eh ;# "> +"24365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24365: __asm("PRG3CON2 equ 079Fh"); +[; <" PRG3CON2 equ 079Fh ;# "> +"24457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24457: __asm("COG3PHR equ 080Dh"); +[; <" COG3PHR equ 080Dh ;# "> +"24553 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24553: __asm("COG3PHF equ 080Eh"); +[; <" COG3PHF equ 080Eh ;# "> +"24649 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24649: __asm("COG3BLKR equ 080Fh"); +[; <" COG3BLKR equ 080Fh ;# "> +"24745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24745: __asm("COG3BLKF equ 0810h"); +[; <" COG3BLKF equ 0810h ;# "> +"24841 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24841: __asm("COG3DBR equ 0811h"); +[; <" COG3DBR equ 0811h ;# "> +"24937 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 24937: __asm("COG3DBF equ 0812h"); +[; <" COG3DBF equ 0812h ;# "> +"25033 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25033: __asm("COG3CON0 equ 0813h"); +[; <" COG3CON0 equ 0813h ;# "> +"25163 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25163: __asm("COG3CON1 equ 0814h"); +[; <" COG3CON1 equ 0814h ;# "> +"25253 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25253: __asm("COG3RIS0 equ 0815h"); +[; <" COG3RIS0 equ 0815h ;# "> +"25365 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25365: __asm("COG3RIS1 equ 0816h"); +[; <" COG3RIS1 equ 0816h ;# "> +"25457 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25457: __asm("COG3RSIM0 equ 0817h"); +[; <" COG3RSIM0 equ 0817h ;# "> +"25569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25569: __asm("COG3RSIM1 equ 0818h"); +[; <" COG3RSIM1 equ 0818h ;# "> +"25661 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25661: __asm("COG3FIS0 equ 0819h"); +[; <" COG3FIS0 equ 0819h ;# "> +"25773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25773: __asm("COG3FIS1 equ 081Ah"); +[; <" COG3FIS1 equ 081Ah ;# "> +"25865 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25865: __asm("COG3FSIM0 equ 081Bh"); +[; <" COG3FSIM0 equ 081Bh ;# "> +"25977 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 25977: __asm("COG3FSIM1 equ 081Ch"); +[; <" COG3FSIM1 equ 081Ch ;# "> +"26069 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26069: __asm("COG3ASD0 equ 081Dh"); +[; <" COG3ASD0 equ 081Dh ;# "> +"26201 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26201: __asm("COG3ASD1 equ 081Eh"); +[; <" COG3ASD1 equ 081Eh ;# "> +"26313 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26313: __asm("COG3STR equ 081Fh"); +[; <" COG3STR equ 081Fh ;# "> +"26425 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26425: __asm("CM4CON0 equ 090Ch"); +[; <" CM4CON0 equ 090Ch ;# "> +"26522 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26522: __asm("CM4CON1 equ 090Dh"); +[; <" CM4CON1 equ 090Dh ;# "> +"26562 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26562: __asm("CM4NSEL equ 090Eh"); +[; <" CM4NSEL equ 090Eh ;# "> +"26616 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26616: __asm("CM4PSEL equ 090Fh"); +[; <" CM4PSEL equ 090Fh ;# "> +"26696 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26696: __asm("CM5CON0 equ 0910h"); +[; <" CM5CON0 equ 0910h ;# "> +"26793 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26793: __asm("CM5CON1 equ 0911h"); +[; <" CM5CON1 equ 0911h ;# "> +"26833 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26833: __asm("CM5NSEL equ 0912h"); +[; <" CM5NSEL equ 0912h ;# "> +"26887 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26887: __asm("CM5PSEL equ 0913h"); +[; <" CM5PSEL equ 0913h ;# "> +"26967 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 26967: __asm("CM6CON0 equ 0914h"); +[; <" CM6CON0 equ 0914h ;# "> +"27064 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27064: __asm("CM6CON1 equ 0915h"); +[; <" CM6CON1 equ 0915h ;# "> +"27104 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27104: __asm("CM6NSEL equ 0916h"); +[; <" CM6NSEL equ 0916h ;# "> +"27158 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27158: __asm("CM6PSEL equ 0917h"); +[; <" CM6PSEL equ 0917h ;# "> +"27238 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27238: __asm("PWMEN equ 0D8Eh"); +[; <" PWMEN equ 0D8Eh ;# "> +"27270 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27270: __asm("PWMLD equ 0D8Fh"); +[; <" PWMLD equ 0D8Fh ;# "> +"27302 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27302: __asm("PWMOUT equ 0D90h"); +[; <" PWMOUT equ 0D90h ;# "> +"27334 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27334: __asm("PWM5PH equ 0D91h"); +[; <" PWM5PH equ 0D91h ;# "> +"27341 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27341: __asm("PWM5PHL equ 0D91h"); +[; <" PWM5PHL equ 0D91h ;# "> +"27419 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27419: __asm("PWM5PHH equ 0D92h"); +[; <" PWM5PHH equ 0D92h ;# "> +"27497 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27497: __asm("PWM5DC equ 0D93h"); +[; <" PWM5DC equ 0D93h ;# "> +"27504 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27504: __asm("PWM5DCL equ 0D93h"); +[; <" PWM5DCL equ 0D93h ;# "> +"27582 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27582: __asm("PWM5DCH equ 0D94h"); +[; <" PWM5DCH equ 0D94h ;# "> +"27660 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27660: __asm("PWM5PR equ 0D95h"); +[; <" PWM5PR equ 0D95h ;# "> +"27667 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27667: __asm("PWM5PRL equ 0D95h"); +[; <" PWM5PRL equ 0D95h ;# "> +"27745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27745: __asm("PWM5PRH equ 0D96h"); +[; <" PWM5PRH equ 0D96h ;# "> +"27823 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27823: __asm("PWM5OF equ 0D97h"); +[; <" PWM5OF equ 0D97h ;# "> +"27830 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27830: __asm("PWM5OFL equ 0D97h"); +[; <" PWM5OFL equ 0D97h ;# "> +"27908 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27908: __asm("PWM5OFH equ 0D98h"); +[; <" PWM5OFH equ 0D98h ;# "> +"27986 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27986: __asm("PWM5TMR equ 0D99h"); +[; <" PWM5TMR equ 0D99h ;# "> +"27993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 27993: __asm("PWM5TMRL equ 0D99h"); +[; <" PWM5TMRL equ 0D99h ;# "> +"28071 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28071: __asm("PWM5TMRH equ 0D9Ah"); +[; <" PWM5TMRH equ 0D9Ah ;# "> +"28149 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28149: __asm("PWM5CON equ 0D9Bh"); +[; <" PWM5CON equ 0D9Bh ;# "> +"28247 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28247: __asm("PWM5INTE equ 0D9Ch"); +[; <" PWM5INTE equ 0D9Ch ;# "> +"28252 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28252: __asm("PWM5INTCON equ 0D9Ch"); +[; <" PWM5INTCON equ 0D9Ch ;# "> +"28373 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28373: __asm("PWM5INTF equ 0D9Dh"); +[; <" PWM5INTF equ 0D9Dh ;# "> +"28378 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28378: __asm("PWM5INTFLG equ 0D9Dh"); +[; <" PWM5INTFLG equ 0D9Dh ;# "> +"28499 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28499: __asm("PWM5CLKCON equ 0D9Eh"); +[; <" PWM5CLKCON equ 0D9Eh ;# "> +"28619 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28619: __asm("PWM5LDCON equ 0D9Fh"); +[; <" PWM5LDCON equ 0D9Fh ;# "> +"28701 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28701: __asm("PWM5OFCON equ 0DA0h"); +[; <" PWM5OFCON equ 0DA0h ;# "> +"28809 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28809: __asm("PWM6PH equ 0DA1h"); +[; <" PWM6PH equ 0DA1h ;# "> +"28816 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28816: __asm("PWM6PHL equ 0DA1h"); +[; <" PWM6PHL equ 0DA1h ;# "> +"28894 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28894: __asm("PWM6PHH equ 0DA2h"); +[; <" PWM6PHH equ 0DA2h ;# "> +"28972 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28972: __asm("PWM6DC equ 0DA3h"); +[; <" PWM6DC equ 0DA3h ;# "> +"28979 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 28979: __asm("PWM6DCL equ 0DA3h"); +[; <" PWM6DCL equ 0DA3h ;# "> +"29057 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29057: __asm("PWM6DCH equ 0DA4h"); +[; <" PWM6DCH equ 0DA4h ;# "> +"29135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29135: __asm("PWM6PR equ 0DA5h"); +[; <" PWM6PR equ 0DA5h ;# "> +"29142 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29142: __asm("PWM6PRL equ 0DA5h"); +[; <" PWM6PRL equ 0DA5h ;# "> +"29220 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29220: __asm("PWM6PRH equ 0DA6h"); +[; <" PWM6PRH equ 0DA6h ;# "> +"29298 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29298: __asm("PWM6OF equ 0DA7h"); +[; <" PWM6OF equ 0DA7h ;# "> +"29305 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29305: __asm("PWM6OFL equ 0DA7h"); +[; <" PWM6OFL equ 0DA7h ;# "> +"29383 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29383: __asm("PWM6OFH equ 0DA8h"); +[; <" PWM6OFH equ 0DA8h ;# "> +"29461 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29461: __asm("PWM6TMR equ 0DA9h"); +[; <" PWM6TMR equ 0DA9h ;# "> +"29468 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29468: __asm("PWM6TMRL equ 0DA9h"); +[; <" PWM6TMRL equ 0DA9h ;# "> +"29546 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29546: __asm("PWM6TMRH equ 0DAAh"); +[; <" PWM6TMRH equ 0DAAh ;# "> +"29624 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29624: __asm("PWM6CON equ 0DABh"); +[; <" PWM6CON equ 0DABh ;# "> +"29722 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29722: __asm("PWM6INTE equ 0DACh"); +[; <" PWM6INTE equ 0DACh ;# "> +"29727 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29727: __asm("PWM6INTCON equ 0DACh"); +[; <" PWM6INTCON equ 0DACh ;# "> +"29848 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29848: __asm("PWM6INTF equ 0DADh"); +[; <" PWM6INTF equ 0DADh ;# "> +"29853 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29853: __asm("PWM6INTFLG equ 0DADh"); +[; <" PWM6INTFLG equ 0DADh ;# "> +"29974 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 29974: __asm("PWM6CLKCON equ 0DAEh"); +[; <" PWM6CLKCON equ 0DAEh ;# "> +"30094 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30094: __asm("PWM6LDCON equ 0DAFh"); +[; <" PWM6LDCON equ 0DAFh ;# "> +"30176 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30176: __asm("PWM6OFCON equ 0DB0h"); +[; <" PWM6OFCON equ 0DB0h ;# "> +"30284 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30284: __asm("PWM11PH equ 0DB1h"); +[; <" PWM11PH equ 0DB1h ;# "> +"30291 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30291: __asm("PWM11PHL equ 0DB1h"); +[; <" PWM11PHL equ 0DB1h ;# "> +"30369 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30369: __asm("PWM11PHH equ 0DB2h"); +[; <" PWM11PHH equ 0DB2h ;# "> +"30447 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30447: __asm("PWM11DC equ 0DB3h"); +[; <" PWM11DC equ 0DB3h ;# "> +"30454 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30454: __asm("PWM11DCL equ 0DB3h"); +[; <" PWM11DCL equ 0DB3h ;# "> +"30532 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30532: __asm("PWM11DCH equ 0DB4h"); +[; <" PWM11DCH equ 0DB4h ;# "> +"30610 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30610: __asm("PWM11PR equ 0DB5h"); +[; <" PWM11PR equ 0DB5h ;# "> +"30617 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30617: __asm("PWM11PRL equ 0DB5h"); +[; <" PWM11PRL equ 0DB5h ;# "> +"30695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30695: __asm("PWM11PRH equ 0DB6h"); +[; <" PWM11PRH equ 0DB6h ;# "> +"30773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30773: __asm("PWM11OF equ 0DB7h"); +[; <" PWM11OF equ 0DB7h ;# "> +"30780 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30780: __asm("PWM11OFL equ 0DB7h"); +[; <" PWM11OFL equ 0DB7h ;# "> +"30858 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30858: __asm("PWM11OFH equ 0DB8h"); +[; <" PWM11OFH equ 0DB8h ;# "> +"30936 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30936: __asm("PWM11TMR equ 0DB9h"); +[; <" PWM11TMR equ 0DB9h ;# "> +"30943 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 30943: __asm("PWM11TMRL equ 0DB9h"); +[; <" PWM11TMRL equ 0DB9h ;# "> +"31021 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31021: __asm("PWM11TMRH equ 0DBAh"); +[; <" PWM11TMRH equ 0DBAh ;# "> +"31099 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31099: __asm("PWM11CON equ 0DBBh"); +[; <" PWM11CON equ 0DBBh ;# "> +"31197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31197: __asm("PWM11INTE equ 0DBCh"); +[; <" PWM11INTE equ 0DBCh ;# "> +"31202 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31202: __asm("PWM11INTCON equ 0DBCh"); +[; <" PWM11INTCON equ 0DBCh ;# "> +"31323 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31323: __asm("PWM11INTF equ 0DBDh"); +[; <" PWM11INTF equ 0DBDh ;# "> +"31328 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31328: __asm("PWM11INTFLG equ 0DBDh"); +[; <" PWM11INTFLG equ 0DBDh ;# "> +"31449 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31449: __asm("PWM11CLKCON equ 0DBEh"); +[; <" PWM11CLKCON equ 0DBEh ;# "> +"31569 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31569: __asm("PWM11LDCON equ 0DBFh"); +[; <" PWM11LDCON equ 0DBFh ;# "> +"31651 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31651: __asm("PWM11OFCON equ 0DC0h"); +[; <" PWM11OFCON equ 0DC0h ;# "> +"31759 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31759: __asm("PPSLOCK equ 0E0Ch"); +[; <" PPSLOCK equ 0E0Ch ;# "> +"31779 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31779: __asm("INTPPS equ 0E0Dh"); +[; <" INTPPS equ 0E0Dh ;# "> +"31799 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31799: __asm("T0CKIPPS equ 0E0Eh"); +[; <" T0CKIPPS equ 0E0Eh ;# "> +"31819 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31819: __asm("T1CKIPPS equ 0E0Fh"); +[; <" T1CKIPPS equ 0E0Fh ;# "> +"31839 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31839: __asm("T1GPPS equ 0E10h"); +[; <" T1GPPS equ 0E10h ;# "> +"31859 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31859: __asm("T3CKIPPS equ 0E11h"); +[; <" T3CKIPPS equ 0E11h ;# "> +"31879 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31879: __asm("T3GPPS equ 0E12h"); +[; <" T3GPPS equ 0E12h ;# "> +"31899 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31899: __asm("T5CKIPPS equ 0E13h"); +[; <" T5CKIPPS equ 0E13h ;# "> +"31919 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31919: __asm("T5GPPS equ 0E14h"); +[; <" T5GPPS equ 0E14h ;# "> +"31939 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31939: __asm("T2INPPS equ 0E15h"); +[; <" T2INPPS equ 0E15h ;# "> +"31944 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31944: __asm("T2CKIPPS equ 0E15h"); +[; <" T2CKIPPS equ 0E15h ;# "> +"31948 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31948: __asm("T2PPS equ 0E15h"); +[; <" T2PPS equ 0E15h ;# "> +"31993 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31993: __asm("T4INPPS equ 0E16h"); +[; <" T4INPPS equ 0E16h ;# "> +"31998 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 31998: __asm("T4CKIPPS equ 0E16h"); +[; <" T4CKIPPS equ 0E16h ;# "> +"32002 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32002: __asm("T4PPS equ 0E16h"); +[; <" T4PPS equ 0E16h ;# "> +"32047 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32047: __asm("T6INPPS equ 0E17h"); +[; <" T6INPPS equ 0E17h ;# "> +"32052 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32052: __asm("T6CKIPPS equ 0E17h"); +[; <" T6CKIPPS equ 0E17h ;# "> +"32056 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32056: __asm("T6PPS equ 0E17h"); +[; <" T6PPS equ 0E17h ;# "> +"32101 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32101: __asm("T8INPPS equ 0E18h"); +[; <" T8INPPS equ 0E18h ;# "> +"32106 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32106: __asm("T8CKIPPS equ 0E18h"); +[; <" T8CKIPPS equ 0E18h ;# "> +"32110 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32110: __asm("T8PPS equ 0E18h"); +[; <" T8PPS equ 0E18h ;# "> +"32155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32155: __asm("CCP1PPS equ 0E19h"); +[; <" CCP1PPS equ 0E19h ;# "> +"32175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32175: __asm("CCP2PPS equ 0E1Ah"); +[; <" CCP2PPS equ 0E1Ah ;# "> +"32195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32195: __asm("CCP7PPS equ 0E1Bh"); +[; <" CCP7PPS equ 0E1Bh ;# "> +"32215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32215: __asm("COG1INPPS equ 0E1Dh"); +[; <" COG1INPPS equ 0E1Dh ;# "> +"32235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32235: __asm("COG2INPPS equ 0E1Eh"); +[; <" COG2INPPS equ 0E1Eh ;# "> +"32255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32255: __asm("COG3INPPS equ 0E1Fh"); +[; <" COG3INPPS equ 0E1Fh ;# "> +"32275 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32275: __asm("MD1CLPPS equ 0E21h"); +[; <" MD1CLPPS equ 0E21h ;# "> +"32295 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32295: __asm("MD1CHPPS equ 0E22h"); +[; <" MD1CHPPS equ 0E22h ;# "> +"32315 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32315: __asm("MD1MODPPS equ 0E23h"); +[; <" MD1MODPPS equ 0E23h ;# "> +"32335 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32335: __asm("MD2CLPPS equ 0E24h"); +[; <" MD2CLPPS equ 0E24h ;# "> +"32355 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32355: __asm("MD2CHPPS equ 0E25h"); +[; <" MD2CHPPS equ 0E25h ;# "> +"32375 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32375: __asm("MD2MODPPS equ 0E26h"); +[; <" MD2MODPPS equ 0E26h ;# "> +"32395 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32395: __asm("MD3CLPPS equ 0E27h"); +[; <" MD3CLPPS equ 0E27h ;# "> +"32415 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32415: __asm("MD3CHPPS equ 0E28h"); +[; <" MD3CHPPS equ 0E28h ;# "> +"32435 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32435: __asm("MD3MODPPS equ 0E29h"); +[; <" MD3MODPPS equ 0E29h ;# "> +"32455 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32455: __asm("PRG1RPPS equ 0E2Dh"); +[; <" PRG1RPPS equ 0E2Dh ;# "> +"32475 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32475: __asm("PRG1FPPS equ 0E2Eh"); +[; <" PRG1FPPS equ 0E2Eh ;# "> +"32495 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32495: __asm("PRG2RPPS equ 0E2Fh"); +[; <" PRG2RPPS equ 0E2Fh ;# "> +"32515 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32515: __asm("PRG2FPPS equ 0E30h"); +[; <" PRG2FPPS equ 0E30h ;# "> +"32535 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32535: __asm("PRG3RPPS equ 0E31h"); +[; <" PRG3RPPS equ 0E31h ;# "> +"32555 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32555: __asm("PRG3FPPS equ 0E32h"); +[; <" PRG3FPPS equ 0E32h ;# "> +"32575 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32575: __asm("CLCIN0PPS equ 0E35h"); +[; <" CLCIN0PPS equ 0E35h ;# "> +"32595 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32595: __asm("CLCIN1PPS equ 0E36h"); +[; <" CLCIN1PPS equ 0E36h ;# "> +"32615 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32615: __asm("CLCIN2PPS equ 0E37h"); +[; <" CLCIN2PPS equ 0E37h ;# "> +"32635 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32635: __asm("CLCIN3PPS equ 0E38h"); +[; <" CLCIN3PPS equ 0E38h ;# "> +"32655 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32655: __asm("ADCACTPPS equ 0E39h"); +[; <" ADCACTPPS equ 0E39h ;# "> +"32675 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32675: __asm("SSPCLKPPS equ 0E3Ah"); +[; <" SSPCLKPPS equ 0E3Ah ;# "> +"32695 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32695: __asm("SSPDATPPS equ 0E3Bh"); +[; <" SSPDATPPS equ 0E3Bh ;# "> +"32715 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32715: __asm("SSPSSPPS equ 0E3Ch"); +[; <" SSPSSPPS equ 0E3Ch ;# "> +"32735 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32735: __asm("RXPPS equ 0E3Dh"); +[; <" RXPPS equ 0E3Dh ;# "> +"32755 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32755: __asm("CKPPS equ 0E3Eh"); +[; <" CKPPS equ 0E3Eh ;# "> +"32775 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32775: __asm("RA0PPS equ 0E90h"); +[; <" RA0PPS equ 0E90h ;# "> +"32795 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32795: __asm("RA1PPS equ 0E91h"); +[; <" RA1PPS equ 0E91h ;# "> +"32815 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32815: __asm("RA2PPS equ 0E92h"); +[; <" RA2PPS equ 0E92h ;# "> +"32835 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32835: __asm("RA3PPS equ 0E93h"); +[; <" RA3PPS equ 0E93h ;# "> +"32855 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32855: __asm("RA4PPS equ 0E94h"); +[; <" RA4PPS equ 0E94h ;# "> +"32875 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32875: __asm("RA5PPS equ 0E95h"); +[; <" RA5PPS equ 0E95h ;# "> +"32895 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32895: __asm("RA6PPS equ 0E96h"); +[; <" RA6PPS equ 0E96h ;# "> +"32915 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32915: __asm("RA7PPS equ 0E97h"); +[; <" RA7PPS equ 0E97h ;# "> +"32935 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32935: __asm("RB0PPS equ 0E98h"); +[; <" RB0PPS equ 0E98h ;# "> +"32955 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32955: __asm("RB1PPS equ 0E99h"); +[; <" RB1PPS equ 0E99h ;# "> +"32975 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32975: __asm("RB2PPS equ 0E9Ah"); +[; <" RB2PPS equ 0E9Ah ;# "> +"32995 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 32995: __asm("RB3PPS equ 0E9Bh"); +[; <" RB3PPS equ 0E9Bh ;# "> +"33015 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33015: __asm("RB4PPS equ 0E9Ch"); +[; <" RB4PPS equ 0E9Ch ;# "> +"33035 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33035: __asm("RB5PPS equ 0E9Dh"); +[; <" RB5PPS equ 0E9Dh ;# "> +"33055 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33055: __asm("RB6PPS equ 0E9Eh"); +[; <" RB6PPS equ 0E9Eh ;# "> +"33075 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33075: __asm("RB7PPS equ 0E9Fh"); +[; <" RB7PPS equ 0E9Fh ;# "> +"33095 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33095: __asm("RC0PPS equ 0EA0h"); +[; <" RC0PPS equ 0EA0h ;# "> +"33115 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33115: __asm("RC1PPS equ 0EA1h"); +[; <" RC1PPS equ 0EA1h ;# "> +"33135 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33135: __asm("RC2PPS equ 0EA2h"); +[; <" RC2PPS equ 0EA2h ;# "> +"33155 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33155: __asm("RC3PPS equ 0EA3h"); +[; <" RC3PPS equ 0EA3h ;# "> +"33175 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33175: __asm("RC4PPS equ 0EA4h"); +[; <" RC4PPS equ 0EA4h ;# "> +"33195 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33195: __asm("RC5PPS equ 0EA5h"); +[; <" RC5PPS equ 0EA5h ;# "> +"33215 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33215: __asm("RC6PPS equ 0EA6h"); +[; <" RC6PPS equ 0EA6h ;# "> +"33235 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33235: __asm("RC7PPS equ 0EA7h"); +[; <" RC7PPS equ 0EA7h ;# "> +"33255 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33255: __asm("CLCDATA equ 0F0Fh"); +[; <" CLCDATA equ 0F0Fh ;# "> +"33293 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33293: __asm("CLC1CON equ 0F10h"); +[; <" CLC1CON equ 0F10h ;# "> +"33411 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33411: __asm("CLC1POL equ 0F11h"); +[; <" CLC1POL equ 0F11h ;# "> +"33489 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33489: __asm("CLC1SEL0 equ 0F12h"); +[; <" CLC1SEL0 equ 0F12h ;# "> +"33593 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33593: __asm("CLC1SEL1 equ 0F13h"); +[; <" CLC1SEL1 equ 0F13h ;# "> +"33697 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33697: __asm("CLC1SEL2 equ 0F14h"); +[; <" CLC1SEL2 equ 0F14h ;# "> +"33801 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33801: __asm("CLC1SEL3 equ 0F15h"); +[; <" CLC1SEL3 equ 0F15h ;# "> +"33905 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 33905: __asm("CLC1GLS0 equ 0F16h"); +[; <" CLC1GLS0 equ 0F16h ;# "> +"34017 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34017: __asm("CLC1GLS1 equ 0F17h"); +[; <" CLC1GLS1 equ 0F17h ;# "> +"34129 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34129: __asm("CLC1GLS2 equ 0F18h"); +[; <" CLC1GLS2 equ 0F18h ;# "> +"34241 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34241: __asm("CLC1GLS3 equ 0F19h"); +[; <" CLC1GLS3 equ 0F19h ;# "> +"34353 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34353: __asm("CLC2CON equ 0F1Ah"); +[; <" CLC2CON equ 0F1Ah ;# "> +"34471 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34471: __asm("CLC2POL equ 0F1Bh"); +[; <" CLC2POL equ 0F1Bh ;# "> +"34549 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34549: __asm("CLC2SEL0 equ 0F1Ch"); +[; <" CLC2SEL0 equ 0F1Ch ;# "> +"34653 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34653: __asm("CLC2SEL1 equ 0F1Dh"); +[; <" CLC2SEL1 equ 0F1Dh ;# "> +"34757 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34757: __asm("CLC2SEL2 equ 0F1Eh"); +[; <" CLC2SEL2 equ 0F1Eh ;# "> +"34861 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34861: __asm("CLC2SEL3 equ 0F1Fh"); +[; <" CLC2SEL3 equ 0F1Fh ;# "> +"34965 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 34965: __asm("CLC2GLS0 equ 0F20h"); +[; <" CLC2GLS0 equ 0F20h ;# "> +"35077 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35077: __asm("CLC2GLS1 equ 0F21h"); +[; <" CLC2GLS1 equ 0F21h ;# "> +"35189 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35189: __asm("CLC2GLS2 equ 0F22h"); +[; <" CLC2GLS2 equ 0F22h ;# "> +"35301 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35301: __asm("CLC2GLS3 equ 0F23h"); +[; <" CLC2GLS3 equ 0F23h ;# "> +"35413 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35413: __asm("CLC3CON equ 0F24h"); +[; <" CLC3CON equ 0F24h ;# "> +"35531 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35531: __asm("CLC3POL equ 0F25h"); +[; <" CLC3POL equ 0F25h ;# "> +"35609 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35609: __asm("CLC3SEL0 equ 0F26h"); +[; <" CLC3SEL0 equ 0F26h ;# "> +"35713 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35713: __asm("CLC3SEL1 equ 0F27h"); +[; <" CLC3SEL1 equ 0F27h ;# "> +"35817 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35817: __asm("CLC3SEL2 equ 0F28h"); +[; <" CLC3SEL2 equ 0F28h ;# "> +"35921 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 35921: __asm("CLC3SEL3 equ 0F29h"); +[; <" CLC3SEL3 equ 0F29h ;# "> +"36025 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36025: __asm("CLC3GLS0 equ 0F2Ah"); +[; <" CLC3GLS0 equ 0F2Ah ;# "> +"36137 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36137: __asm("CLC3GLS1 equ 0F2Bh"); +[; <" CLC3GLS1 equ 0F2Bh ;# "> +"36249 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36249: __asm("CLC3GLS2 equ 0F2Ch"); +[; <" CLC3GLS2 equ 0F2Ch ;# "> +"36361 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36361: __asm("CLC3GLS3 equ 0F2Dh"); +[; <" CLC3GLS3 equ 0F2Dh ;# "> +"36473 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36473: __asm("CLC4CON equ 0F2Eh"); +[; <" CLC4CON equ 0F2Eh ;# "> +"36591 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36591: __asm("CLC4POL equ 0F2Fh"); +[; <" CLC4POL equ 0F2Fh ;# "> +"36669 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36669: __asm("CLC4SEL0 equ 0F30h"); +[; <" CLC4SEL0 equ 0F30h ;# "> +"36773 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36773: __asm("CLC4SEL1 equ 0F31h"); +[; <" CLC4SEL1 equ 0F31h ;# "> +"36877 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36877: __asm("CLC4SEL2 equ 0F32h"); +[; <" CLC4SEL2 equ 0F32h ;# "> +"36981 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 36981: __asm("CLC4SEL3 equ 0F33h"); +[; <" CLC4SEL3 equ 0F33h ;# "> +"37085 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37085: __asm("CLC4GLS0 equ 0F34h"); +[; <" CLC4GLS0 equ 0F34h ;# "> +"37197 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37197: __asm("CLC4GLS1 equ 0F35h"); +[; <" CLC4GLS1 equ 0F35h ;# "> +"37309 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37309: __asm("CLC4GLS2 equ 0F36h"); +[; <" CLC4GLS2 equ 0F36h ;# "> +"37421 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37421: __asm("CLC4GLS3 equ 0F37h"); +[; <" CLC4GLS3 equ 0F37h ;# "> +"37533 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37533: __asm("STATUS_SHAD equ 0FE4h"); +[; <" STATUS_SHAD equ 0FE4h ;# "> +"37565 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37565: __asm("WREG_SHAD equ 0FE5h"); +[; <" WREG_SHAD equ 0FE5h ;# "> +"37585 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37585: __asm("BSR_SHAD equ 0FE6h"); +[; <" BSR_SHAD equ 0FE6h ;# "> +"37605 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37605: __asm("PCLATH_SHAD equ 0FE7h"); +[; <" PCLATH_SHAD equ 0FE7h ;# "> +"37625 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37625: __asm("FSR0L_SHAD equ 0FE8h"); +[; <" FSR0L_SHAD equ 0FE8h ;# "> +"37645 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37645: __asm("FSR0H_SHAD equ 0FE9h"); +[; <" FSR0H_SHAD equ 0FE9h ;# "> +"37665 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37665: __asm("FSR1L_SHAD equ 0FEAh"); +[; <" FSR1L_SHAD equ 0FEAh ;# "> +"37685 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37685: __asm("FSR1H_SHAD equ 0FEBh"); +[; <" FSR1H_SHAD equ 0FEBh ;# "> +"37705 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37705: __asm("STKPTR equ 0FEDh"); +[; <" STKPTR equ 0FEDh ;# "> +"37725 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37725: __asm("TOSL equ 0FEEh"); +[; <" TOSL equ 0FEEh ;# "> +"37745 +[; ;/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63/xc8/pic/include/proc/pic16f1776.h: 37745: __asm("TOSH equ 0FEFh"); +[; <" TOSH equ 0FEFh ;# "> +"54 mcc_generated_files/pin_manager.c +[; ;mcc_generated_files/pin_manager.c: 54: void (*IOCBF0_InterruptHandler)(void); +[v _IOCBF0_InterruptHandler `*F11997 ~T0 @X0 1 e ] +"55 +[; ;mcc_generated_files/pin_manager.c: 55: void (*IOCCF7_InterruptHandler)(void); +[v _IOCCF7_InterruptHandler `*F11999 ~T0 @X0 1 e ] +"58 +[; ;mcc_generated_files/pin_manager.c: 58: void PIN_MANAGER_Initialize(void) +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/pin_manager.c: 59: { +{ +[e :U _PIN_MANAGER_Initialize ] +[f ] +"63 +[; ;mcc_generated_files/pin_manager.c: 63: LATA = 0x00; +[e = _LATA -> -> 0 `i `uc ] +"64 +[; ;mcc_generated_files/pin_manager.c: 64: LATB = 0x00; +[e = _LATB -> -> 0 `i `uc ] +"65 +[; ;mcc_generated_files/pin_manager.c: 65: LATC = 0x00; +[e = _LATC -> -> 0 `i `uc ] +"70 +[; ;mcc_generated_files/pin_manager.c: 70: TRISE = 0x08; +[e = _TRISE -> -> 8 `i `uc ] +"71 +[; ;mcc_generated_files/pin_manager.c: 71: TRISA = 0x39; +[e = _TRISA -> -> 57 `i `uc ] +"72 +[; ;mcc_generated_files/pin_manager.c: 72: TRISB = 0xED; +[e = _TRISB -> -> 237 `i `uc ] +"73 +[; ;mcc_generated_files/pin_manager.c: 73: TRISC = 0x8C; +[e = _TRISC -> -> 140 `i `uc ] +"78 +[; ;mcc_generated_files/pin_manager.c: 78: ANSELC = 0x7C; +[e = _ANSELC -> -> 124 `i `uc ] +"79 +[; ;mcc_generated_files/pin_manager.c: 79: ANSELB = 0x3E; +[e = _ANSELB -> -> 62 `i `uc ] +"80 +[; ;mcc_generated_files/pin_manager.c: 80: ANSELA = 0x3F; +[e = _ANSELA -> -> 63 `i `uc ] +"85 +[; ;mcc_generated_files/pin_manager.c: 85: WPUE = 0x00; +[e = _WPUE -> -> 0 `i `uc ] +"86 +[; ;mcc_generated_files/pin_manager.c: 86: WPUB = 0x00; +[e = _WPUB -> -> 0 `i `uc ] +"87 +[; ;mcc_generated_files/pin_manager.c: 87: WPUA = 0x00; +[e = _WPUA -> -> 0 `i `uc ] +"88 +[; ;mcc_generated_files/pin_manager.c: 88: WPUC = 0x00; +[e = _WPUC -> -> 0 `i `uc ] +"89 +[; ;mcc_generated_files/pin_manager.c: 89: OPTION_REGbits.nWPUEN = 1; +[e = . . _OPTION_REGbits 0 5 -> -> 1 `i `uc ] +"94 +[; ;mcc_generated_files/pin_manager.c: 94: ODCONA = 0x00; +[e = _ODCONA -> -> 0 `i `uc ] +"95 +[; ;mcc_generated_files/pin_manager.c: 95: ODCONB = 0x00; +[e = _ODCONB -> -> 0 `i `uc ] +"96 +[; ;mcc_generated_files/pin_manager.c: 96: ODCONC = 0x00; +[e = _ODCONC -> -> 0 `i `uc ] +"101 +[; ;mcc_generated_files/pin_manager.c: 101: SLRCONA = 0xFF; +[e = _SLRCONA -> -> 255 `i `uc ] +"102 +[; ;mcc_generated_files/pin_manager.c: 102: SLRCONB = 0xFF; +[e = _SLRCONB -> -> 255 `i `uc ] +"103 +[; ;mcc_generated_files/pin_manager.c: 103: SLRCONC = 0xFF; +[e = _SLRCONC -> -> 255 `i `uc ] +"108 +[; ;mcc_generated_files/pin_manager.c: 108: INLVLA = 0x3F; +[e = _INLVLA -> -> 63 `i `uc ] +"109 +[; ;mcc_generated_files/pin_manager.c: 109: INLVLB = 0xF0; +[e = _INLVLB -> -> 240 `i `uc ] +"110 +[; ;mcc_generated_files/pin_manager.c: 110: INLVLC = 0xFF; +[e = _INLVLC -> -> 255 `i `uc ] +"117 +[; ;mcc_generated_files/pin_manager.c: 117: IOCBFbits.IOCBF0 = 0; +[e = . . _IOCBFbits 0 0 -> -> 0 `i `uc ] +"119 +[; ;mcc_generated_files/pin_manager.c: 119: IOCBNbits.IOCBN0 = 1; +[e = . . _IOCBNbits 0 0 -> -> 1 `i `uc ] +"121 +[; ;mcc_generated_files/pin_manager.c: 121: IOCBPbits.IOCBP0 = 0; +[e = . . _IOCBPbits 0 0 -> -> 0 `i `uc ] +"123 +[; ;mcc_generated_files/pin_manager.c: 123: IOCCFbits.IOCCF7 = 0; +[e = . . _IOCCFbits 0 7 -> -> 0 `i `uc ] +"125 +[; ;mcc_generated_files/pin_manager.c: 125: IOCCNbits.IOCCN7 = 1; +[e = . . _IOCCNbits 0 7 -> -> 1 `i `uc ] +"127 +[; ;mcc_generated_files/pin_manager.c: 127: IOCCPbits.IOCCP7 = 0; +[e = . . _IOCCPbits 0 7 -> -> 0 `i `uc ] +"132 +[; ;mcc_generated_files/pin_manager.c: 132: IOCBF0_SetInterruptHandler(IOCBF0_DefaultInterruptHandler); +[e ( _IOCBF0_SetInterruptHandler (1 &U _IOCBF0_DefaultInterruptHandler ] +"133 +[; ;mcc_generated_files/pin_manager.c: 133: IOCCF7_SetInterruptHandler(IOCCF7_DefaultInterruptHandler); +[e ( _IOCCF7_SetInterruptHandler (1 &U _IOCCF7_DefaultInterruptHandler ] +"136 +[; ;mcc_generated_files/pin_manager.c: 136: INTCONbits.IOCIE = 1; +[e = . . _INTCONbits 0 3 -> -> 1 `i `uc ] +"138 +[; ;mcc_generated_files/pin_manager.c: 138: } +[e :UE 1731 ] +} +"140 +[; ;mcc_generated_files/pin_manager.c: 140: void PIN_MANAGER_IOC(void) +[v _PIN_MANAGER_IOC `(v ~T0 @X0 1 ef ] +"141 +[; ;mcc_generated_files/pin_manager.c: 141: { +{ +[e :U _PIN_MANAGER_IOC ] +[f ] +"143 +[; ;mcc_generated_files/pin_manager.c: 143: if(IOCBFbits.IOCBF0 == 1) +[e $ ! == -> . . _IOCBFbits 0 0 `i -> 1 `i 1733 ] +"144 +[; ;mcc_generated_files/pin_manager.c: 144: { +{ +"145 +[; ;mcc_generated_files/pin_manager.c: 145: IOCBF0_ISR(); +[e ( _IOCBF0_ISR .. ] +"146 +[; ;mcc_generated_files/pin_manager.c: 146: } +} +[e :U 1733 ] +"148 +[; ;mcc_generated_files/pin_manager.c: 148: if(IOCCFbits.IOCCF7 == 1) +[e $ ! == -> . . _IOCCFbits 0 7 `i -> 1 `i 1734 ] +"149 +[; ;mcc_generated_files/pin_manager.c: 149: { +{ +"150 +[; ;mcc_generated_files/pin_manager.c: 150: IOCCF7_ISR(); +[e ( _IOCCF7_ISR .. ] +"151 +[; ;mcc_generated_files/pin_manager.c: 151: } +} +[e :U 1734 ] +"152 +[; ;mcc_generated_files/pin_manager.c: 152: } +[e :UE 1732 ] +} +"157 +[; ;mcc_generated_files/pin_manager.c: 157: void IOCBF0_ISR(void) { +[v _IOCBF0_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _IOCBF0_ISR ] +[f ] +"162 +[; ;mcc_generated_files/pin_manager.c: 162: if(IOCBF0_InterruptHandler) +[e $ ! != _IOCBF0_InterruptHandler -> -> 0 `i `*F12005 1736 ] +"163 +[; ;mcc_generated_files/pin_manager.c: 163: { +{ +"164 +[; ;mcc_generated_files/pin_manager.c: 164: IOCBF0_InterruptHandler(); +[e ( *U _IOCBF0_InterruptHandler .. ] +"165 +[; ;mcc_generated_files/pin_manager.c: 165: } +} +[e :U 1736 ] +"166 +[; ;mcc_generated_files/pin_manager.c: 166: IOCBFbits.IOCBF0 = 0; +[e = . . _IOCBFbits 0 0 -> -> 0 `i `uc ] +"167 +[; ;mcc_generated_files/pin_manager.c: 167: } +[e :UE 1735 ] +} +"172 +[; ;mcc_generated_files/pin_manager.c: 172: void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)){ +[v _IOCBF0_SetInterruptHandler `(v ~T0 @X0 1 ef1`*F12007 ] +{ +[e :U _IOCBF0_SetInterruptHandler ] +[v _InterruptHandler `*F12009 ~T0 @X0 1 r1 ] +[f ] +"173 +[; ;mcc_generated_files/pin_manager.c: 173: IOCBF0_InterruptHandler = InterruptHandler; +[e = _IOCBF0_InterruptHandler _InterruptHandler ] +"174 +[; ;mcc_generated_files/pin_manager.c: 174: } +[e :UE 1737 ] +} +"179 +[; ;mcc_generated_files/pin_manager.c: 179: void IOCBF0_DefaultInterruptHandler(void){ +[v _IOCBF0_DefaultInterruptHandler `(v ~T0 @X0 1 ef ] +{ +[e :U _IOCBF0_DefaultInterruptHandler ] +[f ] +"182 +[; ;mcc_generated_files/pin_manager.c: 182: } +[e :UE 1738 ] +} +"187 +[; ;mcc_generated_files/pin_manager.c: 187: void IOCCF7_ISR(void) { +[v _IOCCF7_ISR `(v ~T0 @X0 1 ef ] +{ +[e :U _IOCCF7_ISR ] +[f ] +"192 +[; ;mcc_generated_files/pin_manager.c: 192: if(IOCCF7_InterruptHandler) +[e $ ! != _IOCCF7_InterruptHandler -> -> 0 `i `*F12013 1740 ] +"193 +[; ;mcc_generated_files/pin_manager.c: 193: { +{ +"194 +[; ;mcc_generated_files/pin_manager.c: 194: IOCCF7_InterruptHandler(); +[e ( *U _IOCCF7_InterruptHandler .. ] +"195 +[; ;mcc_generated_files/pin_manager.c: 195: } +} +[e :U 1740 ] +"196 +[; ;mcc_generated_files/pin_manager.c: 196: IOCCFbits.IOCCF7 = 0; +[e = . . _IOCCFbits 0 7 -> -> 0 `i `uc ] +"197 +[; ;mcc_generated_files/pin_manager.c: 197: } +[e :UE 1739 ] +} +"202 +[; ;mcc_generated_files/pin_manager.c: 202: void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)){ +[v _IOCCF7_SetInterruptHandler `(v ~T0 @X0 1 ef1`*F12015 ] +{ +[e :U _IOCCF7_SetInterruptHandler ] +[v _InterruptHandler `*F12017 ~T0 @X0 1 r1 ] +[f ] +"203 +[; ;mcc_generated_files/pin_manager.c: 203: IOCCF7_InterruptHandler = InterruptHandler; +[e = _IOCCF7_InterruptHandler _InterruptHandler ] +"204 +[; ;mcc_generated_files/pin_manager.c: 204: } +[e :UE 1741 ] +} +"209 +[; ;mcc_generated_files/pin_manager.c: 209: void IOCCF7_DefaultInterruptHandler(void){ +[v _IOCCF7_DefaultInterruptHandler `(v ~T0 @X0 1 ef ] +{ +[e :U _IOCCF7_DefaultInterruptHandler ] +[f ] +"212 +[; ;mcc_generated_files/pin_manager.c: 212: } +[e :UE 1742 ] +} diff --git a/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1.d b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1.d new file mode 100644 index 0000000..ef03b2b --- /dev/null +++ b/firmware/B1-firmware.X/build/default/production/mcc_generated_files/pin_manager.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/pin_manager.p1: \ +mcc_generated_files/pin_manager.c \ +mcc_generated_files/pin_manager.h diff --git a/firmware/B1-firmware.X/main.c b/firmware/B1-firmware.X/main.c new file mode 100755 index 0000000..339108a --- /dev/null +++ b/firmware/B1-firmware.X/main.c @@ -0,0 +1,279 @@ +/** + Generated Main Source File + + Company: + Microchip Technology Inc. + + File Name: + main.c + + Summary: + This is the main file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + Description: + This header file provides implementations for driver APIs for all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.00 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#include "mcc_generated_files/mcc.h" + +/* + Main application + */ + +//led states as (R,G,B) +#define LED_OFF 0x0 + +#define LED_GREEN 0x2 +#define LED_BLUE 0x1 +#define LED_RED 0x4 + +#define LED_CYAN (LED_BLUE | LED_GREEN) +#define LED_PURPLE (LED_BLUE | LED_RED) +#define LED_YELLOW (LED_RED | LED_GREEN) + +#define LED_WHITE (LED_GREEN | LED_BLUE | LED_RED) + +#define LOW_BATTERY_VOLTAGE 173 + +uint8_t mux_state = 0; +uint8_t led_color_state = LED_OFF; + +//function prototypes + +void set_led(uint8_t); +void init_sensor(void); +void reset_sensor(void); + + + +void my_CMP2_ISR(void){ + // clear the CMP2 interrupt flag + PIR2bits.C2IF = 0; + set_led(LED_RED); + +} + +void my_CMP1_ISR(void){ + // clear the CMP1 interrupt flag + PIR2bits.C1IF = 0; + set_led(LED_RED); +} + +//change state +void SW2_ISR(void){ + + switch(mux_state){ + case 0: //low gain, high bandwidth + led_color_state = LED_GREEN; + MUX_SEL1_LAT = 1; //bandwidth select + MUX_SEL2_LAT = 1; //gain select + break; + + case 1: //low gain, low bandwidth + led_color_state = LED_YELLOW; + MUX_SEL1_LAT = 0; //bandwidth select + MUX_SEL2_LAT = 1; //gain select + break; + + case 2: // high gain, high bandwidth + led_color_state = LED_BLUE; + MUX_SEL1_LAT = 1; //bandwidth select + MUX_SEL2_LAT = 0; //gain select + break; + + case 3: //high gain, low bandwidth + led_color_state = LED_CYAN; + MUX_SEL1_LAT = 0; //bandwidth select + MUX_SEL2_LAT = 0; //gain select + break; + } + set_led(led_color_state); + mux_state = (mux_state+1)%4; + __delay_ms(200); //delay for debounce +} + +//zero system +void SW1_ISR(void){ + + //flash led at start + set_led(LED_OFF); + __delay_ms(200); + set_led(led_color_state); + reset_sensor(); + __delay_ms(200); + if(SW1_GetValue() == 0){ + //if switch is still depressed do a full zero + init_sensor(); + } + + //flash LED at end + set_led(LED_OFF); + __delay_ms(200); + set_led(led_color_state); + + //zeroing system may trip over range comparators + PIR2bits.C2IF = 0; + PIR2bits.C1IF = 0; +} + +uint16_t average_adc_reading(adc_channel_t read_ch){ + + uint16_t averaged_val = 0; + for (int i = 0; i<8; i++){ + averaged_val = averaged_val + ADC_GetConversion(read_ch); + } + + averaged_val = averaged_val; + + return averaged_val; +} + +void set_led(uint8_t led_color) { + +LED_B_LAT = (~led_color>>2)&1; +LED_G_LAT = (~led_color>>1)&1; +LED_R_LAT = (~led_color)&1; + +} +void zero_stage_1(void){ + uint16_t gnd_ref_val; + uint16_t best_dac_val = 0; + uint16_t stage_val; + uint16_t best_val = (1<<12); + + gnd_ref_val = average_adc_reading(GNDREF_SENSE); + + for(uint16_t i = 0; i<1024; i++){ + + DAC1_Load10bitInputData(i); + __delay_ms(1); + stage_val = average_adc_reading(STAGE1_MON); + + if ((stage_val-gnd_ref_val) < best_val){ + best_val = (stage_val - gnd_ref_val); + best_dac_val = i; + } + } + DAC1_Load10bitInputData(best_dac_val); +} + +void zero_stage_2(void){ + uint16_t gnd_ref_val; + uint16_t best_dac_val = 0; + uint16_t stage_val; + uint16_t best_val = 2000; + + gnd_ref_val = average_adc_reading(GNDREF_SENSE); + + for(uint16_t i = 0; i<1024; i++){ + + DAC5_Load10bitInputData(i); + __delay_ms(1); + stage_val = average_adc_reading(STAGE2_MON); + + if ((stage_val-gnd_ref_val) < best_val){ + best_val = (stage_val - gnd_ref_val); + best_dac_val = i; + } + + } + + DAC5_Load10bitInputData(best_dac_val); + +} + +void init_sensor(void){ + + __delay_ms(50); + zero_stage_1(); + __delay_ms(50); + zero_stage_2(); + +} + +void reset_sensor(){ + SR_SetLow(); + __delay_ms(50); + SR_SetHigh(); + __delay_ms(50); + SR_SetLow(); + +} + +void low_battery_loop(){ + while(1){ + set_led(LED_OFF); + + __delay_ms(500); + + set_led(LED_RED); + + __delay_ms(500); + } +} +void main(void) +{ + // initialize the device + SYSTEM_Initialize(); + + DAC7_SetOutput(16); //set virtual ground to ~2.5V + DAC3_SetOutput(24); //set overload high comparator + DAC4_SetOutput(8); //set overload low comparator + + led_color_state = LED_GREEN; + mux_state = 0; + SW2_ISR();//initialize LED and mux + + reset_sensor(); + init_sensor(); + //zeroing system may trip over range comparators + PIR2bits.C2IF = 0; + PIR2bits.C1IF = 0; + //set interrupt handler for SW2 + IOCBF0_SetInterruptHandler(SW2_ISR); + //set interrupt handler for SW1 + IOCCF7_SetInterruptHandler(SW1_ISR); + + INTERRUPT_GlobalInterruptEnable(); + INTERRUPT_PeripheralInterruptEnable(); + + while (1) + { + __delay_ms(100); + if((average_adc_reading(VIN_SENSE)>>3) < LOW_BATTERY_VOLTAGE){ + INTERRUPT_GlobalInterruptDisable(); + INTERRUPT_PeripheralInterruptDisable(); + low_battery_loop(); + } + } +} +/** + End of File +*/ \ No newline at end of file diff --git a/firmware/B1-firmware.X/mcc_generated_files/adc.c b/firmware/B1-firmware.X/mcc_generated_files/adc.c new file mode 100755 index 0000000..3f464b7 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/adc.c @@ -0,0 +1,144 @@ +/** + ADC Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + adc.c + + @Summary + This is the generated driver implementation file for the ADC driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for ADC. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "adc.h" +#include "device_config.h" + +/** + Section: Macro Declarations +*/ + +#define ACQ_US_DELAY 5 + +void (*ADC_InterruptHandler)(void); + +/** + Section: ADC Module APIs +*/ + +void ADC_Initialize(void) +{ + // set the ADC to the options selected in the User Interface + + // GO stop; ADON enabled; CHS AN0; + ADCON0 = 0x01; + + // ADFM right; ADNREF VSS; ADPREF VDD; ADCS FOSC/8; + ADCON1 = 0x90; + + // TRIGSEL no_auto_trigger; + ADCON2 = 0x00; + + // ADRES 0; + ADRESL = 0x00; + + // ADRES 0; + ADRESH = 0x00; + +} + +void ADC_SelectChannel(adc_channel_t channel) +{ + // select the A/D channel + ADCON0bits.CHS = channel; + // Turn on the ADC module + ADCON0bits.ADON = 1; +} + +void ADC_StartConversion(void) +{ + // Start the conversion + ADCON0bits.GO = 1; +} + + +bool ADC_IsConversionDone(void) +{ + // Start the conversion + return ((bool)(!ADCON0bits.GO)); +} + +adc_result_t ADC_GetConversionResult(void) +{ + // Conversion finished, return the result + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +adc_result_t ADC_GetConversion(adc_channel_t channel) +{ + // select the A/D channel + ADCON0bits.CHS = channel; + + // Turn on the ADC module + ADCON0bits.ADON = 1; + + // Acquisition time delay + __delay_us(ACQ_US_DELAY); + + // Start the conversion + ADCON0bits.GO = 1; + + // Wait for the conversion to finish + while (ADCON0bits.GO) + { + } + + // Conversion finished, return the result + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +void ADC_TemperatureAcquisitionDelay(void) +{ + __delay_us(200); +} +/** + End of File +*/ \ No newline at end of file diff --git a/firmware/B1-firmware.X/mcc_generated_files/adc.h b/firmware/B1-firmware.X/mcc_generated_files/adc.h new file mode 100755 index 0000000..8e9470e --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/adc.h @@ -0,0 +1,339 @@ +/** + ADC Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + adc.h + + @Summary + This is the generated header file for the ADC driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for ADC. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef ADC_H +#define ADC_H + +/** + Section: Included Files +*/ + +#include +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: Data Types Definitions +*/ + +/** + * result size of an A/D conversion + */ + +typedef uint16_t adc_result_t; + +/** + * result type of a Double ADC conversion + */ +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; + +/** ADC Channel Definition + + @Summary + Defines the channels available for conversion. + + @Description + This routine defines the channels that are available for the module to use. + + Remarks: + None + */ + +typedef enum +{ + GNDREF_SENSE = 0x0, + VIN_SENSE = 0xD, + STAGE2_MON = 0xE, + STAGE1_MON = 0xF, + channel_Switched_AN1 = 0x21, + channel_Switched_AN10 = 0x2A, + channel_Switched_AN18 = 0x32, + channel_DAC7_Output = 0x37, + channel_DAC5_Output = 0x39, + channel_DAC4_Output = 0x3A, + channel_DAC3_Output = 0x3B, + channel_DAC2_Output = 0x3C, + channel_Temp = 0x3D, + channel_DAC1_Output = 0x3E, + channel_FVRBuffer1 = 0x3F +} adc_channel_t; + +/** + Section: ADC Module APIs +*/ + +/** + @Summary + Initializes the ADC + + @Description + This routine initializes the Initializes the ADC. + This routine must be called before any other ADC routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + convertedValue = ADC_GetConversionResult(); + +*/ +void ADC_Initialize(void); + +/** + @Summary + Allows selection of a channel for conversion + + @Description + This routine is used to select desired channel for conversion. + available + + @Preconditions + ADC_Initialize() function should have been called before calling this function. + + @Returns + None + + @Param + Pass in required channel number + "For available channel refer to enum under adc.h file" + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + ADC_SelectChannel(AN1_Channel); + ADC_StartConversion(); + convertedValue = ADC_GetConversionResult(); + +*/ +void ADC_SelectChannel(adc_channel_t channel); + +/** + @Summary + Starts conversion + + @Description + This routine is used to start conversion of desired channel. + + @Preconditions + ADC_Initialize() function should have been called before calling this function. + + @Returns + None + + @Param + None + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + ADC_StartConversion(); + convertedValue = ADC_GetConversionResult(); + +*/ +void ADC_StartConversion(void); + +/** + @Summary + Returns true when the conversion is completed otherwise false. + + @Description + This routine is used to determine if conversion is completed. + When conversion is complete routine returns true. It returns false otherwise. + + @Preconditions + ADC_Initialize() and ADC_StartConversion(void) + function should have been called before calling this function. + + @Returns + true - If conversion is complete + false - If conversion is not completed + + @Param + None + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + ADC_StartConversion(); + + while(!ADC_IsConversionDone()); + convertedValue = ADC_GetConversionResult(); + + */ +bool ADC_IsConversionDone(void); + +/** + @Summary + Returns the ADC conversion value. + + @Description + This routine is used to get the analog to digital converted value. This + routine gets converted values from the channel specified. + + @Preconditions + This routine returns the conversion value only after the conversion is complete. + Completion status can be checked using + ADC_IsConversionDone() routine. + + @Returns + Returns the converted value. + + @Param + None + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + ADC_StartConversion(); + + while(ADC_IsConversionDone()); + + convertedValue = ADC_GetConversionResult(); + + */ +adc_result_t ADC_GetConversionResult(void); + +/** + @Summary + Returns the ADC conversion value + also allows selection of a channel for conversion. + + @Description + This routine is used to select desired channel for conversion + and to get the analog to digital converted value. + + @Preconditions + ADC_Initialize() function should have been called before calling this function. + + @Returns + Returns the converted value. + + @Param + Pass in required channel number. + "For available channel refer to enum under adc.h file" + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + + conversion = ADC_GetConversion(AN1_Channel); + +*/ +adc_result_t ADC_GetConversion(adc_channel_t channel); + +/** + @Summary + Acquisition Delay for temperature sensor + + @Description + This routine should be called when temperature sensor is used. + + @Preconditions + ADC_Initialize() function should have been called before calling this function. + + @Returns + None + + @Param + None + + @Example + + uint16_t convertedValue; + + ADC_Initialize(); + ADC_StartConversion(); + ADC_temperatureAcquisitionDelay(); + convertedValue = ADC_GetConversionResult(); + +*/ +void ADC_TemperatureAcquisitionDelay(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif //ADC_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp1.c b/firmware/B1-firmware.X/mcc_generated_files/cmp1.c new file mode 100755 index 0000000..8414125 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp1.c @@ -0,0 +1,102 @@ + /** + CMP1 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + cmp1.c + + @Summary + This is the generated driver implementation file for the CMP1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for CMP1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + + /* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + /** + Section: Included Files + */ + + +#include +#include "cmp1.h" +/** + Section: CMP1 APIs +*/ + +void CMP1_Initialize(void) +{ + /* Disable CMP1 interrupt before configuring the CMP1 + control register. Although a comparator is disabled, an interrupt can be + generated by changing the output polarity with the CxPOL bit of the + CMxCON0 register,or by switching the comparator on or off with the CxON + bit of the CMxCON0 register.*/ + PIE2bits.C1IE = 0; + + // C1HYS disabled; C1SP hi_speed; C1ON enabled; C1POL not inverted; C1SYNC asynchronous; C1ZLF filtered; + CM1CON0 = 0x8C; + + // C1INTN intFlag_neg; C1INTP no_intFlag; + CM1CON1 = 0x01; + + // C1NCH CIN4-; + CM1NSEL = 0x04; + + // C1PCH DAC3; + CM1PSEL = 0x07; + + // + CMOUT = 0x00; + + // Clearing IF flag before enabling the interrupt. + PIR2bits.C1IF = 0; + + // Enabling CMP1 interrupt. + PIE2bits.C1IE = 1; +} + +bool CMP1_GetOutputStatus(void) +{ + return (CMOUTbits.MC1OUT); +} + +void CMP1_ISR(void) +{ + // clear the CMP1 interrupt flag + PIR2bits.C1IF = 0; +} + +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp1.h b/firmware/B1-firmware.X/mcc_generated_files/cmp1.h new file mode 100755 index 0000000..0d02478 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp1.h @@ -0,0 +1,161 @@ + /** + CMP1 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + cmp1.h + + @Summary + This is the generated header file for the CMP1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for CMP1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef CMP1_H +#define CMP1_H + + /** + Section: Included Files + */ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: CMP1 APIs +*/ + +/** + @Summary + Initializes the CMP1 + + @Description + This routine initializes the CMP1. + This routine must be called before any other CMP1 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + @Example + + CMP1_Initialize(); + +*/ +void CMP1_Initialize(void); + +/** + @Summary + Gets the CMP1 output status. + + @Description + This routine gets the CMP1 output status. + + @Preconditions + The CMP1 initializer routine should be called + prior to use this routine. + + @Param + None + + @Returns + high - if the CMP1 output is high. + low - if the CMP1 output is low. + + @Example + + #define LED_On LATAbits.LATA0=1 + #define LED_Off LATAbits.LATA0=0 + + CMP1_Initialize(); + + while(1) + { + if(CMP1_GetOutputStatus()) + { + LED_On; + } + else + { + LED_Off; + } + } + +*/ +bool CMP1_GetOutputStatus(void); + +/** + @Summary + Implements ISR + + @Description + This routine is used to implement the ISR for the interrupt-driven + implementations. + + @Returns + None + + @Param + None +*/ +void CMP1_ISR(void); + + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // CMP1_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp2.c b/firmware/B1-firmware.X/mcc_generated_files/cmp2.c new file mode 100755 index 0000000..92276b0 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp2.c @@ -0,0 +1,102 @@ + /** + CMP2 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + cmp2.c + + @Summary + This is the generated driver implementation file for the CMP2 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for CMP2. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + + /* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + /** + Section: Included Files + */ + + +#include +#include "cmp2.h" +/** + Section: CMP2 APIs +*/ + +void CMP2_Initialize(void) +{ + /* Disable CMP2 interrupt before configuring the CMP2 + control register. Although a comparator is disabled, an interrupt can be + generated by changing the output polarity with the CxPOL bit of the + CMxCON0 register,or by switching the comparator on or off with the CxON + bit of the CMxCON0 register.*/ + PIE2bits.C2IE = 0; + + // C2HYS disabled; C2SP hi_speed; C2ON enabled; C2POL inverted; C2SYNC asynchronous; C2ZLF filtered; + CM2CON0 = 0x9C; + + // C2INTN no_intFlag; C2INTP intFlag_pos; + CM2CON1 = 0x02; + + // C2NCH CIN4-; + CM2NSEL = 0x04; + + // C2PCH DAC4; + CM2PSEL = 0x08; + + // + CMOUT = 0x00; + + // Clearing IF flag before enabling the interrupt. + PIR2bits.C2IF = 0; + + // Enabling CMP2 interrupt. + PIE2bits.C2IE = 1; +} + +bool CMP2_GetOutputStatus(void) +{ + return (CMOUTbits.MC2OUT); +} + +void CMP2_ISR(void) +{ + // clear the CMP2 interrupt flag + PIR2bits.C2IF = 0; +} + +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp2.h b/firmware/B1-firmware.X/mcc_generated_files/cmp2.h new file mode 100755 index 0000000..82aea8d --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp2.h @@ -0,0 +1,161 @@ + /** + CMP2 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + cmp2.h + + @Summary + This is the generated header file for the CMP2 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for CMP2. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef CMP2_H +#define CMP2_H + + /** + Section: Included Files + */ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: CMP2 APIs +*/ + +/** + @Summary + Initializes the CMP2 + + @Description + This routine initializes the CMP2. + This routine must be called before any other CMP2 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + @Example + + CMP2_Initialize(); + +*/ +void CMP2_Initialize(void); + +/** + @Summary + Gets the CMP2 output status. + + @Description + This routine gets the CMP2 output status. + + @Preconditions + The CMP2 initializer routine should be called + prior to use this routine. + + @Param + None + + @Returns + high - if the CMP2 output is high. + low - if the CMP2 output is low. + + @Example + + #define LED_On LATAbits.LATA0=1 + #define LED_Off LATAbits.LATA0=0 + + CMP2_Initialize(); + + while(1) + { + if(CMP2_GetOutputStatus()) + { + LED_On; + } + else + { + LED_Off; + } + } + +*/ +bool CMP2_GetOutputStatus(void); + +/** + @Summary + Implements ISR + + @Description + This routine is used to implement the ISR for the interrupt-driven + implementations. + + @Returns + None + + @Param + None +*/ +void CMP2_ISR(void); + + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // CMP2_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp5.c b/firmware/B1-firmware.X/mcc_generated_files/cmp5.c new file mode 100755 index 0000000..c360a04 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp5.c @@ -0,0 +1,86 @@ + /** + CMP5 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + cmp5.c + + @Summary + This is the generated driver implementation file for the CMP5 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for CMP5. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + + /* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + + /** + Section: Included Files + */ + + +#include +#include "cmp5.h" +/** + Section: CMP5 APIs +*/ + +void CMP5_Initialize(void) +{ + + // C5HYS disabled; C5SP hi_speed; C5ON disabled; C5POL not inverted; C5SYNC asynchronous; C5ZLF unfiltered; + CM5CON0 = 0x04; + + // C5INTN no_intFlag; C5INTP no_intFlag; + CM5CON1 = 0x00; + + // C5NCH Vss; + CM5NSEL = 0x08; + + // C5PCH Vss; + CM5PSEL = 0x09; + + // MC5OUT 0; + CMOUT = 0x00; + +} + +bool CMP5_GetOutputStatus(void) +{ + return (CMOUTbits.MC5OUT); +} + + +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/cmp5.h b/firmware/B1-firmware.X/mcc_generated_files/cmp5.h new file mode 100755 index 0000000..a5342ea --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/cmp5.h @@ -0,0 +1,146 @@ + /** + CMP5 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + cmp5.h + + @Summary + This is the generated header file for the CMP5 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for CMP5. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 + */ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef CMP5_H +#define CMP5_H + + /** + Section: Included Files + */ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: CMP5 APIs +*/ + +/** + @Summary + Initializes the CMP5 + + @Description + This routine initializes the CMP5. + This routine must be called before any other CMP5 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + @Example + + CMP5_Initialize(); + +*/ +void CMP5_Initialize(void); + +/** + @Summary + Gets the CMP5 output status. + + @Description + This routine gets the CMP5 output status. + + @Preconditions + The CMP5 initializer routine should be called + prior to use this routine. + + @Param + None + + @Returns + high - if the CMP5 output is high. + low - if the CMP5 output is low. + + @Example + + #define LED_On LATAbits.LATA0=1 + #define LED_Off LATAbits.LATA0=0 + + CMP5_Initialize(); + + while(1) + { + if(CMP5_GetOutputStatus()) + { + LED_On; + } + else + { + LED_Off; + } + } + +*/ +bool CMP5_GetOutputStatus(void); + + + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // CMP5_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac1.c b/firmware/B1-firmware.X/mcc_generated_files/dac1.c new file mode 100755 index 0000000..0480541 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac1.c @@ -0,0 +1,134 @@ +/** + DAC1 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + dac1.c + + @Summary + This is the generated driver implementation file for the DAC1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for DAC1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "dac1.h" + +/** + Section: Macros +*/ + +/** + * Loads data from DAC buffer onto the DAC output + */ +#define DAC1_DoubleBufferLatch() \ + (DACLDbits.DAC1LD = 1) + +/** + Section: DAC1 APIs +*/ + +void DAC1_Initialize(void) +{ + // DAC1FM right justified; DACEN enabled; DACNSS VSS; DACPSS VDD; DACOE1 enabled; DACOE2 disabled; + DAC1CON0 = 0xA0; + // + DAC1REFH = 0x00; + // + DAC1REFL = 0xCD; + //Loading DAC1 double buffer data to latch. + DAC1_DoubleBufferLatch(); +} + + +void DAC1_Load16bitInputData(uint16_t input16BitData) +{ + //DAC input reference range should be 16bit. + //Input data left justified. + DAC1CON0bits.DAC1FM = 1; + + //Loading 16bit data to DAC1 + DAC1REFL = (uint8_t) input16BitData; + DAC1REFH = (uint8_t)(input16BitData >> 8); + //Loading DAC1 double buffer data to latch. + DAC1_DoubleBufferLatch(); +} + +void DAC1_Load10bitInputData(uint16_t input10BitData) +{ + //DAC input reference range should be 10bit. + //Input data right justified. + DAC1CON0bits.DAC1FM = 0; + + //Loading 10bit data to DAC1 + DAC1REFL = (uint8_t) input10BitData; + DAC1REFH = (uint8_t)(input10BitData >> 8); + //Loading DAC1 double buffer data to latch. + DAC1_DoubleBufferLatch(); +} + +void DAC1_Load8bitInputData(uint8_t input8BitData) +{ + //DAC input reference range should be 8 bit. + //Input data right justified. + DAC1CON0bits.DAC1FM = 0; + + //Loading 10bit data to DAC1 + DAC1REFL = input8BitData; + //Loading DAC1 double buffer data to latch. + DAC1_DoubleBufferLatch(); +} + +uint16_t DAC1_Read10BitInputData(void) { + // Right justified, to match ?load? function + DAC1CON0bits.DAC1FM = 0; + + // Read data + uint16_t data = ((uint16_t) DAC1REFH) << 8; + data |= ((uint16_t) DAC1REFL); + + return data; +} +/** + End of File +*/ + + + diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac1.h b/firmware/B1-firmware.X/mcc_generated_files/dac1.h new file mode 100755 index 0000000..a79e5c5 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac1.h @@ -0,0 +1,227 @@ +/** + DAC1 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + dac1.h + + @Summary + This is the generated header file for the DAC1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for DAC1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DAC1_H +#define DAC1_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: DAC1 APIs +*/ + +/** + @Summary + Initializes the DAC1 + + @Description + This routine initializes the DAC1. + This routine must be called before any other DAC1 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + DAC1_Initialize(); + +*/ + +void DAC1_Initialize(void); +/** + @Summary + Load 16bit input data to DAC1. + + @Description + This routine passes the 16bit input data into + DAC1 voltage reference control register.This data will + be left justified. + + @Preconditions + The DAC1_Initialize() routine should be called + before using this routine.DAC input reference range should be 16bit. + + @Param + input16BitData - 16bit input data to DAC1. + + @Returns + None + + @Example + + uint16_t count=0xFFFF; + + DAC1_Initialize(); + DAC1_Load16bitInputData(count); + while(1) + { + } + +*/ +void DAC1_Load16bitInputData(uint16_t input16BitData); + +/** + @Summary + Load 10bit input data to DAC1. + + @Description + This routine passes the 10bit input data into DAC1 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC1_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Param + input10BitData - 10bit input data to DAC1. + + @Returns + None + + @Example + + uint16_t count=0x3FF; + + DAC1_Initialize(); + DAC1_Load10bitInputData(count); + while(1) + { + } + +*/ +void DAC1_Load10bitInputData(uint16_t input10BitData); + +/** + @Summary + Load 8 bit input data to DAC1. + + @Description + This routine passes the 8 bit input data into DAC1 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC1_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Param + input8BitData - 8 bit input data to DAC1. + + @Returns + None + + @Example + + uint8_t count=0x3F; + + DAC1_Initialize(); + DAC1_Load8bitInputData(count); + while(1) + { + } + +*/ +void DAC1_Load8bitInputData(uint8_t input8BitData); + +/** + @Summary + Read 10bit data from DAC1. + + @Description + This routine reads the 10bit data from DAC1 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC1_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Returns + uint16_t - 10bit data from DAC1. + + @Example + + uint16_t count=0x3FF; + + DAC1_Initialize(); + DAC1_Load10bitInputData(count); + + // Make sure data was written to DAC correctly + __conditional_software_breakpoint(count == DAC1_Read10BitInputData(count)); + +*/ +uint16_t DAC1_Read10BitInputData(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // DAC1_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac3.c b/firmware/B1-firmware.X/mcc_generated_files/dac3.c new file mode 100755 index 0000000..e9f5e4f --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac3.c @@ -0,0 +1,77 @@ +/** + DAC3 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + dac3.c + + @Summary + This is the generated driver implementation file for the DAC3 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for DAC3. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "dac3.h" + +/** + Section: DAC3 APIs +*/ + +void DAC3_Initialize(void) +{ + // DAC3EN enabled; NSS VSS; DAC3PSS VDD; OE1 disabled; OE2 disabled; + DAC3CON0 = 0x80; + // DAC3R 6; + DAC3CON1 = 0x06; +} + +void DAC3_SetOutput(uint8_t inputData) +{ + DAC3CON1 = inputData; +} + +uint8_t DAC3_GetOutput(void) +{ + return DAC3CON1; +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac3.h b/firmware/B1-firmware.X/mcc_generated_files/dac3.h new file mode 100755 index 0000000..ed5daf7 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac3.h @@ -0,0 +1,174 @@ +/** + DAC3 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + dac3.h + + @Summary + This is the generated header file for the DAC3 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for DAC3. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DAC3_H +#define DAC3_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: DAC3 APIs +*/ + +/** + @Summary + Initializes the DAC3 + + @Description + This routine initializes the DAC3. + This routine must be called before any other DAC3 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + DAC3_Initialize(); + +*/ +void DAC3_Initialize(void); + +/** + @Summary + Set Input data into DAC3. + + @Description + This routine pass the digital input data into + DAC3 voltage reference control register. + + @Preconditions + The DAC3_Initialize() routine should be called + prior to use this routine. + + @Param + inputData - 8bit digital data to DAC3. + + @Returns + None + + @Example + + uint8_t count=0; + + DAC3_Initialize(); + + for(count=0; count<=30; count++) + { + DAC3_SetOutput(count); + } + + while(1) + { + } + +*/ +void DAC3_SetOutput(uint8_t inputData); + +/** + @Summary + Read input data fed to DAC3. + + @Description + This routine reads the digital input data fed to + DAC3 voltage reference control register. + + @Preconditions + The DAC3_Initialize() routine should be called + prior to use this routine. + + @Param + None + + @Returns + uint8_t inputData - digital data fed to DAC3 + + @Example + + uint8_t count=0; + uint8_t inputData; + + DAC3_Initialize(); + + inputData = DAC3_GetOutput(); + + while(1) + { + } + +*/ +uint8_t DAC3_GetOutput(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // DAC3_H +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac4.c b/firmware/B1-firmware.X/mcc_generated_files/dac4.c new file mode 100755 index 0000000..6486bda --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac4.c @@ -0,0 +1,77 @@ +/** + DAC4 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + dac4.c + + @Summary + This is the generated driver implementation file for the DAC4 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for DAC4. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "dac4.h" + +/** + Section: DAC4 APIs +*/ + +void DAC4_Initialize(void) +{ + // DAC4EN enabled; NSS VSS; DAC4PSS VDD; OE1 disabled; OE2 disabled; + DAC4CON0 = 0x80; + // DAC4R 6; + DAC4CON1 = 0x06; +} + +void DAC4_SetOutput(uint8_t inputData) +{ + DAC4CON1 = inputData; +} + +uint8_t DAC4_GetOutput(void) +{ + return DAC4CON1; +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac4.h b/firmware/B1-firmware.X/mcc_generated_files/dac4.h new file mode 100755 index 0000000..18013da --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac4.h @@ -0,0 +1,174 @@ +/** + DAC4 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + dac4.h + + @Summary + This is the generated header file for the DAC4 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for DAC4. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DAC4_H +#define DAC4_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: DAC4 APIs +*/ + +/** + @Summary + Initializes the DAC4 + + @Description + This routine initializes the DAC4. + This routine must be called before any other DAC4 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + DAC4_Initialize(); + +*/ +void DAC4_Initialize(void); + +/** + @Summary + Set Input data into DAC4. + + @Description + This routine pass the digital input data into + DAC4 voltage reference control register. + + @Preconditions + The DAC4_Initialize() routine should be called + prior to use this routine. + + @Param + inputData - 8bit digital data to DAC4. + + @Returns + None + + @Example + + uint8_t count=0; + + DAC4_Initialize(); + + for(count=0; count<=30; count++) + { + DAC4_SetOutput(count); + } + + while(1) + { + } + +*/ +void DAC4_SetOutput(uint8_t inputData); + +/** + @Summary + Read input data fed to DAC4. + + @Description + This routine reads the digital input data fed to + DAC4 voltage reference control register. + + @Preconditions + The DAC4_Initialize() routine should be called + prior to use this routine. + + @Param + None + + @Returns + uint8_t inputData - digital data fed to DAC4 + + @Example + + uint8_t count=0; + uint8_t inputData; + + DAC4_Initialize(); + + inputData = DAC4_GetOutput(); + + while(1) + { + } + +*/ +uint8_t DAC4_GetOutput(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // DAC4_H +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac5.c b/firmware/B1-firmware.X/mcc_generated_files/dac5.c new file mode 100755 index 0000000..922200d --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac5.c @@ -0,0 +1,134 @@ +/** + DAC5 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + dac5.c + + @Summary + This is the generated driver implementation file for the DAC5 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for DAC5. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "dac5.h" + +/** + Section: Macros +*/ + +/** + * Loads data from DAC buffer onto the DAC output + */ +#define DAC5_DoubleBufferLatch() \ + (DACLDbits.DAC5LD = 1) + +/** + Section: DAC5 APIs +*/ + +void DAC5_Initialize(void) +{ + // DAC5FM right justified; DACEN enabled; DACNSS VSS; DACPSS VDD; DACOE1 enabled; DACOE2 disabled; + DAC5CON0 = 0xA0; + // + DAC5REFH = 0x00; + // + DAC5REFL = 0xCD; + //Loading DAC5 double buffer data to latch. + DAC5_DoubleBufferLatch(); +} + + +void DAC5_Load16bitInputData(uint16_t input16BitData) +{ + //DAC input reference range should be 16bit. + //Input data left justified. + DAC5CON0bits.DAC5FM = 1; + + //Loading 16bit data to DAC5 + DAC5REFL = (uint8_t) input16BitData; + DAC5REFH = (uint8_t)(input16BitData >> 8); + //Loading DAC5 double buffer data to latch. + DAC5_DoubleBufferLatch(); +} + +void DAC5_Load10bitInputData(uint16_t input10BitData) +{ + //DAC input reference range should be 10bit. + //Input data right justified. + DAC5CON0bits.DAC5FM = 0; + + //Loading 10bit data to DAC5 + DAC5REFL = (uint8_t) input10BitData; + DAC5REFH = (uint8_t)(input10BitData >> 8); + //Loading DAC5 double buffer data to latch. + DAC5_DoubleBufferLatch(); +} + +void DAC5_Load8bitInputData(uint8_t input8BitData) +{ + //DAC input reference range should be 8 bit. + //Input data right justified. + DAC5CON0bits.DAC5FM = 0; + + //Loading 10bit data to DAC5 + DAC5REFL = input8BitData; + //Loading DAC5 double buffer data to latch. + DAC5_DoubleBufferLatch(); +} + +uint16_t DAC5_Read10BitInputData(void) { + // Right justified, to match ?load? function + DAC5CON0bits.DAC5FM = 0; + + // Read data + uint16_t data = ((uint16_t) DAC5REFH) << 8; + data |= ((uint16_t) DAC5REFL); + + return data; +} +/** + End of File +*/ + + + diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac5.h b/firmware/B1-firmware.X/mcc_generated_files/dac5.h new file mode 100755 index 0000000..2a9c5de --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac5.h @@ -0,0 +1,227 @@ +/** + DAC5 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + dac5.h + + @Summary + This is the generated header file for the DAC5 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for DAC5. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DAC5_H +#define DAC5_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: DAC5 APIs +*/ + +/** + @Summary + Initializes the DAC5 + + @Description + This routine initializes the DAC5. + This routine must be called before any other DAC5 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + DAC5_Initialize(); + +*/ + +void DAC5_Initialize(void); +/** + @Summary + Load 16bit input data to DAC5. + + @Description + This routine passes the 16bit input data into + DAC5 voltage reference control register.This data will + be left justified. + + @Preconditions + The DAC5_Initialize() routine should be called + before using this routine.DAC input reference range should be 16bit. + + @Param + input16BitData - 16bit input data to DAC5. + + @Returns + None + + @Example + + uint16_t count=0xFFFF; + + DAC5_Initialize(); + DAC5_Load16bitInputData(count); + while(1) + { + } + +*/ +void DAC5_Load16bitInputData(uint16_t input16BitData); + +/** + @Summary + Load 10bit input data to DAC5. + + @Description + This routine passes the 10bit input data into DAC5 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC5_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Param + input10BitData - 10bit input data to DAC5. + + @Returns + None + + @Example + + uint16_t count=0x3FF; + + DAC5_Initialize(); + DAC5_Load10bitInputData(count); + while(1) + { + } + +*/ +void DAC5_Load10bitInputData(uint16_t input10BitData); + +/** + @Summary + Load 8 bit input data to DAC5. + + @Description + This routine passes the 8 bit input data into DAC5 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC5_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Param + input8BitData - 8 bit input data to DAC5. + + @Returns + None + + @Example + + uint8_t count=0x3F; + + DAC5_Initialize(); + DAC5_Load8bitInputData(count); + while(1) + { + } + +*/ +void DAC5_Load8bitInputData(uint8_t input8BitData); + +/** + @Summary + Read 10bit data from DAC5. + + @Description + This routine reads the 10bit data from DAC5 + voltage reference control register.This data will be right justified. + + @Preconditions + The DAC5_Initialize() routine should be called + before using this routine.DAC input reference range should be 10bit. + + @Returns + uint16_t - 10bit data from DAC5. + + @Example + + uint16_t count=0x3FF; + + DAC5_Initialize(); + DAC5_Load10bitInputData(count); + + // Make sure data was written to DAC correctly + __conditional_software_breakpoint(count == DAC5_Read10BitInputData(count)); + +*/ +uint16_t DAC5_Read10BitInputData(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // DAC5_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac7.c b/firmware/B1-firmware.X/mcc_generated_files/dac7.c new file mode 100755 index 0000000..d3d4793 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac7.c @@ -0,0 +1,77 @@ +/** + DAC7 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + dac7.c + + @Summary + This is the generated driver implementation file for the DAC7 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for DAC7. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "dac7.h" + +/** + Section: DAC7 APIs +*/ + +void DAC7_Initialize(void) +{ + // DAC7EN enabled; NSS VSS; DAC7PSS VDD; OE1 enabled; OE2 disabled; + DAC7CON0 = 0xA0; + // DAC7R 6; + DAC7CON1 = 0x06; +} + +void DAC7_SetOutput(uint8_t inputData) +{ + DAC7CON1 = inputData; +} + +uint8_t DAC7_GetOutput(void) +{ + return DAC7CON1; +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/dac7.h b/firmware/B1-firmware.X/mcc_generated_files/dac7.h new file mode 100755 index 0000000..5ac5616 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/dac7.h @@ -0,0 +1,174 @@ +/** + DAC7 Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + dac7.h + + @Summary + This is the generated header file for the DAC7 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for DAC7. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.10 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DAC7_H +#define DAC7_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: DAC7 APIs +*/ + +/** + @Summary + Initializes the DAC7 + + @Description + This routine initializes the DAC7. + This routine must be called before any other DAC7 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + DAC7_Initialize(); + +*/ +void DAC7_Initialize(void); + +/** + @Summary + Set Input data into DAC7. + + @Description + This routine pass the digital input data into + DAC7 voltage reference control register. + + @Preconditions + The DAC7_Initialize() routine should be called + prior to use this routine. + + @Param + inputData - 8bit digital data to DAC7. + + @Returns + None + + @Example + + uint8_t count=0; + + DAC7_Initialize(); + + for(count=0; count<=30; count++) + { + DAC7_SetOutput(count); + } + + while(1) + { + } + +*/ +void DAC7_SetOutput(uint8_t inputData); + +/** + @Summary + Read input data fed to DAC7. + + @Description + This routine reads the digital input data fed to + DAC7 voltage reference control register. + + @Preconditions + The DAC7_Initialize() routine should be called + prior to use this routine. + + @Param + None + + @Returns + uint8_t inputData - digital data fed to DAC7 + + @Example + + uint8_t count=0; + uint8_t inputData; + + DAC7_Initialize(); + + inputData = DAC7_GetOutput(); + + while(1) + { + } + +*/ +uint8_t DAC7_GetOutput(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // DAC7_H +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/device_config.c b/firmware/B1-firmware.X/mcc_generated_files/device_config.c new file mode 100755 index 0000000..a7117ea --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/device_config.c @@ -0,0 +1,68 @@ +/** + @Generated PIC10 / PIC12 / PIC16 / PIC18 MCUs Source File + + @Company: + Microchip Technology Inc. + + @File Name: + mcc.c + + @Summary: + This is the device_config.c file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for driver APIs for all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.00 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +// Configuration bits: selected in the GUI + +// CONFIG1 +#pragma config FOSC = INTOSC // Oscillator Selection Bits->INTOSC oscillator: I/O function on CLKIN pin +#pragma config WDTE = OFF // Watchdog Timer Enable->WDT disabled +#pragma config PWRTE = OFF // Power-up Timer Enable->PWRT disabled +#pragma config MCLRE = ON // MCLR Pin Function Select->MCLR/VPP pin function is MCLR +#pragma config CP = OFF // Flash Program Memory Code Protection->Program memory code protection is disabled +#pragma config BOREN = ON // Brown-out Reset Enable->Brown-out Reset enabled +#pragma config CLKOUTEN = OFF // Clock Out Enable->CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin +#pragma config IESO = ON // Internal/External Switchover Mode->Internal/External Switchover Mode is enabled +#pragma config FCMEN = ON // Fail-Safe Clock Monitor Enable->Fail-Safe Clock Monitor is enabled + +// CONFIG2 +#pragma config WRT = OFF // Flash Memory Self-Write Protection->Write protection off +#pragma config PPS1WAY = ON // Peripheral Pin Select one-way control->The PPSLOCK bit cannot be cleared once it is set by software +#pragma config ZCD = OFF // Zero-cross detect disable->Zero-cross detect circuit is disabled at POR +#pragma config PLLEN = OFF // Phase Lock Loop enable->4x PLL is enabled when software sets the SPLLEN bit +#pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable->Stack Overflow or Underflow will cause a Reset +#pragma config BORV = LO // Brown-out Reset Voltage Selection->Brown-out Reset Voltage (Vbor), low trip point selected. +#pragma config LPBOR = OFF // Low-Power Brown Out Reset->Low-Power BOR is disabled +#pragma config LVP = ON // Low-Voltage Programming Enable->Low-voltage programming enabled diff --git a/firmware/B1-firmware.X/mcc_generated_files/device_config.h b/firmware/B1-firmware.X/mcc_generated_files/device_config.h new file mode 100755 index 0000000..9d41402 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/device_config.h @@ -0,0 +1,55 @@ +/** + @Generated PIC10 / PIC12 / PIC16 / PIC18 MCUs Header File + + @Company: + Microchip Technology Inc. + + @File Name: + mcc.c + + @Summary: + This is the device_config.h file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for driver APIs for all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.00 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef DEVICE_CONFIG_H +#define DEVICE_CONFIG_H + +#define _XTAL_FREQ 8000000 + +#endif /* DEVICE_CONFIG_H */ +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/fvr.c b/firmware/B1-firmware.X/mcc_generated_files/fvr.c new file mode 100755 index 0000000..4ae5fc0 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/fvr.c @@ -0,0 +1,71 @@ +/** + FVR Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + fvr.c + + @Summary + This is the generated driver implementation file for the FVR driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides APIs for FVR. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "fvr.h" + +/** + Section: FVR APIs +*/ + +void FVR_Initialize(void) +{ + // CDAFVR off; FVREN disabled; TSRNG Lo_range; ADFVR off; TSEN disabled; + FVRCON = 0x00; +} + +bool FVR_IsOutputReady(void) +{ + return (FVRCONbits.FVRRDY); +} +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/fvr.h b/firmware/B1-firmware.X/mcc_generated_files/fvr.h new file mode 100755 index 0000000..18e1d3c --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/fvr.h @@ -0,0 +1,139 @@ +/** + FVR Generated Driver API Header File + + @Company + Microchip Technology Inc. + + @File Name + fvr.h + + @Summary + This is the generated header file for the FVR driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for FVR. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef FVR_H +#define FVR_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: FVR APIs +*/ + +/** + @Summary + Initializes the FVR + + @Description + This routine initializes the FVR. + This routine must be called before any other FVR routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + + + @Example + + FVR_Initialize(); + +*/ + void FVR_Initialize(void); + +/** + @Summary + Gets the FVR output ready status. + + @Description + This routine gets the FVR output ready status. + + @Preconditions + The FVR_Initialize() routine should be called + prior to use this routine. + + @Param + None + + @Returns + true - FVR module is ready for use. + false - FVR module is not ready for use. + + @Example + + FVR_Initialize(); + + if(FVR_IsOutputReady()) + { + //user code + } + else + { + //user code + } + +*/ +bool FVR_IsOutputReady(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // FVR_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.c b/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.c new file mode 100755 index 0000000..7dc91dd --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.c @@ -0,0 +1,87 @@ +/** + Generated Interrupt Manager Source File + + @Company: + Microchip Technology Inc. + + @File Name: + interrupt_manager.c + + @Summary: + This is the Interrupt Manager file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for global interrupt handling. + For individual peripheral handlers please see the peripheral driver for + all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.03 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#include "interrupt_manager.h" +#include "mcc.h" + +void __interrupt() INTERRUPT_InterruptManager (void) +{ + // interrupt handler + if(INTCONbits.IOCIE == 1 && INTCONbits.IOCIF == 1) + { + PIN_MANAGER_IOC(); + } + else if(INTCONbits.PEIE == 1) + { + if(PIE2bits.C2IE == 1 && PIR2bits.C2IF == 1) + { + CMP2_ISR(); + LED_B_LAT = (~0x04>>2)&1; + LED_G_LAT = (~0x04>>1)&1; + LED_R_LAT = (~0x04)&1; + } + else if(PIE2bits.C1IE == 1 && PIR2bits.C1IF == 1) + { + CMP1_ISR(); + LED_B_LAT = (~0x04>>2)&1; + LED_G_LAT = (~0x04>>1)&1; + LED_R_LAT = (~0x04)&1; + } + else + { + //Unhandled Interrupt + } + } + else + { + //Unhandled Interrupt + } +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.h b/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.h new file mode 100755 index 0000000..c39e779 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/interrupt_manager.h @@ -0,0 +1,104 @@ +/** + Generated Interrupt Manager Header File + + @Company: + Microchip Technology Inc. + + @File Name: + interrupt_manager.h + + @Summary: + This is the Interrupt Manager file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for global interrupt handling. + For individual peripheral handlers please see the peripheral driver for + all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.03 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef INTERRUPT_MANAGER_H +#define INTERRUPT_MANAGER_H + + +/** + * @Param + none + * @Returns + none + * @Description + This macro will enable global interrupts. + * @Example + INTERRUPT_GlobalInterruptEnable(); + */ +#define INTERRUPT_GlobalInterruptEnable() (INTCONbits.GIE = 1) + +/** + * @Param + none + * @Returns + none + * @Description + This macro will disable global interrupts. + * @Example + INTERRUPT_GlobalInterruptDisable(); + */ +#define INTERRUPT_GlobalInterruptDisable() (INTCONbits.GIE = 0) +/** + * @Param + none + * @Returns + none + * @Description + This macro will enable peripheral interrupts. + * @Example + INTERRUPT_PeripheralInterruptEnable(); + */ +#define INTERRUPT_PeripheralInterruptEnable() (INTCONbits.PEIE = 1) + +/** + * @Param + none + * @Returns + none + * @Description + This macro will disable peripheral interrupts. + * @Example + INTERRUPT_PeripheralInterruptDisable(); + */ +#define INTERRUPT_PeripheralInterruptDisable() (INTCONbits.PEIE = 0) + + +#endif // INTERRUPT_MANAGER_H +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/mcc.c b/firmware/B1-firmware.X/mcc_generated_files/mcc.c new file mode 100755 index 0000000..eef117c --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/mcc.c @@ -0,0 +1,90 @@ +/** + @Generated PIC10 / PIC12 / PIC16 / PIC18 MCUs Source File + + @Company: + Microchip Technology Inc. + + @File Name: + mcc.c + + @Summary: + This is the mcc.c file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for driver APIs for all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.00 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#include "mcc.h" + + +void SYSTEM_Initialize(void) +{ + + PIN_MANAGER_Initialize(); + OSCILLATOR_Initialize(); + WDT_Initialize(); + DAC3_Initialize(); + CMP2_Initialize(); + FVR_Initialize(); + DAC5_Initialize(); + OPA2_Initialize(); + DAC4_Initialize(); + CMP1_Initialize(); + DAC7_Initialize(); + CMP5_Initialize(); + ADC_Initialize(); + OPA1_Initialize(); + DAC1_Initialize(); +} + +void OSCILLATOR_Initialize(void) +{ + // SCS FOSC; SPLLEN disabled; IRCF 8MHz_HF; + OSCCON = 0x70; + // SOSCR enabled; + OSCSTAT = 0x80; + // TUN 0; + OSCTUNE = 0x00; + // SBOREN disabled; BORFS disabled; + BORCON = 0x00; +} + +void WDT_Initialize(void) +{ + // WDTPS 1:65536; SWDTEN OFF; + WDTCON = 0x16; +} + +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/mcc.h b/firmware/B1-firmware.X/mcc_generated_files/mcc.h new file mode 100755 index 0000000..d0b0aca --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/mcc.h @@ -0,0 +1,112 @@ +/** + @Generated PIC10 / PIC12 / PIC16 / PIC18 MCUs Header File + + @Company: + Microchip Technology Inc. + + @File Name: + mcc.h + + @Summary: + This is the mcc.h file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description: + This header file provides implementations for driver APIs for all modules selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.00 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above or later + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef MCC_H +#define MCC_H +#include +#include "device_config.h" +#include "pin_manager.h" +#include +#include +#include +#include "interrupt_manager.h" +#include "dac5.h" +#include "dac4.h" +#include "dac7.h" +#include "cmp2.h" +#include "cmp1.h" +#include "fvr.h" +#include "cmp5.h" +#include "opa1.h" +#include "dac1.h" +#include "opa2.h" +#include "dac3.h" +#include "adc.h" + + + +/** + * @Param + none + * @Returns + none + * @Description + Initializes the device to the default states configured in the + * MCC GUI + * @Example + SYSTEM_Initialize(void); + */ +void SYSTEM_Initialize(void); + +/** + * @Param + none + * @Returns + none + * @Description + Initializes the oscillator to the default states configured in the + * MCC GUI + * @Example + OSCILLATOR_Initialize(void); + */ +void OSCILLATOR_Initialize(void); +/** + * @Param + none + * @Returns + none + * @Description + Initializes the WDT module to the default states configured in the + * MCC GUI + * @Example + WDT_Initialize(void); + */ +void WDT_Initialize(void); + +#endif /* MCC_H */ +/** + End of File +*/ \ No newline at end of file diff --git a/firmware/B1-firmware.X/mcc_generated_files/opa1.c b/firmware/B1-firmware.X/mcc_generated_files/opa1.c new file mode 100755 index 0000000..78a2f03 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/opa1.c @@ -0,0 +1,71 @@ +/** + OPA1 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + opa1.c + + @Summary + This is the generated driver implementation file for the OPA1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for OPA1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "opa1.h" + +/** + Section: OPA1 APIs +*/ + +void OPA1_Initialize(void) +{ + // OPA1ORPOL not inverted; OPA1EN enabled; OPA1UG OPAIN-_pin; OPA1ORM disabled; + OPA1CON = 0x80; + // ORS CCP1_out; + OPA1ORS = 0x00; + // NCH OPA1IN0-; + OPA1NCHS = 0x00; + // PCH OPA1IN0+; + OPA1PCHS = 0x00; +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/opa1.h b/firmware/B1-firmware.X/mcc_generated_files/opa1.h new file mode 100755 index 0000000..3a7dee0 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/opa1.h @@ -0,0 +1,105 @@ +/** + OPA1 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + opa1.c + + @Summary + This is the generated driver implementation file for the OPA1 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for OPA1. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef OPA1_H +#define OPA1_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: OPA1 APIs +*/ + +/** + @Summary + Initializes the OPA1 + + @Description + This routine initializes the OPA1. + This routine must be called before any other OPA1 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + Initialize + + @Example + + OPA1_Initialize(); + +*/ +void OPA1_Initialize(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // OPA1_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/opa2.c b/firmware/B1-firmware.X/mcc_generated_files/opa2.c new file mode 100755 index 0000000..4ac99f5 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/opa2.c @@ -0,0 +1,71 @@ +/** + OPA2 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + opa2.c + + @Summary + This is the generated driver implementation file for the OPA2 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for OPA2. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +/** + Section: Included Files +*/ + +#include +#include "opa2.h" + +/** + Section: OPA2 APIs +*/ + +void OPA2_Initialize(void) +{ + // OPA2ORPOL not inverted; OPA2EN enabled; OPA2UG OPAIN-_pin; OPA2ORM disabled; + OPA2CON = 0x80; + // ORS CCP1_out; + OPA2ORS = 0x00; + // NCH OPA2IN0-; + OPA2NCHS = 0x00; + // PCH OPA2IN0+; + OPA2PCHS = 0x00; +} +/** + End of File +*/ diff --git a/firmware/B1-firmware.X/mcc_generated_files/opa2.h b/firmware/B1-firmware.X/mcc_generated_files/opa2.h new file mode 100755 index 0000000..aef9fa5 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/opa2.h @@ -0,0 +1,105 @@ +/** + OPA2 Generated Driver File + + @Company + Microchip Technology Inc. + + @File Name + opa2.c + + @Summary + This is the generated driver implementation file for the OPA2 driver using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This source file provides implementations for driver APIs for OPA2. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.01 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef OPA2_H +#define OPA2_H + +/** + Section: Included Files +*/ + +#include +#include + +#ifdef __cplusplus // Provide C++ Compatibility + + extern "C" { + +#endif + +/** + Section: OPA2 APIs +*/ + +/** + @Summary + Initializes the OPA2 + + @Description + This routine initializes the OPA2. + This routine must be called before any other OPA2 routine is called. + This routine should only be called once during system initialization. + + @Preconditions + None + + @Param + None + + @Returns + None + + @Comment + Initialize + + @Example + + OPA2_Initialize(); + +*/ +void OPA2_Initialize(void); + +#ifdef __cplusplus // Provide C++ Compatibility + + } + +#endif + +#endif // OPA2_H +/** + End of File +*/ + diff --git a/firmware/B1-firmware.X/mcc_generated_files/pin_manager.c b/firmware/B1-firmware.X/mcc_generated_files/pin_manager.c new file mode 100755 index 0000000..74dba9d --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/pin_manager.c @@ -0,0 +1,216 @@ +/** + Generated Pin Manager File + + Company: + Microchip Technology Inc. + + File Name: + pin_manager.c + + Summary: + This is the Pin Manager file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + Description: + This header file provides implementations for pin APIs for all pins selected in the GUI. + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 + + Copyright (c) 2013 - 2015 released Microchip Technology Inc. All rights reserved. +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#include "pin_manager.h" + + + + +void (*IOCBF0_InterruptHandler)(void); +void (*IOCCF7_InterruptHandler)(void); + + +void PIN_MANAGER_Initialize(void) +{ + /** + LATx registers + */ + LATA = 0x00; + LATB = 0x00; + LATC = 0x00; + + /** + TRISx registers + */ + TRISE = 0x08; + TRISA = 0x39; + TRISB = 0xED; + TRISC = 0x8C; + + /** + ANSELx registers + */ + ANSELC = 0x7C; + ANSELB = 0x3E; + ANSELA = 0x3F; + + /** + WPUx registers + */ + WPUE = 0x00; + WPUB = 0x00; + WPUA = 0x00; + WPUC = 0x00; + OPTION_REGbits.nWPUEN = 1; + + /** + ODx registers + */ + ODCONA = 0x00; + ODCONB = 0x00; + ODCONC = 0x00; + + /** + SLRCONx registers + */ + SLRCONA = 0xFF; + SLRCONB = 0xFF; + SLRCONC = 0xFF; + + /** + INLVLx registers + */ + INLVLA = 0x3F; + INLVLB = 0xF0; + INLVLC = 0xFF; + + + /** + IOCx registers + */ + //interrupt on change for group IOCBF - flag + IOCBFbits.IOCBF0 = 0; + //interrupt on change for group IOCBN - negative + IOCBNbits.IOCBN0 = 1; + //interrupt on change for group IOCBP - positive + IOCBPbits.IOCBP0 = 0; + //interrupt on change for group IOCCF - flag + IOCCFbits.IOCCF7 = 0; + //interrupt on change for group IOCCN - negative + IOCCNbits.IOCCN7 = 1; + //interrupt on change for group IOCCP - positive + IOCCPbits.IOCCP7 = 0; + + + + // register default IOC callback functions at runtime; use these methods to register a custom function + IOCBF0_SetInterruptHandler(IOCBF0_DefaultInterruptHandler); + IOCCF7_SetInterruptHandler(IOCCF7_DefaultInterruptHandler); + + // Enable IOCI interrupt + INTCONbits.IOCIE = 1; + +} + +void PIN_MANAGER_IOC(void) +{ + // interrupt on change for pin IOCBF0 + if(IOCBFbits.IOCBF0 == 1) + { + IOCBF0_ISR(); + } + // interrupt on change for pin IOCCF7 + if(IOCCFbits.IOCCF7 == 1) + { + IOCCF7_ISR(); + } +} + +/** + IOCBF0 Interrupt Service Routine +*/ +void IOCBF0_ISR(void) { + + // Add custom IOCBF0 code + + // Call the interrupt handler for the callback registered at runtime + if(IOCBF0_InterruptHandler) + { + IOCBF0_InterruptHandler(); + } + IOCBFbits.IOCBF0 = 0; +} + +/** + Allows selecting an interrupt handler for IOCBF0 at application runtime +*/ +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)){ + IOCBF0_InterruptHandler = InterruptHandler; +} + +/** + Default interrupt handler for IOCBF0 +*/ +void IOCBF0_DefaultInterruptHandler(void){ + // add your IOCBF0 interrupt custom code + // or set custom function using IOCBF0_SetInterruptHandler() +} + +/** + IOCCF7 Interrupt Service Routine +*/ +void IOCCF7_ISR(void) { + + // Add custom IOCCF7 code + + // Call the interrupt handler for the callback registered at runtime + if(IOCCF7_InterruptHandler) + { + IOCCF7_InterruptHandler(); + } + IOCCFbits.IOCCF7 = 0; +} + +/** + Allows selecting an interrupt handler for IOCCF7 at application runtime +*/ +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)){ + IOCCF7_InterruptHandler = InterruptHandler; +} + +/** + Default interrupt handler for IOCCF7 +*/ +void IOCCF7_DefaultInterruptHandler(void){ + // add your IOCCF7 interrupt custom code + // or set custom function using IOCCF7_SetInterruptHandler() +} + +/** + End of File +*/ \ No newline at end of file diff --git a/firmware/B1-firmware.X/mcc_generated_files/pin_manager.h b/firmware/B1-firmware.X/mcc_generated_files/pin_manager.h new file mode 100755 index 0000000..cba0fb0 --- /dev/null +++ b/firmware/B1-firmware.X/mcc_generated_files/pin_manager.h @@ -0,0 +1,600 @@ +/** + @Generated Pin Manager Header File + + @Company: + Microchip Technology Inc. + + @File Name: + pin_manager.h + + @Summary: + This is the Pin Manager file generated using PIC10 / PIC12 / PIC16 / PIC18 MCUs + + @Description + This header file provides APIs for driver for . + Generation Information : + Product Revision : PIC10 / PIC12 / PIC16 / PIC18 MCUs - 1.81.3 + Device : PIC16F1776 + Driver Version : 2.11 + The generated drivers are tested against the following: + Compiler : XC8 2.20 and above + MPLAB : MPLAB X 5.40 +*/ + +/* + (c) 2018 Microchip Technology Inc. and its subsidiaries. + + Subject to your compliance with these terms, you may use Microchip software and any + derivatives exclusively with Microchip products. It is your responsibility to comply with third party + license terms applicable to your use of third party software (including open source software) that + may accompany Microchip software. + + THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, WHETHER + EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, INCLUDING ANY + IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS + FOR A PARTICULAR PURPOSE. + + IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, + INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND + WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP + HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO + THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL + CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT + OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS + SOFTWARE. +*/ + +#ifndef PIN_MANAGER_H +#define PIN_MANAGER_H + +/** + Section: Included Files +*/ + +#include + +#define INPUT 1 +#define OUTPUT 0 + +#define HIGH 1 +#define LOW 0 + +#define ANALOG 1 +#define DIGITAL 0 + +#define PULL_UP_ENABLED 1 +#define PULL_UP_DISABLED 0 + +// get/set GNDREF_SENSE aliases +#define GNDREF_SENSE_TRIS TRISAbits.TRISA0 +#define GNDREF_SENSE_LAT LATAbits.LATA0 +#define GNDREF_SENSE_PORT PORTAbits.RA0 +#define GNDREF_SENSE_WPU WPUAbits.WPUA0 +#define GNDREF_SENSE_OD ODCONAbits.ODA0 +#define GNDREF_SENSE_ANS ANSELAbits.ANSA0 +#define GNDREF_SENSE_SetHigh() do { LATAbits.LATA0 = 1; } while(0) +#define GNDREF_SENSE_SetLow() do { LATAbits.LATA0 = 0; } while(0) +#define GNDREF_SENSE_Toggle() do { LATAbits.LATA0 = ~LATAbits.LATA0; } while(0) +#define GNDREF_SENSE_GetValue() PORTAbits.RA0 +#define GNDREF_SENSE_SetDigitalInput() do { TRISAbits.TRISA0 = 1; } while(0) +#define GNDREF_SENSE_SetDigitalOutput() do { TRISAbits.TRISA0 = 0; } while(0) +#define GNDREF_SENSE_SetPullup() do { WPUAbits.WPUA0 = 1; } while(0) +#define GNDREF_SENSE_ResetPullup() do { WPUAbits.WPUA0 = 0; } while(0) +#define GNDREF_SENSE_SetPushPull() do { ODCONAbits.ODA0 = 0; } while(0) +#define GNDREF_SENSE_SetOpenDrain() do { ODCONAbits.ODA0 = 1; } while(0) +#define GNDREF_SENSE_SetAnalogMode() do { ANSELAbits.ANSA0 = 1; } while(0) +#define GNDREF_SENSE_SetDigitalMode() do { ANSELAbits.ANSA0 = 0; } while(0) + +// get/set RA1 procedures +#define RA1_SetHigh() do { LATAbits.LATA1 = 1; } while(0) +#define RA1_SetLow() do { LATAbits.LATA1 = 0; } while(0) +#define RA1_Toggle() do { LATAbits.LATA1 = ~LATAbits.LATA1; } while(0) +#define RA1_GetValue() PORTAbits.RA1 +#define RA1_SetDigitalInput() do { TRISAbits.TRISA1 = 1; } while(0) +#define RA1_SetDigitalOutput() do { TRISAbits.TRISA1 = 0; } while(0) +#define RA1_SetPullup() do { WPUAbits.WPUA1 = 1; } while(0) +#define RA1_ResetPullup() do { WPUAbits.WPUA1 = 0; } while(0) +#define RA1_SetAnalogMode() do { ANSELAbits.ANSA1 = 1; } while(0) +#define RA1_SetDigitalMode() do { ANSELAbits.ANSA1 = 0; } while(0) + +// get/set RA2 procedures +#define RA2_SetHigh() do { LATAbits.LATA2 = 1; } while(0) +#define RA2_SetLow() do { LATAbits.LATA2 = 0; } while(0) +#define RA2_Toggle() do { LATAbits.LATA2 = ~LATAbits.LATA2; } while(0) +#define RA2_GetValue() PORTAbits.RA2 +#define RA2_SetDigitalInput() do { TRISAbits.TRISA2 = 1; } while(0) +#define RA2_SetDigitalOutput() do { TRISAbits.TRISA2 = 0; } while(0) +#define RA2_SetPullup() do { WPUAbits.WPUA2 = 1; } while(0) +#define RA2_ResetPullup() do { WPUAbits.WPUA2 = 0; } while(0) +#define RA2_SetAnalogMode() do { ANSELAbits.ANSA2 = 1; } while(0) +#define RA2_SetDigitalMode() do { ANSELAbits.ANSA2 = 0; } while(0) + +// get/set RA4 procedures +#define RA4_SetHigh() do { LATAbits.LATA4 = 1; } while(0) +#define RA4_SetLow() do { LATAbits.LATA4 = 0; } while(0) +#define RA4_Toggle() do { LATAbits.LATA4 = ~LATAbits.LATA4; } while(0) +#define RA4_GetValue() PORTAbits.RA4 +#define RA4_SetDigitalInput() do { TRISAbits.TRISA4 = 1; } while(0) +#define RA4_SetDigitalOutput() do { TRISAbits.TRISA4 = 0; } while(0) +#define RA4_SetPullup() do { WPUAbits.WPUA4 = 1; } while(0) +#define RA4_ResetPullup() do { WPUAbits.WPUA4 = 0; } while(0) +#define RA4_SetAnalogMode() do { ANSELAbits.ANSA4 = 1; } while(0) +#define RA4_SetDigitalMode() do { ANSELAbits.ANSA4 = 0; } while(0) + +// get/set RA5 procedures +#define RA5_SetHigh() do { LATAbits.LATA5 = 1; } while(0) +#define RA5_SetLow() do { LATAbits.LATA5 = 0; } while(0) +#define RA5_Toggle() do { LATAbits.LATA5 = ~LATAbits.LATA5; } while(0) +#define RA5_GetValue() PORTAbits.RA5 +#define RA5_SetDigitalInput() do { TRISAbits.TRISA5 = 1; } while(0) +#define RA5_SetDigitalOutput() do { TRISAbits.TRISA5 = 0; } while(0) +#define RA5_SetPullup() do { WPUAbits.WPUA5 = 1; } while(0) +#define RA5_ResetPullup() do { WPUAbits.WPUA5 = 0; } while(0) +#define RA5_SetAnalogMode() do { ANSELAbits.ANSA5 = 1; } while(0) +#define RA5_SetDigitalMode() do { ANSELAbits.ANSA5 = 0; } while(0) + +// get/set SR aliases +#define SR_TRIS TRISAbits.TRISA6 +#define SR_LAT LATAbits.LATA6 +#define SR_PORT PORTAbits.RA6 +#define SR_WPU WPUAbits.WPUA6 +#define SR_OD ODCONAbits.ODA6 +#define SR_SetHigh() do { LATAbits.LATA6 = 1; } while(0) +#define SR_SetLow() do { LATAbits.LATA6 = 0; } while(0) +#define SR_Toggle() do { LATAbits.LATA6 = ~LATAbits.LATA6; } while(0) +#define SR_GetValue() PORTAbits.RA6 +#define SR_SetDigitalInput() do { TRISAbits.TRISA6 = 1; } while(0) +#define SR_SetDigitalOutput() do { TRISAbits.TRISA6 = 0; } while(0) +#define SR_SetPullup() do { WPUAbits.WPUA6 = 1; } while(0) +#define SR_ResetPullup() do { WPUAbits.WPUA6 = 0; } while(0) +#define SR_SetPushPull() do { ODCONAbits.ODA6 = 0; } while(0) +#define SR_SetOpenDrain() do { ODCONAbits.ODA6 = 1; } while(0) + +// get/set MUX_SEL1 aliases +#define MUX_SEL1_TRIS TRISAbits.TRISA7 +#define MUX_SEL1_LAT LATAbits.LATA7 +#define MUX_SEL1_PORT PORTAbits.RA7 +#define MUX_SEL1_WPU WPUAbits.WPUA7 +#define MUX_SEL1_OD ODCONAbits.ODA7 +#define MUX_SEL1_SetHigh() do { LATAbits.LATA7 = 1; } while(0) +#define MUX_SEL1_SetLow() do { LATAbits.LATA7 = 0; } while(0) +#define MUX_SEL1_Toggle() do { LATAbits.LATA7 = ~LATAbits.LATA7; } while(0) +#define MUX_SEL1_GetValue() PORTAbits.RA7 +#define MUX_SEL1_SetDigitalInput() do { TRISAbits.TRISA7 = 1; } while(0) +#define MUX_SEL1_SetDigitalOutput() do { TRISAbits.TRISA7 = 0; } while(0) +#define MUX_SEL1_SetPullup() do { WPUAbits.WPUA7 = 1; } while(0) +#define MUX_SEL1_ResetPullup() do { WPUAbits.WPUA7 = 0; } while(0) +#define MUX_SEL1_SetPushPull() do { ODCONAbits.ODA7 = 0; } while(0) +#define MUX_SEL1_SetOpenDrain() do { ODCONAbits.ODA7 = 1; } while(0) + +// get/set SW2 aliases +#define SW2_TRIS TRISBbits.TRISB0 +#define SW2_LAT LATBbits.LATB0 +#define SW2_PORT PORTBbits.RB0 +#define SW2_WPU WPUBbits.WPUB0 +#define SW2_ANS ANSELBbits.ANSB0 +#define SW2_SetHigh() do { LATBbits.LATB0 = 1; } while(0) +#define SW2_SetLow() do { LATBbits.LATB0 = 0; } while(0) +#define SW2_Toggle() do { LATBbits.LATB0 = ~LATBbits.LATB0; } while(0) +#define SW2_GetValue() PORTBbits.RB0 +#define SW2_SetDigitalInput() do { TRISBbits.TRISB0 = 1; } while(0) +#define SW2_SetDigitalOutput() do { TRISBbits.TRISB0 = 0; } while(0) +#define SW2_SetPullup() do { WPUBbits.WPUB0 = 1; } while(0) +#define SW2_ResetPullup() do { WPUBbits.WPUB0 = 0; } while(0) +#define SW2_SetAnalogMode() do { ANSELBbits.ANSB0 = 1; } while(0) +#define SW2_SetDigitalMode() do { ANSELBbits.ANSB0 = 0; } while(0) + +// get/set RB1 procedures +#define RB1_SetHigh() do { LATBbits.LATB1 = 1; } while(0) +#define RB1_SetLow() do { LATBbits.LATB1 = 0; } while(0) +#define RB1_Toggle() do { LATBbits.LATB1 = ~LATBbits.LATB1; } while(0) +#define RB1_GetValue() PORTBbits.RB1 +#define RB1_SetDigitalInput() do { TRISBbits.TRISB1 = 1; } while(0) +#define RB1_SetDigitalOutput() do { TRISBbits.TRISB1 = 0; } while(0) +#define RB1_SetPullup() do { WPUBbits.WPUB1 = 1; } while(0) +#define RB1_ResetPullup() do { WPUBbits.WPUB1 = 0; } while(0) +#define RB1_SetAnalogMode() do { ANSELBbits.ANSB1 = 1; } while(0) +#define RB1_SetDigitalMode() do { ANSELBbits.ANSB1 = 0; } while(0) + +// get/set RB2 procedures +#define RB2_SetHigh() do { LATBbits.LATB2 = 1; } while(0) +#define RB2_SetLow() do { LATBbits.LATB2 = 0; } while(0) +#define RB2_Toggle() do { LATBbits.LATB2 = ~LATBbits.LATB2; } while(0) +#define RB2_GetValue() PORTBbits.RB2 +#define RB2_SetDigitalInput() do { TRISBbits.TRISB2 = 1; } while(0) +#define RB2_SetDigitalOutput() do { TRISBbits.TRISB2 = 0; } while(0) +#define RB2_SetPullup() do { WPUBbits.WPUB2 = 1; } while(0) +#define RB2_ResetPullup() do { WPUBbits.WPUB2 = 0; } while(0) +#define RB2_SetAnalogMode() do { ANSELBbits.ANSB2 = 1; } while(0) +#define RB2_SetDigitalMode() do { ANSELBbits.ANSB2 = 0; } while(0) + +// get/set RB3 procedures +#define RB3_SetHigh() do { LATBbits.LATB3 = 1; } while(0) +#define RB3_SetLow() do { LATBbits.LATB3 = 0; } while(0) +#define RB3_Toggle() do { LATBbits.LATB3 = ~LATBbits.LATB3; } while(0) +#define RB3_GetValue() PORTBbits.RB3 +#define RB3_SetDigitalInput() do { TRISBbits.TRISB3 = 1; } while(0) +#define RB3_SetDigitalOutput() do { TRISBbits.TRISB3 = 0; } while(0) +#define RB3_SetPullup() do { WPUBbits.WPUB3 = 1; } while(0) +#define RB3_ResetPullup() do { WPUBbits.WPUB3 = 0; } while(0) +#define RB3_SetAnalogMode() do { ANSELBbits.ANSB3 = 1; } while(0) +#define RB3_SetDigitalMode() do { ANSELBbits.ANSB3 = 0; } while(0) + +// get/set MUX_SEL2 aliases +#define MUX_SEL2_TRIS TRISBbits.TRISB4 +#define MUX_SEL2_LAT LATBbits.LATB4 +#define MUX_SEL2_PORT PORTBbits.RB4 +#define MUX_SEL2_WPU WPUBbits.WPUB4 +#define MUX_SEL2_OD ODCONBbits.ODB4 +#define MUX_SEL2_ANS ANSELBbits.ANSB4 +#define MUX_SEL2_SetHigh() do { LATBbits.LATB4 = 1; } while(0) +#define MUX_SEL2_SetLow() do { LATBbits.LATB4 = 0; } while(0) +#define MUX_SEL2_Toggle() do { LATBbits.LATB4 = ~LATBbits.LATB4; } while(0) +#define MUX_SEL2_GetValue() PORTBbits.RB4 +#define MUX_SEL2_SetDigitalInput() do { TRISBbits.TRISB4 = 1; } while(0) +#define MUX_SEL2_SetDigitalOutput() do { TRISBbits.TRISB4 = 0; } while(0) +#define MUX_SEL2_SetPullup() do { WPUBbits.WPUB4 = 1; } while(0) +#define MUX_SEL2_ResetPullup() do { WPUBbits.WPUB4 = 0; } while(0) +#define MUX_SEL2_SetPushPull() do { ODCONBbits.ODB4 = 0; } while(0) +#define MUX_SEL2_SetOpenDrain() do { ODCONBbits.ODB4 = 1; } while(0) +#define MUX_SEL2_SetAnalogMode() do { ANSELBbits.ANSB4 = 1; } while(0) +#define MUX_SEL2_SetDigitalMode() do { ANSELBbits.ANSB4 = 0; } while(0) + +// get/set VIN_SENSE aliases +#define VIN_SENSE_TRIS TRISBbits.TRISB5 +#define VIN_SENSE_LAT LATBbits.LATB5 +#define VIN_SENSE_PORT PORTBbits.RB5 +#define VIN_SENSE_WPU WPUBbits.WPUB5 +#define VIN_SENSE_OD ODCONBbits.ODB5 +#define VIN_SENSE_ANS ANSELBbits.ANSB5 +#define VIN_SENSE_SetHigh() do { LATBbits.LATB5 = 1; } while(0) +#define VIN_SENSE_SetLow() do { LATBbits.LATB5 = 0; } while(0) +#define VIN_SENSE_Toggle() do { LATBbits.LATB5 = ~LATBbits.LATB5; } while(0) +#define VIN_SENSE_GetValue() PORTBbits.RB5 +#define VIN_SENSE_SetDigitalInput() do { TRISBbits.TRISB5 = 1; } while(0) +#define VIN_SENSE_SetDigitalOutput() do { TRISBbits.TRISB5 = 0; } while(0) +#define VIN_SENSE_SetPullup() do { WPUBbits.WPUB5 = 1; } while(0) +#define VIN_SENSE_ResetPullup() do { WPUBbits.WPUB5 = 0; } while(0) +#define VIN_SENSE_SetPushPull() do { ODCONBbits.ODB5 = 0; } while(0) +#define VIN_SENSE_SetOpenDrain() do { ODCONBbits.ODB5 = 1; } while(0) +#define VIN_SENSE_SetAnalogMode() do { ANSELBbits.ANSB5 = 1; } while(0) +#define VIN_SENSE_SetDigitalMode() do { ANSELBbits.ANSB5 = 0; } while(0) + +// get/set RC0 procedures +#define RC0_SetHigh() do { LATCbits.LATC0 = 1; } while(0) +#define RC0_SetLow() do { LATCbits.LATC0 = 0; } while(0) +#define RC0_Toggle() do { LATCbits.LATC0 = ~LATCbits.LATC0; } while(0) +#define RC0_GetValue() PORTCbits.RC0 +#define RC0_SetDigitalInput() do { TRISCbits.TRISC0 = 1; } while(0) +#define RC0_SetDigitalOutput() do { TRISCbits.TRISC0 = 0; } while(0) +#define RC0_SetPullup() do { WPUCbits.WPUC0 = 1; } while(0) +#define RC0_ResetPullup() do { WPUCbits.WPUC0 = 0; } while(0) + +// get/set RC1 procedures +#define RC1_SetHigh() do { LATCbits.LATC1 = 1; } while(0) +#define RC1_SetLow() do { LATCbits.LATC1 = 0; } while(0) +#define RC1_Toggle() do { LATCbits.LATC1 = ~LATCbits.LATC1; } while(0) +#define RC1_GetValue() PORTCbits.RC1 +#define RC1_SetDigitalInput() do { TRISCbits.TRISC1 = 1; } while(0) +#define RC1_SetDigitalOutput() do { TRISCbits.TRISC1 = 0; } while(0) +#define RC1_SetPullup() do { WPUCbits.WPUC1 = 1; } while(0) +#define RC1_ResetPullup() do { WPUCbits.WPUC1 = 0; } while(0) + +// get/set STAGE2_MON aliases +#define STAGE2_MON_TRIS TRISCbits.TRISC2 +#define STAGE2_MON_LAT LATCbits.LATC2 +#define STAGE2_MON_PORT PORTCbits.RC2 +#define STAGE2_MON_WPU WPUCbits.WPUC2 +#define STAGE2_MON_OD ODCONCbits.ODC2 +#define STAGE2_MON_ANS ANSELCbits.ANSC2 +#define STAGE2_MON_SetHigh() do { LATCbits.LATC2 = 1; } while(0) +#define STAGE2_MON_SetLow() do { LATCbits.LATC2 = 0; } while(0) +#define STAGE2_MON_Toggle() do { LATCbits.LATC2 = ~LATCbits.LATC2; } while(0) +#define STAGE2_MON_GetValue() PORTCbits.RC2 +#define STAGE2_MON_SetDigitalInput() do { TRISCbits.TRISC2 = 1; } while(0) +#define STAGE2_MON_SetDigitalOutput() do { TRISCbits.TRISC2 = 0; } while(0) +#define STAGE2_MON_SetPullup() do { WPUCbits.WPUC2 = 1; } while(0) +#define STAGE2_MON_ResetPullup() do { WPUCbits.WPUC2 = 0; } while(0) +#define STAGE2_MON_SetPushPull() do { ODCONCbits.ODC2 = 0; } while(0) +#define STAGE2_MON_SetOpenDrain() do { ODCONCbits.ODC2 = 1; } while(0) +#define STAGE2_MON_SetAnalogMode() do { ANSELCbits.ANSC2 = 1; } while(0) +#define STAGE2_MON_SetDigitalMode() do { ANSELCbits.ANSC2 = 0; } while(0) + +// get/set STAGE1_MON aliases +#define STAGE1_MON_TRIS TRISCbits.TRISC3 +#define STAGE1_MON_LAT LATCbits.LATC3 +#define STAGE1_MON_PORT PORTCbits.RC3 +#define STAGE1_MON_WPU WPUCbits.WPUC3 +#define STAGE1_MON_OD ODCONCbits.ODC3 +#define STAGE1_MON_ANS ANSELCbits.ANSC3 +#define STAGE1_MON_SetHigh() do { LATCbits.LATC3 = 1; } while(0) +#define STAGE1_MON_SetLow() do { LATCbits.LATC3 = 0; } while(0) +#define STAGE1_MON_Toggle() do { LATCbits.LATC3 = ~LATCbits.LATC3; } while(0) +#define STAGE1_MON_GetValue() PORTCbits.RC3 +#define STAGE1_MON_SetDigitalInput() do { TRISCbits.TRISC3 = 1; } while(0) +#define STAGE1_MON_SetDigitalOutput() do { TRISCbits.TRISC3 = 0; } while(0) +#define STAGE1_MON_SetPullup() do { WPUCbits.WPUC3 = 1; } while(0) +#define STAGE1_MON_ResetPullup() do { WPUCbits.WPUC3 = 0; } while(0) +#define STAGE1_MON_SetPushPull() do { ODCONCbits.ODC3 = 0; } while(0) +#define STAGE1_MON_SetOpenDrain() do { ODCONCbits.ODC3 = 1; } while(0) +#define STAGE1_MON_SetAnalogMode() do { ANSELCbits.ANSC3 = 1; } while(0) +#define STAGE1_MON_SetDigitalMode() do { ANSELCbits.ANSC3 = 0; } while(0) + +// get/set LED_R aliases +#define LED_R_TRIS TRISCbits.TRISC4 +#define LED_R_LAT LATCbits.LATC4 +#define LED_R_PORT PORTCbits.RC4 +#define LED_R_WPU WPUCbits.WPUC4 +#define LED_R_OD ODCONCbits.ODC4 +#define LED_R_ANS ANSELCbits.ANSC4 +#define LED_R_SetHigh() do { LATCbits.LATC4 = 1; } while(0) +#define LED_R_SetLow() do { LATCbits.LATC4 = 0; } while(0) +#define LED_R_Toggle() do { LATCbits.LATC4 = ~LATCbits.LATC4; } while(0) +#define LED_R_GetValue() PORTCbits.RC4 +#define LED_R_SetDigitalInput() do { TRISCbits.TRISC4 = 1; } while(0) +#define LED_R_SetDigitalOutput() do { TRISCbits.TRISC4 = 0; } while(0) +#define LED_R_SetPullup() do { WPUCbits.WPUC4 = 1; } while(0) +#define LED_R_ResetPullup() do { WPUCbits.WPUC4 = 0; } while(0) +#define LED_R_SetPushPull() do { ODCONCbits.ODC4 = 0; } while(0) +#define LED_R_SetOpenDrain() do { ODCONCbits.ODC4 = 1; } while(0) +#define LED_R_SetAnalogMode() do { ANSELCbits.ANSC4 = 1; } while(0) +#define LED_R_SetDigitalMode() do { ANSELCbits.ANSC4 = 0; } while(0) + +// get/set LED_G aliases +#define LED_G_TRIS TRISCbits.TRISC5 +#define LED_G_LAT LATCbits.LATC5 +#define LED_G_PORT PORTCbits.RC5 +#define LED_G_WPU WPUCbits.WPUC5 +#define LED_G_OD ODCONCbits.ODC5 +#define LED_G_ANS ANSELCbits.ANSC5 +#define LED_G_SetHigh() do { LATCbits.LATC5 = 1; } while(0) +#define LED_G_SetLow() do { LATCbits.LATC5 = 0; } while(0) +#define LED_G_Toggle() do { LATCbits.LATC5 = ~LATCbits.LATC5; } while(0) +#define LED_G_GetValue() PORTCbits.RC5 +#define LED_G_SetDigitalInput() do { TRISCbits.TRISC5 = 1; } while(0) +#define LED_G_SetDigitalOutput() do { TRISCbits.TRISC5 = 0; } while(0) +#define LED_G_SetPullup() do { WPUCbits.WPUC5 = 1; } while(0) +#define LED_G_ResetPullup() do { WPUCbits.WPUC5 = 0; } while(0) +#define LED_G_SetPushPull() do { ODCONCbits.ODC5 = 0; } while(0) +#define LED_G_SetOpenDrain() do { ODCONCbits.ODC5 = 1; } while(0) +#define LED_G_SetAnalogMode() do { ANSELCbits.ANSC5 = 1; } while(0) +#define LED_G_SetDigitalMode() do { ANSELCbits.ANSC5 = 0; } while(0) + +// get/set LED_B aliases +#define LED_B_TRIS TRISCbits.TRISC6 +#define LED_B_LAT LATCbits.LATC6 +#define LED_B_PORT PORTCbits.RC6 +#define LED_B_WPU WPUCbits.WPUC6 +#define LED_B_OD ODCONCbits.ODC6 +#define LED_B_ANS ANSELCbits.ANSC6 +#define LED_B_SetHigh() do { LATCbits.LATC6 = 1; } while(0) +#define LED_B_SetLow() do { LATCbits.LATC6 = 0; } while(0) +#define LED_B_Toggle() do { LATCbits.LATC6 = ~LATCbits.LATC6; } while(0) +#define LED_B_GetValue() PORTCbits.RC6 +#define LED_B_SetDigitalInput() do { TRISCbits.TRISC6 = 1; } while(0) +#define LED_B_SetDigitalOutput() do { TRISCbits.TRISC6 = 0; } while(0) +#define LED_B_SetPullup() do { WPUCbits.WPUC6 = 1; } while(0) +#define LED_B_ResetPullup() do { WPUCbits.WPUC6 = 0; } while(0) +#define LED_B_SetPushPull() do { ODCONCbits.ODC6 = 0; } while(0) +#define LED_B_SetOpenDrain() do { ODCONCbits.ODC6 = 1; } while(0) +#define LED_B_SetAnalogMode() do { ANSELCbits.ANSC6 = 1; } while(0) +#define LED_B_SetDigitalMode() do { ANSELCbits.ANSC6 = 0; } while(0) + +// get/set SW1 aliases +#define SW1_TRIS TRISCbits.TRISC7 +#define SW1_LAT LATCbits.LATC7 +#define SW1_PORT PORTCbits.RC7 +#define SW1_WPU WPUCbits.WPUC7 +#define SW1_OD ODCONCbits.ODC7 +#define SW1_ANS ANSELCbits.ANSC7 +#define SW1_SetHigh() do { LATCbits.LATC7 = 1; } while(0) +#define SW1_SetLow() do { LATCbits.LATC7 = 0; } while(0) +#define SW1_Toggle() do { LATCbits.LATC7 = ~LATCbits.LATC7; } while(0) +#define SW1_GetValue() PORTCbits.RC7 +#define SW1_SetDigitalInput() do { TRISCbits.TRISC7 = 1; } while(0) +#define SW1_SetDigitalOutput() do { TRISCbits.TRISC7 = 0; } while(0) +#define SW1_SetPullup() do { WPUCbits.WPUC7 = 1; } while(0) +#define SW1_ResetPullup() do { WPUCbits.WPUC7 = 0; } while(0) +#define SW1_SetPushPull() do { ODCONCbits.ODC7 = 0; } while(0) +#define SW1_SetOpenDrain() do { ODCONCbits.ODC7 = 1; } while(0) +#define SW1_SetAnalogMode() do { ANSELCbits.ANSC7 = 1; } while(0) +#define SW1_SetDigitalMode() do { ANSELCbits.ANSC7 = 0; } while(0) + +/** + @Param + none + @Returns + none + @Description + GPIO and peripheral I/O initialization + @Example + PIN_MANAGER_Initialize(); + */ +void PIN_MANAGER_Initialize (void); + +/** + * @Param + none + * @Returns + none + * @Description + Interrupt on Change Handling routine + * @Example + PIN_MANAGER_IOC(); + */ +void PIN_MANAGER_IOC(void); + + +/** + * @Param + none + * @Returns + none + * @Description + Interrupt on Change Handler for the IOCBF0 pin functionality + * @Example + IOCBF0_ISR(); + */ +void IOCBF0_ISR(void); + +/** + @Summary + Interrupt Handler Setter for IOCBF0 pin interrupt-on-change functionality + + @Description + Allows selecting an interrupt handler for IOCBF0 at application runtime + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + InterruptHandler function pointer. + + @Example + PIN_MANAGER_Initialize(); + IOCBF0_SetInterruptHandler(MyInterruptHandler); + +*/ +void IOCBF0_SetInterruptHandler(void (* InterruptHandler)(void)); + +/** + @Summary + Dynamic Interrupt Handler for IOCBF0 pin + + @Description + This is a dynamic interrupt handler to be used together with the IOCBF0_SetInterruptHandler() method. + This handler is called every time the IOCBF0 ISR is executed and allows any function to be registered at runtime. + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + None. + + @Example + PIN_MANAGER_Initialize(); + IOCBF0_SetInterruptHandler(IOCBF0_InterruptHandler); + +*/ +extern void (*IOCBF0_InterruptHandler)(void); + +/** + @Summary + Default Interrupt Handler for IOCBF0 pin + + @Description + This is a predefined interrupt handler to be used together with the IOCBF0_SetInterruptHandler() method. + This handler is called every time the IOCBF0 ISR is executed. + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + None. + + @Example + PIN_MANAGER_Initialize(); + IOCBF0_SetInterruptHandler(IOCBF0_DefaultInterruptHandler); + +*/ +void IOCBF0_DefaultInterruptHandler(void); + + +/** + * @Param + none + * @Returns + none + * @Description + Interrupt on Change Handler for the IOCCF7 pin functionality + * @Example + IOCCF7_ISR(); + */ +void IOCCF7_ISR(void); + +/** + @Summary + Interrupt Handler Setter for IOCCF7 pin interrupt-on-change functionality + + @Description + Allows selecting an interrupt handler for IOCCF7 at application runtime + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + InterruptHandler function pointer. + + @Example + PIN_MANAGER_Initialize(); + IOCCF7_SetInterruptHandler(MyInterruptHandler); + +*/ +void IOCCF7_SetInterruptHandler(void (* InterruptHandler)(void)); + +/** + @Summary + Dynamic Interrupt Handler for IOCCF7 pin + + @Description + This is a dynamic interrupt handler to be used together with the IOCCF7_SetInterruptHandler() method. + This handler is called every time the IOCCF7 ISR is executed and allows any function to be registered at runtime. + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + None. + + @Example + PIN_MANAGER_Initialize(); + IOCCF7_SetInterruptHandler(IOCCF7_InterruptHandler); + +*/ +extern void (*IOCCF7_InterruptHandler)(void); + +/** + @Summary + Default Interrupt Handler for IOCCF7 pin + + @Description + This is a predefined interrupt handler to be used together with the IOCCF7_SetInterruptHandler() method. + This handler is called every time the IOCCF7 ISR is executed. + + @Preconditions + Pin Manager intializer called + + @Returns + None. + + @Param + None. + + @Example + PIN_MANAGER_Initialize(); + IOCCF7_SetInterruptHandler(IOCCF7_DefaultInterruptHandler); + +*/ +void IOCCF7_DefaultInterruptHandler(void); + + + +#endif // PIN_MANAGER_H +/** + End of File +*/ \ No newline at end of file diff --git a/firmware/B1-firmware.X/nbproject/Makefile-default.mk b/firmware/B1-firmware.X/nbproject/Makefile-default.mk new file mode 100755 index 0000000..bd2a943 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Makefile-default.mk @@ -0,0 +1,418 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a -pre and a -post target defined where you can add customized code. +# +# This makefile implements configuration specific macros and targets. + + +# Include project Makefile +ifeq "${IGNORE_LOCAL}" "TRUE" +# do not include local makefile. User is passing all local related variables already +else +include Makefile +# Include makefile containing local settings +ifeq "$(wildcard nbproject/Makefile-local-default.mk)" "nbproject/Makefile-local-default.mk" +include nbproject/Makefile-local-default.mk +endif +endif + +# Environment +MKDIR=mkdir -p +RM=rm -f +MV=mv +CP=cp + +# Macros +CND_CONF=default +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +IMAGE_TYPE=debug +OUTPUT_SUFFIX=elf +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +else +IMAGE_TYPE=production +OUTPUT_SUFFIX=hex +DEBUGGABLE_SUFFIX=elf +FINAL_IMAGE=dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +endif + +ifeq ($(COMPARE_BUILD), true) +COMPARISON_BUILD=-mafrlcsj +else +COMPARISON_BUILD= +endif + +ifdef SUB_IMAGE_ADDRESS + +else +SUB_IMAGE_ADDRESS_COMMAND= +endif + +# Object Directory +OBJECTDIR=build/${CND_CONF}/${IMAGE_TYPE} + +# Distribution Directory +DISTDIR=dist/${CND_CONF}/${IMAGE_TYPE} + +# Source Files Quoted if spaced +SOURCEFILES_QUOTED_IF_SPACED=mcc_generated_files/device_config.c mcc_generated_files/mcc.c mcc_generated_files/pin_manager.c mcc_generated_files/adc.c mcc_generated_files/dac5.c mcc_generated_files/dac1.c mcc_generated_files/opa2.c mcc_generated_files/opa1.c mcc_generated_files/dac7.c mcc_generated_files/dac4.c mcc_generated_files/cmp2.c mcc_generated_files/dac3.c mcc_generated_files/cmp1.c mcc_generated_files/interrupt_manager.c mcc_generated_files/fvr.c mcc_generated_files/cmp5.c main.c + +# Object Files Quoted if spaced +OBJECTFILES_QUOTED_IF_SPACED=${OBJECTDIR}/mcc_generated_files/device_config.p1 ${OBJECTDIR}/mcc_generated_files/mcc.p1 ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 ${OBJECTDIR}/mcc_generated_files/adc.p1 ${OBJECTDIR}/mcc_generated_files/dac5.p1 ${OBJECTDIR}/mcc_generated_files/dac1.p1 ${OBJECTDIR}/mcc_generated_files/opa2.p1 ${OBJECTDIR}/mcc_generated_files/opa1.p1 ${OBJECTDIR}/mcc_generated_files/dac7.p1 ${OBJECTDIR}/mcc_generated_files/dac4.p1 ${OBJECTDIR}/mcc_generated_files/cmp2.p1 ${OBJECTDIR}/mcc_generated_files/dac3.p1 ${OBJECTDIR}/mcc_generated_files/cmp1.p1 ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 ${OBJECTDIR}/mcc_generated_files/fvr.p1 ${OBJECTDIR}/mcc_generated_files/cmp5.p1 ${OBJECTDIR}/main.p1 +POSSIBLE_DEPFILES=${OBJECTDIR}/mcc_generated_files/device_config.p1.d ${OBJECTDIR}/mcc_generated_files/mcc.p1.d ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d ${OBJECTDIR}/mcc_generated_files/adc.p1.d ${OBJECTDIR}/mcc_generated_files/dac5.p1.d ${OBJECTDIR}/mcc_generated_files/dac1.p1.d ${OBJECTDIR}/mcc_generated_files/opa2.p1.d ${OBJECTDIR}/mcc_generated_files/opa1.p1.d ${OBJECTDIR}/mcc_generated_files/dac7.p1.d ${OBJECTDIR}/mcc_generated_files/dac4.p1.d ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d ${OBJECTDIR}/mcc_generated_files/dac3.p1.d ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d ${OBJECTDIR}/mcc_generated_files/fvr.p1.d ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d ${OBJECTDIR}/main.p1.d + +# Object Files +OBJECTFILES=${OBJECTDIR}/mcc_generated_files/device_config.p1 ${OBJECTDIR}/mcc_generated_files/mcc.p1 ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 ${OBJECTDIR}/mcc_generated_files/adc.p1 ${OBJECTDIR}/mcc_generated_files/dac5.p1 ${OBJECTDIR}/mcc_generated_files/dac1.p1 ${OBJECTDIR}/mcc_generated_files/opa2.p1 ${OBJECTDIR}/mcc_generated_files/opa1.p1 ${OBJECTDIR}/mcc_generated_files/dac7.p1 ${OBJECTDIR}/mcc_generated_files/dac4.p1 ${OBJECTDIR}/mcc_generated_files/cmp2.p1 ${OBJECTDIR}/mcc_generated_files/dac3.p1 ${OBJECTDIR}/mcc_generated_files/cmp1.p1 ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 ${OBJECTDIR}/mcc_generated_files/fvr.p1 ${OBJECTDIR}/mcc_generated_files/cmp5.p1 ${OBJECTDIR}/main.p1 + +# Source Files +SOURCEFILES=mcc_generated_files/device_config.c mcc_generated_files/mcc.c mcc_generated_files/pin_manager.c mcc_generated_files/adc.c mcc_generated_files/dac5.c mcc_generated_files/dac1.c mcc_generated_files/opa2.c mcc_generated_files/opa1.c mcc_generated_files/dac7.c mcc_generated_files/dac4.c mcc_generated_files/cmp2.c mcc_generated_files/dac3.c mcc_generated_files/cmp1.c mcc_generated_files/interrupt_manager.c mcc_generated_files/fvr.c mcc_generated_files/cmp5.c main.c + + + +CFLAGS= +ASFLAGS= +LDLIBSOPTIONS= + +############# Tool locations ########################################## +# If you copy a project from one host to another, the path where the # +# compiler is installed may be different. # +# If you open this project with MPLAB X in the new host, this # +# makefile will be regenerated and the paths will be corrected. # +####################################################################### +# fixDeps replaces a bunch of sed/cat/printf statements that slow down the build +FIXDEPS=fixDeps + +.build-conf: ${BUILD_SUBPROJECTS} +ifneq ($(INFORMATION_MESSAGE), ) + @echo $(INFORMATION_MESSAGE) +endif + ${MAKE} -f nbproject/Makefile-default.mk dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} + +MP_PROCESSOR_OPTION=16F1776 +# ------------------------------------------------------------------------------------ +# Rules for buildStep: compile +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +${OBJECTDIR}/mcc_generated_files/device_config.p1: mcc_generated_files/device_config.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/device_config.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/device_config.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/device_config.p1 mcc_generated_files/device_config.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/device_config.d ${OBJECTDIR}/mcc_generated_files/device_config.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/device_config.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/mcc.p1: mcc_generated_files/mcc.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/mcc.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/mcc.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/mcc.p1 mcc_generated_files/mcc.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/mcc.d ${OBJECTDIR}/mcc_generated_files/mcc.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/mcc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/pin_manager.p1: mcc_generated_files/pin_manager.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 mcc_generated_files/pin_manager.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/pin_manager.d ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/adc.p1: mcc_generated_files/adc.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/adc.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/adc.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/adc.p1 mcc_generated_files/adc.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/adc.d ${OBJECTDIR}/mcc_generated_files/adc.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/adc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac5.p1: mcc_generated_files/dac5.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac5.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac5.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac5.p1 mcc_generated_files/dac5.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac5.d ${OBJECTDIR}/mcc_generated_files/dac5.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac5.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac1.p1: mcc_generated_files/dac1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac1.p1 mcc_generated_files/dac1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac1.d ${OBJECTDIR}/mcc_generated_files/dac1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/opa2.p1: mcc_generated_files/opa2.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/opa2.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/opa2.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/opa2.p1 mcc_generated_files/opa2.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/opa2.d ${OBJECTDIR}/mcc_generated_files/opa2.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/opa2.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/opa1.p1: mcc_generated_files/opa1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/opa1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/opa1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/opa1.p1 mcc_generated_files/opa1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/opa1.d ${OBJECTDIR}/mcc_generated_files/opa1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/opa1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac7.p1: mcc_generated_files/dac7.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac7.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac7.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac7.p1 mcc_generated_files/dac7.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac7.d ${OBJECTDIR}/mcc_generated_files/dac7.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac7.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac4.p1: mcc_generated_files/dac4.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac4.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac4.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac4.p1 mcc_generated_files/dac4.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac4.d ${OBJECTDIR}/mcc_generated_files/dac4.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac4.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp2.p1: mcc_generated_files/cmp2.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp2.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp2.p1 mcc_generated_files/cmp2.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp2.d ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac3.p1: mcc_generated_files/dac3.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac3.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac3.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac3.p1 mcc_generated_files/dac3.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac3.d ${OBJECTDIR}/mcc_generated_files/dac3.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac3.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp1.p1: mcc_generated_files/cmp1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp1.p1 mcc_generated_files/cmp1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp1.d ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1: mcc_generated_files/interrupt_manager.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 mcc_generated_files/interrupt_manager.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.d ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/fvr.p1: mcc_generated_files/fvr.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/fvr.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/fvr.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/fvr.p1 mcc_generated_files/fvr.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/fvr.d ${OBJECTDIR}/mcc_generated_files/fvr.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/fvr.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp5.p1: mcc_generated_files/cmp5.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp5.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp5.p1 mcc_generated_files/cmp5.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp5.d ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/main.p1: main.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/main.p1.d + @${RM} ${OBJECTDIR}/main.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -D__DEBUG=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/main.p1 main.c + @-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d + @${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +else +${OBJECTDIR}/mcc_generated_files/device_config.p1: mcc_generated_files/device_config.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/device_config.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/device_config.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/device_config.p1 mcc_generated_files/device_config.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/device_config.d ${OBJECTDIR}/mcc_generated_files/device_config.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/device_config.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/mcc.p1: mcc_generated_files/mcc.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/mcc.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/mcc.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/mcc.p1 mcc_generated_files/mcc.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/mcc.d ${OBJECTDIR}/mcc_generated_files/mcc.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/mcc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/pin_manager.p1: mcc_generated_files/pin_manager.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/pin_manager.p1 mcc_generated_files/pin_manager.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/pin_manager.d ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/pin_manager.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/adc.p1: mcc_generated_files/adc.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/adc.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/adc.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/adc.p1 mcc_generated_files/adc.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/adc.d ${OBJECTDIR}/mcc_generated_files/adc.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/adc.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac5.p1: mcc_generated_files/dac5.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac5.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac5.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac5.p1 mcc_generated_files/dac5.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac5.d ${OBJECTDIR}/mcc_generated_files/dac5.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac5.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac1.p1: mcc_generated_files/dac1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac1.p1 mcc_generated_files/dac1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac1.d ${OBJECTDIR}/mcc_generated_files/dac1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/opa2.p1: mcc_generated_files/opa2.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/opa2.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/opa2.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/opa2.p1 mcc_generated_files/opa2.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/opa2.d ${OBJECTDIR}/mcc_generated_files/opa2.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/opa2.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/opa1.p1: mcc_generated_files/opa1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/opa1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/opa1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/opa1.p1 mcc_generated_files/opa1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/opa1.d ${OBJECTDIR}/mcc_generated_files/opa1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/opa1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac7.p1: mcc_generated_files/dac7.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac7.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac7.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac7.p1 mcc_generated_files/dac7.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac7.d ${OBJECTDIR}/mcc_generated_files/dac7.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac7.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac4.p1: mcc_generated_files/dac4.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac4.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac4.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac4.p1 mcc_generated_files/dac4.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac4.d ${OBJECTDIR}/mcc_generated_files/dac4.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac4.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp2.p1: mcc_generated_files/cmp2.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp2.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp2.p1 mcc_generated_files/cmp2.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp2.d ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp2.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/dac3.p1: mcc_generated_files/dac3.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/dac3.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/dac3.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/dac3.p1 mcc_generated_files/dac3.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/dac3.d ${OBJECTDIR}/mcc_generated_files/dac3.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/dac3.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp1.p1: mcc_generated_files/cmp1.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp1.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp1.p1 mcc_generated_files/cmp1.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp1.d ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp1.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1: mcc_generated_files/interrupt_manager.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1 mcc_generated_files/interrupt_manager.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.d ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/interrupt_manager.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/fvr.p1: mcc_generated_files/fvr.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/fvr.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/fvr.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/fvr.p1 mcc_generated_files/fvr.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/fvr.d ${OBJECTDIR}/mcc_generated_files/fvr.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/fvr.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/mcc_generated_files/cmp5.p1: mcc_generated_files/cmp5.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}/mcc_generated_files" + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d + @${RM} ${OBJECTDIR}/mcc_generated_files/cmp5.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/mcc_generated_files/cmp5.p1 mcc_generated_files/cmp5.c + @-${MV} ${OBJECTDIR}/mcc_generated_files/cmp5.d ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d + @${FIXDEPS} ${OBJECTDIR}/mcc_generated_files/cmp5.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +${OBJECTDIR}/main.p1: main.c nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} "${OBJECTDIR}" + @${RM} ${OBJECTDIR}/main.p1.d + @${RM} ${OBJECTDIR}/main.p1 + ${MP_CC} $(MP_EXTRA_CC_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -c -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -DXPRJ_default=$(CND_CONF) -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall $(COMPARISON_BUILD) -std=c99 -gdwarf-3 -mstack=compiled:auto:auto -o ${OBJECTDIR}/main.p1 main.c + @-${MV} ${OBJECTDIR}/main.d ${OBJECTDIR}/main.p1.d + @${FIXDEPS} ${OBJECTDIR}/main.p1.d $(SILENT) -rsi ${MP_CC_DIR}../ + +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assemble +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: assembleWithPreprocess +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +else +endif + +# ------------------------------------------------------------------------------------ +# Rules for buildStep: link +ifeq ($(TYPE_IMAGE), DEBUG_RUN) +dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.map -D__DEBUG=1 -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall -std=c99 -gdwarf-3 -mstack=compiled:auto:auto $(COMPARISON_BUILD) -Wl,--memorysummary,dist/${CND_CONF}/${IMAGE_TYPE}/memoryfile.xml -o dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} + @${RM} dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.hex + +else +dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX}: ${OBJECTFILES} nbproject/Makefile-${CND_CONF}.mk + @${MKDIR} dist/${CND_CONF}/${IMAGE_TYPE} + ${MP_CC} $(MP_EXTRA_LD_PRE) -mcpu=$(MP_PROCESSOR_OPTION) -Wl,-Map=dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.map -DXPRJ_default=$(CND_CONF) -Wl,--defsym=__MPLAB_BUILD=1 -mdfp="${DFP_DIR}/xc8" -fno-short-double -fno-short-float -O0 -fasmfile -maddrqual=ignore -xassembler-with-cpp -mwarn=-3 -Wa,-a -msummary=-psect,-class,+mem,-hex,-file -ginhx032 -Wl,--data-init -mno-keep-startup -mno-osccal -mno-resetbits -mno-save-resetbits -mno-download -mno-stackcall -std=c99 -gdwarf-3 -mstack=compiled:auto:auto $(COMPARISON_BUILD) -Wl,--memorysummary,dist/${CND_CONF}/${IMAGE_TYPE}/memoryfile.xml -o dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${DEBUGGABLE_SUFFIX} ${OBJECTFILES_QUOTED_IF_SPACED} + +endif + + +# Subprojects +.build-subprojects: + + +# Subprojects +.clean-subprojects: + +# Clean Targets +.clean-conf: ${CLEAN_SUBPROJECTS} + ${RM} -r build/default + ${RM} -r dist/default + +# Enable dependency checking +.dep.inc: .depcheck-impl + +DEPFILES=$(shell "${PATH_TO_IDE_BIN}"mplabwildcard ${POSSIBLE_DEPFILES}) +ifneq (${DEPFILES},) +include ${DEPFILES} +endif diff --git a/firmware/B1-firmware.X/nbproject/Makefile-genesis.properties b/firmware/B1-firmware.X/nbproject/Makefile-genesis.properties new file mode 100755 index 0000000..3cfb103 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Makefile-genesis.properties @@ -0,0 +1,12 @@ +# +#Fri Dec 04 18:42:49 PST 2020 +default.languagetoolchain.version=2.31 +default.Pack.dfplocation=/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63 +conf.ids=default +default.languagetoolchain.dir=/opt/microchip/xc8/v2.31/bin +host.id=2p1a-byni-8f +configurations-xml=1ffa9967bc20918976800abc3126d2f1 +com-microchip-mplab-nbide-embedded-makeproject-MakeProject.md5=4e1c703e057ce3824a620f2a747a6f88 +default.com-microchip-mplab-nbide-toolchainXC8-XC8LanguageToolchain.md5=d9404904a11cd8baf0bd6c1f62dd8c23 +proj.dir=/home/wbraun/Projects/little-bee-B1/firmware/B1-firmware.X +host.platform=linux diff --git a/firmware/B1-firmware.X/nbproject/Makefile-impl.mk b/firmware/B1-firmware.X/nbproject/Makefile-impl.mk new file mode 100755 index 0000000..90480a9 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Makefile-impl.mk @@ -0,0 +1,69 @@ +# +# Generated Makefile - do not edit! +# +# Edit the Makefile in the project folder instead (../Makefile). Each target +# has a pre- and a post- target defined where you can add customization code. +# +# This makefile implements macros and targets common to all configurations. +# +# NOCDDL + + +# Building and Cleaning subprojects are done by default, but can be controlled with the SUB +# macro. If SUB=no, subprojects will not be built or cleaned. The following macro +# statements set BUILD_SUB-CONF and CLEAN_SUB-CONF to .build-reqprojects-conf +# and .clean-reqprojects-conf unless SUB has the value 'no' +SUB_no=NO +SUBPROJECTS=${SUB_${SUB}} +BUILD_SUBPROJECTS_=.build-subprojects +BUILD_SUBPROJECTS_NO= +BUILD_SUBPROJECTS=${BUILD_SUBPROJECTS_${SUBPROJECTS}} +CLEAN_SUBPROJECTS_=.clean-subprojects +CLEAN_SUBPROJECTS_NO= +CLEAN_SUBPROJECTS=${CLEAN_SUBPROJECTS_${SUBPROJECTS}} + + +# Project Name +PROJECTNAME=B1-firmware.X + +# Active Configuration +DEFAULTCONF=default +CONF=${DEFAULTCONF} + +# All Configurations +ALLCONFS=default + + +# build +.build-impl: .build-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .build-conf + + +# clean +.clean-impl: .clean-pre + ${MAKE} -f nbproject/Makefile-${CONF}.mk SUBPROJECTS=${SUBPROJECTS} .clean-conf + +# clobber +.clobber-impl: .clobber-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default clean + + + +# all +.all-impl: .all-pre .depcheck-impl + ${MAKE} SUBPROJECTS=${SUBPROJECTS} CONF=default build + + + +# dependency checking support +.depcheck-impl: +# @echo "# This code depends on make tool being used" >.dep.inc +# @if [ -n "${MAKE_VERSION}" ]; then \ +# echo "DEPFILES=\$$(wildcard \$$(addsuffix .d, \$${OBJECTFILES}))" >>.dep.inc; \ +# echo "ifneq (\$${DEPFILES},)" >>.dep.inc; \ +# echo "include \$${DEPFILES}" >>.dep.inc; \ +# echo "endif" >>.dep.inc; \ +# else \ +# echo ".KEEP_STATE:" >>.dep.inc; \ +# echo ".KEEP_STATE_FILE:.make.state.\$${CONF}" >>.dep.inc; \ +# fi diff --git a/firmware/B1-firmware.X/nbproject/Makefile-local-default.mk b/firmware/B1-firmware.X/nbproject/Makefile-local-default.mk new file mode 100755 index 0000000..3b61b89 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Makefile-local-default.mk @@ -0,0 +1,37 @@ +# +# Generated Makefile - do not edit! +# +# +# This file contains information about the location of compilers and other tools. +# If you commmit this file into your revision control server, you will be able to +# to checkout the project and build it from the command line with make. However, +# if more than one person works on the same project, then this file might show +# conflicts since different users are bound to have compilers in different places. +# In that case you might choose to not commit this file and let MPLAB X recreate this file +# for each user. The disadvantage of not commiting this file is that you must run MPLAB X at +# least once so the file gets created and the project can be built. Finally, you can also +# avoid using this file at all if you are only building from the command line with make. +# You can invoke make with the values of the macros: +# $ makeMP_CC="/opt/microchip/mplabc30/v3.30c/bin/pic30-gcc" ... +# +PATH_TO_IDE_BIN=/opt/microchip/mplabx/v5.45/mplab_platform/platform/../mplab_ide/modules/../../bin/ +# Adding MPLAB X bin directory to path. +PATH:=/opt/microchip/mplabx/v5.45/mplab_platform/platform/../mplab_ide/modules/../../bin/:$(PATH) +# Path to java used to run MPLAB X when this makefile was created +MP_JAVA_PATH="/opt/microchip/mplabx/v5.45/sys/java/zulu8.40.0.25-ca-fx-jre8.0.222-linux_x64/bin/" +OS_CURRENT="$(shell uname -s)" +MP_CC="/opt/microchip/xc8/v2.31/bin/xc8-cc" +# MP_CPPC is not defined +# MP_BC is not defined +MP_AS="/opt/microchip/xc8/v2.31/bin/xc8-cc" +MP_LD="/opt/microchip/xc8/v2.31/bin/xc8-cc" +MP_AR="/opt/microchip/xc8/v2.31/bin/xc8-ar" +DEP_GEN=${MP_JAVA_PATH}java -jar "/opt/microchip/mplabx/v5.45/mplab_platform/platform/../mplab_ide/modules/../../bin/extractobjectdependencies.jar" +MP_CC_DIR="/opt/microchip/xc8/v2.31/bin" +# MP_CPPC_DIR is not defined +# MP_BC_DIR is not defined +MP_AS_DIR="/opt/microchip/xc8/v2.31/bin" +MP_LD_DIR="/opt/microchip/xc8/v2.31/bin" +MP_AR_DIR="/opt/microchip/xc8/v2.31/bin" +# MP_BC_DIR is not defined +DFP_DIR=/opt/microchip/mplabx/v5.45/packs/Microchip/PIC12-16F1xxx_DFP/1.2.63 diff --git a/firmware/B1-firmware.X/nbproject/Makefile-variables.mk b/firmware/B1-firmware.X/nbproject/Makefile-variables.mk new file mode 100755 index 0000000..9dbfbf9 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Makefile-variables.mk @@ -0,0 +1,13 @@ +# +# Generated - do not edit! +# +# NOCDDL +# +CND_BASEDIR=`pwd` +# default configuration +CND_ARTIFACT_DIR_default=dist/default/production +CND_ARTIFACT_NAME_default=B1-firmware.X.production.hex +CND_ARTIFACT_PATH_default=dist/default/production/B1-firmware.X.production.hex +CND_PACKAGE_DIR_default=${CND_DISTDIR}/default/package +CND_PACKAGE_NAME_default=b1-firmware.x.tar +CND_PACKAGE_PATH_default=${CND_DISTDIR}/default/package/b1-firmware.x.tar diff --git a/firmware/B1-firmware.X/nbproject/Package-default.bash b/firmware/B1-firmware.X/nbproject/Package-default.bash new file mode 100755 index 0000000..3aa1a05 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/Package-default.bash @@ -0,0 +1,73 @@ +#!/bin/bash -x + +# +# Generated - do not edit! +# + +# Macros +TOP=`pwd` +CND_CONF=default +CND_DISTDIR=dist +TMPDIR=build/${CND_CONF}/${IMAGE_TYPE}/tmp-packaging +TMPDIRNAME=tmp-packaging +OUTPUT_PATH=dist/${CND_CONF}/${IMAGE_TYPE}/B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +OUTPUT_BASENAME=B1-firmware.X.${IMAGE_TYPE}.${OUTPUT_SUFFIX} +PACKAGE_TOP_DIR=b1-firmware.x/ + +# Functions +function checkReturnCode +{ + rc=$? + if [ $rc != 0 ] + then + exit $rc + fi +} +function makeDirectory +# $1 directory path +# $2 permission (optional) +{ + mkdir -p "$1" + checkReturnCode + if [ "$2" != "" ] + then + chmod $2 "$1" + checkReturnCode + fi +} +function copyFileToTmpDir +# $1 from-file path +# $2 to-file path +# $3 permission +{ + cp "$1" "$2" + checkReturnCode + if [ "$3" != "" ] + then + chmod $3 "$2" + checkReturnCode + fi +} + +# Setup +cd "${TOP}" +mkdir -p ${CND_DISTDIR}/${CND_CONF}/package +rm -rf ${TMPDIR} +mkdir -p ${TMPDIR} + +# Copy files and create directories and links +cd "${TOP}" +makeDirectory ${TMPDIR}/b1-firmware.x/bin +copyFileToTmpDir "${OUTPUT_PATH}" "${TMPDIR}/${PACKAGE_TOP_DIR}bin/${OUTPUT_BASENAME}" 0755 + + +# Generate tar file +cd "${TOP}" +rm -f ${CND_DISTDIR}/${CND_CONF}/package/b1-firmware.x.tar +cd ${TMPDIR} +tar -vcf ../../../../${CND_DISTDIR}/${CND_CONF}/package/b1-firmware.x.tar * +checkReturnCode + +# Cleanup +cd "${TOP}" +rm -rf ${TMPDIR} diff --git a/firmware/B1-firmware.X/nbproject/configurations.xml b/firmware/B1-firmware.X/nbproject/configurations.xml new file mode 100755 index 0000000..f91c9c6 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/configurations.xml @@ -0,0 +1,211 @@ + + + + + + mcc_generated_files/device_config.h + mcc_generated_files/pin_manager.h + mcc_generated_files/mcc.h + mcc_generated_files/dac5.h + mcc_generated_files/adc.h + mcc_generated_files/dac1.h + mcc_generated_files/opa2.h + mcc_generated_files/opa1.h + mcc_generated_files/dac7.h + mcc_generated_files/interrupt_manager.h + mcc_generated_files/cmp1.h + mcc_generated_files/cmp2.h + mcc_generated_files/dac4.h + mcc_generated_files/dac3.h + mcc_generated_files/fvr.h + mcc_generated_files/cmp5.h + + + + + + + mcc_generated_files/device_config.c + mcc_generated_files/mcc.c + mcc_generated_files/pin_manager.c + mcc_generated_files/adc.c + mcc_generated_files/dac5.c + mcc_generated_files/dac1.c + mcc_generated_files/opa2.c + mcc_generated_files/opa1.c + mcc_generated_files/dac7.c + mcc_generated_files/dac4.c + mcc_generated_files/cmp2.c + mcc_generated_files/dac3.c + mcc_generated_files/cmp1.c + mcc_generated_files/interrupt_manager.c + mcc_generated_files/fvr.c + mcc_generated_files/cmp5.c + + main.c + + + Makefile + MyConfig.mc3 + + + Makefile + + + + localhost + PIC16F1776 + + + pk4hybrid + XC8 + 2.31 + 2 + + + + + + + + + + + + + + + false + false + + + + + + + false + false + + false + + false + false + false + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmware/B1-firmware.X/nbproject/private/SuppressibleMessageMemo.properties b/firmware/B1-firmware.X/nbproject/private/SuppressibleMessageMemo.properties new file mode 100755 index 0000000..73c38d7 --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/private/SuppressibleMessageMemo.properties @@ -0,0 +1,3 @@ +# +#Wed Jul 29 19:32:54 PDT 2020 +PICkit\ 4/CHECK_4_HIGH_VOLTAGE_VPP=true diff --git a/firmware/B1-firmware.X/nbproject/private/configurations.xml b/firmware/B1-firmware.X/nbproject/private/configurations.xml new file mode 100755 index 0000000..069bdeb --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/private/configurations.xml @@ -0,0 +1,25 @@ + + + Makefile + 0 + + + :=MPLABComm-USB-Microchip:=<vid>04D8:=<pid>9012:=<rev>0100:=<man>Microchip Technology Incorporated:=<prod>MPLAB PICkit 4:=<sn>BUR181875593:=<drv>x:=<xpt>b:=end + /opt/microchip/xc8/v2.31/bin + + place holder 1 + place holder 2 + + + + + true + 0 + 0 + 0 + + + + + + diff --git a/firmware/B1-firmware.X/nbproject/private/private.xml b/firmware/B1-firmware.X/nbproject/private/private.xml new file mode 100755 index 0000000..acc88cc --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/private/private.xml @@ -0,0 +1,10 @@ + + + + + + file:/home/wbraun/Projects/little-bee-B1/firmware/B1-firmware.X/mcc_generated_files/adc.c + file:/home/wbraun/Projects/little-bee-B1/firmware/B1-firmware.X/main.c + + + diff --git a/firmware/B1-firmware.X/nbproject/project.xml b/firmware/B1-firmware.X/nbproject/project.xml new file mode 100755 index 0000000..e93d4fa --- /dev/null +++ b/firmware/B1-firmware.X/nbproject/project.xml @@ -0,0 +1,28 @@ + + + com.microchip.mplab.nbide.embedded.makeproject + + + B1-firmware + beeware + 7bb5d8e4-88d1-4c0a-9bac-fa16efd637f8 + 0 + c + + h + + ISO-8859-1 + + + + + default + 2 + + + + false + + + + diff --git a/mcad/casing-bottom.step b/mcad/casing-bottom.step new file mode 100644 index 0000000..cb82ab0 --- /dev/null +++ b/mcad/casing-bottom.step @@ -0,0 +1,1221 @@ +ISO-10303-21; +HEADER; +FILE_DESCRIPTION(('KiCad electronic assembly'),'2;1'); +FILE_NAME('casing-bottom.step','2020-12-10T20:19:22',('An Author'),( + 'A Company'),'Open CASCADE STEP processor 6.9', + 'KiCad to STEP converter','Unknown'); +FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }')); +ENDSEC; +DATA; +#1 = APPLICATION_PROTOCOL_DEFINITION('international standard', + 'automotive_design',2000,#2); +#2 = APPLICATION_CONTEXT( + 'core data for automotive mechanical design processes'); +#3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10); +#4 = PRODUCT_DEFINITION_SHAPE('','',#5); +#5 = PRODUCT_DEFINITION('design','',#6,#9); +#6 = PRODUCT_DEFINITION_FORMATION('','',#7); +#7 = PRODUCT('Open CASCADE STEP translator 6.9 1', + 'Open CASCADE STEP translator 6.9 1','',(#8)); +#8 = PRODUCT_CONTEXT('',#2,'mechanical'); +#9 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design'); +#10 = SHAPE_REPRESENTATION('',(#11,#15),#19); +#11 = AXIS2_PLACEMENT_3D('',#12,#13,#14); +#12 = CARTESIAN_POINT('',(0.,0.,0.)); +#13 = DIRECTION('',(0.,0.,1.)); +#14 = DIRECTION('',(1.,0.,-0.)); +#15 = AXIS2_PLACEMENT_3D('',#16,#17,#18); +#16 = CARTESIAN_POINT('',(0.,0.,0.)); +#17 = DIRECTION('',(0.,0.,1.)); +#18 = DIRECTION('',(1.,0.,-0.)); +#19 = ( GEOMETRIC_REPRESENTATION_CONTEXT(3) +GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#23)) GLOBAL_UNIT_ASSIGNED_CONTEXT( +(#20,#21,#22)) REPRESENTATION_CONTEXT('Context #1', + '3D Context with UNIT and UNCERTAINTY') ); +#20 = ( LENGTH_UNIT() NAMED_UNIT(*) SI_UNIT(.MILLI.,.METRE.) ); +#21 = ( NAMED_UNIT(*) PLANE_ANGLE_UNIT() SI_UNIT($,.RADIAN.) ); +#22 = ( NAMED_UNIT(*) SI_UNIT($,.STERADIAN.) SOLID_ANGLE_UNIT() ); +#23 = UNCERTAINTY_MEASURE_WITH_UNIT(LENGTH_MEASURE(1.E-06),#20, + 'distance_accuracy_value','confusion accuracy'); +#24 = PRODUCT_RELATED_PRODUCT_CATEGORY('part',$,(#7)); +#25 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#26),#1012); +#26 = MANIFOLD_SOLID_BREP('',#27); +#27 = CLOSED_SHELL('',(#28,#148,#226,#304,#564,#789,#816,#843,#870,#897, + #904,#931,#958,#985)); +#28 = ADVANCED_FACE('',(#29),#43,.F.); +#29 = FACE_BOUND('',#30,.F.); +#30 = EDGE_LOOP('',(#31,#66,#94,#122)); +#31 = ORIENTED_EDGE('',*,*,#32,.T.); +#32 = EDGE_CURVE('',#33,#35,#37,.T.); +#33 = VERTEX_POINT('',#34); +#34 = CARTESIAN_POINT('',(216.1,-156.,0.)); +#35 = VERTEX_POINT('',#36); +#36 = CARTESIAN_POINT('',(216.1,-156.,1.6)); +#37 = SURFACE_CURVE('',#38,(#42,#54),.PCURVE_S1.); +#38 = LINE('',#39,#40); +#39 = CARTESIAN_POINT('',(216.1,-156.,0.)); +#40 = VECTOR('',#41,1.); +#41 = DIRECTION('',(0.,0.,1.)); +#42 = PCURVE('',#43,#48); +#43 = PLANE('',#44); +#44 = AXIS2_PLACEMENT_3D('',#45,#46,#47); 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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+#42412 = VECTOR('',#42413,1.); +#42413 = DIRECTION('',(1.,1.413579858428E-16)); +#42414 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42415 = ORIENTED_EDGE('',*,*,#42416,.T.); +#42416 = EDGE_CURVE('',#42384,#42417,#42419,.T.); +#42417 = VERTEX_POINT('',#42418); +#42418 = CARTESIAN_POINT('',(-1.1,-1.2,0.65)); +#42419 = SURFACE_CURVE('',#42420,(#42424,#42431),.PCURVE_S1.); +#42420 = LINE('',#42421,#42422); +#42421 = CARTESIAN_POINT('',(-1.1,-1.2,0.25)); +#42422 = VECTOR('',#42423,1.); +#42423 = DIRECTION('',(0.,0.,1.)); +#42424 = PCURVE('',#39380,#42425); +#42425 = DEFINITIONAL_REPRESENTATION('',(#42426),#42430); +#42426 = LINE('',#42427,#42428); +#42427 = CARTESIAN_POINT('',(-0.173089729504,-4.629571147E-02)); +#42428 = VECTOR('',#42429,1.); +#42429 = DIRECTION('',(1.,0.)); +#42430 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42431 = PCURVE('',#42432,#42437); +#42432 = PLANE('',#42433); +#42433 = AXIS2_PLACEMENT_3D('',#42434,#42435,#42436); +#42434 = CARTESIAN_POINT('',(-1.1,-1.2,0.25)); +#42435 = DIRECTION('',(1.,9.95799250103E-17,0.)); +#42436 = DIRECTION('',(0.,-0.,1.)); +#42437 = DEFINITIONAL_REPRESENTATION('',(#42438),#42442); +#42438 = LINE('',#42439,#42440); +#42439 = CARTESIAN_POINT('',(0.,0.)); +#42440 = VECTOR('',#42441,1.); +#42441 = DIRECTION('',(1.,0.)); +#42442 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42443 = ORIENTED_EDGE('',*,*,#42444,.T.); +#42444 = EDGE_CURVE('',#42417,#42445,#42447,.T.); +#42445 = VERTEX_POINT('',#42446); +#42446 = CARTESIAN_POINT('',(-0.85,-1.2,0.9)); +#42447 = SURFACE_CURVE('',#42448,(#42453,#42460),.PCURVE_S1.); +#42448 = CIRCLE('',#42449,0.25); +#42449 = AXIS2_PLACEMENT_3D('',#42450,#42451,#42452); +#42450 = CARTESIAN_POINT('',(-0.85,-1.2,0.65)); +#42451 = DIRECTION('',(-9.95799250103E-17,1.,0.)); +#42452 = DIRECTION('',(-1.,-9.95799250103E-17,1.33226762955E-15)); +#42453 = PCURVE('',#39380,#42454); +#42454 = DEFINITIONAL_REPRESENTATION('',(#42455),#42459); +#42455 = CIRCLE('',#42456,0.25); +#42456 = AXIS2_PLACEMENT_2D('',#42457,#42458); +#42457 = CARTESIAN_POINT('',(0.226910270496,0.20370428853)); +#42458 = DIRECTION('',(1.33226762955E-15,-1.)); +#42459 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42460 = PCURVE('',#42461,#42466); +#42461 = CYLINDRICAL_SURFACE('',#42462,0.25); +#42462 = AXIS2_PLACEMENT_3D('',#42463,#42464,#42465); +#42463 = CARTESIAN_POINT('',(-0.85,-1.2,0.65)); +#42464 = DIRECTION('',(9.95799250103E-17,-1.,-0.)); +#42465 = DIRECTION('',(-1.,-9.95799250103E-17,1.33226762955E-15)); +#42466 = DEFINITIONAL_REPRESENTATION('',(#42467),#42471); +#42467 = LINE('',#42468,#42469); +#42468 = CARTESIAN_POINT('',(6.28318530718,0.)); +#42469 = VECTOR('',#42470,1.); +#42470 = DIRECTION('',(-1.,0.)); +#42471 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42472 = ORIENTED_EDGE('',*,*,#42473,.T.); +#42473 = EDGE_CURVE('',#42445,#39365,#42474,.T.); +#42474 = SURFACE_CURVE('',#42475,(#42479,#42486),.PCURVE_S1.); +#42475 = LINE('',#42476,#42477); +#42476 = CARTESIAN_POINT('',(-0.85,-1.2,0.9)); +#42477 = VECTOR('',#42478,1.); +#42478 = DIRECTION('',(1.,9.95799250103E-17,0.)); +#42479 = PCURVE('',#39380,#42480); +#42480 = DEFINITIONAL_REPRESENTATION('',(#42481),#42485); +#42481 = LINE('',#42482,#42483); +#42482 = CARTESIAN_POINT('',(0.476910270496,0.20370428853)); +#42483 = VECTOR('',#42484,1.); +#42484 = DIRECTION('',(0.,1.)); +#42485 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42486 = PCURVE('',#42172,#42487); +#42487 = DEFINITIONAL_REPRESENTATION('',(#42488),#42492); +#42488 = LINE('',#42489,#42490); +#42489 = CARTESIAN_POINT('',(0.,0.)); +#42490 = VECTOR('',#42491,1.); +#42491 = DIRECTION('',(1.,0.)); +#42492 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42493 = ADVANCED_FACE('',(#42494),#39437,.T.); +#42494 = FACE_BOUND('',#42495,.T.); +#42495 = EDGE_LOOP('',(#42496,#42497,#42498,#42526,#42554,#42583,#42611, + #42639,#42667,#42700,#42728,#42757)); +#42496 = ORIENTED_EDGE('',*,*,#39421,.F.); +#42497 = ORIENTED_EDGE('',*,*,#39590,.T.); +#42498 = ORIENTED_EDGE('',*,*,#42499,.T.); +#42499 = EDGE_CURVE('',#39591,#42500,#42502,.T.); +#42500 = VERTEX_POINT('',#42501); +#42501 = CARTESIAN_POINT('',(-0.95,1.2,0.65)); +#42502 = SURFACE_CURVE('',#42503,(#42508,#42519),.PCURVE_S1.); +#42503 = CIRCLE('',#42504,0.1); +#42504 = AXIS2_PLACEMENT_3D('',#42505,#42506,#42507); +#42505 = CARTESIAN_POINT('',(-0.85,1.2,0.65)); +#42506 = DIRECTION('',(9.95799250103E-17,-1.,0.)); +#42507 = DIRECTION('',(1.110223024625E-15,1.105559255369E-31,1.)); +#42508 = PCURVE('',#39437,#42509); +#42509 = DEFINITIONAL_REPRESENTATION('',(#42510),#42518); +#42510 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#42511,#42512,#42513,#42514 + ,#42515,#42516,#42517),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#42511 = CARTESIAN_POINT('',(0.326910270496,0.20370428853)); +#42512 = CARTESIAN_POINT('',(0.326910270496,3.049920777311E-02)); +#42513 = CARTESIAN_POINT('',(0.176910270496,0.117101748152)); +#42514 = CARTESIAN_POINT('',(2.6910270496E-02,0.20370428853)); +#42515 = CARTESIAN_POINT('',(0.176910270496,0.290306828908)); +#42516 = CARTESIAN_POINT('',(0.326910270496,0.376909369287)); +#42517 = CARTESIAN_POINT('',(0.326910270496,0.20370428853)); +#42518 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42519 = PCURVE('',#39627,#42520); +#42520 = DEFINITIONAL_REPRESENTATION('',(#42521),#42525); +#42521 = LINE('',#42522,#42523); +#42522 = CARTESIAN_POINT('',(0.,-0.5)); +#42523 = VECTOR('',#42524,1.); +#42524 = DIRECTION('',(1.,0.)); +#42525 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42526 = ORIENTED_EDGE('',*,*,#42527,.T.); +#42527 = EDGE_CURVE('',#42500,#42528,#42530,.T.); +#42528 = VERTEX_POINT('',#42529); +#42529 = CARTESIAN_POINT('',(-0.95,1.2,0.25)); +#42530 = SURFACE_CURVE('',#42531,(#42535,#42542),.PCURVE_S1.); +#42531 = LINE('',#42532,#42533); +#42532 = CARTESIAN_POINT('',(-0.95,1.2,0.65)); +#42533 = VECTOR('',#42534,1.); +#42534 = DIRECTION('',(-0.,0.,-1.)); +#42535 = PCURVE('',#39437,#42536); +#42536 = DEFINITIONAL_REPRESENTATION('',(#42537),#42541); +#42537 = LINE('',#42538,#42539); +#42538 = CARTESIAN_POINT('',(0.226910270496,0.10370428853)); +#42539 = VECTOR('',#42540,1.); +#42540 = DIRECTION('',(-1.,0.)); +#42541 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42542 = PCURVE('',#42543,#42548); +#42543 = PLANE('',#42544); +#42544 = AXIS2_PLACEMENT_3D('',#42545,#42546,#42547); +#42545 = CARTESIAN_POINT('',(-0.95,0.7,0.65)); +#42546 = DIRECTION('',(-1.,-9.95799250103E-17,0.)); +#42547 = DIRECTION('',(-0.,0.,-1.)); +#42548 = DEFINITIONAL_REPRESENTATION('',(#42549),#42553); +#42549 = LINE('',#42550,#42551); +#42550 = CARTESIAN_POINT('',(0.,-0.5)); +#42551 = VECTOR('',#42552,1.); +#42552 = DIRECTION('',(1.,0.)); +#42553 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42554 = ORIENTED_EDGE('',*,*,#42555,.T.); +#42555 = EDGE_CURVE('',#42528,#42556,#42558,.T.); +#42556 = VERTEX_POINT('',#42557); +#42557 = CARTESIAN_POINT('',(-1.2,1.2,0.)); +#42558 = SURFACE_CURVE('',#42559,(#42564,#42571),.PCURVE_S1.); +#42559 = CIRCLE('',#42560,0.25); +#42560 = AXIS2_PLACEMENT_3D('',#42561,#42562,#42563); +#42561 = CARTESIAN_POINT('',(-1.2,1.2,0.25)); +#42562 = DIRECTION('',(-9.95799250103E-17,1.,0.)); +#42563 = DIRECTION('',(1.,9.95799250103E-17,-4.440892098501E-16)); +#42564 = PCURVE('',#39437,#42565); +#42565 = DEFINITIONAL_REPRESENTATION('',(#42566),#42570); +#42566 = CIRCLE('',#42567,0.25); +#42567 = AXIS2_PLACEMENT_2D('',#42568,#42569); +#42568 = CARTESIAN_POINT('',(-0.173089729504,-0.14629571147)); +#42569 = DIRECTION('',(-4.440892098501E-16,1.)); +#42570 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42571 = PCURVE('',#42572,#42577); +#42572 = CYLINDRICAL_SURFACE('',#42573,0.25); +#42573 = AXIS2_PLACEMENT_3D('',#42574,#42575,#42576); +#42574 = CARTESIAN_POINT('',(-1.2,0.7,0.25)); +#42575 = DIRECTION('',(9.95799250103E-17,-1.,-0.)); +#42576 = DIRECTION('',(1.,9.95799250103E-17,-4.440892098501E-16)); +#42577 = DEFINITIONAL_REPRESENTATION('',(#42578),#42582); +#42578 = LINE('',#42579,#42580); +#42579 = CARTESIAN_POINT('',(6.28318530718,-0.5)); +#42580 = VECTOR('',#42581,1.); +#42581 = DIRECTION('',(-1.,-1.413579858428E-16)); +#42582 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42583 = ORIENTED_EDGE('',*,*,#42584,.T.); +#42584 = EDGE_CURVE('',#42556,#42585,#42587,.T.); +#42585 = VERTEX_POINT('',#42586); +#42586 = CARTESIAN_POINT('',(-1.4,1.2,0.)); +#42587 = SURFACE_CURVE('',#42588,(#42592,#42599),.PCURVE_S1.); +#42588 = LINE('',#42589,#42590); +#42589 = CARTESIAN_POINT('',(-1.2,1.2,0.)); +#42590 = VECTOR('',#42591,1.); +#42591 = DIRECTION('',(-1.,-9.95799250103E-17,0.)); +#42592 = PCURVE('',#39437,#42593); +#42593 = DEFINITIONAL_REPRESENTATION('',(#42594),#42598); +#42594 = LINE('',#42595,#42596); +#42595 = CARTESIAN_POINT('',(-0.423089729504,-0.14629571147)); +#42596 = VECTOR('',#42597,1.); +#42597 = DIRECTION('',(0.,-1.)); +#42598 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#42599 = PCURVE('',#42600,#42605); +#42600 = PLANE('',#42601); +#42601 = AXIS2_PLACEMENT_3D('',#42602,#42603,#42604); +#42602 = CARTESIAN_POINT('',(-1.2,0.7,0.)); +#42603 = DIRECTION('',(0.,0.,1.)); +#42604 = DIRECTION('',(-1.,-9.95799250103E-17,0.)); +#42605 = DEFINITIONAL_REPRESENTATION('',(#42606),#42610); +#42606 = LINE('',#42607,#42608); +#42607 = CARTESIAN_POINT('',(-4.978996250515E-17,-0.5)); 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#43465 = CARTESIAN_POINT('',(0.326910270496,0.20370428853)); +#43466 = CARTESIAN_POINT('',(0.326910270496,3.049920777311E-02)); +#43467 = CARTESIAN_POINT('',(0.176910270496,0.117101748152)); +#43468 = CARTESIAN_POINT('',(2.6910270496E-02,0.20370428853)); +#43469 = CARTESIAN_POINT('',(0.176910270496,0.290306828908)); +#43470 = CARTESIAN_POINT('',(0.326910270496,0.376909369287)); +#43471 = CARTESIAN_POINT('',(0.326910270496,0.20370428853)); +#43472 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#43473 = PCURVE('',#39865,#43474); +#43474 = DEFINITIONAL_REPRESENTATION('',(#43475),#43479); +#43475 = LINE('',#43476,#43477); +#43476 = CARTESIAN_POINT('',(0.,0.)); +#43477 = VECTOR('',#43478,1.); +#43478 = DIRECTION('',(1.,0.)); +#43479 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#43480 = ORIENTED_EDGE('',*,*,#43481,.T.); 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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+#71453 = DIRECTION('',(1.,2.22044604925E-16,0.)); +#71454 = PCURVE('',#66887,#71455); +#71455 = DEFINITIONAL_REPRESENTATION('',(#71456),#71460); +#71456 = CIRCLE('',#71457,0.28); +#71457 = AXIS2_PLACEMENT_2D('',#71458,#71459); +#71458 = CARTESIAN_POINT('',(0.265993782442,0.11576285855)); +#71459 = DIRECTION('',(0.,-1.)); +#71460 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71461 = PCURVE('',#71462,#71467); +#71462 = CYLINDRICAL_SURFACE('',#71463,0.28); +#71463 = AXIS2_PLACEMENT_3D('',#71464,#71465,#71466); +#71464 = CARTESIAN_POINT('',(3.15,-4.075,0.91)); +#71465 = DIRECTION('',(-2.22044604925E-16,1.,-0.)); +#71466 = DIRECTION('',(1.,2.22044604925E-16,0.)); +#71467 = DEFINITIONAL_REPRESENTATION('',(#71468),#71472); +#71468 = LINE('',#71469,#71470); +#71469 = CARTESIAN_POINT('',(6.28318530718,-0.3)); +#71470 = VECTOR('',#71471,1.); +#71471 = DIRECTION('',(-1.,0.)); +#71472 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); 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+#71494 = ADVANCED_FACE('',(#71495),#66934,.F.); +#71495 = FACE_BOUND('',#71496,.F.); +#71496 = EDGE_LOOP('',(#71497,#71517,#71518,#71538)); +#71497 = ORIENTED_EDGE('',*,*,#71498,.F.); +#71498 = EDGE_CURVE('',#66872,#69697,#71499,.T.); +#71499 = SURFACE_CURVE('',#71500,(#71504,#71510),.PCURVE_S1.); +#71500 = LINE('',#71501,#71502); +#71501 = CARTESIAN_POINT('',(3.15,-4.375,1.19)); +#71502 = VECTOR('',#71503,1.); +#71503 = DIRECTION('',(-1.,-2.22044604925E-16,0.)); +#71504 = PCURVE('',#66934,#71505); +#71505 = DEFINITIONAL_REPRESENTATION('',(#71506),#71509); +#71506 = B_SPLINE_CURVE_WITH_KNOTS('',1,(#71507,#71508),.UNSPECIFIED., + .F.,.F.,(2,2),(0.5,0.55),.PIECEWISE_BEZIER_KNOTS.); +#71507 = CARTESIAN_POINT('',(9.275,-8.98764365116E-16)); +#71508 = CARTESIAN_POINT('',(9.297435897436,1.)); +#71509 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71510 = PCURVE('',#69712,#71511); +#71511 = DEFINITIONAL_REPRESENTATION('',(#71512),#71516); +#71512 = LINE('',#71513,#71514); +#71513 = CARTESIAN_POINT('',(6.66133814775E-17,-0.3)); +#71514 = VECTOR('',#71515,1.); +#71515 = DIRECTION('',(1.,0.)); +#71516 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71517 = ORIENTED_EDGE('',*,*,#66920,.T.); +#71518 = ORIENTED_EDGE('',*,*,#71519,.T.); +#71519 = EDGE_CURVE('',#66901,#69725,#71520,.T.); +#71520 = SURFACE_CURVE('',#71521,(#71524,#71531),.PCURVE_S1.); +#71521 = B_SPLINE_CURVE_WITH_KNOTS('',1,(#71522,#71523),.UNSPECIFIED., + .F.,.F.,(2,2),(0.,1.),.PIECEWISE_BEZIER_KNOTS.); +#71522 = CARTESIAN_POINT('',(2.65,-4.9,1.19)); +#71523 = CARTESIAN_POINT('',(2.6,-4.875,1.19)); +#71524 = PCURVE('',#66934,#71525); +#71525 = DEFINITIONAL_REPRESENTATION('',(#71526),#71530); +#71526 = LINE('',#71527,#71528); +#71527 = CARTESIAN_POINT('',(9.8,-4.560510091313E-17)); +#71528 = VECTOR('',#71529,1.); +#71529 = DIRECTION('',(0.,1.)); +#71530 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); 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+#71550 = AXIS2_PLACEMENT_3D('',#71551,#71552,#71553); +#71551 = CARTESIAN_POINT('',(3.15,-4.075,0.91)); +#71552 = DIRECTION('',(-2.22044604925E-16,1.,0.)); +#71553 = DIRECTION('',(4.440892098501E-15,9.860761315262E-31,1.)); +#71554 = PCURVE('',#66965,#71555); +#71555 = DEFINITIONAL_REPRESENTATION('',(#71556),#71564); +#71556 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#71557,#71558,#71559,#71560 + ,#71561,#71562,#71563),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#71557 = CARTESIAN_POINT('',(0.365993782442,0.11576285855)); +#71558 = CARTESIAN_POINT('',(0.365993782442,-5.744222220689E-02)); +#71559 = CARTESIAN_POINT('',(0.215993782442,2.916031817156E-02)); +#71560 = CARTESIAN_POINT('',(6.5993782442E-02,0.11576285855)); +#71561 = CARTESIAN_POINT('',(0.215993782442,0.202365398928)); +#71562 = CARTESIAN_POINT('',(0.365993782442,0.288967939307)); +#71563 = CARTESIAN_POINT('',(0.365993782442,0.11576285855)); +#71564 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71565 = PCURVE('',#67015,#71566); +#71566 = DEFINITIONAL_REPRESENTATION('',(#71567),#71571); +#71567 = LINE('',#71568,#71569); +#71568 = CARTESIAN_POINT('',(0.,0.)); +#71569 = VECTOR('',#71570,1.); +#71570 = DIRECTION('',(1.,0.)); +#71571 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71572 = ORIENTED_EDGE('',*,*,#71573,.T.); +#71573 = EDGE_CURVE('',#71546,#71574,#71576,.T.); +#71574 = VERTEX_POINT('',#71575); +#71575 = CARTESIAN_POINT('',(3.25,-4.075,0.28)); +#71576 = SURFACE_CURVE('',#71577,(#71581,#71588),.PCURVE_S1.); +#71577 = LINE('',#71578,#71579); +#71578 = CARTESIAN_POINT('',(3.25,-4.075,0.91)); +#71579 = VECTOR('',#71580,1.); +#71580 = DIRECTION('',(0.,0.,-1.)); +#71581 = PCURVE('',#66965,#71582); +#71582 = DEFINITIONAL_REPRESENTATION('',(#71583),#71587); +#71583 = LINE('',#71584,#71585); +#71584 = CARTESIAN_POINT('',(0.265993782442,1.576285855E-02)); +#71585 = VECTOR('',#71586,1.); +#71586 = DIRECTION('',(-1.,-0.)); +#71587 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#71588 = PCURVE('',#71259,#71589); +#71589 = DEFINITIONAL_REPRESENTATION('',(#71590),#71594); +#71590 = LINE('',#71591,#71592); +#71591 = CARTESIAN_POINT('',(0.,0.)); +#71592 = VECTOR('',#71593,1.); +#71593 = DIRECTION('',(1.,0.)); +#71594 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); 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+#71696 = DIRECTION('',(-2.22044604925E-16,1.,0.)); +#71697 = DIRECTION('',(-4.440892098501E-15,-9.860761315262E-31,-1.)); +#71698 = PCURVE('',#66965,#71699); +#71699 = DEFINITIONAL_REPRESENTATION('',(#71700),#71708); +#71700 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#71701,#71702,#71703,#71704 + ,#71705,#71706,#71707),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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+#102830 = EDGE_CURVE('',#102803,#102831,#102833,.T.); +#102831 = VERTEX_POINT('',#102832); +#102832 = CARTESIAN_POINT('',(-0.95,-0.175,0.25)); +#102833 = SURFACE_CURVE('',#102834,(#102838,#102845),.PCURVE_S1.); +#102834 = LINE('',#102835,#102836); +#102835 = CARTESIAN_POINT('',(-0.95,-0.175,0.35)); +#102836 = VECTOR('',#102837,1.); +#102837 = DIRECTION('',(0.,0.,-1.)); +#102838 = PCURVE('',#99491,#102839); +#102839 = DEFINITIONAL_REPRESENTATION('',(#102840),#102844); +#102840 = LINE('',#102841,#102842); +#102841 = CARTESIAN_POINT('',(7.0575755458E-02,0.111579120815)); +#102842 = VECTOR('',#102843,1.); +#102843 = DIRECTION('',(-1.,0.)); +#102844 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102845 = PCURVE('',#102846,#102851); +#102846 = PLANE('',#102847); +#102847 = AXIS2_PLACEMENT_3D('',#102848,#102849,#102850); +#102848 = CARTESIAN_POINT('',(-0.95,-0.175,0.35)); +#102849 = DIRECTION('',(-1.,3.445092848398E-16,0.)); +#102850 = DIRECTION('',(0.,0.,-1.)); +#102851 = DEFINITIONAL_REPRESENTATION('',(#102852),#102856); +#102852 = LINE('',#102853,#102854); +#102853 = CARTESIAN_POINT('',(0.,-0.)); +#102854 = VECTOR('',#102855,1.); +#102855 = DIRECTION('',(1.,0.)); +#102856 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102857 = ORIENTED_EDGE('',*,*,#102858,.T.); +#102858 = EDGE_CURVE('',#102831,#102859,#102861,.T.); +#102859 = VERTEX_POINT('',#102860); +#102860 = CARTESIAN_POINT('',(-1.2,-0.175,0.)); +#102861 = SURFACE_CURVE('',#102862,(#102867,#102874),.PCURVE_S1.); +#102862 = CIRCLE('',#102863,0.25); +#102863 = AXIS2_PLACEMENT_3D('',#102864,#102865,#102866); +#102864 = CARTESIAN_POINT('',(-1.2,-0.175,0.25)); +#102865 = DIRECTION('',(3.445092848398E-16,1.,0.)); +#102866 = DIRECTION('',(1.,-3.445092848398E-16,-4.440892098501E-16)); +#102867 = PCURVE('',#99491,#102868); +#102868 = DEFINITIONAL_REPRESENTATION('',(#102869),#102873); +#102869 = CIRCLE('',#102870,0.25); +#102870 = AXIS2_PLACEMENT_2D('',#102871,#102872); +#102871 = CARTESIAN_POINT('',(-2.9424244542E-02,-0.138420879185)); +#102872 = DIRECTION('',(-4.440892098501E-16,1.)); +#102873 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102874 = PCURVE('',#102875,#102880); +#102875 = CYLINDRICAL_SURFACE('',#102876,0.25); +#102876 = AXIS2_PLACEMENT_3D('',#102877,#102878,#102879); +#102877 = CARTESIAN_POINT('',(-1.2,-0.175,0.25)); +#102878 = DIRECTION('',(-3.445092848398E-16,-1.,-0.)); +#102879 = DIRECTION('',(1.,-3.445092848398E-16,-4.440892098501E-16)); +#102880 = DEFINITIONAL_REPRESENTATION('',(#102881),#102885); +#102881 = LINE('',#102882,#102883); +#102882 = CARTESIAN_POINT('',(6.28318530718,0.)); +#102883 = VECTOR('',#102884,1.); +#102884 = DIRECTION('',(-1.,0.)); +#102885 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102886 = ORIENTED_EDGE('',*,*,#102887,.T.); +#102887 = EDGE_CURVE('',#102859,#102888,#102890,.T.); +#102888 = VERTEX_POINT('',#102889); +#102889 = CARTESIAN_POINT('',(-1.4,-0.175,0.)); +#102890 = SURFACE_CURVE('',#102891,(#102895,#102902),.PCURVE_S1.); +#102891 = LINE('',#102892,#102893); +#102892 = CARTESIAN_POINT('',(-1.2,-0.175,0.)); +#102893 = VECTOR('',#102894,1.); +#102894 = DIRECTION('',(-1.,3.445092848398E-16,0.)); +#102895 = PCURVE('',#99491,#102896); +#102896 = DEFINITIONAL_REPRESENTATION('',(#102897),#102901); +#102897 = LINE('',#102898,#102899); +#102898 = CARTESIAN_POINT('',(-0.279424244542,-0.138420879185)); +#102899 = VECTOR('',#102900,1.); +#102900 = DIRECTION('',(0.,-1.)); +#102901 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102902 = PCURVE('',#102903,#102908); +#102903 = PLANE('',#102904); +#102904 = AXIS2_PLACEMENT_3D('',#102905,#102906,#102907); +#102905 = CARTESIAN_POINT('',(-1.2,-0.175,0.)); +#102906 = DIRECTION('',(0.,0.,1.)); +#102907 = DIRECTION('',(-1.,3.445092848398E-16,0.)); +#102908 = DEFINITIONAL_REPRESENTATION('',(#102909),#102913); +#102909 = LINE('',#102910,#102911); +#102910 = CARTESIAN_POINT('',(0.,0.)); +#102911 = VECTOR('',#102912,1.); +#102912 = DIRECTION('',(1.,0.)); +#102913 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102914 = ORIENTED_EDGE('',*,*,#102915,.T.); +#102915 = EDGE_CURVE('',#102888,#102916,#102918,.T.); +#102916 = VERTEX_POINT('',#102917); +#102917 = CARTESIAN_POINT('',(-1.4,-0.175,0.15)); +#102918 = SURFACE_CURVE('',#102919,(#102923,#102930),.PCURVE_S1.); +#102919 = LINE('',#102920,#102921); +#102920 = CARTESIAN_POINT('',(-1.4,-0.175,0.)); +#102921 = VECTOR('',#102922,1.); +#102922 = DIRECTION('',(0.,0.,1.)); +#102923 = PCURVE('',#99491,#102924); +#102924 = DEFINITIONAL_REPRESENTATION('',(#102925),#102929); +#102925 = LINE('',#102926,#102927); +#102926 = CARTESIAN_POINT('',(-0.279424244542,-0.338420879185)); +#102927 = VECTOR('',#102928,1.); +#102928 = DIRECTION('',(1.,0.)); +#102929 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102930 = PCURVE('',#102931,#102936); +#102931 = PLANE('',#102932); +#102932 = AXIS2_PLACEMENT_3D('',#102933,#102934,#102935); +#102933 = CARTESIAN_POINT('',(-1.4,-0.175,0.)); +#102934 = DIRECTION('',(1.,-3.445092848398E-16,0.)); +#102935 = DIRECTION('',(0.,0.,1.)); +#102936 = DEFINITIONAL_REPRESENTATION('',(#102937),#102941); +#102937 = LINE('',#102938,#102939); +#102938 = CARTESIAN_POINT('',(0.,0.)); +#102939 = VECTOR('',#102940,1.); +#102940 = DIRECTION('',(1.,0.)); +#102941 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102942 = ORIENTED_EDGE('',*,*,#102943,.T.); +#102943 = EDGE_CURVE('',#102916,#102944,#102946,.T.); +#102944 = VERTEX_POINT('',#102945); +#102945 = CARTESIAN_POINT('',(-1.2,-0.175,0.15)); +#102946 = SURFACE_CURVE('',#102947,(#102951,#102958),.PCURVE_S1.); +#102947 = LINE('',#102948,#102949); +#102948 = CARTESIAN_POINT('',(-1.4,-0.175,0.15)); +#102949 = VECTOR('',#102950,1.); +#102950 = DIRECTION('',(1.,-3.445092848398E-16,0.)); +#102951 = PCURVE('',#99491,#102952); +#102952 = DEFINITIONAL_REPRESENTATION('',(#102953),#102957); +#102953 = LINE('',#102954,#102955); +#102954 = CARTESIAN_POINT('',(-0.129424244542,-0.338420879185)); +#102955 = VECTOR('',#102956,1.); +#102956 = DIRECTION('',(0.,1.)); +#102957 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102958 = PCURVE('',#102959,#102964); +#102959 = PLANE('',#102960); +#102960 = AXIS2_PLACEMENT_3D('',#102961,#102962,#102963); +#102961 = CARTESIAN_POINT('',(-1.4,-0.175,0.15)); +#102962 = DIRECTION('',(0.,0.,-1.)); +#102963 = DIRECTION('',(1.,-3.445092848398E-16,0.)); +#102964 = DEFINITIONAL_REPRESENTATION('',(#102965),#102969); +#102965 = LINE('',#102966,#102967); +#102966 = CARTESIAN_POINT('',(0.,-0.)); +#102967 = VECTOR('',#102968,1.); +#102968 = DIRECTION('',(1.,0.)); +#102969 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102970 = ORIENTED_EDGE('',*,*,#102971,.T.); +#102971 = EDGE_CURVE('',#102944,#102972,#102974,.T.); +#102972 = VERTEX_POINT('',#102973); +#102973 = CARTESIAN_POINT('',(-1.1,-0.175,0.25)); +#102974 = SURFACE_CURVE('',#102975,(#102980,#102991),.PCURVE_S1.); +#102975 = CIRCLE('',#102976,0.1); +#102976 = AXIS2_PLACEMENT_3D('',#102977,#102978,#102979); +#102977 = CARTESIAN_POINT('',(-1.2,-0.175,0.25)); +#102978 = DIRECTION('',(-3.445092848398E-16,-1.,-0.)); +#102979 = DIRECTION('',(0.,0.,-1.)); +#102980 = PCURVE('',#99491,#102981); +#102981 = DEFINITIONAL_REPRESENTATION('',(#102982),#102990); +#102982 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#102983,#102984,#102985, + #102986,#102987,#102988,#102989),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#102983 = CARTESIAN_POINT('',(-0.129424244542,-0.138420879185)); +#102984 = CARTESIAN_POINT('',(-0.129424244542,3.478420157189E-02)); +#102985 = CARTESIAN_POINT('',(2.0575755458E-02,-5.181833880656E-02)); +#102986 = CARTESIAN_POINT('',(0.170575755458,-0.138420879185)); +#102987 = CARTESIAN_POINT('',(2.0575755458E-02,-0.225023419563)); +#102988 = CARTESIAN_POINT('',(-0.129424244542,-0.311625959942)); +#102989 = CARTESIAN_POINT('',(-0.129424244542,-0.138420879185)); +#102990 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#102991 = PCURVE('',#102992,#102997); +#102992 = CYLINDRICAL_SURFACE('',#102993,0.1); +#102993 = AXIS2_PLACEMENT_3D('',#102994,#102995,#102996); +#102994 = CARTESIAN_POINT('',(-1.2,-0.175,0.25)); +#102995 = DIRECTION('',(-3.445092848398E-16,-1.,0.)); +#102996 = DIRECTION('',(-0.,0.,-1.)); +#102997 = DEFINITIONAL_REPRESENTATION('',(#102998),#103002); +#102998 = LINE('',#102999,#103000); +#102999 = CARTESIAN_POINT('',(0.,0.)); +#103000 = VECTOR('',#103001,1.); +#103001 = DIRECTION('',(1.,0.)); +#103002 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103003 = ORIENTED_EDGE('',*,*,#103004,.T.); +#103004 = EDGE_CURVE('',#102972,#103005,#103007,.T.); +#103005 = VERTEX_POINT('',#103006); +#103006 = CARTESIAN_POINT('',(-1.1,-0.175,0.35)); +#103007 = SURFACE_CURVE('',#103008,(#103012,#103019),.PCURVE_S1.); +#103008 = LINE('',#103009,#103010); +#103009 = CARTESIAN_POINT('',(-1.1,-0.175,0.25)); +#103010 = VECTOR('',#103011,1.); +#103011 = DIRECTION('',(0.,0.,1.)); +#103012 = PCURVE('',#99491,#103013); +#103013 = DEFINITIONAL_REPRESENTATION('',(#103014),#103018); +#103014 = LINE('',#103015,#103016); +#103015 = CARTESIAN_POINT('',(-2.9424244542E-02,-3.8420879185E-02)); +#103016 = VECTOR('',#103017,1.); +#103017 = DIRECTION('',(1.,0.)); +#103018 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103019 = PCURVE('',#103020,#103025); +#103020 = PLANE('',#103021); +#103021 = AXIS2_PLACEMENT_3D('',#103022,#103023,#103024); +#103022 = CARTESIAN_POINT('',(-1.1,-0.175,0.25)); +#103023 = DIRECTION('',(1.,-3.445092848398E-16,0.)); +#103024 = DIRECTION('',(0.,0.,1.)); +#103025 = DEFINITIONAL_REPRESENTATION('',(#103026),#103030); +#103026 = LINE('',#103027,#103028); +#103027 = CARTESIAN_POINT('',(0.,0.)); +#103028 = VECTOR('',#103029,1.); +#103029 = DIRECTION('',(1.,0.)); +#103030 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103031 = ORIENTED_EDGE('',*,*,#103032,.T.); +#103032 = EDGE_CURVE('',#103005,#103033,#103035,.T.); +#103033 = VERTEX_POINT('',#103034); +#103034 = CARTESIAN_POINT('',(-0.85,-0.175,0.6)); +#103035 = SURFACE_CURVE('',#103036,(#103041,#103048),.PCURVE_S1.); +#103036 = CIRCLE('',#103037,0.25); +#103037 = AXIS2_PLACEMENT_3D('',#103038,#103039,#103040); +#103038 = CARTESIAN_POINT('',(-0.85,-0.175,0.35)); +#103039 = DIRECTION('',(3.445092848398E-16,1.,0.)); +#103040 = DIRECTION('',(-1.,3.445092848398E-16,8.881784197001E-16)); +#103041 = PCURVE('',#99491,#103042); +#103042 = DEFINITIONAL_REPRESENTATION('',(#103043),#103047); +#103043 = CIRCLE('',#103044,0.25); +#103044 = AXIS2_PLACEMENT_2D('',#103045,#103046); +#103045 = CARTESIAN_POINT('',(7.0575755458E-02,0.211579120815)); +#103046 = DIRECTION('',(8.881784197001E-16,-1.)); +#103047 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103048 = PCURVE('',#103049,#103054); +#103049 = CYLINDRICAL_SURFACE('',#103050,0.25); +#103050 = AXIS2_PLACEMENT_3D('',#103051,#103052,#103053); +#103051 = CARTESIAN_POINT('',(-0.85,-0.175,0.35)); +#103052 = DIRECTION('',(-3.445092848398E-16,-1.,-0.)); +#103053 = DIRECTION('',(-1.,3.445092848398E-16,8.881784197001E-16)); +#103054 = DEFINITIONAL_REPRESENTATION('',(#103055),#103059); +#103055 = LINE('',#103056,#103057); +#103056 = CARTESIAN_POINT('',(6.28318530718,0.)); +#103057 = VECTOR('',#103058,1.); +#103058 = DIRECTION('',(-1.,0.)); +#103059 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103060 = ORIENTED_EDGE('',*,*,#103061,.T.); +#103061 = EDGE_CURVE('',#103033,#99476,#103062,.T.); +#103062 = SURFACE_CURVE('',#103063,(#103067,#103074),.PCURVE_S1.); +#103063 = LINE('',#103064,#103065); +#103064 = CARTESIAN_POINT('',(-0.85,-0.175,0.6)); +#103065 = VECTOR('',#103066,1.); +#103066 = DIRECTION('',(1.,-3.445092848398E-16,0.)); +#103067 = PCURVE('',#99491,#103068); +#103068 = DEFINITIONAL_REPRESENTATION('',(#103069),#103073); +#103069 = LINE('',#103070,#103071); +#103070 = CARTESIAN_POINT('',(0.320575755458,0.211579120815)); +#103071 = VECTOR('',#103072,1.); +#103072 = DIRECTION('',(0.,1.)); +#103073 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103074 = PCURVE('',#102765,#103075); +#103075 = DEFINITIONAL_REPRESENTATION('',(#103076),#103080); +#103076 = LINE('',#103077,#103078); +#103077 = CARTESIAN_POINT('',(0.,-0.)); +#103078 = VECTOR('',#103079,1.); +#103079 = DIRECTION('',(1.,0.)); +#103080 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#103081 = ADVANCED_FACE('',(#103082),#99598,.F.); +#103082 = FACE_BOUND('',#103083,.F.); +#103083 = EDGE_LOOP('',(#103084,#103085,#103113,#103134)); +#103084 = ORIENTED_EDGE('',*,*,#99584,.T.); +#103085 = ORIENTED_EDGE('',*,*,#103086,.T.); +#103086 = EDGE_CURVE('',#99557,#103087,#103089,.T.); +#103087 = VERTEX_POINT('',#103088); +#103088 = CARTESIAN_POINT('',(-0.95,0.175,0.35)); +#103089 = SURFACE_CURVE('',#103090,(#103095,#103102),.PCURVE_S1.); +#103090 = CIRCLE('',#103091,0.1); +#103091 = AXIS2_PLACEMENT_3D('',#103092,#103093,#103094); +#103092 = CARTESIAN_POINT('',(-0.85,0.175,0.35)); +#103093 = DIRECTION('',(-3.445092848398E-16,-1.,0.)); +#103094 = DIRECTION('',(1.110223024625E-15,-3.824821402262E-31,1.)); +#103095 = PCURVE('',#99598,#103096); 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107122 = CARTESIAN_POINT('',(-41.70428468858,10.)); +#107123 = CARTESIAN_POINT('',(-41.70428468858,10.779422863406)); +#107124 = CARTESIAN_POINT('',(-41.02928468858,10.389711431703)); +#107125 = CARTESIAN_POINT('',(-40.35428468858,10.)); +#107126 = CARTESIAN_POINT('',(-41.02928468858,9.610288568297)); +#107127 = CARTESIAN_POINT('',(-41.70428468858,9.220577136594)); +#107128 = CARTESIAN_POINT('',(-41.70428468858,10.)); +#107129 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107130 = PCURVE('',#107131,#107136); +#107131 = CYLINDRICAL_SURFACE('',#107132,0.45); +#107132 = AXIS2_PLACEMENT_3D('',#107133,#107134,#107135); +#107133 = CARTESIAN_POINT('',(78.5,47.5,-0.8)); +#107134 = DIRECTION('',(0.,0.,1.)); +#107135 = DIRECTION('',(1.,0.,-0.)); +#107136 = DEFINITIONAL_REPRESENTATION('',(#107137),#107141); +#107137 = LINE('',#107138,#107139); +#107138 = CARTESIAN_POINT('',(0.,0.8)); +#107139 = VECTOR('',#107140,1.); +#107140 = DIRECTION('',(1.,0.)); +#107141 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107142 = FACE_BOUND('',#107143,.T.); +#107143 = EDGE_LOOP('',(#107144)); +#107144 = ORIENTED_EDGE('',*,*,#107145,.T.); +#107145 = EDGE_CURVE('',#107146,#107146,#107148,.T.); +#107146 = VERTEX_POINT('',#107147); +#107147 = CARTESIAN_POINT('',(74.95,47.5,0.)); +#107148 = SURFACE_CURVE('',#107149,(#107154,#107165),.PCURVE_S1.); +#107149 = CIRCLE('',#107150,0.45); +#107150 = AXIS2_PLACEMENT_3D('',#107151,#107152,#107153); +#107151 = CARTESIAN_POINT('',(74.5,47.5,0.)); +#107152 = DIRECTION('',(0.,0.,1.)); +#107153 = DIRECTION('',(1.,0.,-0.)); +#107154 = PCURVE('',#106070,#107155); +#107155 = DEFINITIONAL_REPRESENTATION('',(#107156),#107164); +#107156 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107157,#107158,#107159, + #107160,#107161,#107162,#107163),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107157 = CARTESIAN_POINT('',(-37.70428468858,10.)); +#107158 = CARTESIAN_POINT('',(-37.70428468858,10.779422863406)); +#107159 = CARTESIAN_POINT('',(-37.02928468858,10.389711431703)); +#107160 = CARTESIAN_POINT('',(-36.35428468858,10.)); +#107161 = CARTESIAN_POINT('',(-37.02928468858,9.610288568297)); +#107162 = CARTESIAN_POINT('',(-37.70428468858,9.220577136594)); +#107163 = CARTESIAN_POINT('',(-37.70428468858,10.)); +#107164 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107165 = PCURVE('',#107166,#107171); +#107166 = CYLINDRICAL_SURFACE('',#107167,0.45); +#107167 = AXIS2_PLACEMENT_3D('',#107168,#107169,#107170); +#107168 = CARTESIAN_POINT('',(74.5,47.5,-0.8)); +#107169 = DIRECTION('',(0.,0.,1.)); +#107170 = DIRECTION('',(1.,0.,-0.)); +#107171 = DEFINITIONAL_REPRESENTATION('',(#107172),#107176); +#107172 = LINE('',#107173,#107174); +#107173 = CARTESIAN_POINT('',(0.,0.8)); +#107174 = VECTOR('',#107175,1.); +#107175 = DIRECTION('',(1.,0.)); +#107176 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107177 = FACE_BOUND('',#107178,.T.); +#107178 = EDGE_LOOP('',(#107179)); +#107179 = ORIENTED_EDGE('',*,*,#107180,.T.); +#107180 = EDGE_CURVE('',#107181,#107181,#107183,.T.); +#107181 = VERTEX_POINT('',#107182); +#107182 = CARTESIAN_POINT('',(76.95,47.5,0.)); +#107183 = SURFACE_CURVE('',#107184,(#107189,#107200),.PCURVE_S1.); +#107184 = CIRCLE('',#107185,0.45); +#107185 = AXIS2_PLACEMENT_3D('',#107186,#107187,#107188); +#107186 = CARTESIAN_POINT('',(76.5,47.5,0.)); +#107187 = DIRECTION('',(0.,0.,1.)); +#107188 = DIRECTION('',(1.,0.,-0.)); +#107189 = PCURVE('',#106070,#107190); +#107190 = DEFINITIONAL_REPRESENTATION('',(#107191),#107199); +#107191 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107192,#107193,#107194, + #107195,#107196,#107197,#107198),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107192 = CARTESIAN_POINT('',(-39.70428468858,10.)); +#107193 = CARTESIAN_POINT('',(-39.70428468858,10.779422863406)); +#107194 = CARTESIAN_POINT('',(-39.02928468858,10.389711431703)); +#107195 = CARTESIAN_POINT('',(-38.35428468858,10.)); +#107196 = CARTESIAN_POINT('',(-39.02928468858,9.610288568297)); +#107197 = CARTESIAN_POINT('',(-39.70428468858,9.220577136594)); +#107198 = CARTESIAN_POINT('',(-39.70428468858,10.)); +#107199 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107200 = PCURVE('',#107201,#107206); +#107201 = CYLINDRICAL_SURFACE('',#107202,0.45); +#107202 = AXIS2_PLACEMENT_3D('',#107203,#107204,#107205); +#107203 = CARTESIAN_POINT('',(76.5,47.5,-0.8)); +#107204 = DIRECTION('',(0.,0.,1.)); +#107205 = DIRECTION('',(1.,0.,-0.)); +#107206 = DEFINITIONAL_REPRESENTATION('',(#107207),#107211); +#107207 = LINE('',#107208,#107209); +#107208 = CARTESIAN_POINT('',(0.,0.8)); +#107209 = VECTOR('',#107210,1.); +#107210 = DIRECTION('',(1.,0.)); +#107211 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107212 = FACE_BOUND('',#107213,.T.); +#107213 = EDGE_LOOP('',(#107214)); +#107214 = ORIENTED_EDGE('',*,*,#107215,.T.); +#107215 = EDGE_CURVE('',#107216,#107216,#107218,.T.); +#107216 = VERTEX_POINT('',#107217); +#107217 = CARTESIAN_POINT('',(65.245,47.25,0.)); +#107218 = SURFACE_CURVE('',#107219,(#107224,#107235),.PCURVE_S1.); +#107219 = CIRCLE('',#107220,0.495); +#107220 = AXIS2_PLACEMENT_3D('',#107221,#107222,#107223); +#107221 = CARTESIAN_POINT('',(64.75,47.25,0.)); +#107222 = DIRECTION('',(0.,0.,1.)); +#107223 = DIRECTION('',(1.,0.,-0.)); +#107224 = PCURVE('',#106070,#107225); +#107225 = DEFINITIONAL_REPRESENTATION('',(#107226),#107234); +#107226 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107227,#107228,#107229, + #107230,#107231,#107232,#107233),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107227 = CARTESIAN_POINT('',(-27.99928468858,9.75)); +#107228 = CARTESIAN_POINT('',(-27.99928468858,10.607365149747)); +#107229 = CARTESIAN_POINT('',(-27.25678468858,10.178682574873)); +#107230 = CARTESIAN_POINT('',(-26.51428468858,9.75)); +#107231 = CARTESIAN_POINT('',(-27.25678468858,9.321317425127)); +#107232 = CARTESIAN_POINT('',(-27.99928468858,8.892634850253)); +#107233 = CARTESIAN_POINT('',(-27.99928468858,9.75)); +#107234 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107235 = PCURVE('',#107236,#107241); +#107236 = CYLINDRICAL_SURFACE('',#107237,0.495); +#107237 = AXIS2_PLACEMENT_3D('',#107238,#107239,#107240); +#107238 = CARTESIAN_POINT('',(64.75,47.25,-0.8)); +#107239 = DIRECTION('',(0.,0.,1.)); +#107240 = DIRECTION('',(1.,0.,-0.)); +#107241 = DEFINITIONAL_REPRESENTATION('',(#107242),#107246); +#107242 = LINE('',#107243,#107244); +#107243 = CARTESIAN_POINT('',(0.,0.8)); +#107244 = VECTOR('',#107245,1.); +#107245 = DIRECTION('',(1.,0.)); +#107246 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107247 = FACE_BOUND('',#107248,.T.); +#107248 = EDGE_LOOP('',(#107249)); +#107249 = ORIENTED_EDGE('',*,*,#107250,.T.); +#107250 = EDGE_CURVE('',#107251,#107251,#107253,.T.); +#107251 = VERTEX_POINT('',#107252); +#107252 = CARTESIAN_POINT('',(60.745,47.25,0.)); +#107253 = SURFACE_CURVE('',#107254,(#107259,#107270),.PCURVE_S1.); +#107254 = CIRCLE('',#107255,0.495); +#107255 = AXIS2_PLACEMENT_3D('',#107256,#107257,#107258); +#107256 = CARTESIAN_POINT('',(60.25,47.25,0.)); +#107257 = DIRECTION('',(0.,0.,1.)); +#107258 = DIRECTION('',(1.,0.,-0.)); +#107259 = PCURVE('',#106070,#107260); +#107260 = DEFINITIONAL_REPRESENTATION('',(#107261),#107269); +#107261 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107262,#107263,#107264, + #107265,#107266,#107267,#107268),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107927 = CARTESIAN_POINT('',(30.295715311413,8.25)); +#107928 = CARTESIAN_POINT('',(30.295715311413,8.596410161514)); +#107929 = CARTESIAN_POINT('',(30.595715311413,8.423205080757)); +#107930 = CARTESIAN_POINT('',(30.895715311413,8.25)); +#107931 = CARTESIAN_POINT('',(30.595715311413,8.076794919243)); +#107932 = CARTESIAN_POINT('',(30.295715311413,7.903589838486)); +#107933 = CARTESIAN_POINT('',(30.295715311413,8.25)); +#107934 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107935 = PCURVE('',#107936,#107941); +#107936 = CYLINDRICAL_SURFACE('',#107937,0.2); +#107937 = AXIS2_PLACEMENT_3D('',#107938,#107939,#107940); +#107938 = CARTESIAN_POINT('',(6.75,45.75,-0.8)); +#107939 = DIRECTION('',(0.,0.,1.)); +#107940 = DIRECTION('',(1.,0.,-0.)); +#107941 = DEFINITIONAL_REPRESENTATION('',(#107942),#107946); +#107942 = LINE('',#107943,#107944); +#107943 = CARTESIAN_POINT('',(0.,0.8)); +#107944 = VECTOR('',#107945,1.); +#107945 = DIRECTION('',(1.,0.)); +#107946 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107947 = FACE_BOUND('',#107948,.T.); +#107948 = EDGE_LOOP('',(#107949)); +#107949 = ORIENTED_EDGE('',*,*,#107950,.T.); +#107950 = EDGE_CURVE('',#107951,#107951,#107953,.T.); +#107951 = VERTEX_POINT('',#107952); +#107952 = CARTESIAN_POINT('',(11.2,47.5,0.)); +#107953 = SURFACE_CURVE('',#107954,(#107959,#107970),.PCURVE_S1.); +#107954 = CIRCLE('',#107955,0.2); +#107955 = AXIS2_PLACEMENT_3D('',#107956,#107957,#107958); +#107956 = CARTESIAN_POINT('',(11.,47.5,0.)); +#107957 = DIRECTION('',(0.,0.,1.)); +#107958 = DIRECTION('',(1.,0.,-0.)); +#107959 = PCURVE('',#106070,#107960); +#107960 = DEFINITIONAL_REPRESENTATION('',(#107961),#107969); +#107961 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107962,#107963,#107964, + #107965,#107966,#107967,#107968),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#107962 = CARTESIAN_POINT('',(26.045715311413,10.)); +#107963 = CARTESIAN_POINT('',(26.045715311413,10.346410161514)); +#107964 = CARTESIAN_POINT('',(26.345715311413,10.173205080757)); +#107965 = CARTESIAN_POINT('',(26.645715311413,10.)); +#107966 = CARTESIAN_POINT('',(26.345715311413,9.826794919243)); +#107967 = CARTESIAN_POINT('',(26.045715311413,9.653589838486)); +#107968 = CARTESIAN_POINT('',(26.045715311413,10.)); +#107969 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107970 = PCURVE('',#107971,#107976); +#107971 = CYLINDRICAL_SURFACE('',#107972,0.2); +#107972 = AXIS2_PLACEMENT_3D('',#107973,#107974,#107975); +#107973 = CARTESIAN_POINT('',(11.,47.5,-0.8)); +#107974 = DIRECTION('',(0.,0.,1.)); +#107975 = DIRECTION('',(1.,0.,-0.)); +#107976 = DEFINITIONAL_REPRESENTATION('',(#107977),#107981); +#107977 = LINE('',#107978,#107979); +#107978 = CARTESIAN_POINT('',(0.,0.8)); +#107979 = VECTOR('',#107980,1.); +#107980 = DIRECTION('',(1.,0.)); +#107981 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#107982 = FACE_BOUND('',#107983,.T.); +#107983 = EDGE_LOOP('',(#107984)); +#107984 = ORIENTED_EDGE('',*,*,#107985,.T.); +#107985 = EDGE_CURVE('',#107986,#107986,#107988,.T.); +#107986 = VERTEX_POINT('',#107987); +#107987 = CARTESIAN_POINT('',(10.9,45.75,0.)); +#107988 = SURFACE_CURVE('',#107989,(#107994,#108005),.PCURVE_S1.); +#107989 = CIRCLE('',#107990,1.65); +#107990 = AXIS2_PLACEMENT_3D('',#107991,#107992,#107993); +#107991 = CARTESIAN_POINT('',(9.25,45.75,0.)); +#107992 = DIRECTION('',(0.,0.,1.)); +#107993 = DIRECTION('',(1.,0.,-0.)); +#107994 = PCURVE('',#106070,#107995); +#107995 = DEFINITIONAL_REPRESENTATION('',(#107996),#108004); +#107996 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#107997,#107998,#107999, + #108000,#108001,#108002,#108003),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#108032 = CARTESIAN_POINT('',(29.545715311413,6.5)); +#108033 = CARTESIAN_POINT('',(29.545715311413,6.846410161514)); +#108034 = CARTESIAN_POINT('',(29.845715311413,6.673205080757)); +#108035 = CARTESIAN_POINT('',(30.145715311413,6.5)); +#108036 = CARTESIAN_POINT('',(29.845715311413,6.326794919243)); +#108037 = CARTESIAN_POINT('',(29.545715311413,6.153589838486)); +#108038 = CARTESIAN_POINT('',(29.545715311413,6.5)); +#108039 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108040 = PCURVE('',#108041,#108046); +#108041 = CYLINDRICAL_SURFACE('',#108042,0.2); +#108042 = AXIS2_PLACEMENT_3D('',#108043,#108044,#108045); +#108043 = CARTESIAN_POINT('',(7.5,44.,-0.8)); +#108044 = DIRECTION('',(0.,0.,1.)); +#108045 = DIRECTION('',(1.,0.,-0.)); +#108046 = DEFINITIONAL_REPRESENTATION('',(#108047),#108051); +#108047 = LINE('',#108048,#108049); +#108048 = CARTESIAN_POINT('',(0.,0.8)); +#108049 = VECTOR('',#108050,1.); +#108050 = DIRECTION('',(1.,0.)); +#108051 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108052 = FACE_BOUND('',#108053,.T.); +#108053 = EDGE_LOOP('',(#108054)); +#108054 = ORIENTED_EDGE('',*,*,#108055,.T.); +#108055 = EDGE_CURVE('',#108056,#108056,#108058,.T.); +#108056 = VERTEX_POINT('',#108057); +#108057 = CARTESIAN_POINT('',(7.7,47.5,0.)); +#108058 = SURFACE_CURVE('',#108059,(#108064,#108075),.PCURVE_S1.); +#108059 = CIRCLE('',#108060,0.2); +#108060 = AXIS2_PLACEMENT_3D('',#108061,#108062,#108063); +#108061 = CARTESIAN_POINT('',(7.5,47.5,0.)); +#108062 = DIRECTION('',(0.,0.,1.)); +#108063 = DIRECTION('',(1.,0.,-0.)); +#108064 = PCURVE('',#106070,#108065); +#108065 = DEFINITIONAL_REPRESENTATION('',(#108066),#108074); +#108066 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#108067,#108068,#108069, + #108070,#108071,#108072,#108073),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#108102 = CARTESIAN_POINT('',(26.045715311413,6.5)); +#108103 = CARTESIAN_POINT('',(26.045715311413,6.846410161514)); +#108104 = CARTESIAN_POINT('',(26.345715311413,6.673205080757)); +#108105 = CARTESIAN_POINT('',(26.645715311413,6.5)); +#108106 = CARTESIAN_POINT('',(26.345715311413,6.326794919243)); +#108107 = CARTESIAN_POINT('',(26.045715311413,6.153589838486)); +#108108 = CARTESIAN_POINT('',(26.045715311413,6.5)); +#108109 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108110 = PCURVE('',#108111,#108116); +#108111 = CYLINDRICAL_SURFACE('',#108112,0.2); +#108112 = AXIS2_PLACEMENT_3D('',#108113,#108114,#108115); +#108113 = CARTESIAN_POINT('',(11.,44.,-0.8)); +#108114 = DIRECTION('',(0.,0.,1.)); +#108115 = DIRECTION('',(1.,0.,-0.)); +#108116 = DEFINITIONAL_REPRESENTATION('',(#108117),#108121); +#108117 = LINE('',#108118,#108119); +#108118 = CARTESIAN_POINT('',(0.,0.8)); +#108119 = VECTOR('',#108120,1.); +#108120 = DIRECTION('',(1.,0.)); +#108121 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108122 = FACE_BOUND('',#108123,.T.); +#108123 = EDGE_LOOP('',(#108124)); +#108124 = ORIENTED_EDGE('',*,*,#108125,.T.); +#108125 = EDGE_CURVE('',#108126,#108126,#108128,.T.); +#108126 = VERTEX_POINT('',#108127); +#108127 = CARTESIAN_POINT('',(11.95,45.75,0.)); +#108128 = SURFACE_CURVE('',#108129,(#108134,#108145),.PCURVE_S1.); +#108129 = CIRCLE('',#108130,0.2); +#108130 = AXIS2_PLACEMENT_3D('',#108131,#108132,#108133); +#108131 = CARTESIAN_POINT('',(11.75,45.75,0.)); +#108132 = DIRECTION('',(0.,0.,1.)); +#108133 = DIRECTION('',(1.,0.,-0.)); +#108134 = PCURVE('',#106070,#108135); +#108135 = DEFINITIONAL_REPRESENTATION('',(#108136),#108144); +#108136 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#108137,#108138,#108139, + #108140,#108141,#108142,#108143),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#108137 = CARTESIAN_POINT('',(25.295715311413,8.25)); +#108138 = CARTESIAN_POINT('',(25.295715311413,8.596410161514)); +#108139 = CARTESIAN_POINT('',(25.595715311413,8.423205080757)); +#108140 = CARTESIAN_POINT('',(25.895715311413,8.25)); +#108141 = CARTESIAN_POINT('',(25.595715311413,8.076794919243)); +#108142 = CARTESIAN_POINT('',(25.295715311413,7.903589838486)); +#108143 = CARTESIAN_POINT('',(25.295715311413,8.25)); +#108144 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108145 = PCURVE('',#108146,#108151); +#108146 = CYLINDRICAL_SURFACE('',#108147,0.2); +#108147 = AXIS2_PLACEMENT_3D('',#108148,#108149,#108150); +#108148 = CARTESIAN_POINT('',(11.75,45.75,-0.8)); +#108149 = DIRECTION('',(0.,0.,1.)); +#108150 = DIRECTION('',(1.,0.,-0.)); +#108151 = DEFINITIONAL_REPRESENTATION('',(#108152),#108156); +#108152 = LINE('',#108153,#108154); +#108153 = CARTESIAN_POINT('',(0.,0.8)); +#108154 = VECTOR('',#108155,1.); +#108155 = DIRECTION('',(1.,0.)); +#108156 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#108157 = FACE_BOUND('',#108158,.T.); +#108158 = EDGE_LOOP('',(#108159)); +#108159 = ORIENTED_EDGE('',*,*,#108160,.T.); +#108160 = EDGE_CURVE('',#108161,#108161,#108163,.T.); +#108161 = VERTEX_POINT('',#108162); +#108162 = CARTESIAN_POINT('',(9.45,48.25,0.)); +#108163 = SURFACE_CURVE('',#108164,(#108169,#108180),.PCURVE_S1.); +#108164 = CIRCLE('',#108165,0.2); +#108165 = AXIS2_PLACEMENT_3D('',#108166,#108167,#108168); +#108166 = CARTESIAN_POINT('',(9.25,48.25,0.)); +#108167 = DIRECTION('',(0.,0.,1.)); +#108168 = DIRECTION('',(1.,0.,-0.)); +#108169 = PCURVE('',#106070,#108170); +#108170 = DEFINITIONAL_REPRESENTATION('',(#108171),#108179); +#108171 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#108172,#108173,#108174, + #108175,#108176,#108177,#108178),.UNSPECIFIED.,.T.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) 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CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#110981 = CARTESIAN_POINT('',(-60.45428468858,-6.5)); +#110982 = CARTESIAN_POINT('',(-60.45428468858,-6.153589838486)); +#110983 = CARTESIAN_POINT('',(-60.15428468858,-6.326794919243)); +#110984 = CARTESIAN_POINT('',(-59.85428468858,-6.5)); +#110985 = CARTESIAN_POINT('',(-60.15428468858,-6.673205080757)); +#110986 = CARTESIAN_POINT('',(-60.45428468858,-6.846410161514)); +#110987 = CARTESIAN_POINT('',(-60.45428468858,-6.5)); +#110988 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#110989 = PCURVE('',#108741,#110990); +#110990 = DEFINITIONAL_REPRESENTATION('',(#110991),#110995); +#110991 = LINE('',#110992,#110993); +#110992 = CARTESIAN_POINT('',(0.,2.4)); +#110993 = VECTOR('',#110994,1.); +#110994 = DIRECTION('',(1.,0.)); +#110995 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#110996 = FACE_BOUND('',#110997,.F.); +#110997 = EDGE_LOOP('',(#110998)); +#110998 = ORIENTED_EDGE('',*,*,#110999,.T.); +#110999 = EDGE_CURVE('',#111000,#111000,#111002,.T.); +#111000 = VERTEX_POINT('',#111001); +#111001 = CARTESIAN_POINT('',(98.45,29.25,1.6)); +#111002 = SURFACE_CURVE('',#111003,(#111008,#111019),.PCURVE_S1.); +#111003 = CIRCLE('',#111004,0.2); +#111004 = AXIS2_PLACEMENT_3D('',#111005,#111006,#111007); +#111005 = CARTESIAN_POINT('',(98.25,29.25,1.6)); +#111006 = DIRECTION('',(0.,0.,1.)); +#111007 = DIRECTION('',(1.,0.,-0.)); +#111008 = PCURVE('',#106016,#111009); +#111009 = DEFINITIONAL_REPRESENTATION('',(#111010),#111018); +#111010 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#111011,#111012,#111013, + #111014,#111015,#111016,#111017),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#111011 = CARTESIAN_POINT('',(-61.20428468858,-8.25)); +#111012 = CARTESIAN_POINT('',(-61.20428468858,-7.903589838486)); +#111013 = CARTESIAN_POINT('',(-60.90428468858,-8.076794919243)); +#111014 = CARTESIAN_POINT('',(-60.60428468858,-8.25)); +#111015 = CARTESIAN_POINT('',(-60.90428468858,-8.423205080757)); +#111016 = CARTESIAN_POINT('',(-61.20428468858,-8.596410161514)); +#111017 = CARTESIAN_POINT('',(-61.20428468858,-8.25)); +#111018 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111019 = PCURVE('',#108776,#111020); +#111020 = DEFINITIONAL_REPRESENTATION('',(#111021),#111025); +#111021 = LINE('',#111022,#111023); +#111022 = CARTESIAN_POINT('',(0.,2.4)); +#111023 = VECTOR('',#111024,1.); +#111024 = DIRECTION('',(1.,0.)); +#111025 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111026 = FACE_BOUND('',#111027,.F.); +#111027 = EDGE_LOOP('',(#111028)); +#111028 = ORIENTED_EDGE('',*,*,#111029,.T.); +#111029 = EDGE_CURVE('',#111030,#111030,#111032,.T.); +#111030 = VERTEX_POINT('',#111031); +#111031 = CARTESIAN_POINT('',(99.04,34.96,1.6)); +#111032 = SURFACE_CURVE('',#111033,(#111038,#111049),.PCURVE_S1.); +#111033 = CIRCLE('',#111034,0.75); +#111034 = AXIS2_PLACEMENT_3D('',#111035,#111036,#111037); +#111035 = CARTESIAN_POINT('',(98.29,34.96,1.6)); +#111036 = DIRECTION('',(0.,0.,1.)); +#111037 = DIRECTION('',(1.,0.,-0.)); +#111038 = PCURVE('',#106016,#111039); +#111039 = DEFINITIONAL_REPRESENTATION('',(#111040),#111048); +#111040 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#111041,#111042,#111043, + #111044,#111045,#111046,#111047),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#111041 = CARTESIAN_POINT('',(-61.79428468858,-2.54)); +#111042 = CARTESIAN_POINT('',(-61.79428468858,-1.240961894323)); +#111043 = CARTESIAN_POINT('',(-60.66928468858,-1.890480947162)); +#111044 = CARTESIAN_POINT('',(-59.54428468858,-2.54)); +#111045 = CARTESIAN_POINT('',(-60.66928468858,-3.189519052838)); +#111046 = CARTESIAN_POINT('',(-61.79428468858,-3.839038105677)); +#111047 = CARTESIAN_POINT('',(-61.79428468858,-2.54)); +#111048 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111049 = PCURVE('',#108811,#111050); +#111050 = DEFINITIONAL_REPRESENTATION('',(#111051),#111055); +#111051 = LINE('',#111052,#111053); +#111052 = CARTESIAN_POINT('',(0.,2.4)); +#111053 = VECTOR('',#111054,1.); +#111054 = DIRECTION('',(1.,0.)); +#111055 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111056 = FACE_BOUND('',#111057,.F.); +#111057 = EDGE_LOOP('',(#111058)); +#111058 = ORIENTED_EDGE('',*,*,#111059,.T.); +#111059 = EDGE_CURVE('',#111060,#111060,#111062,.T.); +#111060 = VERTEX_POINT('',#111061); +#111061 = CARTESIAN_POINT('',(93.96,34.96,1.6)); +#111062 = SURFACE_CURVE('',#111063,(#111068,#111079),.PCURVE_S1.); +#111063 = CIRCLE('',#111064,0.75); +#111064 = AXIS2_PLACEMENT_3D('',#111065,#111066,#111067); +#111065 = CARTESIAN_POINT('',(93.21,34.96,1.6)); +#111066 = DIRECTION('',(0.,0.,1.)); +#111067 = DIRECTION('',(1.,0.,-0.)); +#111068 = PCURVE('',#106016,#111069); +#111069 = DEFINITIONAL_REPRESENTATION('',(#111070),#111078); +#111070 = ( BOUNDED_CURVE() B_SPLINE_CURVE(2,(#111071,#111072,#111073, + #111074,#111075,#111076,#111077),.UNSPECIFIED.,.F.,.F.) +B_SPLINE_CURVE_WITH_KNOTS((1,2,2,2,2,1),(-2.094395102393,0., + 2.094395102393,4.188790204786,6.28318530718,8.377580409573), +.UNSPECIFIED.) CURVE() GEOMETRIC_REPRESENTATION_ITEM() +RATIONAL_B_SPLINE_CURVE((1.,0.5,1.,0.5,1.,0.5,1.)) REPRESENTATION_ITEM( + '') ); +#111071 = CARTESIAN_POINT('',(-56.71428468858,-2.54)); +#111072 = CARTESIAN_POINT('',(-56.71428468858,-1.240961894323)); +#111073 = CARTESIAN_POINT('',(-55.58928468858,-1.890480947162)); +#111074 = CARTESIAN_POINT('',(-54.46428468858,-2.54)); +#111075 = CARTESIAN_POINT('',(-55.58928468858,-3.189519052838)); +#111076 = CARTESIAN_POINT('',(-56.71428468858,-3.839038105677)); +#111077 = CARTESIAN_POINT('',(-56.71428468858,-2.54)); +#111078 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111079 = PCURVE('',#108846,#111080); +#111080 = DEFINITIONAL_REPRESENTATION('',(#111081),#111085); +#111081 = LINE('',#111082,#111083); +#111082 = CARTESIAN_POINT('',(0.,2.4)); +#111083 = VECTOR('',#111084,1.); +#111084 = DIRECTION('',(1.,0.)); +#111085 = ( GEOMETRIC_REPRESENTATION_CONTEXT(2) +PARAMETRIC_REPRESENTATION_CONTEXT() REPRESENTATION_CONTEXT('2D SPACE','' + ) ); +#111086 = ADVANCED_FACE('',(#111087),#106130,.T.); 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(hatch edge 0.508) + (priority 1) + (connect_pads thru_hole_only (clearance 0.2)) + (min_thickness 0.2) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 182.25 113.2) (xy 93 113.2) (xy 93 88.2) (xy 182.25 88.2) + ) + ) + ) + (zone (net 0) (net_name "") (layer In2.Cu) (tstamp 5F85653D) (hatch edge 0.508) + (priority 2) + (connect_pads thru_hole_only (clearance 0.2)) + (min_thickness 0.2) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 171.5 105.95) (xy 168.25 109.2) (xy 120.25 109.2) (xy 120.25 88.2) (xy 171.5 88.2) + ) + ) + ) + (zone (net 0) (net_name "") (layer In1.Cu) (tstamp 5F85653A) (hatch edge 0.508) + (priority 6) + (connect_pads yes (clearance 0.2)) + (min_thickness 0.2) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 171.5 105.95) (xy 168.25 109.2) (xy 119.25 109.2) (xy 119.25 88.2) (xy 171.5 88.2) + ) + ) + ) + (zone (net 0) (net_name "") (layer F.Cu) (tstamp 5F856509) (hatch edge 0.508) + (connect_pads (clearance 0.24)) + (min_thickness 0.254) + (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) + (polygon + (pts + (xy 155 144.2) (xy 154.5 142.95) (xy 157 142.45) + ) + ) + (filled_polygon + (pts + (xy 155.05132 143.986341) (xy 154.67462 143.044591) (xy 156.558121 142.667891) + ) + ) + ) +) diff --git a/pcb/casing_top/casing.pro b/pcb/casing_top/casing.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/pcb/casing_top/casing.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] diff --git a/pcb/current-sense/current-sense-cache.lib b/pcb/current-sense/current-sense-cache.lib new file mode 100755 index 0000000..9d0f4e6 --- /dev/null +++ b/pcb/current-sense/current-sense-cache.lib @@ -0,0 +1,696 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Connector_Conn_01x02_Female +# +DEF Connector_Conn_01x02_Female J 0 40 Y N 1 F N +F0 "J" 0 100 50 H V C CNN +F1 "Connector_Conn_01x02_Female" 0 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_1x??_* +$ENDFPLIST +DRAW +A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120 +A 0 0 20 901 -901 1 1 6 N 0 20 0 -20 +P 2 1 1 6 -50 -100 -20 -100 N +P 2 1 1 6 -50 0 -20 0 N +X Pin_1 1 -200 0 150 R 50 50 1 1 P +X Pin_2 2 -200 -100 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Connector_Conn_Coaxial +# +DEF Connector_Conn_Coaxial J 0 40 Y N 1 F N +F0 "J" 10 120 50 H V C CNN +F1 "Connector_Conn_Coaxial" 115 0 50 V V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + *BNC* + *SMA* + *SMB* + *SMC* + *Cinch* +$ENDFPLIST +DRAW +A -2 0 71 1636 0 0 1 10 N -70 20 70 0 +A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20 +C 0 0 20 0 1 8 N +P 2 0 1 0 -100 0 -20 0 N +P 2 0 1 0 0 -100 0 -70 N +X In 1 -200 0 100 R 50 50 1 1 P +X Ext 2 0 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Connector_Generic_Conn_02x03_Odd_Even +# +DEF Connector_Generic_Conn_02x03_Odd_Even J 0 40 Y N 1 F N +F0 "J" 50 200 50 H V C CNN +F1 "Connector_Generic_Conn_02x03_Odd_Even" 50 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Connector*:*_2x??_* +$ENDFPLIST +DRAW +S -50 -95 0 -105 1 1 6 N +S -50 5 0 -5 1 1 6 N +S -50 105 0 95 1 1 6 N +S -50 150 150 -150 1 1 10 f +S 150 -95 100 -105 1 1 6 N +S 150 5 100 -5 1 1 6 N +S 150 105 100 95 1 1 6 N +X Pin_1 1 -200 100 150 R 50 50 1 1 P +X Pin_2 2 300 100 150 L 50 50 1 1 P +X Pin_3 3 -200 0 150 R 50 50 1 1 P +X Pin_4 4 300 0 150 L 50 50 1 1 P +X Pin_5 5 -200 -100 150 R 50 50 1 1 P +X Pin_6 6 300 -100 150 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Connector_TestPoint +# +DEF Connector_TestPoint TP 0 30 N N 1 F N +F0 "TP" 0 270 50 H V C CNN +F1 "Connector_TestPoint" 0 200 50 H V C CNN +F2 "" 200 0 50 H I C CNN +F3 "" 200 0 50 H I C CNN +$FPLIST + Pin* + Test* +$ENDFPLIST +DRAW +C 0 130 30 0 1 0 N +X 1 1 0 0 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_C +# +DEF Device_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "Device_C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_D +# +DEF Device_D D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "Device_D" 0 -100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + TO-???* + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +P 2 0 1 10 -50 50 -50 -50 N +P 2 0 1 0 50 0 -50 0 N +P 4 0 1 10 50 50 50 -50 -50 0 50 50 N +X K 1 -150 0 100 R 50 50 1 1 P +X A 2 150 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_D_Schottky_x2_Serial_AKC +# +DEF Device_D_Schottky_x2_Serial_AKC D 0 30 Y N 1 F N +F0 "D" 50 -100 50 H V C CNN +F1 "Device_D_Schottky_x2_Serial_AKC" 0 100 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 0 10 0 1 0 F +P 2 0 1 0 -150 0 150 0 N +P 2 0 1 0 0 0 0 -100 N +P 2 0 1 0 250 0 300 0 N +P 3 0 1 10 -50 -50 -50 50 -50 50 N +P 3 0 1 10 150 50 150 -50 150 -50 N +P 4 0 1 10 -50 -50 -30 -50 -30 -40 -30 -40 N +P 4 0 1 10 150 -50 170 -50 170 -40 170 -40 N +P 4 0 1 10 150 50 130 50 130 40 130 40 N +P 5 0 1 10 -70 40 -70 50 -50 50 -50 50 -50 50 N +P 6 0 1 10 -150 50 -50 0 -150 -50 -150 50 -150 50 -150 50 N +P 6 0 1 10 50 50 150 0 50 -50 50 50 50 50 50 50 N +X A 1 -300 0 150 R 50 50 0 1 P +X K 2 300 0 150 L 50 50 0 1 P +X common 3 0 -200 100 U 50 50 0 1 P +ENDDRAW +ENDDEF +# +# Device_Ferrite_Bead_Small +# +DEF Device_Ferrite_Bead_Small FB 0 0 N Y 1 F N +F0 "FB" 75 50 50 H V L CNN +F1 "Device_Ferrite_Bead_Small" 75 -50 50 H V L CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Inductor_* + L_* + *Ferrite* +$ENDFPLIST +DRAW +P 2 0 1 0 0 -50 0 -31 N +P 2 0 1 0 0 35 0 51 N +P 5 0 1 0 -72 11 -44 59 72 -8 44 -56 -72 11 N +X ~ 1 0 100 50 D 50 50 1 1 P +X ~ 2 0 -100 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_L +# +DEF Device_L L 0 40 N N 1 F N +F0 "L" -50 0 50 V V C CNN +F1 "Device_L" 75 0 50 V V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Choke_* + *Coil* + Inductor_* + L_* +$ENDFPLIST +DRAW +A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50 +A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0 +A 0 25 25 -899 899 0 1 0 N 0 0 0 50 +A 0 75 25 -899 899 0 1 0 N 0 50 0 100 +X 1 1 0 150 50 D 50 50 1 1 P +X 2 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_LED_ARGB +# +DEF Device_LED_ARGB D 0 0 Y N 1 F N +F0 "D" 0 370 50 H V C CNN +F1 "Device_LED_ARGB" 0 -350 50 H V C CNN +F2 "" 0 -50 50 H I C CNN +F3 "" 0 -50 50 H I C CNN +$FPLIST + LED* + LED_SMD:* + LED_THT:* +$ENDFPLIST +DRAW +C 80 0 10 0 1 0 F +T 0 -75 -250 50 0 0 0 B Normal 0 C C +T 0 -75 -50 50 0 0 0 G Normal 0 C C +T 0 -75 150 50 0 0 0 R Normal 0 C C +S 50 -50 50 50 0 1 0 N +S 50 50 50 50 0 1 0 N +S 50 150 50 250 0 1 0 N +S 50 250 50 250 0 1 0 N +S 110 330 -110 -300 0 1 10 f +P 2 0 1 0 -50 -200 -100 -200 N +P 2 0 1 0 -50 -200 50 -200 N +P 2 0 1 10 -50 -150 -50 -250 N +P 2 0 1 0 -50 0 -100 0 N +P 2 0 1 10 -50 50 -50 -50 N +P 2 0 1 0 -50 200 -100 200 N +P 2 0 1 0 -50 200 50 200 N +P 2 0 1 10 -50 250 -50 150 N +P 2 0 1 0 50 0 -50 0 N +P 2 0 1 0 50 0 100 0 N +P 3 0 1 0 -50 50 -50 -50 -50 -50 N +P 3 0 1 0 -50 250 -50 150 -50 150 N +P 4 0 1 0 50 -200 80 -200 80 200 50 200 N +P 4 0 1 10 50 -150 50 -250 -50 -200 50 -150 N +P 4 0 1 10 50 50 50 -50 -50 0 50 50 N +P 4 0 1 10 50 250 50 150 -50 200 50 250 N +P 5 0 1 0 -40 -150 20 -90 -10 -90 20 -90 20 -120 N +P 5 0 1 0 -40 50 20 110 -10 110 20 110 20 80 N +P 5 0 1 0 -40 250 20 310 -10 310 20 310 20 280 N +P 5 0 1 0 0 -150 60 -90 30 -90 60 -90 60 -120 N +P 5 0 1 0 0 50 60 110 30 110 60 110 60 80 N +P 5 0 1 0 0 250 60 310 30 310 60 310 60 280 N +X A 1 200 0 100 L 50 50 1 1 P +X RK 2 -200 200 100 R 50 50 1 1 P +X GK 3 -200 0 100 R 50 50 1 1 P +X BK 4 -200 -200 100 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_Net-Tie_2 +# +DEF Device_Net-Tie_2 NT 0 0 N N 1 F N +F0 "NT" 0 50 50 H V C CNN +F1 "Device_Net-Tie_2" 0 -50 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Net*Tie* +$ENDFPLIST +DRAW +P 2 0 1 10 -50 0 50 0 N +X 1 1 -100 0 100 R 50 50 1 1 P +X 2 2 100 0 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_R +# +DEF Device_R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "Device_R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device_R_POT_TRIM_US +# +DEF Device_R_POT_TRIM_US RV 0 40 Y N 1 F N +F0 "RV" -175 0 50 V V C CNN +F1 "Device_R_POT_TRIM_US" -100 0 50 V V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Potentiometer* +$ENDFPLIST +DRAW +P 2 0 1 0 0 -90 0 -100 N +P 2 0 1 0 0 90 0 100 N +P 2 0 1 0 60 30 60 -30 N +P 2 0 1 0 100 0 60 0 N +P 5 0 1 0 0 -30 40 -45 0 -60 -40 -75 0 -90 N +P 5 0 1 0 0 30 40 15 0 0 -40 -15 0 -30 N +P 5 0 1 0 0 90 40 75 0 60 -40 45 0 30 N +X 1 1 0 150 50 D 50 50 1 1 P +X 2 2 150 0 50 L 50 50 1 1 P +X 3 3 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Reference_Voltage_LM4041LP-ADJ +# +DEF Reference_Voltage_LM4041LP-ADJ U 0 1 Y N 1 F N +F0 "U" 100 150 50 H V C CNN +F1 "Reference_Voltage_LM4041LP-ADJ" 0 -125 50 H V C CNN +F2 "Package_TO_SOT_THT:TO-92_Inline" 0 -200 50 H I C CIN +F3 "" 100 150 50 H I C CIN +$FPLIST + TO?92* +$ENDFPLIST +DRAW +P 2 0 1 0 0 100 0 20 N +P 3 0 1 0 -50 0 0 0 50 0 N +P 4 0 1 8 -50 -50 25 0 -50 50 -50 -50 N +P 4 0 1 8 0 -50 25 -50 25 50 50 50 N +X FB 1 0 200 100 D 50 50 1 1 I +X K 2 150 0 100 L 50 50 1 1 P +X A 3 -150 0 100 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Switch_SW_Push +# +DEF Switch_SW_Push SW 0 40 N N 1 F N +F0 "SW" 50 100 50 H V L CNN +F1 "Switch_SW_Push" 0 -60 50 H V C CNN +F2 "" 0 200 50 H I C CNN +F3 "" 0 200 50 H I C CNN +DRAW +C -80 0 20 0 1 0 N +C 80 0 20 0 1 0 N +P 2 0 1 0 0 50 0 120 N +P 2 0 1 0 100 50 -100 50 N +X 1 1 -200 0 100 R 50 50 0 1 P +X 2 2 200 0 100 L 50 50 0 1 P +ENDDRAW +ENDDEF +# +# Switch_SW_SPDT +# +DEF Switch_SW_SPDT SW 0 0 Y N 1 F N +F0 "SW" 0 170 50 H V C CNN +F1 "Switch_SW_SPDT" 0 -200 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C -80 0 20 0 0 0 N +C 80 -100 20 0 0 0 N +C 80 100 20 0 1 0 N +P 2 0 1 0 -60 10 65 90 N +X A 1 200 100 100 L 50 50 1 1 P +X B 2 -200 0 100 R 50 50 1 1 P +X C 3 200 -100 100 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Transistor_FET_DMC2053UVT +# +DEF Transistor_FET_DMC2053UVT Q 0 20 Y N 2 F N +F0 "Q" 125 50 50 H V L CNN +F1 "Transistor_FET_DMC2053UVT" 125 -50 50 H V L CNN +F2 "Package_TO_SOT_SMD:TSOT-23-6" -50 -475 50 H I C CNN +F3 "" -100 0 50 H I C CNN +ALIAS DMC3071LVT +$FPLIST + TSOT?23* +$ENDFPLIST +DRAW +C -35 0 110 0 1 10 N +C 0 -70 10 0 1 0 F +C 0 70 10 0 1 0 F +P 2 0 1 0 -90 0 -200 0 N +P 2 0 1 10 -90 75 -90 -75 N +P 2 0 1 10 -70 -50 -70 -90 N +P 2 0 1 10 -70 20 -70 -20 N +P 2 0 1 10 -70 90 -70 50 N +P 2 0 1 0 0 100 0 70 N +P 3 0 1 0 0 -100 0 0 -70 0 N +P 4 0 1 0 -70 -70 30 -70 30 70 -70 70 N +P 4 1 1 0 -60 0 -20 15 -20 -15 -60 0 F +P 4 1 1 0 10 20 15 15 45 15 50 10 N +P 4 1 1 0 30 15 15 -10 45 -10 30 15 N +P 4 2 1 0 -10 0 -50 15 -50 -15 -10 0 F +P 4 2 1 0 10 -20 15 -15 45 -15 50 -10 N +P 4 2 1 0 30 -15 15 10 45 10 30 -15 N +X G 1 -300 0 100 R 50 50 1 1 P +X S 5 0 -200 100 U 50 50 1 1 P +X D 6 0 200 100 D 50 50 1 1 P +X S 2 0 -200 100 U 50 50 2 1 P +X G 3 -300 0 100 R 50 50 2 1 P +X D 4 0 200 100 D 50 50 2 1 P +ENDDRAW +ENDDEF +# +# power_+5V +# +DEF power_+5V #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -150 50 H I C CNN +F1 "power_+5V" 0 140 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +5V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power_GND +# +DEF power_GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power_GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power_GNDREF +# +DEF power_GNDREF #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power_GNDREF" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 2 0 1 0 -25 -75 25 -75 N +P 2 0 1 0 -5 -100 5 -100 N +P 2 0 1 0 0 -50 0 0 N +P 2 0 1 0 50 -50 -50 -50 N +X GNDREF 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_AD8129 +# +DEF wbraun_ic_lib_AD8129 U 0 40 Y Y 1 F N +F0 "U" -250 -400 50 H V C CNN +F1 "wbraun_ic_lib_AD8129" -150 400 50 H V C CNN +F2 "" 150 -1000 50 H I C CNN +F3 "" 150 -1000 50 H I C CNN +$FPLIST + SO-8 +$ENDFPLIST +DRAW +C 0 0 50 0 0 0 N +T 0 -170 195 40 0 0 0 + Normal 0 C C +T 0 0 5 40 0 0 0 + Normal 0 C C +T 0 -170 110 40 0 0 0 - Normal 0 C C +T 0 -170 -105 40 0 1 0 + Normal 0 C C +T 0 -170 -190 40 0 1 0 - Normal 0 C C +S -300 350 300 -350 0 0 0 N +P 2 0 0 0 -300 -200 -200 -200 N +P 2 0 0 0 -300 -100 -200 -100 N +P 2 0 0 0 -300 100 -200 100 N +P 2 0 0 0 -300 200 -200 200 N +P 2 0 0 0 -200 250 -200 50 N +P 2 0 0 0 -50 -150 0 -150 N +P 2 0 0 0 -50 150 0 150 N +P 2 0 0 0 0 -150 0 -50 N +P 2 0 0 0 0 150 0 50 N +P 2 0 0 0 50 0 100 0 N +P 2 0 0 0 100 100 100 -100 N +P 2 0 0 0 100 100 250 0 N +P 2 0 0 0 250 0 100 -100 N +P 2 0 0 0 250 0 300 0 N +P 3 0 0 0 -200 50 -50 150 -200 250 N +P 4 0 0 0 -200 -50 -200 -250 -50 -150 -200 -50 N +X ~ 1 -400 200 100 R 50 50 1 1 P +X -VS 2 400 -300 100 L 50 50 1 1 W +X ~PD 3 400 -200 100 L 50 50 1 1 I +X ~ 4 -400 -100 100 R 50 50 1 1 P +X ~ 5 -400 -200 100 R 50 50 1 1 P +X ~ 6 400 0 100 L 50 50 1 1 O +X +VS 7 400 250 100 L 50 50 1 1 W +X ~ 8 -400 100 100 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_HMC1041Z +# +DEF wbraun_ic_lib_HMC1041Z U 0 40 Y Y 1 F N +F0 "U" -250 800 50 H V C CNN +F1 "wbraun_ic_lib_HMC1041Z" -75 -800 50 H V C CNN +F2 "" 25 0 50 H I C CNN +F3 "" 25 0 50 H I C CNN +$FPLIST + HMC1041Z +$ENDFPLIST +DRAW +T 0 230 -10 40 0 0 0 V+ Normal 0 C C +T 0 -150 -600 50 0 1 0 + Normal 0 C C +T 0 -150 -450 50 0 1 0 + Normal 0 C C +T 0 50 200 50 0 1 0 + Normal 0 C C +T 0 50 -275 50 0 1 0 - Normal 0 C C +T 0 150 -600 50 0 1 0 - Normal 0 C C +T 0 150 -450 50 0 1 0 - Normal 0 C C +T 0 0 -50 50 0 1 0 A Normal 0 C C +T 0 0 -500 50 0 1 0 OFF Normal 0 C C +T 0 0 -650 50 0 1 0 S/R Normal 0 C C +S -300 300 300 -750 0 1 0 N +P 2 0 0 0 -255 10 -195 10 N +P 2 0 0 0 -245 0 -205 0 N +P 2 0 0 0 -235 -10 -215 -10 N +P 2 0 0 0 -225 -20 -225 -20 N +P 2 0 0 0 -225 10 -225 25 N +P 2 0 0 0 -200 -50 -300 -50 N +P 2 0 0 0 -100 -650 -300 -650 N +P 2 0 0 0 -100 -500 -300 -500 N +P 2 0 0 0 100 -650 300 -650 N +P 2 0 0 0 100 -500 300 -500 N +P 2 0 0 0 200 -50 300 -50 N +P 3 0 0 0 0 -275 0 -300 -300 -300 N +P 3 0 0 0 0 175 0 200 -300 200 N +P 3 0 1 0 -150 0 -200 -50 -150 -100 N +P 2 1 1 0 -125 -75 -175 -125 N +P 2 1 1 0 0 -250 0 -275 N +P 2 1 1 0 0 150 0 175 N +P 2 1 1 0 150 -100 200 -50 N +P 2 1 1 0 200 -50 150 0 N +P 3 1 1 0 -50 100 0 150 50 100 N +P 4 1 1 0 -125 -75 -25 -175 -75 -225 -175 -125 N +P 5 1 1 0 -100 -600 100 -600 100 -700 -100 -700 -100 -600 N +P 5 1 1 0 -100 -450 -100 -550 100 -550 100 -450 -100 -450 N +P 5 1 1 0 -75 125 -25 75 -125 -25 -175 25 -75 125 N +P 6 1 1 0 150 0 175 25 75 125 25 75 125 -25 150 0 N +P 8 1 1 0 -50 -200 0 -250 50 -200 25 -175 125 -75 175 -125 75 -225 50 -200 N +X ~ 1 400 -500 100 L 50 50 1 1 P +X ~ 2 400 -50 100 L 50 50 1 1 P +X ~ 3 -400 -500 100 R 50 50 1 1 P +X ~ 4 -400 200 100 R 50 50 1 1 P +X ~ 5 -400 -300 100 R 50 50 1 1 P +X ~ 6 -400 -50 100 R 50 50 1 1 P +X ~ 7 400 -650 100 L 50 50 1 1 P +X ~ 8 -400 -650 100 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_MCP1640 +# +DEF wbraun_ic_lib_MCP1640 U 0 40 Y Y 1 F N +F0 "U" -200 300 60 H V C CNN +F1 "wbraun_ic_lib_MCP1640" 0 -300 50 H V C CNN +F2 "" -25 -550 60 H V C CNN +F3 "" -25 -550 60 H V C CNN +$FPLIST + SOT-23-6 +$ENDFPLIST +DRAW +S -250 250 250 -250 1 1 0 N +X SW 1 350 150 100 L 50 50 1 1 P +X GND 2 -350 -150 100 R 50 50 1 1 W +X EN 3 -350 50 100 R 50 50 1 1 I +X VFB 4 350 -150 100 L 50 50 1 1 I +X VOUT 5 350 50 100 L 50 50 1 1 w +X VIN 6 -350 150 100 R 50 50 1 1 W +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_PIC16F1776-ISS +# +DEF wbraun_ic_lib_PIC16F1776-ISS U 0 40 Y Y 1 F N +F0 "U" -450 -950 50 H V C CNN +F1 "wbraun_ic_lib_PIC16F1776-ISS" -150 1000 50 H V C CNN +F2 "" -550 450 50 H I C CNN +F3 "" -550 450 50 H I C CNN +$FPLIST + SSOP-28_5.3x10.2mm_P0.65mm +$ENDFPLIST +DRAW +S -500 900 500 -900 0 1 0 N +X RE3/MCLR 1 -600 -100 100 R 50 50 1 1 B +X RA6 10 -600 200 100 R 50 50 1 1 B +X RC0 11 600 -100 100 L 50 50 1 1 B +X RC1 12 600 -200 100 L 50 50 1 1 B +X RC2 13 600 -300 100 L 50 50 1 1 B +X RC3 14 600 -400 100 L 50 50 1 1 B +X RC4 15 600 -500 100 L 50 50 1 1 B +X RC5 16 600 -600 100 L 50 50 1 1 B +X RC6 17 600 -700 100 L 50 50 1 1 B +X RC7 18 600 -800 100 L 50 50 1 1 B +X VSS 19 -600 -700 100 R 50 50 1 1 W +X RA0 2 -600 800 100 R 50 50 1 1 B +X VDD 20 -600 -500 100 R 50 50 1 1 W +X RB0 21 600 800 100 L 50 50 1 1 B +X RB1 22 600 700 100 L 50 50 1 1 B +X RB2 23 600 600 100 L 50 50 1 1 B +X RB3 24 600 500 100 L 50 50 1 1 B +X RB4 25 600 400 100 L 50 50 1 1 B +X RB5 26 600 300 100 L 50 50 1 1 B +X RB6/ICSPCLK 27 600 200 100 L 50 50 1 1 B +X RB7/ICSPDAT 28 600 100 100 L 50 50 1 1 B +X RA1 3 -600 700 100 R 50 50 1 1 B +X RA2 4 -600 600 100 R 50 50 1 1 B +X RA3 5 -600 500 100 R 50 50 1 1 B +X RA4 6 -600 400 100 R 50 50 1 1 B +X RA5 7 -600 300 100 R 50 50 1 1 B +X VSS 8 -600 -600 100 R 50 50 1 1 W +X RA7 9 -600 100 100 R 50 50 1 1 B +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_TLV3542 +# +DEF wbraun_ic_lib_TLV3542 U 0 5 Y Y 3 L N +F0 "U" 0 200 50 H V L CNN +F1 "wbraun_ic_lib_TLV3542" 0 -200 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +ALIAS TLV3542 +DRAW +P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f +P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f +X ~ 1 300 0 100 L 50 50 1 1 O +X - 2 -300 -100 100 R 50 50 1 1 I +X + 3 -300 100 100 R 50 50 1 1 I +X + 5 -300 100 100 R 50 50 2 1 I +X - 6 -300 -100 100 R 50 50 2 1 I +X ~ 7 300 0 100 L 50 50 2 1 O +X V- 4 -100 -300 150 U 50 50 3 1 W +X V+ 8 -100 300 150 D 50 50 3 1 W +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_TMUX1219 +# +DEF wbraun_ic_lib_TMUX1219 U 0 40 Y Y 1 F N +F0 "U" -350 -400 50 H V C CNN +F1 "wbraun_ic_lib_TMUX1219" -125 400 50 H V C CNN +F2 "" -100 75 50 H I C CNN +F3 "" -100 75 50 H I C CNN +$FPLIST + SOT-23-6 + SOT-363_SC-70-6 +$ENDFPLIST +DRAW +C 75 150 15 0 0 0 N +S -400 350 400 -350 0 0 0 N +P 2 0 0 0 -175 250 -200 250 N +P 2 0 0 0 -125 150 -200 150 N +P 2 0 0 0 -100 175 -100 125 N +P 2 0 0 0 60 150 -15 165 N +P 2 0 0 0 75 -200 100 -200 N +P 2 0 0 0 75 -175 75 -200 N +P 2 0 0 0 75 -125 75 -150 N +P 2 0 0 0 75 -75 75 -100 N +P 2 0 0 0 75 -25 75 -50 N +P 2 0 0 0 75 25 75 0 N +P 2 0 0 0 75 75 75 50 N +P 2 0 0 0 75 125 75 100 N +P 2 0 0 0 90 150 175 150 N +P 2 0 0 0 125 -200 150 -200 N +P 3 0 0 0 -100 175 -75 150 -100 125 N +P 3 0 0 0 -50 100 -50 50 -200 50 N +P 3 0 0 0 -50 200 -50 250 -175 250 N +P 4 0 0 0 -50 125 -75 100 -25 100 -50 125 N +P 4 0 0 0 -50 175 -75 200 -25 200 -50 175 N +X SEL 1 500 -200 100 L 50 50 1 1 I +X VDD 2 -500 -150 100 R 50 50 1 1 W +X GND 3 -500 -250 100 R 50 50 1 1 W +X S1 4 -500 250 100 R 50 50 1 1 P +X D 5 500 150 100 L 50 50 1 1 P +X S2 6 -500 50 100 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# wbraun_ic_lib_mounting-hole-grounded +# +DEF wbraun_ic_lib_mounting-hole-grounded J 0 40 Y Y 1 F N +F0 "J" 350 0 60 H V C CNN +F1 "wbraun_ic_lib_mounting-hole-grounded" 100 350 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +C 0 0 150 0 1 0 N +C 0 0 250 0 1 0 N +X ~ 1 0 -450 200 U 0 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/pcb/current-sense/current-sense.kicad_pcb b/pcb/current-sense/current-sense.kicad_pcb new file mode 100644 index 0000000..9380199 --- /dev/null +++ b/pcb/current-sense/current-sense.kicad_pcb @@ -0,0 +1,9281 @@ +(kicad_pcb (version 20171130) (host pcbnew 5.1.8-db9833491~87~ubuntu20.04.1) + + (general + (thickness 1.6) + (drawings 29) + (tracks 1038) + (zones 0) + (modules 108) + (nets 71) + ) + + (page A4) + (layers + (0 F.Cu signal) + (1 In1.Cu signal) + (2 In2.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user hide) + (33 F.Adhes user hide) + (34 B.Paste user hide) + (35 F.Paste user hide) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user hide) + (41 Cmts.User user hide) + (42 Eco1.User user) + (43 Eco2.User user hide) + (44 Edge.Cuts user) + (45 Margin user hide) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user hide) + (49 F.Fab user hide) + ) + + (setup + (last_trace_width 0.127) + (user_trace_width 0.127) + (user_trace_width 0.16) + (user_trace_width 0.24) + (user_trace_width 0.36) + (user_trace_width 0.64) + (user_trace_width 1) + (trace_clearance 0.127) + (zone_clearance 0.24) + (zone_45_only no) + (trace_min 0.127) + (via_size 0.458) + (via_drill 0.254) + (via_min_size 0.458) + (via_min_drill 0.254) + (user_via 0.6 0.3) + (user_via 0.8 0.4) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (edge_width 0.15) + (segment_width 0.2) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1 1) + (pad_drill 0) + (pad_to_mask_clearance 0.05) + (solder_mask_min_width 0.099) + (aux_axis_origin 0 0) + (visible_elements FFF9FF3F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions true) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference false) + (plotvalue false) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "../gerbers/current-sense-gerbers/")) + ) + + (net 0 "") + (net 1 GND) + (net 2 "Net-(C1-Pad2)") + (net 3 GNDREF) + (net 4 "Net-(C3-Pad1)") + (net 5 /SR) + (net 6 "Net-(C4-Pad1)") + (net 7 /STAGE1_MON) + (net 8 /DAC5_OUT) + (net 9 /STAGE2_MON) + (net 10 /VOS2) + (net 11 +5V) + (net 12 /MCLR) + (net 13 /ISPDAT) + (net 14 /ISPCLK) + (net 15 /SR_IN) + (net 16 /OPA1_OUT) + (net 17 /AMR+) + (net 18 /AMR-) + (net 19 /OPA2IN-) + (net 20 /SW1) + (net 21 /SW2) + (net 22 "Net-(D1-Pad3)") + (net 23 "Net-(D1-Pad4)") + (net 24 /LEG_R) + (net 25 /LED_B) + (net 26 /LED_G) + (net 27 "Net-(C2-Pad1)") + (net 28 "Net-(C6-Pad2)") + (net 29 "Net-(C6-Pad1)") + (net 30 "Net-(J6-Pad1)") + (net 31 "Net-(R7-Pad1)") + (net 32 "Net-(R12-Pad2)") + (net 33 "Net-(R18-Pad1)") + (net 34 "Net-(R26-Pad1)") + (net 35 /MUX_SEL_1) + (net 36 /VIN_SENSE) + (net 37 /MUX_SEL_2) + (net 38 "Net-(C4-Pad2)") + (net 39 "Net-(C7-Pad2)") + (net 40 /DAC7_OUT) + (net 41 "Net-(R13-Pad2)") + (net 42 "Net-(R14-Pad1)") + (net 43 "Net-(R17-Pad1)") + (net 44 "Net-(R19-Pad1)") + (net 45 /DAC1_OUT) + (net 46 "Net-(J7-Pad2)") + (net 47 "Net-(R21-Pad2)") + (net 48 "Net-(D1-Pad2)") + (net 49 /VOS1) + (net 50 /VSW) + (net 51 "Net-(C25-Pad1)") + (net 52 "Net-(C26-Pad1)") + (net 53 "Net-(C27-Pad1)") + (net 54 "Net-(C28-Pad2)") + (net 55 /VBIAS+) + (net 56 /VBIAS-) + (net 57 "Net-(R32-Pad2)") + (net 58 "Net-(R34-Pad2)") + (net 59 "Net-(C31-Pad1)") + (net 60 "Net-(C32-Pad1)") + (net 61 "Net-(FB2-Pad2)") + (net 62 "Net-(C35-Pad2)") + (net 63 "Net-(R38-Pad1)") + (net 64 /VIN) + (net 65 /5V_INT) + (net 66 "Net-(J3-Pad6)") + (net 67 /DC_EN) + (net 68 "Net-(SW3-Pad3)") + (net 69 "Net-(U1-Pad3)") + (net 70 "Net-(U4-Pad5)") + + (net_class Default "This is the default net class." + (clearance 0.127) + (trace_width 0.127) + (via_dia 0.458) + (via_drill 0.254) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +5V) + (add_net /5V_INT) + (add_net /AMR+) + (add_net /AMR-) + (add_net /DAC1_OUT) + (add_net /DAC5_OUT) + (add_net /DAC7_OUT) + (add_net /DC_EN) + (add_net /ISPCLK) + (add_net /ISPDAT) + (add_net /LED_B) + (add_net /LED_G) + (add_net /LEG_R) + (add_net /MCLR) + (add_net /MUX_SEL_1) + (add_net /MUX_SEL_2) + (add_net /OPA1_OUT) + (add_net /OPA2IN-) + (add_net /SR) + (add_net /SR_IN) + (add_net /STAGE1_MON) + (add_net /STAGE2_MON) + (add_net /SW1) + (add_net /SW2) + (add_net /VBIAS+) + (add_net /VBIAS-) + (add_net /VIN) + (add_net /VIN_SENSE) + (add_net /VOS1) + (add_net /VOS2) + (add_net /VSW) + (add_net GND) + (add_net GNDREF) + (add_net "Net-(C1-Pad2)") + (add_net "Net-(C2-Pad1)") + (add_net "Net-(C25-Pad1)") + (add_net "Net-(C26-Pad1)") + (add_net "Net-(C27-Pad1)") + (add_net "Net-(C28-Pad2)") + (add_net "Net-(C3-Pad1)") + (add_net "Net-(C31-Pad1)") + (add_net "Net-(C32-Pad1)") + (add_net "Net-(C35-Pad2)") + (add_net "Net-(C4-Pad1)") + (add_net "Net-(C4-Pad2)") + (add_net "Net-(C6-Pad1)") + (add_net "Net-(C6-Pad2)") + (add_net "Net-(C7-Pad2)") + (add_net "Net-(D1-Pad2)") + (add_net "Net-(D1-Pad3)") + (add_net "Net-(D1-Pad4)") + (add_net "Net-(FB2-Pad2)") + (add_net "Net-(J3-Pad6)") + (add_net "Net-(J6-Pad1)") + (add_net "Net-(J7-Pad2)") + (add_net "Net-(R12-Pad2)") + (add_net "Net-(R13-Pad2)") + (add_net "Net-(R14-Pad1)") + (add_net "Net-(R17-Pad1)") + (add_net "Net-(R18-Pad1)") + (add_net "Net-(R19-Pad1)") + (add_net "Net-(R21-Pad2)") + (add_net "Net-(R26-Pad1)") + (add_net "Net-(R32-Pad2)") + (add_net "Net-(R34-Pad2)") + (add_net "Net-(R38-Pad1)") + (add_net "Net-(R7-Pad1)") + (add_net "Net-(SW3-Pad3)") + (add_net "Net-(U1-Pad3)") + (add_net "Net-(U4-Pad5)") + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 5FD2F771) + (at 56.75 -42 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5FD84855) + (attr smd) + (fp_text reference C36 (at 0 -1.43) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.775 0 180) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 36 /VIN_SENSE)) + (pad 1 smd roundrect (at -0.775 0 180) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 5FD2DED0) + (at 70.45 -43.45 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5FE03992) + (attr smd) + (fp_text reference R40 (at 0 -1.43) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4125) (end -0.8 -0.4125) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4125) (end 0.8 -0.4125) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4125) (end 0.8 0.4125) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4125) (end -0.8 0.4125) (layer F.Fab) (width 0.1)) + (fp_line (start -0.237258 -0.5225) (end 0.237258 -0.5225) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.237258 0.5225) (end 0.237258 0.5225) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.825 0 180) (size 0.8 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.825 0 180) (size 0.8 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 67 /DC_EN)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Diode_SMD:D_SMA (layer F.Cu) (tedit 586432E5) (tstamp 5F42401E) + (at 83.75 -38 270) + (descr "Diode SMA (DO-214AC)") + (tags "Diode SMA (DO-214AC)") + (path /5FC332EB) + (attr smd) + (fp_text reference D4 (at 0 -2.5 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value B320AF-13 (at 0 2.6 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.4 -1.65) (end 2 -1.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.4 1.65) (end 2 1.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.64944 0.00102) (end 0.50118 -0.79908) (layer F.Fab) (width 0.1)) + (fp_line (start -0.64944 0.00102) (end 0.50118 0.75032) (layer F.Fab) (width 0.1)) + (fp_line (start 0.50118 0.75032) (end 0.50118 -0.79908) (layer F.Fab) (width 0.1)) + (fp_line (start -0.64944 -0.79908) (end -0.64944 0.80112) (layer F.Fab) (width 0.1)) + (fp_line (start 0.50118 0.00102) (end 1.4994 0.00102) (layer F.Fab) (width 0.1)) + (fp_line (start -0.64944 0.00102) (end -1.55114 0.00102) (layer F.Fab) (width 0.1)) + (fp_line (start -3.5 1.75) (end -3.5 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.5 1.75) (end -3.5 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.5 -1.75) (end 3.5 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.5 -1.75) (end 3.5 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.3 -1.5) (end -2.3 -1.5) (layer F.Fab) (width 0.1)) + (fp_line (start 2.3 -1.5) (end 2.3 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start -2.3 1.5) (end -2.3 -1.5) (layer F.Fab) (width 0.1)) + (fp_line (start 2.3 1.5) (end -2.3 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start -3.4 -1.65) (end -3.4 1.65) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 -2.5 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) + (net 64 /VIN)) + (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:TRIMMER_PVG3A (layer F.Cu) (tedit 5F704452) (tstamp 5F70BF15) + (at 20 -45.5 270) + (descr "trimmer resistor") + (path /5F7A1D58) + (fp_text reference RV1 (at 0 0.5 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 -0.5 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1 -2) (end 2 -2) (layer F.SilkS) (width 0.15)) + (fp_line (start 2 -2) (end 2 2) (layer F.SilkS) (width 0.15)) + (fp_line (start -1 -2) (end -2 -2) (layer F.SilkS) (width 0.15)) + (fp_line (start -2 -2) (end -2 2) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.25 -2.25) (end 2.25 -2.25) (layer F.CrtYd) (width 0.12)) + (fp_line (start 2.25 -2.25) (end 2.25 2.25) (layer F.CrtYd) (width 0.12)) + (fp_line (start 2.25 2.25) (end -2.25 2.25) (layer F.CrtYd) (width 0.12)) + (fp_line (start -2.25 2.25) (end -2.25 -2.25) (layer F.CrtYd) (width 0.12)) + (pad 3 smd rect (at 1.15 1.65 270) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) + (net 63 "Net-(R38-Pad1)")) + (pad 2 smd rect (at 0 -1.65 270) (size 1.4 0.9) (layers F.Cu F.Paste F.Mask) + (net 41 "Net-(R13-Pad2)")) + (pad 1 smd rect (at -1.15 1.65 270) (size 1.1 0.9) (layers F.Cu F.Paste F.Mask) + (net 41 "Net-(R13-Pad2)")) + (model ${WBRAUN_LIB_DIR}/3D_Models/TRIMMER_PVG3A.STEP + (offset (xyz 0 -1.8 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F737BE6) + (at 75.45 -35.4) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F86ABB6) + (attr smd) + (fp_text reference R39 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value DNP (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 50 /VSW)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 62 "Net-(C35-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F740A80) + (at 16.75 -45.25 90) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F7F2B05) + (attr smd) + (fp_text reference R38 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 6.81k (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 41 "Net-(R13-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 63 "Net-(R38-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical (layer B.Cu) (tedit 5C28146C) (tstamp 5F732859) + (at 88.5 -46.7 180) + (descr "JST XH series connector, B2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator") + (tags "connector JST XH vertical") + (path /5F910CA0) + (fp_text reference J8 (at 1.25 3.55) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value B2B-XH-A (at 1.25 -4.6) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -2.45 2.35) (end -2.45 -3.4) (layer B.Fab) (width 0.1)) + (fp_line (start -2.45 -3.4) (end 4.95 -3.4) (layer B.Fab) (width 0.1)) + (fp_line (start 4.95 -3.4) (end 4.95 2.35) (layer B.Fab) (width 0.1)) + (fp_line (start 4.95 2.35) (end -2.45 2.35) (layer B.Fab) (width 0.1)) + (fp_line (start -2.56 2.46) (end -2.56 -3.51) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.56 -3.51) (end 5.06 -3.51) (layer B.SilkS) (width 0.12)) + (fp_line (start 5.06 -3.51) (end 5.06 2.46) (layer B.SilkS) (width 0.12)) + (fp_line (start 5.06 2.46) (end -2.56 2.46) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.95 2.85) (end -2.95 -3.9) (layer B.CrtYd) (width 0.05)) + (fp_line (start -2.95 -3.9) (end 5.45 -3.9) (layer B.CrtYd) (width 0.05)) + (fp_line (start 5.45 -3.9) (end 5.45 2.85) (layer B.CrtYd) (width 0.05)) + (fp_line (start 5.45 2.85) (end -2.95 2.85) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.625 2.35) (end 0 1.35) (layer B.Fab) (width 0.1)) + (fp_line (start 0 1.35) (end 0.625 2.35) (layer B.Fab) (width 0.1)) + (fp_line (start 0.75 2.45) (end 0.75 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.75 1.7) (end 1.75 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 1.75 1.7) (end 1.75 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start 1.75 2.45) (end 0.75 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.55 2.45) (end -2.55 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.55 1.7) (end -0.75 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.75 1.7) (end -0.75 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.75 2.45) (end -2.55 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.25 2.45) (end 3.25 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.25 1.7) (end 5.05 1.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 5.05 1.7) (end 5.05 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start 5.05 2.45) (end 3.25 2.45) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.55 0.2) (end -1.8 0.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.8 0.2) (end -1.8 -2.75) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.8 -2.75) (end 1.25 -2.75) (layer B.SilkS) (width 0.12)) + (fp_line (start 5.05 0.2) (end 4.3 0.2) (layer B.SilkS) (width 0.12)) + (fp_line (start 4.3 0.2) (end 4.3 -2.75) (layer B.SilkS) (width 0.12)) + (fp_line (start 4.3 -2.75) (end 1.25 -2.75) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.6 2.75) (end -2.85 2.75) (layer B.SilkS) (width 0.12)) + (fp_line (start -2.85 2.75) (end -2.85 1.5) (layer B.SilkS) (width 0.12)) + (fp_text user %R (at 1.25 -2.7) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 2 thru_hole oval (at 2.5 0 180) (size 1.7 2) (drill 1) (layers *.Cu *.Mask) + (net 61 "Net-(FB2-Pad2)")) + (pad 1 thru_hole roundrect (at 0 0 180) (size 1.7 2) (drill 1) (layers *.Cu *.Mask) (roundrect_rratio 0.1470588235294118) + (net 1 GND)) + (model ${KISYS3DMOD}/Connector_JST.3dshapes/JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:AA-2460 locked (layer B.Cu) (tedit 5F704876) (tstamp 5F424EFA) + (at 61 -33.95) + (descr "AA battery holder") + (tags battery) + (path /5EF84B47) + (fp_text reference J7 (at 0 -7.05) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value "AA Holder" (at -0.35 4.75) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 29.25 8.75) (end -29.25 8.75) (layer B.CrtYd) (width 0.12)) + (fp_line (start 29.25 -8.75) (end 29.25 8.75) (layer B.CrtYd) (width 0.12)) + (fp_line (start -29.25 -8.75) (end 29.25 -8.75) (layer B.CrtYd) (width 0.12)) + (fp_line (start -29.25 8.75) (end -29.25 -8.75) (layer B.CrtYd) (width 0.12)) + (fp_circle (center -22.5 0) (end -22.5 -1.5) (layer B.SilkS) (width 0.15)) + (fp_circle (center 22.5 0) (end 22.5 -1.5) (layer B.SilkS) (width 0.15)) + (fp_line (start 22.5 1) (end 22.5 -1) (layer B.SilkS) (width 0.15)) + (fp_line (start 23.5 0) (end 21.5 0) (layer B.SilkS) (width 0.15)) + (fp_line (start -23.5 0) (end -21.5 0) (layer B.SilkS) (width 0.15)) + (fp_line (start 28.75 8.25) (end -28.75 8.25) (layer B.SilkS) (width 0.15)) + (fp_line (start 28.75 -8.25) (end 28.75 8.25) (layer B.SilkS) (width 0.15)) + (fp_line (start -28.75 -8.25) (end 28.75 -8.25) (layer B.SilkS) (width 0.15)) + (fp_line (start -28.75 8.25) (end -28.75 -8.25) (layer B.SilkS) (width 0.15)) + (pad 1 thru_hole circle (at 26 0) (size 1.8 1.8) (drill 1.02) (layers *.Cu *.Mask) + (net 61 "Net-(FB2-Pad2)")) + (pad 2 thru_hole circle (at -26 0) (size 1.8 1.8) (drill 1.02) (layers *.Cu *.Mask) + (net 46 "Net-(J7-Pad2)")) + (model "${WBRAUN_LIB_DIR}/3D_Models/KEYSTONE 2460.step" + (offset (xyz -28.5 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz -90 0 -90)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F211) + (at 78.45 -35.4 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F86C68B) + (attr smd) + (fp_text reference C35 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value DNP (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 62 "Net-(C35-Pad2)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F241) + (at 69.45 -35.25) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F754CC2) + (attr smd) + (fp_text reference C34 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F72F58F) + (at 73.65 -43.25) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F50886A) + (attr smd) + (fp_text reference C33 (at 0 -1.65) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 64 /VIN)) + (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F72F271) + (at 73 -39.5 270) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F508863) + (attr smd) + (fp_text reference C17 (at 0 -1.65 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 64 /VIN)) + (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:NET_TIE (layer B.Cu) (tedit 5F42069D) (tstamp 5F72F46E) + (at 73.7 -39.25 90) + (path /5F6B2965) + (fp_text reference NT1 (at 0.25 -3.5 90) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Net-Tie_2 (at -0.5 2 90) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_poly (pts (xy 0.5 -0.18) (xy -0.5 -0.18) (xy -0.5 0.18) (xy 0.5 0.18)) (layer B.Cu) (width 0)) + (pad 1 smd circle (at 0.5 0 90) (size 0.36 0.36) (layers B.Cu B.Paste B.Mask) + (net 46 "Net-(J7-Pad2)")) + (pad 2 smd circle (at -0.5 0 90) (size 0.36 0.36) (layers B.Cu B.Paste B.Mask) + (net 1 GND)) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F46AC2A) + (at 40.5 -31 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F99788E) + (attr smd) + (fp_text reference C24 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value DNP (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 9 /STAGE2_MON)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F469552) + (at 42 -31 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F8D9386) + (attr smd) + (fp_text reference C18 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value DNP (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 7 /STAGE1_MON)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:L_VLCF4020 (layer F.Cu) (tedit 5F4190F5) (tstamp 5F72F37A) + (at 69.6 -40.1) + (descr Inductor) + (tags Inductor) + (path /5F2C6000) + (fp_text reference L1 (at 0.25 -3.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7u (at 0 4) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.1 -0.5) (end 2.1 0.5) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.1 -0.5) (end -2.1 0.5) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.35 -2.6) (end 2.35 -2.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.35 -2.6) (end 2.35 2.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.35 2.6) (end -2.35 2.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.35 2.6) (end -2.35 -2.6) (layer F.CrtYd) (width 0.05)) + (pad 1 smd custom (at 0 -1.45) (size 1 1) (layers F.Cu F.Paste F.Mask) + (net 64 /VIN) (zone_connect 2) + (options (clearance outline) (anchor rect)) + (primitives + (gr_poly (pts + (xy -1.95 0.8) (xy -1.95 0.02) (xy -1.25 -0.8) (xy 1.25 -0.8) (xy 1.95 0.02) + (xy 1.95 0.8)) (width 0)) + )) + (pad 2 smd custom (at 0 1.45 180) (size 1 1) (layers F.Cu F.Paste F.Mask) + (net 50 /VSW) (zone_connect 2) + (options (clearance outline) (anchor rect)) + (primitives + (gr_poly (pts + (xy -1.95 0.8) (xy -1.95 0.02) (xy -1.25 -0.8) (xy 1.25 -0.8) (xy 1.95 0.02) + (xy 1.95 0.8)) (width 0)) + )) + (model ${WBRAUN_LIB_DIR}/3D_Models/VLCF4020.step + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F41D17E) + (at 61.25 -34.75 180) + (descr "SOT-23, Standard") + (tags SOT-23) + (path /5F63EC32) + (attr smd) + (fp_text reference U9 (at 0 -2.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LM4041LP-ADJ (at 0 2.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 56 /VBIAS-)) + (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 58 "Net-(R34-Pad2)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F41D169) + (at 61.25 -40.25 180) + (descr "SOT-23, Standard") + (tags SOT-23) + (path /5F831BA6) + (attr smd) + (fp_text reference U8 (at 0 -2.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LM4041LP-ADJ (at 0 2.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 11 +5V)) + (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 55 /VBIAS+)) + (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 57 "Net-(R32-Pad2)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F46D7B7) + (at 11.75 -33.75 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F8E544B) + (attr smd) + (fp_text reference R37 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 56 /VBIAS-)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 60 "Net-(C32-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CF03) + (at 11.75 -41.25) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F8E4246) + (attr smd) + (fp_text reference R36 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 59 "Net-(C31-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 55 /VBIAS+)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CEF2) + (at 63.75 -33 90) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F6414CB) + (attr smd) + (fp_text reference R35 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 56 /VBIAS-)) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 58 "Net-(R34-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CEE1) + (at 61.5 -32.25) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F640F6C) + (attr smd) + (fp_text reference R34 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 58 "Net-(R34-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CED0) + (at 63.75 -38.5 270) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F831BBA) + (attr smd) + (fp_text reference R33 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 57 "Net-(R32-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CEBF) + (at 61.5 -37.75) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F831BB0) + (attr smd) + (fp_text reference R32 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 57 "Net-(R32-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 55 /VBIAS+)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CEAE) + (at 79.55 -32.25) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F63B267) + (attr smd) + (fp_text reference R31 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 130 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 56 /VBIAS-)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 54 "Net-(C28-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CE9D) + (at 67.35 -33 90) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F831B91) + (attr smd) + (fp_text reference R30 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 130 (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 55 /VBIAS+)) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 53 "Net-(C27-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F41CC3C) + (at 38.75 -37.75 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F449F07) + (attr smd) + (fp_text reference R10 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 49 /VOS1)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 16 /OPA1_OUT)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F72F4F4) + (at 74.75 -32.75 180) + (descr "SOT-23, Standard") + (tags SOT-23) + (path /5F5D9270) + (attr smd) + (fp_text reference D3 (at 0 -2.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BAT54SLT1G (at 0 2.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 54 "Net-(C28-Pad2)")) + (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 52 "Net-(C26-Pad1)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F72F305) + (at 71.3 -32.75) + (descr "SOT-23, Standard") + (tags SOT-23) + (path /5F831B7C) + (attr smd) + (fp_text reference D2 (at 0 -2.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value BAT54SLT1G (at 0 2.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 65 /5V_INT)) + (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 53 "Net-(C27-Pad1)")) + (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) + (net 51 "Net-(C25-Pad1)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F41C931) + (at 11.75 -35.25) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F8E5F20) + (attr smd) + (fp_text reference C32 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 60 "Net-(C32-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F41C920) + (at 11.75 -39.75) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F8E5AC9) + (attr smd) + (fp_text reference C31 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 59 "Net-(C31-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F41C90F) + (at 65.25 -33 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F63BBF6) + (attr smd) + (fp_text reference C30 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 56 /VBIAS-)) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F41C8FE) + (at 65.25 -38.5 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F831B9C) + (attr smd) + (fp_text reference C29 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 55 /VBIAS+)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F48D) + (at 77.25 -33 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F63853E) + (attr smd) + (fp_text reference C28 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 54 "Net-(C28-Pad2)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F3FA) + (at 68.85 -33 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F831B87) + (attr smd) + (fp_text reference C27 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 53 "Net-(C27-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F4C0) + (at 73.2 -36 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F5D90BA) + (attr smd) + (fp_text reference C26 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 52 "Net-(C26-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 50 /VSW)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F72F52C) + (at 71.7 -36 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F831B72) + (attr smd) + (fp_text reference C25 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 51 "Net-(C25-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 50 /VSW)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F420D37) + (at 20.5 -36) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F44B192) + (attr smd) + (fp_text reference C23 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 49 /VOS1)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:bee_v4 locked (layer F.Cu) (tedit 0) (tstamp 5F2E365A) + (at 83.5 -29) + (fp_text reference G*** (at 0 0) (layer F.SilkS) hide + (effects (font (size 1.524 1.524) (thickness 0.3))) + ) + (fp_text value LOGO (at 0.75 0) (layer F.SilkS) hide + (effects (font (size 1.524 1.524) (thickness 0.3))) + ) + (fp_poly (pts (xy -0.794715 -2.072135) (xy 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0.326134 2.618462) + (xy 0.245134 2.629199) (xy 0.121969 2.645467) (xy 0.136742 2.408583) (xy 0.156436 2.037836) + (xy 0.166158 1.709241) (xy 0.165655 1.41509) (xy 0.154679 1.147676) (xy 0.132979 0.899288) + (xy 0.100303 0.66222) (xy 0.075425 0.522728) (xy 0.026707 0.3104) (xy -0.038377 0.084984) + (xy -0.113851 -0.135353) (xy -0.193736 -0.332445) (xy -0.233882 -0.417427) (xy -0.383143 -0.674546) + (xy -0.570294 -0.93366) (xy -0.784542 -1.18225) (xy -1.015093 -1.407796) (xy -1.251156 -1.597782) + (xy -1.252067 -1.598432) (xy -1.445349 -1.736363) (xy -1.343195 -1.811488) (xy -1.274016 -1.859307) + (xy -1.177994 -1.921775) (xy -1.072143 -1.987911) (xy -1.03436 -2.010832) (xy -0.82768 -2.13505) + (xy -0.794715 -2.072135)) (layer F.SilkS) (width 0.01)) + (fp_poly (pts (xy 1.915504 -2.812853) (xy 2.112355 -2.799246) (xy 2.292943 -2.777753) (xy 2.441575 -2.749175) + (xy 2.463364 -2.74344) (xy 2.554583 -2.716052) (xy 2.618954 -2.692635) (xy 2.647526 -2.676667) + (xy 2.645636 -2.672579) (xy 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3.473849 0.179703) + (xy 3.505576 0.098062) (xy 3.546094 0.023478) (xy 3.599498 -0.071265) (xy 3.661219 -0.188355) + (xy 3.718665 -0.303843) (xy 3.723271 -0.313498) (xy 3.770088 -0.417042) (xy 3.796722 -0.493982) + (xy 3.807432 -0.562248) (xy 3.806475 -0.639767) (xy 3.805217 -0.658529) (xy 3.771727 -0.81737) + (xy 3.697068 -0.946967) (xy 3.582403 -1.046163) (xy 3.428891 -1.113803) (xy 3.324053 -1.137861) + (xy 3.275675 -1.147199) (xy 3.239455 -1.161641) (xy 3.20815 -1.189491) (xy 3.174519 -1.239054) + (xy 3.131318 -1.318632) (xy 3.082034 -1.415344) (xy 2.894396 -1.74628) (xy 2.690625 -2.029478) + (xy 2.47016 -2.265553) (xy 2.232441 -2.455123) (xy 2.0271 -2.574885) (xy 1.807256 -2.668843) + (xy 1.5872 -2.734766) (xy 1.382094 -2.768361) (xy 1.3335 -2.771257) (xy 1.283999 -2.773949) + (xy 1.275195 -2.778413) (xy 1.310387 -2.78641) (xy 1.3843 -2.798378) (xy 1.535783 -2.813218) + (xy 1.718082 -2.817777) (xy 1.915504 -2.812853)) (layer F.SilkS) (width 0.01)) + (fp_poly (pts (xy -2.684704 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-1.15) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 1.15) (end 1.45 1.15) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 4 smd rect (at -0.75 0.55 180) (size 1 0.8) (layers F.Cu F.Paste F.Mask) + (net 23 "Net-(D1-Pad4)")) + (pad 3 smd rect (at 0.75 0.55 180) (size 1 0.8) (layers F.Cu F.Paste F.Mask) + (net 22 "Net-(D1-Pad3)")) + (pad 2 smd rect (at 0.75 -0.55 180) (size 1 0.8) (layers F.Cu F.Paste F.Mask) + (net 48 "Net-(D1-Pad2)")) + (pad 1 smd rect (at -0.75 -0.55 180) (size 1 0.8) (layers F.Cu F.Paste F.Mask) + (net 11 +5V)) + (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_Inolux_IN-PI554FCH_PLCC4_5.0x5.0mm_P3.2mm.step + (at (xyz 0 0 0)) + (scale (xyz 0.35 0.35 0.4)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2D0816) + (at 53.75 -36 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F102118) + (attr smd) + (fp_text reference C5 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Button_Switch_THT:SW_CuK_OS102011MA1QN1_SPDT_Angled locked (layer B.Cu) (tedit 5A02FE31) (tstamp 5F27567B) + (at 74.5 -47.5) + (descr "CuK miniature slide switch, OS series, SPDT, right angle, http://www.ckswitches.com/media/1428/os.pdf") + (tags "switch SPDT") + (path /5EF02AA2) + (fp_text reference SW3 (at 1.4 3.6) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value SW_SPDT (at 1.7 -7.7) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -2.3 2.2) (end 6.3 2.2) (layer B.Fab) (width 0.1)) + (fp_line (start -2.3 2.2) (end -2.3 -2.2) (layer B.Fab) (width 0.1)) + (fp_line (start -2.3 -2.2) (end 6.3 -2.2) (layer B.Fab) (width 0.1)) + (fp_line (start 6.3 -2.2) (end 6.3 2.2) (layer B.Fab) (width 0.1)) + (fp_line (start 2 -2.2) (end 2 -6.2) (layer B.Fab) (width 0.1)) + (fp_line (start 2 -6.2) (end 0 -6.2) (layer B.Fab) (width 0.1)) + (fp_line (start 0 -6.2) (end 0 -2.2) (layer B.Fab) (width 0.1)) + (fp_line (start -2.3 2.3) (end 6.3 2.3) (layer B.SilkS) (width 0.15)) + (fp_line (start -2.3 -2.3) (end -0.1 -2.3) (layer B.SilkS) (width 0.15)) + (fp_line (start 4 -2.3) (end 6.3 -2.3) (layer B.SilkS) (width 0.15)) + (fp_line (start 7.7 2.7) (end 7.7 -6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start 7.7 -6.7) (end -3.7 -6.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start -3.7 -6.7) (end -3.7 2.7) (layer B.CrtYd) (width 0.05)) + (fp_line (start -3.7 2.7) (end 7.7 2.7) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 2.3 -1.7) (layer B.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.1)) (justify mirror)) + ) + (pad 1 thru_hole rect (at 0 0) (size 1.5 2.5) (drill 0.9) (layers *.Cu *.Mask) + (net 67 /DC_EN)) + (pad 2 thru_hole oval (at 2 0) (size 1.5 2.5) (drill 0.9) (layers *.Cu *.Mask) + (net 64 /VIN)) + (pad 3 thru_hole oval (at 4 0) (size 1.5 2.5) (drill 0.9) (layers *.Cu *.Mask) + (net 68 "Net-(SW3-Pad3)")) + (pad "" thru_hole oval (at -2.1 0) (size 2.2 3.5) (drill 1.5) (layers *.Cu *.Mask)) + (pad "" thru_hole oval (at 6.1 0) (size 2.2 3.5) (drill 1.5) (layers *.Cu *.Mask)) + (model ${WBRAUN_LIB_DIR}/3D_Models/OS102011MA1QN1.stp + (offset (xyz 2 0 4.25)) + (scale (xyz 1 1 1)) + (rotate (xyz 90 -180 -180)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2C263C) + (at 56.75 -40.5) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F88B757) + (attr smd) + (fp_text reference R29 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 102k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 64 /VIN)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 36 /VIN_SENSE)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Inductor_SMD:L_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F2753DD) + (at 87.25 -37.75 270) + (descr "Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags inductor) + (path /5F7D48D8) + (attr smd) + (fp_text reference FB2 (at 0 -1.65 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Ferrite_Bead_Small (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 61 "Net-(FB2-Pad2)")) + (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 64 /VIN)) + (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:SW_Tactile_SPST_Angled_PTS645Vx58-2LFS locked (layer B.Cu) (tedit 5F24D87F) (tstamp 5F2DEEE0) + (at 62.5 -47.25 180) + (descr "tactile switch SPST right angle, PTS645VL58-2 LFS") + (tags "tactile switch SPST angled PTS645VL58-2 LFS C&K Button") + (path /5F4399E2) + (fp_text reference SW2 (at 0 -1.68) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value SW_Push (at 2.25 -5.38988) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -1.75 5.85) (end -1.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start 1.75 5.85) (end 1.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -1.75 5.85) (end 1.75 5.85) (layer B.Fab) (width 0.1)) + (fp_line (start -3.34 -0.97) (end -3.34 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.45 -4.2) (end 3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start -3.75 -4.2) (end -3.45 -4.2) (layer B.Fab) (width 0.1)) + (fp_line (start -3.45 -0.86) (end 3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start 3.75 -4.2) (end 3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -4.75 2.8) (end 4.8 2.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.8 2.8) (end 4.8 -4.45) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.8 -4.45) (end -4.75 -4.45) (layer B.CrtYd) (width 0.05)) + (fp_line (start -4.75 -4.45) (end -4.75 2.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start -3.86 2.7) (end 3.86 2.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.86 2.7) (end 3.86 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 -4.31) (end -3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 2.7) (end -3.86 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.75 2.59) (end 3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -3.75 -4.2) (end -3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start 3.45 -4.2) (end 3.75 -4.2) (layer B.Fab) (width 0.1)) + (fp_line (start -3.45 -4.2) (end -3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start 3.34 -0.97) (end 3.34 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.34 -3.8) (end -3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 -3.8) (end -3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 2.8 -0.97) (end 3.34 -0.97) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.34 -3.8) (end 3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.34 -4.31) (end 3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.86 -3.8) (end 3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.34 -0.97) (end -2.8 -0.97) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.7 -0.97) (end 1.7 -0.97) (layer B.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.68) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad "" thru_hole circle (at 3.51 -2.49 180) (size 2.1 2.1) (drill 1.3) (layers *.Cu *.Mask)) + (pad 2 thru_hole circle (at 2.25 0 180) (size 1.75 1.75) (drill 0.99) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at -2.25 0 180) (size 1.75 1.75) (drill 0.99) (layers *.Cu *.Mask) + (net 21 /SW2)) + (pad "" thru_hole circle (at -3.5 -2.49 180) (size 2.1 2.1) (drill 1.3) (layers *.Cu *.Mask)) + (model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_Tactile_SPST_Angled_PTS645Vx58-2LFS.wrl + (offset (xyz -2.25 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:SW_Tactile_SPST_Angled_PTS645Vx58-2LFS locked (layer B.Cu) (tedit 5F24D87F) (tstamp 5F2757C7) + (at 48.5 -47.25 180) + (descr "tactile switch SPST right angle, PTS645VL58-2 LFS") + (tags "tactile switch SPST angled PTS645VL58-2 LFS C&K Button") + (path /5EF36007) + (fp_text reference SW1 (at 0 -1.68) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value SW_Push (at 2.25 -5.38988) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -1.75 5.85) (end -1.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start 1.75 5.85) (end 1.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -1.75 5.85) (end 1.75 5.85) (layer B.Fab) (width 0.1)) + (fp_line (start -3.34 -0.97) (end -3.34 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.45 -4.2) (end 3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start -3.75 -4.2) (end -3.45 -4.2) (layer B.Fab) (width 0.1)) + (fp_line (start -3.45 -0.86) (end 3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start 3.75 -4.2) (end 3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -4.75 2.8) (end 4.8 2.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.8 2.8) (end 4.8 -4.45) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.8 -4.45) (end -4.75 -4.45) (layer B.CrtYd) (width 0.05)) + (fp_line (start -4.75 -4.45) (end -4.75 2.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start -3.86 2.7) (end 3.86 2.7) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.86 2.7) (end 3.86 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 -4.31) (end -3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 2.7) (end -3.86 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.75 2.59) (end 3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start -3.75 -4.2) (end -3.75 2.59) (layer B.Fab) (width 0.1)) + (fp_line (start 3.45 -4.2) (end 3.75 -4.2) (layer B.Fab) (width 0.1)) + (fp_line (start -3.45 -4.2) (end -3.45 -0.86) (layer B.Fab) (width 0.1)) + (fp_line (start 3.34 -0.97) (end 3.34 -1.2) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.34 -3.8) (end -3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.86 -3.8) (end -3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 2.8 -0.97) (end 3.34 -0.97) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.34 -3.8) (end 3.34 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.34 -4.31) (end 3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.86 -3.8) (end 3.86 -4.31) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.34 -0.97) (end -2.8 -0.97) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.7 -0.97) (end 1.7 -0.97) (layer B.SilkS) (width 0.12)) + (fp_text user %R (at 0 -1.68) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad "" thru_hole circle (at 3.51 -2.49 180) (size 2.1 2.1) (drill 1.3) (layers *.Cu *.Mask)) + (pad 2 thru_hole circle (at 2.25 0 180) (size 1.75 1.75) (drill 0.99) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 1 thru_hole circle (at -2.25 0 180) (size 1.75 1.75) (drill 0.99) (layers *.Cu *.Mask) + (net 20 /SW1)) + (pad "" thru_hole circle (at -3.5 -2.49 180) (size 2.1 2.1) (drill 1.3) (layers *.Cu *.Mask)) + (model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_Tactile_SPST_Angled_PTS645Vx58-2LFS.wrl + (offset (xyz -2.25 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23-6 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F72F5C4) + (at 75.75 -38.75 90) + (descr "6-pin SOT-23 package") + (tags SOT-23-6) + (path /5F28A9A2) + (attr smd) + (fp_text reference U7 (at 0 -2.9 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value MCP1640 (at 0 2.9 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) + (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) + (fp_line (start -1.9 -1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.9 1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.9 1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.9 -1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 5 smd rect (at 1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 65 /5V_INT)) + (pad 6 smd rect (at 1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 64 /VIN)) + (pad 4 smd rect (at 1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 47 "Net-(R21-Pad2)")) + (pad 3 smd rect (at -1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 67 /DC_EN)) + (pad 2 smd rect (at -1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 50 /VSW)) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-6.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-363_SC-70-6 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F2751B4) + (at 31 -44 270) + (descr "SOT-363, SC-70-6") + (tags "SOT-363 SC-70-6") + (path /5F2DE428) + (attr smd) + (fp_text reference U6 (at 0 -2 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TMUX1219 (at 0 2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.175 -1.1) (end -0.675 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 0.675 1.1) (end -0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start 0.675 -1.1) (end 0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.4) (end 1.6 1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.675 -0.6) (end -0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start 0.675 -1.1) (end -0.175 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -1.4) (end 1.6 -1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.4) (end -1.6 1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.6 1.4) (end 1.6 -1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.7 1.16) (end 0.7 1.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.7 -1.16) (end -1.2 -1.16) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 6 smd rect (at 0.95 -0.65 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 33 "Net-(R18-Pad1)")) + (pad 4 smd rect (at 0.95 0.65 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 43 "Net-(R17-Pad1)")) + (pad 2 smd rect (at -0.95 0 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 11 +5V)) + (pad 5 smd rect (at 0.95 0 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 44 "Net-(R19-Pad1)")) + (pad 3 smd rect (at -0.95 0.65 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 1 smd rect (at -0.95 -0.65 270) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 37 /MUX_SEL_2)) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-363_SC-70-6.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5D9F72B1) (tstamp 5F274DC8) + (at 28.25 -37.5 270) + (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") + (tags "SOIC SO") + (path /5F2881F1) + (attr smd) + (fp_text reference U5 (at 0 -3.4 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TLV3542 (at 0 3.4 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.98 0.98) (thickness 0.15))) + ) + (pad 8 smd roundrect (at 2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 7 smd roundrect (at 2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 34 "Net-(R26-Pad1)")) + (pad 6 smd roundrect (at 2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 34 "Net-(R26-Pad1)")) + (pad 5 smd roundrect (at 2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 40 /DAC7_OUT)) + (pad 4 smd roundrect (at -2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 3 smd roundrect (at -2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 29 "Net-(C6-Pad1)")) + (pad 2 smd roundrect (at -2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(R14-Pad1)")) + (pad 1 smd roundrect (at -2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 44 "Net-(R19-Pad1)")) + (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_SO:SSOP-28_5.3x10.2mm_P0.65mm (layer F.Cu) (tedit 5A02F25C) (tstamp 5F275304) + (at 47.5 -36.75) + (descr "28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf)") + (tags "SSOP 0.65") + (path /5FC70113) + (attr smd) + (fp_text reference U4 (at 0 -6.25) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PIC16F1776-ISS (at 0 6.25) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.65 -5.1) (end 2.65 -5.1) (layer F.Fab) (width 0.15)) + (fp_line (start 2.65 -5.1) (end 2.65 5.1) (layer F.Fab) (width 0.15)) + (fp_line (start 2.65 5.1) (end -2.65 5.1) (layer F.Fab) (width 0.15)) + (fp_line (start -2.65 5.1) (end -2.65 -4.1) (layer F.Fab) (width 0.15)) + (fp_line (start -2.65 -4.1) (end -1.65 -5.1) (layer F.Fab) (width 0.15)) + (fp_line (start -4.75 -5.5) (end -4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.75 -5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.75 -5.5) (end 4.75 -5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.75 5.5) (end 4.75 5.5) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.875 -5.325) (end -2.875 -4.75) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.875 -5.325) (end 2.875 -4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.875 5.325) (end 2.875 4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 5.325) (end -2.875 4.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 -5.325) (end 2.875 -5.325) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 5.325) (end 2.875 5.325) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.875 -4.75) (end -4.475 -4.75) (layer F.SilkS) (width 0.15)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (pad 1 smd rect (at -3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 12 /MCLR)) + (pad 2 smd rect (at -3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 32 "Net-(R12-Pad2)")) + (pad 3 smd rect (at -3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 16 /OPA1_OUT)) + (pad 4 smd rect (at -3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 45 /DAC1_OUT)) + (pad 5 smd rect (at -3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 70 "Net-(U4-Pad5)")) + (pad 6 smd rect (at -3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 45 /DAC1_OUT)) + (pad 7 smd rect (at -3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 16 /OPA1_OUT)) + (pad 8 smd rect (at -3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 9 smd rect (at -3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 35 /MUX_SEL_1)) + (pad 10 smd rect (at -3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 15 /SR_IN)) + (pad 11 smd rect (at -3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 8 /DAC5_OUT)) + (pad 12 smd rect (at -3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 40 /DAC7_OUT)) + (pad 13 smd rect (at -3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 9 /STAGE2_MON)) + (pad 14 smd rect (at -3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 7 /STAGE1_MON)) + (pad 15 smd rect (at 3.6 4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 24 /LEG_R)) + (pad 16 smd rect (at 3.6 3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 26 /LED_G)) + (pad 17 smd rect (at 3.6 2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 25 /LED_B)) + (pad 18 smd rect (at 3.6 2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 20 /SW1)) + (pad 19 smd rect (at 3.6 1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 20 smd rect (at 3.6 0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 11 +5V)) + (pad 21 smd rect (at 3.6 0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 21 /SW2)) + (pad 22 smd rect (at 3.6 -0.325) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 19 /OPA2IN-)) + (pad 23 smd rect (at 3.6 -0.975) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 19 /OPA2IN-)) + (pad 24 smd rect (at 3.6 -1.625) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 8 /DAC5_OUT)) + (pad 25 smd rect (at 3.6 -2.275) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 37 /MUX_SEL_2)) + (pad 26 smd rect (at 3.6 -2.925) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 36 /VIN_SENSE)) + (pad 27 smd rect (at 3.6 -3.575) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 14 /ISPCLK)) + (pad 28 smd rect (at 3.6 -4.225) (size 1.75 0.45) (layers F.Cu F.Paste F.Mask) + (net 13 /ISPDAT)) + (model ${KISYS3DMOD}/Package_SO.3dshapes/SSOP-28_5.3x10.2mm_P0.65mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-363_SC-70-6 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F2BC5D7) + (at 24 -35.25 90) + (descr "SOT-363, SC-70-6") + (tags "SOT-363 SC-70-6") + (path /5F2DDA1F) + (attr smd) + (fp_text reference U3 (at 0 -2 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TMUX1219 (at 0 2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.7 -1.16) (end -1.2 -1.16) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 1.16) (end 0.7 1.16) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.4) (end 1.6 -1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.4) (end -1.6 1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 -1.4) (end 1.6 -1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.675 -1.1) (end -0.175 -1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.675 -0.6) (end -0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.4) (end 1.6 1.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.675 -1.1) (end 0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start 0.675 1.1) (end -0.675 1.1) (layer F.Fab) (width 0.1)) + (fp_line (start -0.175 -1.1) (end -0.675 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 1 smd rect (at -0.95 -0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 35 /MUX_SEL_1)) + (pad 3 smd rect (at -0.95 0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 5 smd rect (at 0.95 0 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 3 GNDREF)) + (pad 2 smd rect (at -0.95 0 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 11 +5V)) + (pad 4 smd rect (at 0.95 0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 39 "Net-(C7-Pad2)")) + (pad 6 smd rect (at 0.95 -0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask) + (net 28 "Net-(C6-Pad2)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-363_SC-70-6.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5D9F72B1) (tstamp 5F2BC7FA) + (at 16.25 -37.5 90) + (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") + (tags "SOIC SO") + (path /5F28663D) + (attr smd) + (fp_text reference U2 (at 0 -3.4 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value AD8129 (at 0 3.4 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) + (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.98 0.98) (thickness 0.15))) + ) + (pad 1 smd roundrect (at -2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 6 "Net-(C4-Pad1)")) + (pad 2 smd roundrect (at -2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 3 smd roundrect (at -2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 4 smd roundrect (at -2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 27 "Net-(C2-Pad1)")) + (pad 5 smd roundrect (at 2.475 1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 31 "Net-(R7-Pad1)")) + (pad 6 smd roundrect (at 2.475 0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 41 "Net-(R13-Pad2)")) + (pad 7 smd roundrect (at 2.475 -0.635 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 8 smd roundrect (at 2.475 -1.905 90) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 38 "Net-(C4-Pad2)")) + (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:HMC1041Z (layer F.Cu) (tedit 5EEEAB4C) (tstamp 5F255990) + (at -29 -37.5 270) + (path /5EECA84D) + (fp_text reference U1 (at 0 5 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value HMC1041Z (at -0.5 -5.5 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -2.2 0.8) (end -2.2 -1) (layer F.CrtYd) (width 0.1)) + (fp_line (start -2.2 -1) (end 2.2 -1) (layer F.CrtYd) (width 0.1)) + (fp_line (start 2.2 -1) (end 2.2 0.8) (layer F.CrtYd) (width 0.1)) + (fp_line (start 2.2 0.8) (end -2.2 0.8) (layer F.CrtYd) (width 0.1)) + (fp_line (start -2.15 -0.9) (end -2.15 0.75) (layer F.SilkS) (width 0.1)) + (fp_line (start -2.15 -0.9) (end 2.15 -0.9) (layer F.SilkS) (width 0.1)) + (fp_line (start 2.15 -0.9) (end 2.15 0.75) (layer F.SilkS) (width 0.1)) + (pad 1 smd roundrect (at -1.75 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 2 smd roundrect (at -1.25 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 59 "Net-(C31-Pad1)")) + (pad 3 smd roundrect (at -0.75 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 69 "Net-(U1-Pad3)")) + (pad 4 smd roundrect (at -0.25 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 17 /AMR+)) + (pad 5 smd roundrect (at 0.25 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 18 /AMR-)) + (pad 6 smd roundrect (at 0.75 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 60 "Net-(C32-Pad1)")) + (pad 7 smd roundrect (at 1.25 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 8 smd roundrect (at 1.75 -0.525 270) (size 0.3 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 5 /SR)) + (pad "" smd roundrect (at 1.25 0.525 270) (size 0.5 0.5) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (pad "" smd roundrect (at -1.25 0.525 270) (size 0.5 0.5) (layers F.Cu F.Mask) (roundrect_rratio 0.25)) + (model ${WBRAUN_LIB_DIR}/3D_Models/HMC1041Z.step + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module wbraun_smd:THM_COMPACT (layer F.Cu) (tedit 5EE9502F) (tstamp 5F274F37) + (at 28 -48.25) + (tags "test point") + (path /5EF26D62) + (fp_text reference TP3 (at 0.5 4.25) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TestPoint (at 0 -2.75) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 1.5 0) (layer F.CrtYd) (width 0.2)) + (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2749C9) + (at 56.75 -31.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F494D42) + (attr smd) + (fp_text reference R28 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 24 /LEG_R)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 48 "Net-(D1-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2751EE) + (at 56.75 -34.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4B3D42) + (attr smd) + (fp_text reference R27 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 25 /LED_B)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 23 "Net-(D1-Pad4)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274F51) + (at 26.75 -31.25 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5EFB78D1) + (attr smd) + (fp_text reference R26 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 34 "Net-(R26-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F27554B) + (at 56.75 -33 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4493F7) + (attr smd) + (fp_text reference R25 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 26 /LED_G)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 22 "Net-(D1-Pad3)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274D26) + (at 56.75 -37.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5FDAB543) + (attr smd) + (fp_text reference R24 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 21 /SW2)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F275248) + (at 56.75 -36 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5FDAAC00) + (attr smd) + (fp_text reference R23 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 20 /SW1)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F72F2A1) + (at 75.75 -41.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F29E6EE) + (attr smd) + (fp_text reference R22 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 47 "Net-(R21-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F72F2D1) + (at 78.75 -41.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F29D954) + (attr smd) + (fp_text reference R21 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 102k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 47 "Net-(R21-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274CC3) + (at 32.75 -39 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F7A182B) + (attr smd) + (fp_text reference R20 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 43 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 44 "Net-(R19-Pad1)")) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 30 "Net-(J6-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274F81) + (at 32.75 -40.5) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F7B75F9) + (attr smd) + (fp_text reference R19 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 9 /STAGE2_MON)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 44 "Net-(R19-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274CF3) + (at 28 -45 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4C63CF) + (attr smd) + (fp_text reference R18 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 220 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(R14-Pad1)")) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 33 "Net-(R18-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274E3D) + (at 28 -43.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4C5653) + (attr smd) + (fp_text reference R17 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1.91k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(R14-Pad1)")) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 43 "Net-(R17-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F27577F) + (at 25 -43.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4C857B) + (attr smd) + (fp_text reference R16 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 340 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(R14-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F27571C) + (at 56.75 -39) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F33C6C3) + (attr smd) + (fp_text reference R15 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 10 /VOS2)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 19 /OPA2IN-)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F27505C) + (at 25 -45 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4C8A19) + (attr smd) + (fp_text reference R14 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 32.4k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 10 /VOS2)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 42 "Net-(R14-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC59C) + (at 20.5 -39 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F46CE35) + (attr smd) + (fp_text reference R13 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 220 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 29 "Net-(C6-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 41 "Net-(R13-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274BAF) + (at 38.75 -39.25) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F685864) + (attr smd) + (fp_text reference R12 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 32 "Net-(R12-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F27508C) + (at 38.75 -41.25) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5FDAD789) + (attr smd) + (fp_text reference R11 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 12 /MCLR)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC740) + (at 20.5 -40.5) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4AE368) + (attr smd) + (fp_text reference R9 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 2k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 41 "Net-(R13-Pad2)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 7 /STAGE1_MON)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC614) + (at 18.25 -42) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F4891FC) + (attr smd) + (fp_text reference R8 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 806 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 63 "Net-(R38-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 31 "Net-(R7-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC4E8) + (at 21.25 -42) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F488949) + (attr smd) + (fp_text reference R7 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 121 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 31 "Net-(R7-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC557) + (at 10.5 -38.25 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F47CF9A) + (attr smd) + (fp_text reference R6 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 43 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 38 "Net-(C4-Pad2)")) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 17 /AMR+)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC6FB) + (at 10.5 -36.75 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F47C389) + (attr smd) + (fp_text reference R5 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 43 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 6 "Net-(C4-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 18 /AMR-)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F274D62) + (at 26.75 -29.25 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5EF230F2) + (attr smd) + (fp_text reference R4 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 220 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 "Net-(C1-Pad2)")) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC4B5) + (at 20.5 -37.5 180) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F494594) + (attr smd) + (fp_text reference R3 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 121 (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 27 "Net-(C2-Pad1)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2BC647) + (at 20.5 -34.5) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5F493D4C) + (attr smd) + (fp_text reference R2 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 27 "Net-(C2-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 49 /VOS1)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F2750EF) + (at 26.75 -27.75) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /5FDAE0CE) + (attr smd) + (fp_text reference R1 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.22k (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 15 /SR_IN)) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:TSOT-23-6 (layer F.Cu) (tedit 5A02FF57) (tstamp 5F274ADC) + (at 22.75 -28.5 180) + (descr "6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf") + (tags "TSOT-23-6 MK06A TSOT-6") + (path /5EEC2F90) + (attr smd) + (fp_text reference Q1 (at 0 -2.45) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value FDC6333C (at 0 2.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.17 1.7) (end -2.17 1.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.17 1.7) (end 2.17 -1.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.17 -1.7) (end -2.17 1.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.17 -1.7) (end 2.17 -1.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.88 -1.45) (end 0.88 1.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0.88 1.45) (end -0.88 1.45) (layer F.Fab) (width 0.1)) + (fp_line (start -0.88 -1) (end -0.88 1.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0.88 -1.45) (end -0.43 -1.45) (layer F.Fab) (width 0.1)) + (fp_line (start -0.88 -1) (end -0.43 -1.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0.88 -1.51) (end -1.55 -1.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.88 1.56) (end 0.88 1.56) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 6 smd rect (at 1.31 -0.95 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C3-Pad1)")) + (pad 5 smd rect (at 1.31 0 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 4 smd rect (at 1.31 0.95 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C3-Pad1)")) + (pad 3 smd rect (at -1.31 0.95 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 15 /SR_IN)) + (pad 2 smd rect (at -1.31 0 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 2 "Net-(C1-Pad2)")) + (pad 1 smd rect (at -1.31 -0.95 180) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask) + (net 15 /SR_IN)) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TSOT-23-6.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Coaxial:SMA_Molex_73251-2200_Horizontal (layer B.Cu) (tedit 5C07CA7C) (tstamp 5F2556E5) + (at 95.75 -37.5 90) + (descr https://www.molex.com/webdocs/datasheets/pdf/en-us/0732512200_RF_COAX_CONNECTORS.pdf) + (tags "SMA THT Female Jack Horizontal") + (path /5F0D47F8) + (fp_text reference J6 (at -4.9 0) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_Coaxial (at 0 -5 -90) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -3 14) (end 3 14.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 13) (end 3 13.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 12) (end 3 12.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 11) (end 3 11.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 10) (end 3 10.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 9) (end 3 9.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 8) (end 3 8.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 7) (end 3 7.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3 6) (end 3 6.7) (layer B.Fab) (width 0.1)) + (fp_line (start -3.9 3.95) (end 3.9 3.95) (layer B.Fab) (width 0.1)) + (fp_line (start -3.9 5.07) (end -3.9 3.95) (layer B.Fab) (width 0.1)) + (fp_line (start 3.9 5.07) (end -3.9 5.07) (layer B.Fab) (width 0.1)) + (fp_line (start 3.9 3.95) (end 3.9 5.07) (layer B.Fab) (width 0.1)) + (fp_line (start 3 16.5) (end 3 5.07) (layer B.Fab) (width 0.1)) + (fp_line (start -3 16.5) (end -3 5.07) (layer B.Fab) (width 0.1)) + (fp_line (start -3 16.5) (end 3 16.5) (layer B.Fab) (width 0.1)) + (fp_line (start -1.8 3.68) (end 1.8 3.68) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.3 -3.2) (end 1.3 -3.2) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.6 1.6) (end 3.6 -1.6) (layer B.SilkS) (width 0.12)) + (fp_line (start -3.6 1.6) (end -3.6 -1.6) (layer B.SilkS) (width 0.12)) + (fp_line (start 3.5 3.95) (end 3.5 -3.05) (layer B.Fab) (width 0.1)) + (fp_line (start -3.5 -3.05) (end 3.5 -3.05) (layer B.Fab) (width 0.1)) + (fp_line (start -3.5 3.95) (end -3.5 -3.05) (layer B.Fab) (width 0.1)) + (fp_line (start -3.5 3.95) (end 3.5 3.95) (layer B.Fab) (width 0.1)) + (fp_line (start -4.4 17) (end 4.4 17) (layer B.CrtYd) (width 0.05)) + (fp_line (start -4.4 17) (end -4.4 -4.16) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.4 -4.16) (end 4.4 17) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.4 -4.16) (end -4.4 -4.16) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 -90) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 2 thru_hole circle (at -2.54 -2.54 90) (size 2.25 2.25) (drill 1.5) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 2 thru_hole circle (at -2.54 2.54 90) (size 2.25 2.25) (drill 1.5) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 2 thru_hole circle (at 2.54 2.54 90) (size 2.25 2.25) (drill 1.5) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 2 thru_hole circle (at 2.54 -2.54) (size 2.25 2.25) (drill 1.5) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 0 90) (size 2.25 2.25) (drill 1.5) (layers *.Cu *.Mask) + (net 30 "Net-(J6-Pad1)")) + (model ${WBRAUN_LIB_DIR}/3D_Models/c-619540-1-a-3d.stp + (offset (xyz 0 15.75 6.75)) + (scale (xyz 1 1 1)) + (rotate (xyz 90 -180 0)) + ) + ) + + (module wbraun_smd:M3-tight-fit-socket-head (layer F.Cu) (tedit 5CC8CD2B) (tstamp 5F462AFA) + (at 9.25 -45.75) + (tags "mounting hole") + (path /5FB91C22) + (fp_text reference J5 (at 0 5.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value mounting-hole-grounded (at 0.5 -3.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 3.5 0) (layer B.CrtYd) (width 0.3)) + (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.3)) + (pad 1 thru_hole circle (at 1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 -2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.3) (layers *.Cu *.Mask) + (net 3 GNDREF)) + ) + + (module wbraun_smd:M3-tight-fit-socket-head (layer F.Cu) (tedit 5CC8CD2B) (tstamp 5F2E43CA) + (at 95.75 -45.75) + (tags "mounting hole") + (path /5FB91869) + (fp_text reference J4 (at 0 5.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value mounting-hole-grounded (at 0.5 -3.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 3.5 0) (layer B.CrtYd) (width 0.3)) + (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.3)) + (pad 1 thru_hole circle (at 1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 -2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.3) (layers *.Cu *.Mask) + (net 3 GNDREF)) + ) + + (module wbraun_smd:TC2030-IDC-NL (layer F.Cu) (tedit 58BCE502) (tstamp 5F2752A8) + (at 38.25 -46.75) + (descr "2X3 tag-connect programming header") + (path /5F828A7F) + (fp_text reference J3 (at -2.4 -3.75) (layer F.SilkS) hide + (effects (font (size 1.2 1.2) (thickness 0.15))) + ) + (fp_text value "Tag Connect" (at -2.75 3.95) (layer F.SilkS) hide + (effects (font (size 1.2 1.2) (thickness 0.15))) + ) + (fp_line (start -4.95 3.05) (end 4.95 3.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.95 -3.05) (end -4.95 3.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.95 -3.05) (end -4.95 -3.05) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.95 -3.05) (end 4.95 3.05) (layer F.CrtYd) (width 0.05)) + (pad 1 smd oval (at -1.27 0.635 270) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 12 /MCLR)) + (pad 2 smd oval (at -1.27 -0.635 90) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 11 +5V)) + (pad 3 smd oval (at 0 0.635 270) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 1 GND)) + (pad 4 smd oval (at 0 -0.635 90) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 13 /ISPDAT)) + (pad 5 smd oval (at 1.27 0.635 270) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 14 /ISPCLK)) + (pad 6 smd oval (at 1.27 -0.635 90) (size 0.787 0.787) (layers F.Cu F.Mask) + (net 66 "Net-(J3-Pad6)")) + (pad "" np_thru_hole circle (at 2.54 -1.016) (size 0.991 0.991) (drill 0.991) (layers *.Cu *.Mask F.SilkS)) + (pad "" np_thru_hole circle (at 2.54 1.016 180) (size 0.991 0.991) (drill 0.991) (layers *.Cu *.Mask F.SilkS)) + (pad "" np_thru_hole circle (at -2.54 0 180) (size 0.991 0.991) (drill 0.991) (layers *.Cu *.Mask F.SilkS)) + ) + + (module wbraun_smd:M3-tight-fit-socket-head (layer F.Cu) (tedit 5CC8CD2B) (tstamp 5F70C96E) + (at 9.25 -29.25) + (tags "mounting hole") + (path /5FB91567) + (fp_text reference J2 (at 0 5.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value mounting-hole-grounded (at 0.5 -3.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 3.5 0) (layer B.CrtYd) (width 0.3)) + (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.3)) + (pad 1 thru_hole circle (at 1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 -2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.3) (layers *.Cu *.Mask) + (net 3 GNDREF)) + ) + + (module wbraun_smd:M3-tight-fit-socket-head (layer F.Cu) (tedit 5CC8CD2B) (tstamp 5F275F10) + (at 95.75 -29.25) + (tags "mounting hole") + (path /5FB91065) + (fp_text reference J1 (at 0 5.5) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value mounting-hole-grounded (at 0.5 -3.5) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end 3.5 0) (layer B.CrtYd) (width 0.3)) + (fp_circle (center 0 0) (end 3.5 0) (layer F.CrtYd) (width 0.3)) + (pad 1 thru_hole circle (at 1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -1.75 1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at -2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 -2.5) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 1.75 -1.75) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 2.5 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) + (net 3 GNDREF)) + (pad 1 thru_hole circle (at 0 0) (size 6.4 6.4) (drill 3.3) (layers *.Cu *.Mask) + (net 3 GNDREF)) + ) + + (module Inductor_SMD:L_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F730043) + (at 80.45 -43.25) + (descr "Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags inductor) + (path /5F254B7C) + (attr smd) + (fp_text reference FB1 (at 0 -1.65) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Ferrite_Bead_Small (at 0 1.65) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F72F445) + (at 77.05 -43.25 180) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F2A55B8) + (attr smd) + (fp_text reference C22 (at 0 -1.65) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F72F3A0) + (at 78.5 -38.6 270) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F2C7206) + (attr smd) + (fp_text reference C21 (at 0 -1.65 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F72F55C) + (at 80.45 -38.6 270) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F29F2C3) + (attr smd) + (fp_text reference C20 (at 0 -1.65 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.9375 0 270) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 65 /5V_INT)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC6CB) + (at 23.75 -32.75) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F99D9CC) + (attr smd) + (fp_text reference C19 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F27574C) + (at 25 -42) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F3B5CBA) + (attr smd) + (fp_text reference C16 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F275605) + (at 29.75 -32.75 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F3B57CD) + (attr smd) + (fp_text reference C15 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F275374) + (at 37.75 -32.25) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F3D4515) + (attr smd) + (fp_text reference C14 (at 0 -1.65) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F2754E5) + (at 37.75 -30.25 180) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F3D6366) + (attr smd) + (fp_text reference C13 (at 0 -1.65) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2753A4) + (at 31 -46.5 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F4D4D90) + (attr smd) + (fp_text reference C12 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC7A6) + (at 16.5 -33 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F4C4D5D) + (attr smd) + (fp_text reference C11 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC87B) + (at 15 -42 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F4C4831) + (attr smd) + (fp_text reference C10 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 +5V)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F274E6D) + (at 26.75 -32.75 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5EF96F69) + (attr smd) + (fp_text reference C9 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 40 /DAC7_OUT)) + (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2749FC) + (at 25 -46.5) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F33CCD6) + (attr smd) + (fp_text reference C8 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 10 /VOS2)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC518) + (at 23.75 -39.25) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F496B66) + (attr smd) + (fp_text reference C7 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 750p (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 29 "Net-(C6-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 39 "Net-(C7-Pad2)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC68C) + (at 23.75 -37.75) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F4A36E4) + (attr smd) + (fp_text reference C6 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22p (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 29 "Net-(C6-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 28 "Net-(C6-Pad2)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC8E4) + (at 12.75 -37.5 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F47D729) + (attr smd) + (fp_text reference C4 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 10p (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 6 "Net-(C4-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 38 "Net-(C4-Pad2)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F275413) + (at 17.5 -28.75 90) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5EF22C03) + (attr smd) + (fp_text reference C3 (at 0 -1.43 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 5 /SR)) + (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 4 "Net-(C3-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F2BC8AB) + (at 20.5 -33) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F494C68) + (attr smd) + (fp_text reference C2 (at 0 -1.43) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1u (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.162779 -0.51) (end 0.162779 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.162779 0.51) (end 0.162779 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) hide + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 27 "Net-(C2-Pad1)")) + (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 GNDREF)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F274C51) + (at 19.25 -28.5 90) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags capacitor) + (path /5F5BA378) + (attr smd) + (fp_text reference C1 (at 0 -1.65 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 22u (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) hide + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 "Net-(C1-Pad2)")) + (pad 1 smd roundrect (at -0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (gr_text "Do not modify tip routing \nthis config tested for inductive pickup" (at -25 -30.75) (layer Eco1.User) + (effects (font (size 1 1) (thickness 0.15))) + ) + (gr_poly (pts (xy 21 -30.25) (xy 16 -30.25) (xy 16 -42.25) (xy 21 -42.25)) (layer B.SilkS) (width 0.1)) + (gr_text "S/N: " (at 18.25 -44.75 90) (layer B.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.15)) (justify mirror)) + ) + (gr_line (start -30 -40) (end -15 -40) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -30 -35) (end -15 -35) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -12.5 -32.5) (end 3.5 -32.5) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -15 -35) (end -12.5 -32.5) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -12.5 -42.5) (end 3.5 -42.5) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -15 -40) (end -12.5 -42.5) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -15 -42) (end -15 -33.25) (layer Eco1.User) (width 0.15)) + (gr_arc (start 3.5 -44) (end 3.5 -42.5) (angle -90) (layer Edge.Cuts) (width 0.127)) + (gr_arc (start 3.5 -31) (end 5 -31) (angle -90) (layer Edge.Cuts) (width 0.15)) + (gr_line (start 100 -50) (end 100 -25) (layer Eco1.User) (width 0.15) (tstamp 5F462AC3)) + (gr_line (start 5 -50) (end 100 -50) (layer Eco1.User) (width 0.15) (tstamp 5F462B23)) + (gr_line (start 5 -25) (end 5 -50) (layer Eco1.User) (width 0.15)) + (gr_line (start 100 -25) (end 5 -25) (layer Eco1.User) (width 0.15)) + (gr_text "Little Bee B1 Current Probe\nBeefield Labs" (at 67.5 -27.75) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.2))) + ) + (gr_line (start 5 -46.25) (end 5 -44) (layer Edge.Cuts) (width 0.15) (tstamp 5F462B1A)) + (gr_line (start 5 -28.75) (end 5 -31) (layer Edge.Cuts) (width 0.127)) + (gr_arc (start 8.75 -28.75) (end 5 -28.75) (angle -90) (layer Edge.Cuts) (width 0.127)) + (gr_arc (start 8.75 -46.25) (end 8.75 -50) (angle -90) (layer Edge.Cuts) (width 0.127) (tstamp 5F462B20)) + (gr_line (start 7.75 -50) (end 7.75 -25) (layer Eco1.User) (width 0.15) (tstamp 5F462B29)) + (gr_line (start -30 -40) (end -30 -35) (layer Edge.Cuts) (width 0.127)) + (gr_arc (start 96.25 -28.75) (end 96.25 -25) (angle -90) (layer Edge.Cuts) (width 0.127)) + (gr_arc (start 96.25 -46.25) (end 100 -46.25) (angle -90) (layer Edge.Cuts) (width 0.127)) + (gr_line (start -61.5 -37.5) (end 101 -37.5) (layer Eco1.User) (width 0.15) (tstamp 5F2DB29F)) + (gr_line (start 8.75 -50) (end 96.25 -50) (layer Edge.Cuts) (width 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(tstamps /) + (title_block + (title) + (company) + (rev) + (date) + (source current-sense.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref Q1) + (value DMG6601LVT-7) + (footprint Package_TO_SOT_SMD:TSOT-23-6) + (datasheet https://www.diodes.com/assets/Datasheets/DMC2053UVT.pdf) + (fields + (field (name MPN) DMG6601LVT-7)) + (libsource (lib Transistor_FET) (part DMC2053UVT) (description "4.6A/-3.2A Id, 20V Vds, Complementary pair enhancement mode P-Channel and N-Channel MOSFET, TSOT-23-6")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EEC2F90)) + (comp (ref C3) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF22C03)) + (comp (ref R4) + (value 220) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + 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R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF96AD7)) + (comp (ref R20) + (value 4.7k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF96C3D)) + (comp (ref C9) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF96F69)) + (comp (ref R26) + (value 10) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-0710RL)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5EFB78D1)) + (comp (ref R10) + (value 0) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F0EF59C)) + (comp (ref C5) + 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+ (value 10n) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) C0603C103M5RACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F33CCD6)) + (comp (ref SW2) + (value SW_Push) + (footprint Button_Switch_THT:SW_Tactile_SPST_Angled_PTS645Vx58-2LFS) + (datasheet ~) + (fields + (field (name MPN) "PTS645VL58-2 LFS")) + (libsource (lib Switch) (part SW_Push) (description "Push button switch, generic, two pins")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4399E2)) + (comp (ref R23) + (value 4.22k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-074K22L)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F449229)) + (comp (ref R24) + (value 4.22k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-074K22L)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F449331)) + (comp (ref R25) + (value 4.22k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-074K22L)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4493F7)) + (comp (ref R28) + (value 4.22k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-074K22L)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F494D42)) + (comp (ref R27) + (value 4.22k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) RC0603FR-074K22L)) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4B3D42)) + (comp (ref C10) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4C4831)) + (comp (ref C11) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4C4D5D)) + (comp (ref C12) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F4D4D90)) + (comp (ref D1) + (value LED_ARGB) + (footprint LED_SMD:LED_Cree-PLCC4_2x2mm_CW) + (datasheet ~) + (fields + (field (name MPN) CLMVC-FKA-CL1D1L71BB7C3C3)) + (libsource (lib Device) (part LED_ARGB) (description "RGB LED, anode/red/green/blue")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF49A1E)) + (comp (ref TP3) + (value TestPoint) + (footprint wbraun_smd:THM_COMPACT) + (datasheet ~) + (libsource (lib Connector) (part TestPoint) (description "test point")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF26D62)) + (comp (ref TP4) + (value TestPoint) + (footprint wbraun_smd:THM_COMPACT) + (datasheet ~) + (libsource (lib Connector) (part TestPoint) (description "test point")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF26F08)) + (comp (ref J1) + (value mounting-hole-nc) + (footprint wbraun_smd:M3-mounting-hole-insulated) + (libsource (lib wbraun_ic_lib) (part mounting-hole-nc) (description mounting-hole)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F16073F)) + (comp (ref J2) + (value mounting-hole-nc) + (footprint wbraun_smd:M3-mounting-hole-insulated) + (libsource (lib wbraun_ic_lib) (part mounting-hole-nc) (description mounting-hole)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F160E6A)) + (comp (ref J4) + (value mounting-hole-nc) + (footprint wbraun_smd:M3-mounting-hole-insulated) + (libsource (lib wbraun_ic_lib) (part mounting-hole-nc) (description mounting-hole)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F160F48)) + (comp (ref J5) + (value mounting-hole-nc) + (footprint wbraun_smd:M3-mounting-hole-insulated) + (libsource (lib wbraun_ic_lib) (part mounting-hole-nc) (description mounting-hole)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F1610C6)) + (comp (ref TP1) + (value TestPoint) + (footprint wbraun_smd:TP-0.7mm-pad) + (datasheet ~) + (libsource (lib Connector) (part TestPoint) (description "test point")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F6CFB61)) + (comp (ref U4) + (value PIC16F1776-IMX) + (footprint wbraun_smd:QFN-28-1EP_6x6mm_P0.65mm_EP4.05x4.05mm_Anchors) + (fields + (field (name MPN) PIC16F1776-I/MX)) + (libsource (lib wbraun_ic_lib) (part PIC16F1776-IMX) (description "PIC Microcontroller")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF5D923)) + (comp (ref J6) + (value Conn_Coaxial) + (footprint Connector_Coaxial:SMA_Molex_73251-2200_Horizontal) + (datasheet " ~") + (libsource (lib Connector) (part Conn_Coaxial) (description "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F0D47F8)) + (comp (ref U7) + (value LP2985) + (footprint Package_TO_SOT_SMD:SOT-23-5) + (fields + (field (name MPN) LP2985IM5-5.0/NOPB)) + (libsource (lib wbraun_ic_lib) (part LP2985) (description "Linear Regulator, SOT-23")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF5E9CA)) + (comp (ref C16) + (value 10n) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (fields + (field (name MPN) C0603C103M5RACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF5EB25)) + (comp (ref C17) + (value 10u) + (footprint Capacitor_SMD:C_0805_2012Metric) + (datasheet ~) + (fields + (field (name MPN) C0805C106K4PACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF5EC4D)) + (comp (ref C15) + (value 10u) + (footprint Capacitor_SMD:C_0805_2012Metric) + (datasheet ~) + (fields + (field (name MPN) C0805C106K4PACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF5ECBB)) + (comp (ref J7) + (value Conn_01x02_Female) + (footprint wbraun_smd:BH9VPC) + (datasheet ~) + (libsource (lib Connector) (part Conn_01x02_Female) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF84B47)) + (comp (ref SW3) + (value SW_SPDT) + (footprint Button_Switch_THT:SW_CuK_OS102011MA1QN1_SPDT_Angled) + (datasheet ~) + (fields + (field (name MPN) OS102011MA1QN1)) + (libsource (lib Switch) (part SW_SPDT) (description "Switch, single pole double throw")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EF02AA2)) + (comp (ref D2) + (value PMEG2005EGWX) + (footprint Diode_SMD:D_SOD-123) + (datasheet ~) + (fields + (field (name MPN) PMEG2005EGWX)) + (libsource (lib Device) (part D_Schottky) (description "Schottky diode")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F253190)) + (comp (ref U1) + (value HMC1041Z) + (footprint wbraun_smd:HMC1041Z) + (fields + (field (name MPN) HMC1041Z-TR)) + (libsource (lib wbraun_ic_lib) (part HMC1041Z) (description "AMR Magnetic Sensor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EECA84D)) + (comp (ref U3) + (value TMUX1219) + (footprint Package_TO_SOT_SMD:SOT-363_SC-70-6) + (fields + (field (name MPN) TMUX1219DCKR)) + (libsource (lib wbraun_ic_lib) (part TMUX1219) (description "SPDT Analog Switch")) + (sheetpath (names /) (tstamps /)) + (tstamp 5EFF21EB)) + (comp (ref U2) + (value TLV3544) + (footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm) + (datasheet http://www.ti.com/lit/ds/symlink/lm2902-n.pdf) + (fields + (field (name MPN) TLV3544IDR)) + (libsource (lib Amplifier_Operational) (part LM324) (description "Low-Power, Quad-Operational Amplifiers, DIP-14/SOIC-14/SSOP-14")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F1361A5)) + (comp (ref R2) + (value 2k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F1738C6)) + (comp (ref R3) + (value 2k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F1746B9)) + (comp (ref C2) + (value C) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F175A40)) + (comp (ref R6) + (value 220) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F17FA69)) + (comp (ref R7) + (value 887) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F182695)) + (comp (ref R8) + (value 4.42k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F182B91)) + (comp (ref R5) + (value 220) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F1F3E27)) + (comp (ref R14) + (value 220) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F23E9BF)) + (comp (ref U5) + (value TMUX1219) + (footprint Package_TO_SOT_SMD:SOT-363_SC-70-6) + (fields + (field (name MPN) TMUX1219DCKR)) + (libsource (lib wbraun_ic_lib) (part TMUX1219) (description "SPDT Analog Switch")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F2726D5)) + (comp (ref C6) + (value C) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F274735)) + (comp (ref C7) + (value C) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F274E4A)) + (comp (ref R18) + (value R) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F2DAB6A)) + (comp (ref R16) + (value 220) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F2DBE14)) + (comp (ref R21) + (value R) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F2DE853)) + (comp (ref R17) + (value R) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F38F60B)) + (comp (ref C14) + (value 10u) + (footprint Capacitor_SMD:C_0805_2012Metric) + (datasheet ~) + (fields + (field (name MPN) C0805C106K4PACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F3D4515)) + (comp (ref C13) + (value 10u) + (footprint Capacitor_SMD:C_0805_2012Metric) + (datasheet ~) + (fields + (field (name MPN) C0805C106K4PACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F3D6366)) + (comp (ref R13) + (value 4.7k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F46797F)) + (comp (ref C1) + (value 10u) + (footprint Capacitor_SMD:C_0805_2012Metric) + (datasheet ~) + (fields + (field (name MPN) C0805C106K4PACTU)) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F5BA378)) + (comp (ref C4) + (value C) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F623708)) + (comp (ref R9) + (value R) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F65DEED)) + (comp (ref R22) + (value R) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F68539B)) + (comp (ref R12) + (value 4.7k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F685864)) + (comp (ref R29) + (value 4.7k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F754F1E)) + (comp (ref R30) + (value 4.7k) + (footprint Resistor_SMD:R_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part R) (description Resistor)) + (sheetpath (names /) (tstamps /)) + (tstamp 5F755684)) + (comp (ref C18) + (value C) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F8B4876)) + (comp (ref C19) + (value 1u) + (footprint Capacitor_SMD:C_0603_1608Metric) + (datasheet ~) + (libsource (lib Device) (part C) (description "Unpolarized capacitor")) + (sheetpath (names /) (tstamps /)) + (tstamp 5F99D9CC))) + (libparts + (libpart (lib Amplifier_Operational) (part LM2902) + (aliases + (alias LM324) + (alias TLC274) + (alias TLC279) + (alias TL074) + (alias LM324A) + (alias MCP6004) + (alias TL084) + (alias TL064) + (alias LMV324) + (alias LMC6484) + (alias MCP604) + (alias MC33079) + (alias MC33174) + (alias MC33179) + (alias OPA1604) + (alias OPA1679) + (alias OPA4134) + (alias OPA4340UA) + (alias OPA4376) + (alias MCP6L94) + (alias TSV914) + (alias ADA4807-4) + (alias TSV994)) + (description "Low-Power, Quad-Operational Amplifiers, DIP-14/SOIC-14/SSOP-14") + (docs http://www.ti.com/lit/ds/symlink/lm2902-n.pdf) + (footprints + (fp SOIC*3.9x8.7mm*P1.27mm*) + (fp DIP*W7.62mm*) + (fp TSSOP*4.4x5mm*P0.65mm*) + (fp SSOP*5.3x6.2mm*P0.65mm*) + (fp MSOP*3x3mm*P0.5mm*)) + (fields + (field (name Reference) U) + (field (name Value) LM2902)) + (pins + (pin (num 1) (name ~) (type output)) + (pin (num 2) (name -) (type input)) + (pin (num 3) (name +) (type input)) + (pin (num 4) (name V+) (type power_in)) + (pin (num 5) (name +) (type input)) + (pin (num 6) (name -) (type input)) + (pin (num 7) (name ~) (type output)) + (pin (num 8) (name ~) (type output)) + (pin (num 9) (name -) (type input)) + (pin (num 10) (name +) (type input)) + (pin (num 11) (name V-) (type power_in)) + (pin (num 12) (name +) (type input)) + (pin (num 13) (name -) (type input)) + (pin (num 14) (name ~) (type output)))) + (libpart (lib Connector) (part Conn_01x02_Female) + (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)") + (docs ~) + (footprints + (fp Connector*:*_1x??_*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x02_Female)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)))) + (libpart (lib Connector) (part Conn_01x05_Male) + (description "Generic connector, single row, 01x05, script generated (kicad-library-utils/schlib/autogen/connector/)") + (docs ~) + (footprints + (fp Connector*:*_1x??_*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x05_Male)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)) + (pin (num 3) (name Pin_3) (type passive)) + (pin (num 4) (name Pin_4) (type passive)) + (pin (num 5) (name Pin_5) (type passive)))) + (libpart (lib Connector) (part Conn_Coaxial) + (description "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)") + (docs " ~") + (footprints + (fp *BNC*) + (fp *SMA*) + (fp *SMB*) + (fp *SMC*) + (fp *Cinch*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_Coaxial)) + (pins + (pin (num 1) (name In) (type passive)) + (pin (num 2) (name Ext) (type passive)))) + (libpart (lib Connector) (part TestPoint) + (description "test point") + (docs ~) + (footprints + (fp Pin*) + (fp Test*)) + (fields + (field (name Reference) TP) + (field (name Value) TestPoint)) + (pins + (pin (num 1) (name 1) (type passive)))) + (libpart (lib Device) (part C) + (description "Unpolarized capacitor") + (docs ~) + (footprints + (fp C_*)) + (fields + (field (name Reference) C) + (field (name Value) C)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib Device) (part D_Schottky) + (description "Schottky diode") + (docs ~) + (footprints + (fp TO-???*) + (fp *_Diode_*) + (fp *SingleDiode*) + (fp D_*)) + (fields + (field (name Reference) D) + (field (name Value) D_Schottky)) + (pins + (pin (num 1) (name K) (type passive)) + (pin (num 2) (name A) (type passive)))) + (libpart (lib Device) (part LED_ARGB) + (description "RGB LED, anode/red/green/blue") + (docs ~) + (footprints + (fp LED*) + (fp LED_SMD:*) + (fp LED_THT:*)) + (fields + (field (name Reference) D) + (field (name Value) LED_ARGB)) + (pins + (pin (num 1) (name A) (type passive)) + (pin (num 2) (name RK) (type passive)) + (pin (num 3) (name GK) (type passive)) + (pin (num 4) (name BK) (type passive)))) + (libpart (lib Device) (part R) + (description Resistor) + (docs ~) + (footprints + (fp R_*)) + (fields + (field (name Reference) R) + (field (name Value) R)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib Switch) (part SW_Push) + (description "Push button switch, generic, two pins") + (docs ~) + (fields + (field (name Reference) SW) + (field (name Value) SW_Push)) + (pins + (pin (num 1) (name 1) (type passive)) + (pin (num 2) (name 2) (type passive)))) + (libpart (lib Switch) (part SW_SPDT) + (description "Switch, single pole double throw") + (docs ~) + (fields + (field (name Reference) SW) + (field (name Value) SW_SPDT)) + (pins + (pin (num 1) (name A) (type passive)) + (pin (num 2) (name B) (type passive)) + (pin (num 3) (name C) (type passive)))) + (libpart (lib Transistor_FET) (part DMC2053UVT) + (aliases + (alias DMC3071LVT)) + (description "4.6A/-3.2A Id, 20V Vds, Complementary pair enhancement mode P-Channel and N-Channel MOSFET, TSOT-23-6") + (docs https://www.diodes.com/assets/Datasheets/DMC2053UVT.pdf) + (footprints + (fp TSOT?23*)) + (fields + (field (name Reference) Q) + (field (name Value) DMC2053UVT) + (field (name Footprint) Package_TO_SOT_SMD:TSOT-23-6)) + (pins + (pin (num 1) (name G) (type passive)) + (pin (num 2) (name S) (type passive)) + (pin (num 3) (name G) (type passive)) + (pin (num 4) (name D) (type passive)) + (pin (num 5) (name S) (type passive)) + (pin (num 6) (name D) (type passive)))) + (libpart (lib wbraun_ic_lib) (part HMC1041Z) + (description "AMR Magnetic Sensor") + (footprints + (fp HMC1041Z)) + (fields + (field (name Reference) U) + (field (name Value) HMC1041Z)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)) + (pin (num 3) (name ~) (type passive)) + (pin (num 4) (name ~) (type passive)) + (pin (num 5) (name ~) (type passive)) + (pin (num 6) (name ~) (type passive)) + (pin (num 7) (name ~) (type passive)) + (pin (num 8) (name ~) (type passive)))) + (libpart (lib wbraun_ic_lib) (part LP2985) + (description "Linear Regulator, SOT-23") + (footprints + (fp SOT-23-5) + (fp SC-74A) + (fp SOT-753)) + (fields + (field (name Reference) U) + (field (name Value) LP2985)) + (pins + (pin (num 1) (name VIN) (type power_in)) + (pin (num 2) (name GND) (type power_in)) + (pin (num 3) (name EN) (type input)) + (pin (num 4) (name BYPASS) (type passive)) + (pin (num 5) (name VOUT) (type power_out)))) + (libpart (lib wbraun_ic_lib) (part PIC16F1776-IMX) + (description "PIC Microcontroller") + (fields + (field (name Reference) U) + (field (name Value) PIC16F1776-IMX)) + (pins + (pin (num 1) (name RA2) (type BiDi)) + (pin (num 2) (name RA3) (type BiDi)) + (pin (num 3) (name RA4) (type BiDi)) + (pin (num 4) (name RA5) (type BiDi)) + (pin (num 5) (name VSS) (type power_in)) + (pin (num 6) (name RA7) (type BiDi)) + (pin (num 7) (name RA6) (type BiDi)) + (pin (num 8) (name RC0) (type BiDi)) + (pin (num 9) (name RC1) (type BiDi)) + (pin (num 10) (name RC2) (type BiDi)) + (pin (num 11) (name RC3) (type BiDi)) + (pin (num 12) (name RC4) (type BiDi)) + (pin (num 13) (name RC5) (type BiDi)) + (pin (num 14) (name RC6) (type BiDi)) + (pin (num 15) (name RC7) (type BiDi)) + (pin (num 16) (name VSS) (type power_in)) + (pin (num 17) (name VDD) (type power_in)) + (pin (num 18) (name RB0) (type BiDi)) + (pin (num 19) (name RB1) (type BiDi)) + (pin (num 20) (name RB2) (type BiDi)) + (pin (num 21) (name RB3) (type BiDi)) + (pin (num 22) (name RB4) (type BiDi)) + (pin (num 23) (name RB5) (type BiDi)) + (pin (num 24) (name RB6/ICSPCLK) (type BiDi)) + (pin (num 25) (name RB7/ICSPDAT) (type BiDi)) + (pin (num 26) (name RE3/MCLR) (type BiDi)) + (pin (num 27) (name RA0) (type BiDi)) + (pin (num 28) (name RA1) (type BiDi)) + (pin (num 29) (name EP) (type power_in)))) + (libpart (lib wbraun_ic_lib) (part TMUX1219) + (description "SPDT Analog Switch") + (footprints + (fp SOT-23-6) + (fp SOT-363_SC-70-6)) + (fields + (field (name Reference) U) + (field (name Value) TMUX1219)) + (pins + (pin (num 1) (name SEL) (type input)) + (pin (num 2) (name VDD) (type power_in)) + (pin (num 3) (name GND) (type power_in)) + (pin (num 4) (name S1) (type passive)) + (pin (num 5) (name D) (type passive)) + (pin (num 6) (name S2) (type passive)))) + (libpart (lib wbraun_ic_lib) (part mounting-hole-nc) + (description mounting-hole) + (fields + (field (name Reference) J) + (field (name Value) mounting-hole-nc)))) + (libraries + (library (logical Amplifier_Operational) + (uri /usr/share/kicad/library/Amplifier_Operational.lib)) + (library (logical Connector) + (uri /usr/share/kicad/library/Connector.lib)) + (library (logical Device) + (uri /usr/share/kicad/library/Device.lib)) + (library (logical Switch) + (uri /usr/share/kicad/library/Switch.lib)) + (library (logical Transistor_FET) + (uri /usr/share/kicad/library/Transistor_FET.lib)) + (library (logical wbraun_ic_lib) + (uri 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50 0000 L CNN +F 1 "1u" H 13565 1155 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 13488 1050 50 0001 C CNN +F 3 "~" H 13450 1200 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H 5600 -1650 50 0001 C CNN "MPN" + 1 13450 1200 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R30 +U 1 1 5F831B91 +P 13800 750 +F 0 "R30" V 14007 750 50 0000 C CNN +F 1 "130" V 13916 750 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 13730 750 50 0001 C CNN +F 3 "~" H 13800 750 50 0001 C CNN +F 4 "RC0603FR-07130RL" H 13800 750 50 0001 C CNN "MPN" + 1 13800 750 + 0 -1 -1 0 +$EndComp +$Comp +L Device:C C29 +U 1 1 5F831B9C +P 14950 1200 +F 0 "C29" H 15065 1246 50 0000 L CNN +F 1 "1u" H 15065 1155 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 14988 1050 50 0001 C CNN +F 3 "~" H 14950 1200 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H 7100 -1650 50 0001 C CNN "MPN" + 1 14950 1200 + 1 0 0 -1 +$EndComp +$Comp +L Reference_Voltage:LM4041LP-ADJ U8 +U 1 1 5F831BA6 +P 14600 1200 +F 0 "U8" V 14646 1112 50 0000 R CNN +F 1 "LM4041LP-ADJ" V 14300 1250 50 0000 R CNN +F 2 "Package_TO_SOT_SMD:SOT-23" H 14600 1000 50 0001 C CIN +F 3 "http://www.ti.com/lit/ds/symlink/lm4041-n.pdf" H 14700 1350 50 0001 C CIN +F 4 "LM4041CYM3-ADJ-TR" H 14600 1200 50 0001 C CNN "MPN" + 1 14600 1200 + 0 -1 -1 0 +$EndComp +$Comp +L Device:R R32 +U 1 1 5F831BB0 +P 14150 1000 +F 0 "R32" H 14220 1046 50 0000 L CNN +F 1 "32.4k" H 14220 955 50 0000 L CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 14080 1000 50 0001 C CNN +F 3 "~" H 14150 1000 50 0001 C CNN +F 4 "RC0603FR-0732K4L" H 14150 1000 50 0001 C CNN "MPN" + 1 14150 1000 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R33 +U 1 1 5F831BBA +P 14150 1400 +F 0 "R33" H 14220 1446 50 0000 L CNN +F 1 "32.4k" H 14220 1355 50 0000 L CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 14080 1400 50 0001 C CNN +F 3 "~" H 14150 1400 50 0001 C CNN +F 4 "RC0603FR-0732K4L" H 14150 1400 50 0001 C CNN "MPN" + 1 14150 1400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12750 1200 12850 1200 +Wire Wire Line + 13050 900 13050 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~ 0 +VSW +Text Label 12400 1200 2 50 ~ 0 +VSW +Wire Wire Line + 12400 1200 12450 1200 +Wire Wire Line + 12400 3050 12450 3050 +$Comp +L power:GND #PWR0125 +U 1 1 5F8BC388 +P 15000 2600 +F 0 "#PWR0125" H 15000 2350 50 0001 C CNN +F 1 "GND" H 15005 2427 50 0000 C CNN +F 2 "" H 15000 2600 50 0001 C CNN +F 3 "" H 15000 2600 50 0001 C CNN + 1 15000 2600 + 0 -1 -1 0 +$EndComp +$Comp +L power:+5V #PWR0126 +U 1 1 5F8BD10E +P 15000 1650 +F 0 "#PWR0126" H 15000 1500 50 0001 C CNN +F 1 "+5V" H 15015 1823 50 0000 C CNN +F 2 "" H 15000 1650 50 0001 C CNN +F 3 "" H 15000 1650 50 0001 C CNN + 1 15000 1650 + 0 1 1 0 +$EndComp +$Comp +L Device:R R36 +U 1 1 5F8E4246 +P 1200 4700 +F 0 "R36" V 1407 4700 50 0000 C CNN +F 1 "4.7" V 1316 4700 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 1130 4700 50 0001 C CNN +F 3 "~" H 1200 4700 50 0001 C CNN +F 4 "RC0603FR-074R7L" H 1200 4700 50 0001 C CNN "MPN" + 1 1200 4700 + 0 1 -1 0 +$EndComp +$Comp +L Device:R R37 +U 1 1 5F8E544B +P 2350 4700 +F 0 "R37" V 2557 4700 50 0000 C CNN +F 1 "4.7" V 2466 4700 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 2280 4700 50 0001 C CNN +F 3 "~" H 2350 4700 50 0001 C CNN +F 4 "RC0603FR-074R7L" H 2350 4700 50 0001 C CNN "MPN" + 1 2350 4700 + 0 1 -1 0 +$EndComp +$Comp +L Device:C C31 +U 1 1 5F8E5AC9 +P 1550 5000 +F 0 "C31" H 1665 5046 50 0000 L CNN +F 1 "1u" H 1665 4955 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 1588 4850 50 0001 C CNN +F 3 "~" H 1550 5000 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H -6300 2150 50 0001 C CNN "MPN" + 1 1550 5000 + -1 0 0 -1 +$EndComp +$Comp +L Device:C C32 +U 1 1 5F8E5F20 +P 2050 5000 +F 0 "C32" H 2165 5046 50 0000 L CNN +F 1 "1u" H 2165 4955 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 2088 4850 50 0001 C CNN +F 3 "~" H 2050 5000 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H -5800 2150 50 0001 C CNN "MPN" + 1 2050 5000 + -1 0 0 -1 +$EndComp +Wire Wire Line + 14950 1650 15000 1650 +Connection ~ 14950 1650 +Wire Wire Line + 14950 2600 15000 2600 +Connection ~ 14950 2600 +Text Label 900 4700 2 50 ~ 0 +VBIAS+ +Text Label 2650 4700 0 50 ~ 0 +VBIAS- +Wire Wire Line + 4050 2300 4100 2300 +Connection ~ 4100 2300 +$Comp +L power:+5V #PWR0128 +U 1 1 5FA471B5 +P 3550 1050 +F 0 "#PWR0128" H 3550 900 50 0001 C CNN +F 1 "+5V" V 3565 1178 50 0000 L CNN +F 2 "" H 3550 1050 50 0001 C CNN +F 3 "" H 3550 1050 50 0001 C CNN + 1 3550 1050 + 0 1 1 0 +$EndComp +Wire Wire Line + 3550 1050 3500 1050 +Wire Wire Line + 3500 1050 3500 1100 +Wire Wire Line + 13400 8050 14300 8050 +Wire Wire Line + 13400 8900 14300 8900 +$Comp +L power:GND #PWR0124 +U 1 1 5FC33E84 +P 10400 5250 +F 0 "#PWR0124" H 10400 5000 50 0001 C CNN +F 1 "GND" H 10405 5077 50 0000 C CNN +F 2 "" H 10400 5250 50 0001 C CNN +F 3 "" H 10400 5250 50 0001 C CNN + 1 10400 5250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10400 5100 10400 5250 +$Comp +L Device:D D4 +U 1 1 5FC332EB +P 10400 4950 +F 0 "D4" V 10354 5030 50 0000 L CNN +F 1 "NTSAF345T3G" V 10445 5030 50 0000 L CNN +F 2 "Diode_SMD:D_SMA" H 10400 4950 50 0001 C CNN +F 3 "~" H 10400 4950 50 0001 C CNN +F 4 "NTSAF345T3G" H 10400 4950 50 0001 C CNN "MPN" + 1 10400 4950 + 0 1 1 0 +$EndComp +Wire Wire Line + 13450 2600 14150 2600 +Wire Wire Line + 13450 3500 13650 3500 +Connection ~ 13450 3500 +Wire Wire Line + 13950 3500 14150 3500 +Connection ~ 14150 3500 +Wire Wire Line + 1800 5300 1800 5400 +Connection ~ 1800 5300 +$Comp +L power:GNDREF #PWR0127 +U 1 1 5F6AA7DE +P 1800 5400 +F 0 "#PWR0127" H 1800 5150 50 0001 C CNN +F 1 "GNDREF" H 1805 5227 50 0000 C CNN +F 2 "" H 1800 5400 50 0001 C CNN +F 3 "" H 1800 5400 50 0001 C CNN + 1 1800 5400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2050 5300 2050 5150 +Wire Wire Line + 1800 5300 2050 5300 +Wire Wire Line + 1550 5300 1550 5150 +Wire Wire Line + 1550 5300 1800 5300 +Wire Wire Line + 1350 4700 1550 4700 +Wire Wire Line + 1550 4700 1550 4850 +Wire Wire Line + 2200 4700 2050 4700 +Wire Wire Line + 2050 4700 2050 4850 +Wire Wire Line + 900 4700 1050 4700 +Wire Wire Line + 2650 4700 2500 4700 +Wire Wire Line + 2650 3600 2650 4400 +Wire Wire Line + 2650 4400 2050 4400 +Wire Wire Line + 2050 4400 2050 4700 +Wire Wire Line + 2200 3600 2650 3600 +Connection ~ 2050 4700 +Wire Wire Line + 1550 4700 1550 4400 +Wire Wire Line + 1550 4400 750 4400 +Wire Wire Line + 750 4400 750 3600 +Wire Wire Line + 750 3600 1400 3600 +Connection ~ 1550 4700 +$Comp +L Device:C C18 +U 1 1 5F8D9386 +P 3750 5950 +F 0 "C18" H 3865 5996 50 0000 L CNN +F 1 "DNP" H 3865 5905 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 3788 5800 50 0001 C CNN +F 3 "~" H 3750 5950 50 0001 C CNN +F 4 "" H 3750 5950 50 0001 C CNN "MPN" + 1 3750 5950 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0129 +U 1 1 5F8DAA06 +P 3750 6150 +F 0 "#PWR0129" H 3750 5900 50 0001 C CNN +F 1 "GND" H 3755 5977 50 0000 C CNN +F 2 "" H 3750 6150 50 0001 C CNN +F 3 "" H 3750 6150 50 0001 C CNN + 1 3750 6150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3400 5700 3750 5700 +Wire Wire Line + 3750 5700 3750 5800 +Wire Wire Line + 3400 5700 3400 6250 +Wire Wire Line + 3750 6100 3750 6150 +Wire Wire Line + 3400 5600 3400 5700 +Connection ~ 3400 5700 +$Comp +L Device:C C24 +U 1 1 5F99788E +P 8850 6000 +F 0 "C24" H 8965 6046 50 0000 L CNN +F 1 "DNP" H 8965 5955 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 8888 5850 50 0001 C CNN +F 3 "~" H 8850 6000 50 0001 C CNN +F 4 "" H 8850 6000 50 0001 C CNN "MPN" + 1 8850 6000 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0130 +U 1 1 5F998210 +P 8850 6250 +F 0 "#PWR0130" H 8850 6000 50 0001 C CNN +F 1 "GND" H 8855 6077 50 0000 C CNN +F 2 "" H 8850 6250 50 0001 C CNN +F 3 "" H 8850 6250 50 0001 C CNN + 1 8850 6250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8350 5600 8350 5750 +Wire Wire Line + 8850 5850 8850 5750 +Wire Wire Line + 8850 5750 8350 5750 +Connection ~ 8350 5750 +Wire Wire Line + 8350 5750 8350 6300 +Wire Wire Line + 8850 6150 8850 6250 +Text Label 15200 3500 0 50 ~ 0 +VBIAS- +Text Label 15200 750 0 50 ~ 0 +VBIAS+ +Wire Wire Line + 14950 750 15200 750 +Connection ~ 14950 750 +Wire Wire Line + 14950 3500 15200 3500 +Connection ~ 14950 3500 +Text Label 7700 1250 2 50 ~ 0 +SW2 +Text Label 7200 1250 2 50 ~ 0 +SW1 +Wire Wire Line + 10400 4350 10400 4800 +$Comp +L Device:C C17 +U 1 1 5F508863 +P 11450 4800 +F 0 "C17" H 11565 4846 50 0000 L CNN +F 1 "22u" H 11565 4755 50 0000 L CNN +F 2 "Capacitor_SMD:C_0805_2012Metric" H 11488 4650 50 0001 C CNN +F 3 "~" H 11450 4800 50 0001 C CNN +F 4 "LMK212BBJ226MG-T" H 11450 4800 50 0001 C CNN "MPN" + 1 11450 4800 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C33 +U 1 1 5F50886A +P 11850 4800 +F 0 "C33" H 11965 4846 50 0000 L CNN +F 1 "22u" H 11965 4755 50 0000 L CNN +F 2 "Capacitor_SMD:C_0805_2012Metric" H 11888 4650 50 0001 C CNN +F 3 "~" H 11850 4800 50 0001 C CNN +F 4 "LMK212BBJ226MG-T" H 11850 4800 50 0001 C CNN "MPN" + 1 11850 4800 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0101 +U 1 1 5F508870 +P 11450 5250 +F 0 "#PWR0101" H 11450 5000 50 0001 C CNN +F 1 "GND" H 11455 5077 50 0000 C CNN +F 2 "" H 11450 5250 50 0001 C CNN +F 3 "" H 11450 5250 50 0001 C CNN + 1 11450 5250 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0131 +U 1 1 5F508876 +P 11850 5250 +F 0 "#PWR0131" H 11850 5000 50 0001 C CNN +F 1 "GND" H 11855 5077 50 0000 C CNN +F 2 "" H 11850 5250 50 0001 C CNN +F 3 "" H 11850 5250 50 0001 C CNN + 1 11850 5250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 11850 4950 11850 5250 +Wire Wire Line + 12250 4850 12250 4450 +Connection ~ 12250 4450 +Wire Wire Line + 12250 4450 12350 4450 +Wire Wire Line + 11450 4950 11450 5250 +Wire Wire Line + 11450 4650 11450 4450 +Connection ~ 11450 4450 +Wire Wire Line + 11450 4450 11850 4450 +Wire Wire Line + 11850 4650 11850 4450 +Connection ~ 11850 4450 +Wire Wire Line + 11850 4450 12250 4450 +$Comp +L Device:C C34 +U 1 1 5F754CC2 +P 13450 1950 +F 0 "C34" H 13565 1996 50 0000 L CNN +F 1 "1u" H 13565 1905 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 13488 1800 50 0001 C CNN +F 3 "~" H 13450 1950 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H 5600 -900 50 0001 C CNN "MPN" + 1 13450 1950 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0132 +U 1 1 5F755250 +P 13450 2200 +F 0 "#PWR0132" H 13450 1950 50 0001 C CNN +F 1 "GND" H 13455 2027 50 0000 C CNN +F 2 "" H 13450 2200 50 0001 C CNN +F 3 "" H 13450 2200 50 0001 C CNN + 1 13450 2200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13450 1650 13450 1800 +Wire Wire Line + 13450 2100 13450 2200 +$Comp +L Device:R_POT_TRIM_US RV1 +U 1 1 5F7A1D58 +P 3150 7600 +F 0 "RV1" V 2950 7600 50 0000 C CNN +F 1 "2k" V 3050 7600 50 0000 C CNN +F 2 "wbraun_smd:TRIMMER_PVG3A" H 3150 7600 50 0001 C CNN +F 3 "~" H 3150 7600 50 0001 C CNN +F 4 "PVG3A202C01R00" H 3150 7600 50 0001 C CNN "MPN" + 1 3150 7600 + 0 1 1 0 +$EndComp +Wire Wire Line + 3400 7600 3350 7600 +Wire Wire Line + 3150 7750 3350 7750 +Wire Wire Line + 3350 7750 3350 7600 +Connection ~ 3350 7600 +Wire Wire Line + 3350 7600 3300 7600 +$Comp +L Device:R R38 +U 1 1 5F7F2B05 +P 3150 8050 +F 0 "R38" V 3357 8050 50 0000 C CNN +F 1 "6.81k" V 3266 8050 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 3080 8050 50 0001 C CNN +F 3 "~" H 3150 8050 50 0001 C CNN +F 4 "RC0603FR-076K81L" H 3150 8050 50 0001 C CNN "MPN" + 1 3150 8050 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 3350 7750 3350 8050 +Wire Wire Line + 3350 8050 3300 8050 +Connection ~ 3350 7750 +Wire Wire Line + 3000 8050 2950 8050 +Wire Wire Line + 2950 8050 2950 7600 +Wire Wire Line + 2950 7600 3000 7600 +Wire Wire Line + 2950 7600 2900 7600 +Connection ~ 2950 7600 +$Comp +L Device:R R39 +U 1 1 5F86ABB6 +P 13500 4450 +F 0 "R39" V 13707 4450 50 0000 C CNN +F 1 "DNP" V 13616 4450 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 13430 4450 50 0001 C CNN +F 3 "~" H 13500 4450 50 0001 C CNN + 1 13500 4450 + 0 -1 -1 0 +$EndComp +$Comp +L Device:C C35 +U 1 1 5F86C68B +P 13950 4450 +F 0 "C35" V 13698 4450 50 0000 C CNN +F 1 "DNP" V 13789 4450 50 0000 C CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 13988 4300 50 0001 C CNN +F 3 "~" H 13950 4450 50 0001 C CNN + 1 13950 4450 + 0 1 1 0 +$EndComp +$Comp +L power:GND #PWR0133 +U 1 1 5F86CED0 +P 14200 4450 +F 0 "#PWR0133" H 14200 4200 50 0001 C CNN +F 1 "GND" H 14205 4277 50 0000 C CNN +F 2 "" H 14200 4450 50 0001 C CNN +F 3 "" H 14200 4450 50 0001 C CNN + 1 14200 4450 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 13350 4450 13200 4450 +Connection ~ 13200 4450 +Wire Wire Line + 13650 4450 13800 4450 +Wire Wire Line + 14100 4450 14200 4450 +$Comp +L Connector:Conn_01x02_Female J8 +U 1 1 5F910CA0 +P 8450 4650 +F 0 "J8" H 8342 4325 50 0000 C CNN +F 1 "B2B-XH-A" H 8342 4416 50 0000 C CNN +F 2 "Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical" H 8450 4650 50 0001 C CNN +F 3 "~" H 8450 4650 50 0001 C CNN +F 4 "B2B-XH-A(LF)(SN)" H 8450 4650 50 0001 C CNN "MPN" + 1 8450 4650 + -1 0 0 1 +$EndComp +$Comp +L power:GND #PWR0134 +U 1 1 5F9B8093 +P 8750 5100 +F 0 "#PWR0134" H 8750 4850 50 0001 C CNN +F 1 "GND" H 8755 4927 50 0000 C CNN +F 2 "" H 8750 5100 50 0001 C CNN +F 3 "" H 8750 5100 50 0001 C CNN + 1 8750 5100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8650 4650 8750 4650 +Wire Wire Line + 8750 4650 8750 5100 +Wire Wire Line + 8650 4550 8900 4550 +Wire Wire Line + 8900 4550 8900 4350 +Wire Wire Line + 8900 4350 9800 4350 +Wire Wire Line + 9800 4350 9950 4350 +Connection ~ 9800 4350 +Wire Wire Line + 10150 4350 10400 4350 +Connection ~ 10400 4350 +Text Label 14350 4950 0 50 ~ 0 +5V_INT +Text Label 13450 1650 0 50 ~ 0 +5V_INT +$Comp +L Switch:SW_SPDT SW3 +U 1 1 5EF02AA2 +P 10800 3350 +F 0 "SW3" H 10850 3150 50 0000 C CNN +F 1 "SW_SPDT" H 10850 3050 50 0000 C CNN +F 2 "Button_Switch_THT:SW_CuK_OS102011MA1QN1_SPDT_Angled" H 10800 3350 50 0001 C CNN +F 3 "~" H 10800 3350 50 0001 C CNN +F 4 "EG1247" H 2600 2450 50 0001 C CNN "MPN" + 1 10800 3350 + 1 0 0 1 +$EndComp +Text Label 11600 4450 0 50 ~ 0 +VIN +Text Label 10550 3350 2 50 ~ 0 +VIN +Text Label 11050 3450 0 50 ~ 0 +DC_EN +Wire Wire Line + 11000 3450 11050 3450 +Wire Wire Line + 10600 3350 10550 3350 +Wire Wire Line + 12250 4850 12500 4850 +Text Label 12450 4950 2 50 ~ 0 +DC_EN +$Comp +L Device:R R40 +U 1 1 5FE03992 +P 11050 3700 +F 0 "R40" H 11120 3746 50 0000 L CNN +F 1 "32.4k" H 11120 3655 50 0000 L CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 10980 3700 50 0001 C CNN +F 3 "~" H 11050 3700 50 0001 C CNN +F 4 "RC0603FR-0732K4L" H 11050 3700 50 0001 C CNN "MPN" + 1 11050 3700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 11050 3450 11050 3550 +$Comp +L power:GND #PWR0135 +U 1 1 5FE2D43B +P 11050 3900 +F 0 "#PWR0135" H 11050 3650 50 0001 C CNN +F 1 "GND" H 11055 3727 50 0000 C CNN +F 2 "" H 11050 3900 50 0001 C CNN +F 3 "" H 11050 3900 50 0001 C CNN + 1 11050 3900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 11050 3850 11050 3900 +Wire Wire Line + 10800 4350 10800 4450 +Wire Wire Line + 10800 4450 11450 4450 +Wire Wire Line + 10400 4350 10800 4350 +Text Notes 1100 8900 0 50 ~ 0 +Sensor reads 7.3mV/G - 11.42mV/G\nThis includes self heating (50C nominal)\nFlux concentrator is 1.32G/A typical (+-20% ?)\nGain of 19.5 - 8.3 V/V\nGain of 12.5 nominal\n +$Comp +L Device:C C36 +U 1 1 5FD84855 +P 12350 3700 +F 0 "C36" H 12465 3746 50 0000 L CNN +F 1 "1u" H 12465 3655 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 12388 3550 50 0001 C CNN +F 3 "~" H 12350 3700 50 0001 C CNN +F 4 "CL10A105KO8NNNC" H 4850 -350 50 0001 C CNN "MPN" + 1 12350 3700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 12350 3850 12350 3950 +Wire Wire Line + 12350 3950 12150 3950 +Connection ~ 12350 3950 +Wire Wire Line + 12350 3950 12350 4050 +$Comp +L power:GND #PWR0136 +U 1 1 5FDD8694 +P 12350 3500 +F 0 "#PWR0136" H 12350 3250 50 0001 C CNN +F 1 "GND" H 12355 3327 50 0000 C CNN +F 2 "" H 12350 3500 50 0001 C CNN +F 3 "" H 12350 3500 50 0001 C CNN + 1 12350 3500 + -1 0 0 1 +$EndComp +Wire Wire Line + 12350 3500 12350 3550 +Text Notes 7250 8400 0 50 ~ 0 +On resistance of 3 Ohms +$Comp +L Device:R R24 +U 1 1 5FDAB543 +P 7850 1000 +F 0 "R24" H 7920 1046 50 0000 L CNN +F 1 "4.7k" H 7920 955 50 0000 L CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 7780 1000 50 0001 C CNN +F 3 "~" H 7850 1000 50 0001 C CNN +F 4 "RC0603FR-074K7L" H -2150 -3550 50 0001 C CNN "MPN" + 1 7850 1000 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/pcb/current-sense/fp-info-cache b/pcb/current-sense/fp-info-cache new file mode 100755 index 0000000..19a6cf4 --- /dev/null +++ b/pcb/current-sense/fp-info-cache @@ -0,0 +1,84673 @@ +19359363183711068 +Battery +BatteryHolder_Bulgin_BX0036_1xC +Bulgin Battery Holder, BX0036, Battery Type C (https://www.bulgin.com/products/pub/media/bulgin/data/Battery_holders.pdf) +Bulgin BX0036 +0 +2 +2 +Battery +BatteryHolder_ComfortableElectronic_CH273-2450_1x2450 +Comfortable Electronic CR2450 battery holder, http://www.comf.com.tw/ProductDetail.asp?no=148 +Comfortable Electronic CR2450 +0 +2 +2 +Battery +BatteryHolder_Eagle_12BH611-GR +https://eu.mouser.com/datasheet/2/209/EPD-200766-1274481.pdf +9V Battery Holder +0 +2 +2 +Battery +BatteryHolder_Keystone_103_1x20mm +http://www.keyelco.com/product-pdf.cfm?p=719 +Keystone type 103 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_104_1x23mm +http://www.keyelco.com/product-pdf.cfm?p=744 +Keystone type 104 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_105_1x2430 +http://www.keyelco.com/product-pdf.cfm?p=745 +Keystone type 105 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_106_1x20mm +http://www.keyelco.com/product-pdf.cfm?p=720 +Keystone type 106 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_107_1x23mm +http://www.keyelco.com/product-pdf.cfm?p=746 +Keystone type 107 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_500 +Keystone #500, CR1220 battery holder, http://www.keyelco.com/product-pdf.cfm?p=710 +CR1220 battery holder +0 +2 +2 +Battery +BatteryHolder_Keystone_1042_1x18650 +Battery holder for 18650 cylindrical cells http://www.keyelco.com/product.cfm/product_id/918 +18650 Keystone 1042 Li-ion +0 +2 +2 +Battery +BatteryHolder_Keystone_1058_1x2032 +http://www.keyelco.com/product-pdf.cfm?p=14028 +Keystone type 1058 coin cell retainer +0 +2 +2 +Battery +BatteryHolder_Keystone_1060_1x2032 +http://www.keyelco.com/product-pdf.cfm?p=726 +CR2032 BR2032 BatteryHolder Battery +0 +2 +2 +Battery +BatteryHolder_Keystone_2460_1xAA +https://www.keyelco.com/product-pdf.cfm?p=1025 +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2462_2xAA +2xAA cell battery holder, Keystone P/N 2462, https://www.keyelco.com/product-pdf.cfm?p=1027 +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2466_1xAAA +1xAAA Battery Holder, Keystone, Plastic Case, http://www.keyelco.com/product-pdf.cfm?p=1031 +AAA battery holder Keystone +0 +2 +2 +Battery +BatteryHolder_Keystone_2468_2xAAA +2xAAA cell battery holder, Keystone P/N 2468, http://www.keyelco.com/product-pdf.cfm?p=1033 +AAA battery cell holder +0 +2 +2 +Battery +BatteryHolder_Keystone_2479_3xAAA +Keystone Battery Holder, 2479, Battery Type 3xAAA (Script generated with StandardBox.py) (Keystone Battery Holder, 2479, Battery Type 3xAAA) +Keystone Battery Holder 2479 Battery Type 3xAAA +0 +2 +2 +Battery +BatteryHolder_Keystone_2993 +http://www.keyelco.com/product-pdf.cfm?p=776 +Keystone type 2993 negative battery contact +0 +1 +1 +Battery +BatteryHolder_Keystone_2998_1x6.8mm +www.keyelco.com/product-pdf.cfm?p=763 +Keystone type 2998 battery holder +0 +3 +2 +Battery +BatteryHolder_Keystone_3000_1x12mm +http://www.keyelco.com/product-pdf.cfm?p=777 +Keystone type 3000 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3001_1x12mm +http://www.keyelco.com/product-pdf.cfm?p=778 +Keystone type 3001 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3002_1x2032 +https://www.tme.eu/it/Document/a823211ec201a9e209042d155fe22d2b/KEYS2996.pdf +BR2016 CR2016 DL2016 BR2020 CL2020 BR2025 CR2025 DL2025 DR2032 CR2032 DL2032 +0 +3 +2 +Battery +BatteryHolder_Keystone_3008_1x2450 +http://www.keyelco.com/product-pdf.cfm?p=786 +Keystone type 3008 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3009_1x2450 +http://www.keyelco.com/product-pdf.cfm?p=787 +Keystone type 3009 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_Keystone_3034_1x20mm +Keystone 3034 SMD battery holder for 2020, 2025 and 2032 coincell batteries. http://www.keyelco.com/product-pdf.cfm?p=798 +Keystone type 3034 coin cell retainer +0 +3 +2 +Battery +BatteryHolder_LINX_BAT-HLD-012-SMT +SMT battery holder for CR1216/1220/1225, https://linxtechnologies.com/wp/wp-content/uploads/bat-hld-012-smt.pdf +battery holder coin cell cr1216 cr1220 cr1225 +0 +3 +2 +Battery +BatteryHolder_MPD_BA9VPC_1xPP3 +1xPP3 (9V) battery holder, Memory Protection Devices P/N BA9VPC, http://www.memoryprotectiondevices.com/datasheets/BA9VPC-datasheet.pdf +PP3 Battery Holder BA9VPC 9V +0 +2 +2 +Battery +BatteryHolder_MPD_BC2AAPC_2xAA +2xAA cell battery holder, Memory Protection Devices P/N BC2AAPC, http://www.memoryprotectiondevices.com/datasheets/BC2AAPC-datasheet.pdf +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_MPD_BC12AAPC_2xAA +2xAA cell battery holder, Memory Protection Devices P/N BC12AAPC, http://www.memoryprotectiondevices.com/datasheets/BC12AAPC-datasheet.pdf +AA battery cell holder +0 +2 +2 +Battery +BatteryHolder_MPD_BC2003_1x2032 +http://www.memoryprotectiondevices.com/datasheets/BC-2003-datasheet.pdf +BC2003 CR2032 2032 Battery Holder +0 +3 +2 +Battery +BatteryHolder_MPD_BH-18650-PC2 +18650 Battery Holder (http://www.memoryprotectiondevices.com/datasheets/BK-18650-PC2-datasheet.pdf) +18650 Battery Holder +0 +2 +2 +Battery +BatteryHolder_Seiko_MS621F +Seiko MS621F, https://www.sii.co.jp/en/me/files/2014/02/file_EXTENDED_PRDCT_SPEC_75_FILE_11.jpg +Seiko MS621F +0 +2 +2 +Battery +BatteryHolder_TruPower_BH-331P_3xAA +Keystone Battery Holder BH-331P Battery Type 3xAA (Script generated with StandardBox.py) (Keystone Battery Holder BH-331P Battery Type 3xAA) +Battery Holder BH-331P Battery Type 3xAA +0 +2 +2 +Battery +Battery_CR1225 +CR1225 battery +battery CR1225 coin cell +0 +0 +0 +Battery +Battery_Panasonic_CR1025-VSK_Vertical_CircularHoles +Panasonic CR-1025/VSK battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-1025 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR1220-VCN_Vertical_CircularHoles +Panasonic CR-1220/VCN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-1220 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR1632-V1AN_Vertical_CircularHoles +Panasonic CR-1632-V1AN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-1632 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR2025-V1AK_Vertical_CircularHoles +Panasonic CR-2025/V1AK battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-2025 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR2032-VS1N_Vertical_CircularHoles +Panasonic CR-2032/VS1N battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-2032 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR2354-VCN_Vertical_CircularHoles +Panasonic CR-2354/VCN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-2354/VCN coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR2450-VAN_Vertical_CircularHoles +Panasonic CR-2450/VAN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-2450 coin cell +0 +2 +2 +Battery +Battery_Panasonic_CR2477-VCN_Vertical_CircularHoles +Panasonic CR-2477/VCN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-2477 coin cell vertical +0 +2 +2 +Battery +Battery_Panasonic_CR3032-VCN_Vertical_CircularHoles +Panasonic CR-3032/VCN battery, https://industrial.panasonic.com/cdbs/www-data/pdf2/AAA4000/AAA4000D140.pdf +battery CR-3032 coin cell vertical +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.00u_PCB +Cherry MX keyswitch, 1.00u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.00u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.00u_Plate +Cherry MX keyswitch, 1.00u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.00u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.25u_PCB +Cherry MX keyswitch, 1.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.25u_Plate +Cherry MX keyswitch, 1.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.50u_PCB +Cherry MX keyswitch, 1.50u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.50u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.50u_Plate +Cherry MX keyswitch, 1.50u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.50u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.75u_PCB +Cherry MX keyswitch, 1.75u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.75u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_1.75u_Plate +Cherry MX keyswitch, 1.75u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 1.75u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_PCB +Cherry MX keyswitch, 2.00u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Plate +Cherry MX keyswitch, 2.00u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Vertical_PCB +Cherry MX keyswitch, 2.00u, vertical, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u vertical PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.00u_Vertical_Plate +Cherry MX keyswitch, 2.00u, vertical, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.00u vertical plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.25u_PCB +Cherry MX keyswitch, 2.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.25u_Plate +Cherry MX keyswitch, 2.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.75u_PCB +Cherry MX keyswitch, 2.75u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.75u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_2.75u_Plate +Cherry MX keyswitch, 2.75u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 2.75u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_6.25u_PCB +Cherry MX keyswitch, 6.25u, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 6.25u PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_6.25u_Plate +Cherry MX keyswitch, 6.25u, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch 6.25u plate +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_ISOEnter_PCB +Cherry MX keyswitch, ISO Enter, PCB mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch ISO enter PCB +0 +2 +2 +Button_Switch_Keyboard +SW_Cherry_MX_ISOEnter_Plate +Cherry MX keyswitch, ISO Enter, plate mount, http://cherryamericas.com/wp-content/uploads/2014/12/mx_cat.pdf +Cherry MX keyswitch ISO enter plate +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.00u +Matias/ALPS keyswitch, 1.00u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.00u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.25u +Matias/ALPS keyswitch, 1.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.50u +Matias/ALPS keyswitch, 1.50u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.50u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_1.75u +Matias/ALPS keyswitch, 1.75u, http://matias.ca/switches/ +Matias ALPS keyswitch 1.75u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.00u +Matias/ALPS keyswitch, 2.00u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.00u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.25u +Matias/ALPS keyswitch, 2.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_2.75u +Matias/ALPS keyswitch, 2.75u, http://matias.ca/switches/ +Matias ALPS keyswitch 2.75u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_6.25u +Matias/ALPS keyswitch, 6.25u, http://matias.ca/switches/ +Matias ALPS keyswitch 6.25u +0 +2 +2 +Button_Switch_Keyboard +SW_Matias_ISOEnter +Matias/ALPS keyswitch, ISO Enter, http://matias.ca/switches/ +Matias ALPS keyswitch ISO enter +0 +2 +2 +Button_Switch_SMD +Nidec_Copal_SH-7010A +4-bit rotary coded switch, J-hook, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_SMD +Nidec_Copal_SH-7010B +4-bit rotary coded switch, gull wing, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_SMD +Nidec_Copal_SH-7040B +4-bit rotary coded switch, gull wing, Gray code, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +5 +5 +Button_Switch_SMD +Panasonic_EVQPUJ_EVQPUA +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUJ EVQPUA +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUK_EVQPUB +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUK EVQPUB +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUL_EVQPUC +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUL EVQPUC +0 +4 +2 +Button_Switch_SMD +Panasonic_EVQPUM_EVQPUD +http://industrial.panasonic.com/cdbs/www-data/pdf/ATV0000/ATV0000CE5.pdf +SMD SMT SPST EVQPUM EVQPUD +0 +4 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 1x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W8.61mm_P2.54mm_LowProfile +SMD 1x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_9.78x4.72mm_W8.61mm_P2.54mm +SMD 1x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x4.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CHS-01A_W5.08mm_P1.27mm_JPin +SMD 1x-dip-switch SPST Copal_CHS-01A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CHS-01B_W7.62mm_P1.27mm +SMD 1x-dip-switch SPST Copal_CHS-01B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Copal_CVS-01xB_W5.9mm_P1mm +SMD 1x-dip-switch SPST Copal_CVS-01xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +6 +3 +Button_Switch_SMD +SW_DIP_SPSTx01_Slide_Omron_A6S-110x_W8.9mm_P2.54mm +SMD 1x-dip-switch SPST Omron_A6S-110x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +2 +2 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 2x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W8.61mm_P2.54mm_LowProfile +SMD 2x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_9.78x7.26mm_W8.61mm_P2.54mm +SMD 2x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x7.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CHS-02A_W5.08mm_P1.27mm_JPin +SMD 2x-dip-switch SPST Copal_CHS-02A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CHS-02B_W7.62mm_P1.27mm +SMD 2x-dip-switch SPST Copal_CHS-02B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Copal_CVS-02xB_W5.9mm_P1mm +SMD 2x-dip-switch SPST Copal_CVS-02xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +8 +5 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_KingTek_DSHP02TJ_W5.25mm_P1.27mm_JPin +SMD 2x-dip-switch SPST KingTek_DSHP02TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_KingTek_DSHP02TS_W7.62mm_P1.27mm +SMD 2x-dip-switch SPST KingTek_DSHP02TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Omron_A6H-2101_W6.15mm_P1.27mm +SMD 2x-dip-switch SPST Omron_A6H-2101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx02_Slide_Omron_A6S-210x_W8.9mm_P2.54mm +SMD 2x-dip-switch SPST Omron_A6S-210x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +4 +4 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 3x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W8.61mm_P2.54mm_LowProfile +SMD 3x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_9.78x9.8mm_W8.61mm_P2.54mm +SMD 3x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x9.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_Copal_CVS-03xB_W5.9mm_P1mm +SMD 3x-dip-switch SPST Copal_CVS-03xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +10 +7 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_KingTek_DSHP03TJ_W5.25mm_P1.27mm_JPin +SMD 3x-dip-switch SPST KingTek_DSHP03TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_KingTek_DSHP03TS_W7.62mm_P1.27mm +SMD 3x-dip-switch SPST KingTek_DSHP03TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx03_Slide_Omron_A6S-310x_W8.9mm_P2.54mm +SMD 3x-dip-switch SPST Omron_A6S-310x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +6 +6 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 4x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W8.61mm_P2.54mm_LowProfile +SMD 4x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_9.78x12.34mm_W8.61mm_P2.54mm +SMD 4x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x12.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CHS-04A_W5.08mm_P1.27mm_JPin +SMD 4x-dip-switch SPST Copal_CHS-04A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CHS-04B_W7.62mm_P1.27mm +SMD 4x-dip-switch SPST Copal_CHS-04B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Copal_CVS-04xB_W5.9mm_P1mm +SMD 4x-dip-switch SPST Copal_CVS-04xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +12 +9 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_KingTek_DSHP04TJ_W5.25mm_P1.27mm_JPin +SMD 4x-dip-switch SPST KingTek_DSHP04TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_KingTek_DSHP04TS_W7.62mm_P1.27mm +SMD 4x-dip-switch SPST KingTek_DSHP04TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Omron_A6H-4101_W6.15mm_P1.27mm +SMD 4x-dip-switch SPST Omron_A6H-4101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx04_Slide_Omron_A6S-410x_W8.9mm_P2.54mm +SMD 4x-dip-switch SPST Omron_A6S-410x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +8 +8 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 5x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W8.61mm_P2.54mm_LowProfile +SMD 5x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_9.78x14.88mm_W8.61mm_P2.54mm +SMD 5x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x14.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_KingTek_DSHP05TJ_W5.25mm_P1.27mm_JPin +SMD 5x-dip-switch SPST KingTek_DSHP05TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_KingTek_DSHP05TS_W7.62mm_P1.27mm +SMD 5x-dip-switch SPST KingTek_DSHP05TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx05_Slide_Omron_A6S-510x_W8.9mm_P2.54mm +SMD 5x-dip-switch SPST Omron_A6S-510x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +10 +10 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 6x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W8.61mm_P2.54mm_LowProfile +SMD 6x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_9.78x17.42mm_W8.61mm_P2.54mm +SMD 6x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x17.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Copal_CHS-06A_W5.08mm_P1.27mm_JPin +SMD 6x-dip-switch SPST Copal_CHS-06A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Copal_CHS-06B_W7.62mm_P1.27mm +SMD 6x-dip-switch SPST Copal_CHS-06B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_KingTek_DSHP06TJ_W5.25mm_P1.27mm_JPin +SMD 6x-dip-switch SPST KingTek_DSHP06TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_KingTek_DSHP06TS_W7.62mm_P1.27mm +SMD 6x-dip-switch SPST KingTek_DSHP06TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Omron_A6H-6101_W6.15mm_P1.27mm +SMD 6x-dip-switch SPST Omron_A6H-6101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx06_Slide_Omron_A6S-610x_W8.9mm_P2.54mm +SMD 6x-dip-switch SPST Omron_A6S-610x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +12 +12 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 7x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W8.61mm_P2.54mm_LowProfile +SMD 7x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_9.78x19.96mm_W8.61mm_P2.54mm +SMD 7x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x19.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_KingTek_DSHP07TJ_W5.25mm_P1.27mm_JPin +SMD 7x-dip-switch SPST KingTek_DSHP07TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_KingTek_DSHP07TS_W7.62mm_P1.27mm +SMD 7x-dip-switch SPST KingTek_DSHP07TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx07_Slide_Omron_A6S-710x_W8.9mm_P2.54mm +SMD 7x-dip-switch SPST Omron_A6S-710x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +14 +14 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 8x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W8.61mm_P2.54mm_LowProfile +SMD 8x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_9.78x22.5mm_W8.61mm_P2.54mm +SMD 8x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x22.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CHS-08A_W5.08mm_P1.27mm_JPin +SMD 8x-dip-switch SPST Copal_CHS-08A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CHS-08B_W7.62mm_P1.27mm +SMD 8x-dip-switch SPST Copal_CHS-08B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Copal_CVS-08xB_W5.9mm_P1mm +SMD 8x-dip-switch SPST Copal_CVS-08xB, Slide, row spacing 5.9 mm (232 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/cvs.pdf) +SMD DIP Switch SPST Slide 5.9mm 232mil +0 +20 +17 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_KingTek_DSHP08TJ_W5.25mm_P1.27mm_JPin +SMD 8x-dip-switch SPST KingTek_DSHP08TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_KingTek_DSHP08TS_W7.62mm_P1.27mm +SMD 8x-dip-switch SPST KingTek_DSHP08TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Omron_A6H-8101_W6.15mm_P1.27mm +SMD 8x-dip-switch SPST Omron_A6H-8101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx08_Slide_Omron_A6S-810x_W8.9mm_P2.54mm +SMD 8x-dip-switch SPST Omron_A6S-810x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +16 +16 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 9x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W8.61mm_P2.54mm_LowProfile +SMD 9x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_9.78x25.04mm_W8.61mm_P2.54mm +SMD 9x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x25.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_KingTek_DSHP09TJ_W5.25mm_P1.27mm_JPin +SMD 9x-dip-switch SPST KingTek_DSHP09TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_KingTek_DSHP09TS_W7.62mm_P1.27mm +SMD 9x-dip-switch SPST KingTek_DSHP09TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx09_Slide_Omron_A6S-910x_W8.9mm_P2.54mm +SMD 9x-dip-switch SPST Omron_A6S-910x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +18 +18 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 10x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W8.61mm_P2.54mm_LowProfile +SMD 10x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_9.78x27.58mm_W8.61mm_P2.54mm +SMD 10x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x27.58mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Copal_CHS-10A_W5.08mm_P1.27mm_JPin +SMD 10x-dip-switch SPST Copal_CHS-10A, Slide, row spacing 5.08 mm (200 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD, JPin +SMD DIP Switch SPST Slide 5.08mm 200mil SMD JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Copal_CHS-10B_W7.62mm_P1.27mm +SMD 10x-dip-switch SPST Copal_CHS-10B, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.nidec-copal-electronics.com/e/catalog/switch/chs.pdf), SMD +SMD DIP Switch SPST Slide 7.62mm 300mil SMD +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_KingTek_DSHP10TJ_W5.25mm_P1.27mm_JPin +SMD 10x-dip-switch SPST KingTek_DSHP10TJ, Slide, row spacing 5.25 mm (206 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin +SMD DIP Switch SPST Slide 5.25mm 206mil JPin +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_KingTek_DSHP10TS_W7.62mm_P1.27mm +SMD 10x-dip-switch SPST KingTek_DSHP10TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201417455112.pdf) +SMD DIP Switch SPST Slide 7.62mm 300mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Omron_A6H-10101_W6.15mm_P1.27mm +SMD 10x-dip-switch SPST Omron_A6H-10101, Slide, row spacing 6.15 mm (242 mils), body size (see https://www.omron.com/ecb/products/pdf/en-a6h.pdf) +SMD DIP Switch SPST Slide 6.15mm 242mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx10_Slide_Omron_A6S-1010x_W8.9mm_P2.54mm +SMD 10x-dip-switch SPST Omron_A6S-1010x, Slide, row spacing 8.9 mm (350 mils), body size (see http://omronfs.omron.com/en_US/ecb/products/pdf/en-a6s.pdf) +SMD DIP Switch SPST Slide 8.9mm 350mil +0 +20 +20 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 11x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W8.61mm_P2.54mm_LowProfile +SMD 11x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx11_Slide_9.78x30.12mm_W8.61mm_P2.54mm +SMD 11x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x30.12mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +22 +22 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W6.73mm_P2.54mm_LowProfile_JPin +SMD 12x-dip-switch SPST , Slide, row spacing 6.73 mm (264 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile, JPin +SMD DIP Switch SPST Slide 6.73mm 264mil SMD LowProfile JPin +0 +24 +24 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W8.61mm_P2.54mm_LowProfile +SMD 12x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile +SMD DIP Switch SPST Slide 8.61mm 338mil SMD LowProfile +0 +24 +24 +Button_Switch_SMD +SW_DIP_SPSTx12_Slide_9.78x32.66mm_W8.61mm_P2.54mm +SMD 12x-dip-switch SPST , Slide, row spacing 8.61 mm (338 mils), body size 9.78x32.66mm (see e.g. https://www.ctscorp.com/wp-content/uploads/204.pdf), SMD +SMD DIP Switch SPST Slide 8.61mm 338mil SMD +0 +24 +24 +Button_Switch_SMD +SW_DPDT_CK_JS202011JCQN +Sub-miniature slide switch, vertical, SMT J bend https://dznh3ojzb2azq.cloudfront.net/products/Slide/JS/documents/datasheet.pdf +switch DPDT SMT +0 +6 +6 +Button_Switch_SMD +SW_MEC_5GSH9 +MEC 5G single pole normally-open tactile switch +switch normally-open pushbutton push-button +0 +4 +4 +Button_Switch_SMD +SW_Push_1P1T-MP_NO_Horizontal_Alps_SKRTLAE010 +Side push button (https://www.alps.com/prod/info/E/PDF/Tact/SurfaceMount/SKRT/SKRT.pdf) +push horizontal SPST 1P1T +0 +5 +3 +Button_Switch_SMD +SW_Push_1P1T-SH_NO_CK_KMR2xxG +CK components KMR2 tactile switch with ground pin http://www.ckswitches.com/media/1479/kmr2.pdf +tactile switch kmr2 +0 +5 +3 +Button_Switch_SMD +SW_Push_1P1T_NO_6x6mm_H9.5mm +tactile push button, 6x6mm e.g. PTS645xx series, height=9.5mm +tact sw push 6mm smd +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KMR2 +CK components KMR2 tactile switch http://www.ckswitches.com/media/1479/kmr2.pdf +tactile switch kmr2 +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KSC6xxJ +CK components KSC6 tactile switch https://www.ckswitches.com/media/1972/ksc6.pdf +tactile switch ksc6 +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_KSC7xxJ +CK components KSC7 tactile switch https://www.ckswitches.com/media/1973/ksc7.pdf +tactile switch ksc7 +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_CK_PTS125Sx43PSMTR +C&K Switches 1P1T SMD PTS125 Series 12mm Tact Switch with Pegs, https://www.ckswitches.com/media/1462/pts125.pdf +Button Tactile Switch SPST 1P1T +0 +4 +2 +Button_Switch_SMD +SW_Push_1P1T_NO_Vertical_Wuerth_434133025816 +https://katalog.we-online.com/em/datasheet/434133025816.pdf +tactile switch Wurth Wuerth +0 +4 +2 +Button_Switch_SMD +SW_Push_SPST_NO_Alps_SKRK +http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKRK/SKRKAHE020.html +SMD SMT button +0 +2 +2 +Button_Switch_SMD +SW_SP3T_PCM13 +Ultraminiature Surface Mount Slide Switch, right-angle, https://www.ckswitches.com/media/1424/pcm.pdf + +0 +8 +4 +Button_Switch_SMD +SW_SPDT_CK-JS102011SAQN +Sub-miniature slide switch, right-angle, http://www.ckswitches.com/media/1422/js.pdf +switch spdt +0 +3 +3 +Button_Switch_SMD +SW_SPDT_PCM12 +Ultraminiature Surface Mount Slide Switch, right-angle, https://www.ckswitches.com/media/1424/pcm.pdf + +0 +7 +3 +Button_Switch_SMD +SW_SPST_B3S-1000 +Surface Mount Tactile Switch for High-Density Packaging +Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3S-1100 +Surface Mount Tactile Switch for High-Density Packaging with Ground Terminal +Tactile Switch +0 +5 +3 +Button_Switch_SMD +SW_SPST_B3SL-1002P +Middle Stroke Tactile Switch, B3SL +Middle Stroke Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3SL-1022P +Middle Stroke Tactile Switch, B3SL +Middle Stroke Tactile Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_B3U-1000P +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, without Ground Terminal, without Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-1000P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, without Ground Terminal, with Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-1100P +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, with Ground Terminal, without Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-1100P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Top-actuated Model, with Ground Terminal, with Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-3000P +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, without Ground Terminal, without Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-3000P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, without Ground Terminal, with Boss +Tactile Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_B3U-3100P +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, with Ground Terminal, without Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_B3U-3100P-B +Ultra-small-sized Tactile Switch with High Contact Reliability, Side-actuated Model, with Ground Terminal, with Boss +Tactile Switch +0 +3 +3 +Button_Switch_SMD +SW_SPST_CK_KXT3 +https://www.ckswitches.com/media/1465/kxt3.pdf +Switch SPST KXT3 +0 +2 +2 +Button_Switch_SMD +SW_SPST_CK_RS282G05A3 +https://www.mouser.com/ds/2/60/RS-282G05A-SM_RT-1159762.pdf +SPST button tactile switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_EVPBF +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP0 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE28.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP2 +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP7A +Light Touch Switch,https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE20.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQP7C +Light Touch Switch + +0 +4 +2 +Button_Switch_SMD +SW_SPST_EVQPE1 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE7.pdf + +0 +2 +2 +Button_Switch_SMD +SW_SPST_EVQQ2 +Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE28.pdf + +0 +4 +2 +Button_Switch_SMD +SW_SPST_FSMSM +http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1437566-3&DocType=Customer+Drawing&DocLang=English +SPST button tactile switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_Omron_B3FS-100xP +Surface Mount Tactile Switch for High-Density Mounting, 3.1mm height, https://omronfs.omron.com/en_US/ecb/products/pdf/en-b3fs.pdf +Tactile Switch +0 +4 +4 +Button_Switch_SMD +SW_SPST_Omron_B3FS-101xP +Surface Mount Tactile Switch for High-Density Mounting, 4.3mm height, https://omronfs.omron.com/en_US/ecb/products/pdf/en-b3fs.pdf +Tactile Switch +0 +4 +4 +Button_Switch_SMD +SW_SPST_Omron_B3FS-105xP +Surface Mount Tactile Switch for High-Density Mounting, 7.3mm height, https://omronfs.omron.com/en_US/ecb/products/pdf/en-b3fs.pdf +Tactile Switch +0 +4 +4 +Button_Switch_SMD +SW_SPST_PTS645 +C&K Components SPST SMD PTS645 Series 6mm Tact Switch +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_PTS810 +C&K Components, PTS 810 Series, Microminiature SMT Top Actuated, http://www.ckswitches.com/media/1476/pts810.pdf +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_Panasonic_EVQPL_3PL_5PL_PT_A08 +Light Touch Switch, http://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE3.pdf +SMD SMT SPST EVQPL EVQPT +0 +6 +3 +Button_Switch_SMD +SW_SPST_Panasonic_EVQPL_3PL_5PL_PT_A15 +Light Touch Switch, http://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE3.pdf +SMD SMT SPST EVQPL EVQPT +0 +6 +3 +Button_Switch_SMD +SW_SPST_REED_CT05-XXXX-G1 +Coto Technologies SPST Reed Switch CT05-XXXX-G1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT05-XXXX-J1 +Coto Technologies SPST Reed Switch CT05-XXXX-J1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G1 +Coto Technologies SPST Reed Switch CT10-XXXX-G1 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G2 +Coto Technologies SPST Reed Switch CT10-XXXX-G2 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_REED_CT10-XXXX-G4 +Coto Technologies SPST Reed Switch CT10-XXXX-G4 +Coto Reed SPST Switch +0 +2 +2 +Button_Switch_SMD +SW_SPST_SKQG_WithStem +ALPS 5.2mm Square Low-profile Type (Surface Mount) SKQG Series, With stem, http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKQG/SKQGAFE010.html +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_SKQG_WithoutStem +ALPS 5.2mm Square Low-profile Type (Surface Mount) SKQG Series, Without stem, http://www.alps.com/prod/info/E/HTML/Tact/SurfaceMount/SKQG/SKQGAEE010.html +SPST Button Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305A +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305B +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3305C +https://www.e-switch.com/system/asset/product_line/data_sheet/213/TL3305.pdf +TL3305 Series Tact Switch +0 +4 +2 +Button_Switch_SMD +SW_SPST_TL3342 +Low-profile SMD Tactile Switch, https://www.e-switch.com/system/asset/product_line/data_sheet/165/TL3342.pdf +SPST Tactile Switch +0 +4 +2 +Button_Switch_THT +KSA_Tactile_SPST +KSA http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SWITCH SMD KSA SW +0 +5 +5 +Button_Switch_THT +Nidec_Copal_SH-7010C +4-bit rotary coded switch, through-hole, https://www.nidec-copal-electronics.com/e/catalog/switch/sh-7000.pdf +rotary switch bcd +0 +6 +5 +Button_Switch_THT +Push_E-Switch_KS01Q01 +E-Switch KS01Q01 http://spec_sheets.e-switch.com/specs/29-KS01Q01.pdf +Push Button +0 +4 +4 +Button_Switch_THT +SW_CW_GPTS203211B +SPST Off-On Pushbutton, 1A, 30V, CW Industries P/N GPTS203211B, http://switches-connectors-custom.cwind.com/Asset/GPTS203211BR2.pdf +SPST button switch Off-On +0 +2 +2 +Button_Switch_THT +SW_CuK_JS202011AQN_DPDT_Angled +CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_CuK_JS202011CQN_DPDT_Straight +CuK sub miniature slide switch, JS series, DPDT, right angle, http://www.ckswitches.com/media/1422/js.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_CuK_OS102011MA1QN1_SPDT_Angled +CuK miniature slide switch, OS series, SPDT, right angle, http://www.ckswitches.com/media/1428/os.pdf +switch SPDT +0 +5 +3 +Button_Switch_THT +SW_DIP_SPSTx01_Piano_10.8x4.1mm_W7.62mm_P2.54mm +1x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x4.1mm +DIP Switch SPST Piano 7.62mm 300mil +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx01_Slide_6.7x4.1mm_W7.62mm_P2.54mm_LowProfile +1x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x4.1mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx01_Slide_9.78x4.72mm_W7.62mm_P2.54mm +1x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x4.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +2 +2 +Button_Switch_THT +SW_DIP_SPSTx02_Piano_10.8x6.64mm_W7.62mm_P2.54mm +2x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x6.64mm +DIP Switch SPST Piano 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Piano_CTS_Series194-2MSTN_W7.62mm_P2.54mm +2x-dip-switch SPST CTS_Series194-2MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Slide_6.7x6.64mm_W7.62mm_P2.54mm_LowProfile +2x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x6.64mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx02_Slide_9.78x7.26mm_W7.62mm_P2.54mm +2x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x7.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +4 +4 +Button_Switch_THT +SW_DIP_SPSTx03_Piano_10.8x9.18mm_W7.62mm_P2.54mm +3x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x9.18mm +DIP Switch SPST Piano 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Piano_CTS_Series194-3MSTN_W7.62mm_P2.54mm +3x-dip-switch SPST CTS_Series194-3MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Slide_6.7x9.18mm_W7.62mm_P2.54mm_LowProfile +3x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x9.18mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx03_Slide_9.78x9.8mm_W7.62mm_P2.54mm +3x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x9.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +6 +6 +Button_Switch_THT +SW_DIP_SPSTx04_Piano_10.8x11.72mm_W7.62mm_P2.54mm +4x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x11.72mm +DIP Switch SPST Piano 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Piano_CTS_Series194-4MSTN_W7.62mm_P2.54mm +4x-dip-switch SPST CTS_Series194-4MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Slide_6.7x11.72mm_W7.62mm_P2.54mm_LowProfile +4x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x11.72mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx04_Slide_9.78x12.34mm_W7.62mm_P2.54mm +4x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x12.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +8 +8 +Button_Switch_THT +SW_DIP_SPSTx05_Piano_10.8x14.26mm_W7.62mm_P2.54mm +5x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x14.26mm +DIP Switch SPST Piano 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Piano_CTS_Series194-5MSTN_W7.62mm_P2.54mm +5x-dip-switch SPST CTS_Series194-5MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Slide_6.7x14.26mm_W7.62mm_P2.54mm_LowProfile +5x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x14.26mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx05_Slide_9.78x14.88mm_W7.62mm_P2.54mm +5x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x14.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +10 +10 +Button_Switch_THT +SW_DIP_SPSTx06_Piano_10.8x16.8mm_W7.62mm_P2.54mm +6x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x16.8mm +DIP Switch SPST Piano 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Piano_CTS_Series194-6MSTN_W7.62mm_P2.54mm +6x-dip-switch SPST CTS_Series194-6MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Slide_6.7x16.8mm_W7.62mm_P2.54mm_LowProfile +6x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x16.8mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx06_Slide_9.78x17.42mm_W7.62mm_P2.54mm +6x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x17.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +12 +12 +Button_Switch_THT +SW_DIP_SPSTx07_Piano_10.8x19.34mm_W7.62mm_P2.54mm +7x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x19.34mm +DIP Switch SPST Piano 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Piano_CTS_Series194-7MSTN_W7.62mm_P2.54mm +7x-dip-switch SPST CTS_Series194-7MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Slide_6.7x19.34mm_W7.62mm_P2.54mm_LowProfile +7x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x19.34mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx07_Slide_9.78x19.96mm_W7.62mm_P2.54mm +7x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x19.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +14 +14 +Button_Switch_THT +SW_DIP_SPSTx08_Piano_10.8x21.88mm_W7.62mm_P2.54mm +8x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x21.88mm +DIP Switch SPST Piano 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Piano_CTS_Series194-8MSTN_W7.62mm_P2.54mm +8x-dip-switch SPST CTS_Series194-8MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Slide_6.7x21.88mm_W7.62mm_P2.54mm_LowProfile +8x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x21.88mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx08_Slide_9.78x22.5mm_W7.62mm_P2.54mm +8x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x22.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +16 +16 +Button_Switch_THT +SW_DIP_SPSTx09_Piano_10.8x24.42mm_W7.62mm_P2.54mm +9x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x24.42mm +DIP Switch SPST Piano 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Piano_CTS_Series194-9MSTN_W7.62mm_P2.54mm +9x-dip-switch SPST CTS_Series194-9MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Slide_6.7x24.42mm_W7.62mm_P2.54mm_LowProfile +9x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x24.42mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx09_Slide_9.78x25.04mm_W7.62mm_P2.54mm +9x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x25.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +18 +18 +Button_Switch_THT +SW_DIP_SPSTx10_Piano_10.8x26.96mm_W7.62mm_P2.54mm +10x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x26.96mm +DIP Switch SPST Piano 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Piano_CTS_Series194-10MSTN_W7.62mm_P2.54mm +10x-dip-switch SPST CTS_Series194-10MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Slide_6.7x26.96mm_W7.62mm_P2.54mm_LowProfile +10x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x26.96mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx10_Slide_9.78x27.58mm_W7.62mm_P2.54mm +10x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x27.58mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +20 +20 +Button_Switch_THT +SW_DIP_SPSTx11_Piano_10.8x29.5mm_W7.62mm_P2.54mm +11x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x29.5mm +DIP Switch SPST Piano 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Piano_CTS_Series194-11MSTN_W7.62mm_P2.54mm +11x-dip-switch SPST CTS_Series194-11MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Slide_6.7x29.5mm_W7.62mm_P2.54mm_LowProfile +11x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x29.5mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx11_Slide_9.78x30.12mm_W7.62mm_P2.54mm +11x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x30.12mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +22 +22 +Button_Switch_THT +SW_DIP_SPSTx12_Piano_10.8x32.04mm_W7.62mm_P2.54mm +12x-dip-switch SPST , Piano, row spacing 7.62 mm (300 mils), body size 10.8x32.04mm +DIP Switch SPST Piano 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Piano_CTS_Series194-12MSTN_W7.62mm_P2.54mm +12x-dip-switch SPST CTS_Series194-12MSTN, Piano, row spacing 7.62 mm (300 mils), body size (see https://www.ctscorp.com/wp-content/uploads/194-195.pdf) +DIP Switch SPST Piano 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Slide_6.7x32.04mm_W7.62mm_P2.54mm_LowProfile +12x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 6.7x32.04mm (see e.g. https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile +DIP Switch SPST Slide 7.62mm 300mil LowProfile +0 +24 +24 +Button_Switch_THT +SW_DIP_SPSTx12_Slide_9.78x32.66mm_W7.62mm_P2.54mm +12x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size 9.78x32.66mm (see e.g. https://www.ctscorp.com/wp-content/uploads/206-208.pdf) +DIP Switch SPST Slide 7.62mm 300mil +0 +24 +24 +Button_Switch_THT +SW_E-Switch_EG1224_SPDT_Angled +E-Switch slide switch, EG series, SPDT, right angle, http://spec_sheets.e-switch.com/specs/P040042.pdf +switch SPDT +0 +7 +3 +Button_Switch_THT +SW_E-Switch_EG1271_DPDT +E-Switch sub miniature slide switch, EG series, DPDT, http://spec_sheets.e-switch.com/specs/P040047.pdf +switch DPDT +0 +6 +6 +Button_Switch_THT +SW_E-Switch_EG2219_DPDT_Angled +E-Switch slide switch, EG series, DPDT, right angle, http://spec_sheets.e-switch.com/specs/P040170.pdf +switch DPDT +0 +10 +6 +Button_Switch_THT +SW_Lever_1P2T_NKK_GW12LxH +Switch, single pole double throw, right angle, http://www.nkkswitches.com/pdf/GW.pdf +switch single-pole double-throw spdt ON-ON horizontal +0 +5 +3 +Button_Switch_THT +SW_MEC_5GTH9 +MEC 5G single pole normally-open tactile switch https://cdn.sos.sk/productdata/80/f6/aabf7be6/5gth9358222.pdf +switch normally-open pushbutton push-button +0 +4 +2 +Button_Switch_THT +SW_NKK_BB15AH +https://www.nkkswitches.com/pdf/Bpushbuttons-1.pdf +Pushbutton Right-angle +0 +5 +3 +Button_Switch_THT +SW_NKK_G1xJP +Switch NKK G1xJP http://www.nkkswitches.com/pdf/gwillum.pdf +SWITCH TOGGLE ILLUM SPDT NKK +0 +6 +6 +Button_Switch_THT +SW_NKK_GW12LJP +Switch, single pole double throw, illuminated paddle, http://www.nkkswitches.com/pdf/gwillum.pdf +switch single-pole double-throw spdt ON-ON illuminated LED +0 +6 +6 +Button_Switch_THT +SW_PUSH-12mm +SW PUSH 12mm https://www.e-switch.com/system/asset/product_line/data_sheet/143/TL1100.pdf +tact sw push 12mm +0 +4 +2 +Button_Switch_THT +SW_PUSH-12mm_Wuerth-430476085716 +SW PUSH 12mm http://katalog.we-online.de/em/datasheet/430476085716.pdf +tact sw push 12mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm +https://www.omron.com/ecb/products/pdf/en-b3f.pdf +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H4.3mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=4.3mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H7.3mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=7.3mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H8.5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=8.5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H8mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=8mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H9.5mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=9.5mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_6mm_H13mm +tactile push button, 6x6mm e.g. PHAP33xx series, height=13mm +tact sw push 6mm +0 +4 +2 +Button_Switch_THT +SW_PUSH_E-Switch_FS5700DP_DPDT +FS5700 series pushbutton footswitch, DPDT, https://www.e-switch.com/system/asset/product_line/data_sheet/226/FS5700.pdf +switch DPDT footswitch +0 +6 +6 +Button_Switch_THT +SW_PUSH_LCD_E3_SAxxxx +Switch with LCD screen E3 SAxxxx +switch normally-open pushbutton push-button LCD +0 +6 +6 +Button_Switch_THT +SW_PUSH_LCD_E3_SAxxxx_SocketPins +Switch with LCD screen E3 SAxxxx +switch normally-open pushbutton push-button LCD +0 +6 +6 +Button_Switch_THT +SW_Push_1P1T_NO_LED_E-Switch_TL1250 +illuminated right angle tact switch https://www.e-switch.com/system/asset/product_line/data_sheet/148/TL1250.pdf +led push switch right angle +0 +6 +4 +Button_Switch_THT +SW_Push_1P2T_Vertical_E-Switch_800UDP8P1A1M6 + right angle SPDT push button https://www.e-switch.com/system/asset/product_line/data_sheet/210/800U.pdf +IP67 ultra-miniture horizontal +0 +5 +3 +Button_Switch_THT +SW_Push_2P2T_Vertical_E-Switch_800UDP8P1A1M6 + right angle DPDT push button https://www.e-switch.com/system/asset/product_line/data_sheet/210/800U.pdf +IP67 ultra-miniture horizontal +0 +8 +6 +Button_Switch_THT +SW_Slide_1P2T_CK_OS102011MS2Q +CuK miniature slide switch, OS series, SPDT, https://www.ckswitches.com/media/1428/os.pdf +switch SPDT +0 +5 +3 +Button_Switch_THT +SW_TH_Tactile_Omron_B3F-10xx +SW_TH_Tactile_Omron_B3F-10xx_https://www.omron.com/ecb/products/pdf/en-b3f.pdf +Omron B3F-10xx +0 +4 +4 +Button_Switch_THT +SW_Tactile_SKHH_Angled +tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html +tactile switch 6mm ALPS SKHH right angle +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx31-2LFS +tactile switch SPST right angle, PTS645VL31-2 LFS +tactile switch SPST angled PTS645VL31-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx39-2LFS +tactile switch SPST right angle, PTS645VL39-2 LFS +tactile switch SPST angled PTS645VL39-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx58-2LFS +tactile switch SPST right angle, PTS645VL58-2 LFS +tactile switch SPST angled PTS645VL58-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_SPST_Angled_PTS645Vx83-2LFS +tactile switch SPST right angle, PTS645VL83-2 LFS +tactile switch SPST angled PTS645VL83-2 LFS C&K Button +0 +4 +2 +Button_Switch_THT +SW_Tactile_Straight_KSA0Axx1LFTR +SW PUSH SMALL http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SW PUSH SMALL Tactile C&K +0 +4 +2 +Button_Switch_THT +SW_Tactile_Straight_KSL0Axx1LFTR +SW PUSH SMALL http://www.ckswitches.com/media/1457/ksa_ksl.pdf +SW PUSH SMALL Tactile C&K +0 +4 +2 +Buzzer_Beeper +Buzzer_12x9.5RM7.6 +Generic Buzzer, D12mm height 9.5mm with RM7.6mm +buzzer +0 +2 +2 +Buzzer_Beeper +Buzzer_15x7.5RM7.6 +Generic Buzzer, D15mm height 7.5mm with RM7.6mm +buzzer +0 +2 +2 +Buzzer_Beeper +Buzzer_CUI_CPT-9019S-SMT +https://www.cui.com/product/resource/cpt-9019s-smt.pdf +buzzer piezo +0 +2 +2 +Buzzer_Beeper +Buzzer_D14mm_H7mm_P10mm +Generic Buzzer, D14mm height 7mm with pitch 10mm +buzzer +0 +2 +2 +Buzzer_Beeper +Buzzer_Mallory_AST1109MLTRQ +Mallory low-profile piezo buzzer, https://www.mspindy.com/specifications/AST1109MLTRQ.pdf +buzzer piezo +0 +2 +2 +Buzzer_Beeper +Buzzer_Murata_PKMCS0909E4000-R1 +Murata Buzzer http://www.murata.com/en-us/api/pdfdownloadapi?cate=&partno=PKMCS0909E4000-R1 +Murata Buzzer Beeper +0 +2 +2 +Buzzer_Beeper +Buzzer_TDK_PS1240P02BT_D12.2mm_H6.5mm +Buzzer, D12.2mm height 6.5mm, https://product.tdk.com/info/en/catalog/datasheets/piezoelectronic_buzzer_ps_en.pdf +buzzer +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_CUI_CMT-8504-100-SMT +magnetic transducer buzzer, 5V, SPL of 100 dB at 10 cm, https://www.cuidevices.com/product/resource/pdf/cmt-8504-100-smt-tr.pdf +CMT 8504 +0 +4 +4 +Buzzer_Beeper +MagneticBuzzer_CUI_CST-931RP-A +CST-931RP-A, http://www.cui.com/product/resource/cst-931rp-a.pdf +CST-931RP-A +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_Kingstate_KCG0601 +Buzzer, Elektromagnetic Beeper, Summer, +Kingstate KCG0601 +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_Kobitone_254-EMB84Q-RO +MagneticBuzzer Kobitone 254-EMB84Q-RO https://www.mouser.es/datasheet/2/209/KT-400385-1171904.pdf +MagneticBuzzer Kobitone 254-EMB84Q-RO +0 +3 +3 +Buzzer_Beeper +MagneticBuzzer_PUI_AT-0927-TT-6-R +Buzzer Magnetic 9mm AT-0927-TT-6-R, http://www.puiaudio.com/pdf/AT-0927-TT-6-R.pdf +Buzzer Magnetic 9mm AT-0927-TT-6-R +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABI-009-RC +Buzzer, Elektromagnetic Beeper, Summer, 6V-DC, +Pro Signal ABI-009-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABI-010-RC +Buzzer, Elektromagnetic Beeper, Summer, 12V-DC, +Pro Signal ABI-010-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProSignal_ABT-410-RC +Buzzer, Elektromagnetic Beeper, Summer, 1,5V-DC, +Pro Signal ABT-410-RC +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_ProjectsUnlimited_AI-4228-TWT-R +Buzzer, Elektromagnetic Beeper, Summer, 3-28V-DC, https://www.kynix.com/uploadfiles/pdf/AI-4228-TWT-R.pdf +Projects Unlimited AI-4228-TWT-R +0 +2 +2 +Buzzer_Beeper +MagneticBuzzer_StarMicronics_HMB-06_HMB-12 +Buzzer, Elektromagnetic Beeper, Summer, +Star Micronics HMB-06 HMB-12 +0 +2 +2 +Buzzer_Beeper +PUIAudio_SMT_0825_S_4_R +SMD 8540, http://www.puiaudio.com/product-detail.aspx?partnumber=SMT-0825-S-4-R +SMD 8540 +0 +4 +4 +Buzzer_Beeper +Speaker_CUI_CMR-1206S-67 +Speaker, 30mW, 300-7000Hz, IP67 face, 12x6x2,25mm, https://www.cuidevices.com/product/resource/cmr-12062s-67.pdf +speaker CUI +0 +2 +2 +Calibration_Scale +Gauge_10mm_Type1_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 1, +Gauge Massstab 10mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type1_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 1, +Gauge Massstab 10mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type2_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 2, +Gauge Massstab 10mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type2_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 2, +Gauge Massstab 10mm SilkScreenTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type3_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 3, +Gauge Massstab 10mm CopperTop Type 3 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type3_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 3, +Gauge Massstab 10mm SilkScreenTop Type 3 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type4_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 4, +Gauge Massstab 10mm CopperTop Type 4 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type4_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 4, +Gauge Massstab 10mm SilkScreenTop Type 4 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type5_CopperTop +Gauge, Massstab, 10mm, CopperTop, Type 5, +Gauge Massstab 10mm CopperTop Type 5 +0 +0 +0 +Calibration_Scale +Gauge_10mm_Type5_SilkScreenTop +Gauge, Massstab, 10mm, SilkScreenTop, Type 5, +Gauge Massstab 10mm SilkScreenTop Type 5 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type1_CopperTop +Gauge, Massstab, 50mm, CopperTop, Type 1, +Gauge Massstab 50mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type1_SilkScreenTop +Gauge, Massstab, 50mm, SilkScreenTop, Type 1, +Gauge Massstab 50mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type2_CopperTop +Gauge, Massstab, 50mm, CopperTop, Type 2, +Gauge Massstab 50mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_50mm_Type2_SilkScreenTop +Gauge, Massstab, 50mm, SilkScreenTop, Type 2, +Gauge Massstab 50mm SilkScreenTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Grid_Type1_CopperTop +Gauge, Massstab, 100mm, Gitter, Grid, CopperTop, Type 1, +Gauge Massstab 100mm Gitter Grid CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type1_CopperTop +Gauge, Massstab, 100mm, CopperTop, Type 1, +Gauge Massstab 100mm CopperTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type1_SilkScreenTop +Gauge, Massstab, 100mm, SilkScreenTop, Type 1, +Gauge Massstab 100mm SilkScreenTop Type 1 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type2_CopperTop +Gauge, Massstab, 100mm, CopperTop, Type 2, +Gauge Massstab 100mm CopperTop Type 2 +0 +0 +0 +Calibration_Scale +Gauge_100mm_Type2_SilkScreenTop +Gauge, Massstab, 100mm, SilkScreenTop, Type 2, +Gauge Massstab 100mm SilkScreenTop Type 2 +0 +0 +0 +Capacitor_SMD +CP_Elec_3x5.3 +SMT capacitor, aluminium electrolytic, 3x5.3, Cornell Dubilier Electronics +Capacitor Electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_3x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 3.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x3 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 4.0x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.3 +SMD capacitor, aluminum electrolytic, Vishay, 4.0x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.4 +SMD capacitor, aluminum electrolytic, Panasonic A5 / Nichicon, 4.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 4.0x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_4x5.8 +SMD capacitor, aluminum electrolytic, Panasonic, 4.0x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x3 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x3.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x4.4 +SMD capacitor, aluminum electrolytic, Panasonic B45, 5.0x4.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.3 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 5.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 5.0x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.8 +SMD capacitor, aluminum electrolytic, Panasonic, 5.0x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_5x5.9 +SMD capacitor, aluminum electrolytic, Panasonic B6, 5.0x5.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x3 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x3.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x3.9 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x3.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x4.5 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x4.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x4.9 +SMD capacitor, aluminum electrolytic, Panasonic C5, 6.3x4.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.2 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 6.3x5.2mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.3 +SMD capacitor, aluminum electrolytic, Cornell Dubilier, 6.3x5.3mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.4 +SMD capacitor, aluminum electrolytic, Panasonic C55, 6.3x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.4_Nichicon +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 6.3x5.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.8 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x5.8mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x5.9 +SMD capacitor, aluminum electrolytic, Panasonic C6, 6.3x5.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x7.7 +SMD capacitor, aluminum electrolytic, Nichicon, 6.3x7.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_6.3x9.9 +SMD capacitor, aluminum electrolytic, Panasonic C10, 6.3x9.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x5.4 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x5.4mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.2 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x6.2mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.5 +SMD capacitor, aluminum electrolytic, Rubycon, 8.0x6.5mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.7 +SMD capacitor, aluminum electrolytic, United Chemi-Con, 8.0x6.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x6.9 +SMD capacitor, aluminum electrolytic, Panasonic E7, 8.0x6.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x10 +SMD capacitor, aluminum electrolytic, Nichicon, 8.0x10mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x10.5 +SMD capacitor, aluminum electrolytic, Vishay 0810, 8.0x10.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_8x11.9 +SMD capacitor, aluminum electrolytic, Panasonic E12, 8.0x11.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x7.7 +SMD capacitor, aluminum electrolytic, Nichicon, 10.0x7.7mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x7.9 +SMD capacitor, aluminum electrolytic, Panasonic F8, 10.0x7.9mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x10 +SMD capacitor, aluminum electrolytic, Nichicon, 10.0x10.0mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x10.5 +SMD capacitor, aluminum electrolytic, Vishay 1010, 10.0x10.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x12.5 +SMD capacitor, aluminum electrolytic, Vishay 1012, 10.0x12.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x12.6 +SMD capacitor, aluminum electrolytic, Panasonic F12, 10.0x12.6mm +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_10x14.3 +SMD capacitor, aluminum electrolytic, Vishay 1014, 10.0x14.3mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_16x17.5 +SMD capacitor, aluminum electrolytic, Vishay 1616, 16.0x17.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_16x22 +SMD capacitor, aluminum electrolytic, Vishay 1621, 16.0x22.0mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_18x17.5 +SMD capacitor, aluminum electrolytic, Vishay 1816, 18.0x17.5mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +CP_Elec_18x22 +SMD capacitor, aluminum electrolytic, Vishay 1821, 18.0x22.0mm, http://www.vishay.com/docs/28395/150crz.pdf +capacitor electrolytic +0 +2 +2 +Capacitor_SMD +C_0201_0603Metric +Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +capacitor +0 +4 +2 +Capacitor_SMD +C_0201_0603Metric_Pad0.64x0.40mm_HandSolder +Capacitor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +4 +2 +Capacitor_SMD +C_0402_1005Metric +Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0402_1005Metric_Pad0.74x0.62mm_HandSolder +Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_0504_1310Metric +Capacitor SMD 0504 (1310 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0504_1310Metric_Pad0.83x1.28mm_HandSolder +Capacitor SMD 0504 (1310 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_0603_1608Metric +Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0603_1608Metric_Pad1.08x0.95mm_HandSolder +Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_0805_2012Metric +Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_0805_2012Metric_Pad1.18x1.45mm_HandSolder +Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_01005_0402Metric +Capacitor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +capacitor +0 +4 +2 +Capacitor_SMD +C_01005_0402Metric_Pad0.57x0.30mm_HandSolder +Capacitor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +4 +2 +Capacitor_SMD +C_1206_3216Metric +Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1206_3216Metric_Pad1.33x1.80mm_HandSolder +Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1210_3225Metric +Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1210_3225Metric_Pad1.33x2.70mm_HandSolder +Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1812_4532Metric +Capacitor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1812_4532Metric_Pad1.57x3.40mm_HandSolder +Capacitor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_1825_4564Metric +Capacitor SMD 1825 (4564 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_1825_4564Metric_Pad1.57x6.80mm_HandSolder +Capacitor SMD 1825 (4564 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2220_5650Metric +Capacitor SMD 2220 (5650 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2220_5650Metric_Pad1.97x5.40mm_HandSolder +Capacitor SMD 2220 (5650 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_2225_5664Metric +Capacitor SMD 2225 (5664 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_2225_5664Metric_Pad1.80x6.60mm_HandSolder +Capacitor SMD 2225 (5664 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_3640_9110Metric +Capacitor SMD 3640 (9110 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor +0 +2 +2 +Capacitor_SMD +C_3640_9110Metric_Pad2.10x10.45mm_HandSolder +Capacitor SMD 3640 (9110 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://datasheets.avx.com/AVX-HV_MLCC.pdf), generated with kicad-footprint-generator +capacitor handsolder +0 +2 +2 +Capacitor_SMD +C_Elec_3x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 3.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_4x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 4.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_4x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 4.0x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_5x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 5.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_5x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 5.0x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x5.8 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x5.8mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_6.3x7.7 +SMD capacitor, aluminum electrolytic nonpolar, 6.3x7.7mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x5.4 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x5.4mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x6.2 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x6.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_8x10.2 +SMD capacitor, aluminum electrolytic nonpolar, 8.0x10.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Elec_10x10.2 +SMD capacitor, aluminum electrolytic nonpolar, 10.0x10.2mm +capacitor electrolyic nonpolar +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZB4-A +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZB4 TZB4-A +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZB4-B +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZB4 TZB4-A +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZC3 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZC3 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZR1 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZR1 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZW4 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZW4 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Murata_TZY2 +trimmer capacitor SMD horizontal, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/capacitor/trimmer/t13e.ashx?la=en-gb + Murata TZY2 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Sprague-Goodman_SGC3 +trimmer capacitor SMD horizontal, http://media.wix.com/ugd/d86717_38d9821e12823a7aa9cef38c6c2a73cc.pdf + Sprague Goodman SGC3 +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JN +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JN +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JQ +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JQ +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JR +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JR +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JV +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JV +0 +2 +2 +Capacitor_SMD +C_Trimmer_Voltronics_JZ +trimmer capacitor SMD horizontal, http://www.knowlescapacitors.com/File%20Library/Voltronics/English/GlobalNavigation/Products/Trimmer%20Capacitors/CerChipTrimCap.pdf + Voltronics JR +0 +2 +2 +Capacitor_THT +CP_Axial_L10.0mm_D4.5mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*4.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 10mm diameter 4.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L10.0mm_D6.0mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=10*6mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 10mm diameter 6mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D5.0mm_P18.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*5mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 18mm length 11mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D6.0mm_P18.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=18mm, , length*diameter=11*6mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 18mm length 11mm diameter 6mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L11.0mm_D8.0mm_P15.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=11*8mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 15mm length 11mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D6.5mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*6.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 6.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D8.0mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*8mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L18.0mm_D10.0mm_P25.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=18*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 25mm length 18mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L20.0mm_D10.0mm_P26.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=26mm, , length*diameter=20*10mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 26mm length 20mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L20.0mm_D13.0mm_P26.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=26mm, , length*diameter=20*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 26mm length 20mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L21.0mm_D8.0mm_P28.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=28mm, , length*diameter=21*8mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 28mm length 21mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L25.0mm_D10.0mm_P30.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=30mm, , length*diameter=25*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 30mm length 25mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L26.5mm_D20.0mm_P33.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=33mm, , length*diameter=26.5*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 33mm length 26.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D10.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*10mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D13.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D16.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*16mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L29.0mm_D20.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=29*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 29mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D10.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*10mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D12.5mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*12.5mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D15.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*15mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 15mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L30.0mm_D18.0mm_P35.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=30*18mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 35mm length 30mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L34.5mm_D20.0mm_P41.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=41mm, , length*diameter=34.5*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 41mm length 34.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D13.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*13mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D16.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*16mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L37.0mm_D20.0mm_P43.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=43mm, , length*diameter=37*20mm^2, Electrolytic Capacitor, , http://www.kemet.com/Lists/ProductCatalog/Attachments/424/KEM_AC102.pdf +CP Axial series Axial Horizontal pin pitch 43mm length 37mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L38.0mm_D18.0mm_P44.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=44mm, , length*diameter=38*18mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 44mm length 38mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L38.0mm_D21.0mm_P44.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=44mm, , length*diameter=38*21mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/28325/021asm.pdf +CP Axial series Axial Horizontal pin pitch 44mm length 38mm diameter 21mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L40.0mm_D16.0mm_P48.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=48mm, , length*diameter=40*16mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 48mm length 40mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D23.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D26.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D29.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D32.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.0mm_D35.0mm_P45.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=45mm, , length*diameter=42*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 45mm length 42mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L42.5mm_D20.0mm_P49.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=49mm, , length*diameter=42.5*20mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 49mm length 42.5mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L46.0mm_D20.0mm_P52.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=52mm, , length*diameter=46*20mm^2, Electrolytic Capacitor +CP Axial series Axial Horizontal pin pitch 52mm length 46mm diameter 20mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D23.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D26.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D29.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D32.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L55.0mm_D35.0mm_P60.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=60mm, , length*diameter=55*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 60mm length 55mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D23.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D26.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D29.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D32.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L67.0mm_D35.0mm_P75.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=75mm, , length*diameter=67*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 75mm length 67mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D23.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D26.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D29.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D32.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L80.0mm_D35.0mm_P85.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=85mm, , length*diameter=80*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 85mm length 80mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D23.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*23.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 23.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D26.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*26mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D29.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*29.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 29.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D32.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*32.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 32.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Axial_L93.0mm_D35.0mm_P100.00mm_Horizontal +CP, Axial series, Axial, Horizontal, pin pitch=100mm, , length*diameter=93*35.0mm^2, Electrolytic Capacitor, , http://www.vishay.com/docs/42037/53d.pdf +CP Axial series Axial Horizontal pin pitch 100mm length 93mm diameter 35.0mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D4.0mm_P1.50mm +CP, Radial series, Radial, pin pitch=1.50mm, , diameter=4mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 1.50mm diameter 4mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D4.0mm_P2.00mm +CP, Radial series, Radial, pin pitch=2.00mm, , diameter=4mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.00mm diameter 4mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D5.0mm_P2.00mm +CP, Radial series, Radial, pin pitch=2.00mm, , diameter=5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.00mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D5.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D6.3mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=6.3mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 6.3mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D7.5mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=7.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 7.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P3.50mm +CP, Radial series, Radial, pin pitch=3.50mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.50mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P3.80mm +CP, Radial series, Radial, pin pitch=3.80mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.80mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D8.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=8mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 8mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P2.50mm_P5.00mm +CP, Radial series, Radial, pin pitch=2.50mm 5.00mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm 5.00mm diameter 10mm Electrolytic Capacitor +0 +4 +2 +Capacitor_THT +CP_Radial_D10.0mm_P3.50mm +CP, Radial series, Radial, pin pitch=3.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P3.80mm +CP, Radial series, Radial, pin pitch=3.80mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 3.80mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D10.0mm_P5.00mm_P7.50mm +CP, Radial series, Radial, pin pitch=5.00mm 7.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm 7.50mm diameter 10mm Electrolytic Capacitor +0 +4 +2 +Capacitor_THT +CP_Radial_D10.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=10mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 10mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D12.5mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=12.5mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 12.5mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P2.50mm +CP, Radial series, Radial, pin pitch=2.50mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 2.50mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D13.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=13mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 13mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D14.0mm_P5.00mm +CP, Radial series, Radial, pin pitch=5.00mm, , diameter=14mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 5.00mm diameter 14mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D14.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=14mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 14mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D16.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=16mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 16mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D17.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=17mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 17mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D18.0mm_P7.50mm +CP, Radial series, Radial, pin pitch=7.50mm, , diameter=18mm, Electrolytic Capacitor +CP Radial series Radial pin pitch 7.50mm diameter 18mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D22.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=22mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 22mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D22.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=22mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 22mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D24.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=24mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 24mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D24.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=24mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 24mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D25.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=25mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 25mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D25.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=25mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 25mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D26.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=26mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 26mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D26.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=26mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 26mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D30.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=30mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 30mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D30.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=30mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 30mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D35.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=35mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 35mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D35.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=35mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 35mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_D40.0mm_P10.00mm_3pin_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=40mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 40mm Electrolytic Capacitor +0 +3 +2 +Capacitor_THT +CP_Radial_D40.0mm_P10.00mm_SnapIn +CP, Radial series, Radial, pin pitch=10.00mm, , diameter=40mm, Electrolytic Capacitor, , http://www.vishay.com/docs/28342/058059pll-si.pdf +CP Radial series Radial pin pitch 10.00mm diameter 40mm Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D4.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 4.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D4.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=4.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 4.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=5.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 5.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=5.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 5.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=5.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 5.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D5.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=5.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 5.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D6.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=6.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 6.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D6.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=6.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 6.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D7.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=7.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 7.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D7.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=7.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 7.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D8.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=8.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 8.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D8.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=8.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 8.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D9.0mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=9.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 9.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D9.0mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=9.0mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 9.0mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D10.5mm_P2.50mm +CP, Radial_Tantal series, Radial, pin pitch=2.50mm, , diameter=10.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 2.50mm diameter 10.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +CP_Radial_Tantal_D10.5mm_P5.00mm +CP, Radial_Tantal series, Radial, pin pitch=5.00mm, , diameter=10.5mm, Tantal Electrolytic Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/TANTAL-TB-Serie%23.pdf +CP Radial_Tantal series Radial pin pitch 5.00mm diameter 10.5mm Tantal Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P7.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=7.5mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 7.5mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P10.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 10mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P12.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=12.5mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 12.5mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L3.8mm_D2.6mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=3.8*2.6mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 15mm length 3.8mm diameter 2.6mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P7.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=7.5mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 7.5mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P10.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=10mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 10mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P12.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=12.5mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 12.5mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L5.1mm_D3.1mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=5.1*3.1mm^2, http://www.vishay.com/docs/45231/arseries.pdf +C Axial series Axial Horizontal pin pitch 15mm length 5.1mm diameter 3.1mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D6.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D6.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D7.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D7.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D8.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*8.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 8.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D8.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*8.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 8.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D9.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D9.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D10.5mm_P15.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=15mm, , length*diameter=12*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 15mm length 12mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L12.0mm_D10.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=12*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 12mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D6.5mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=17*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 17mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D6.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=17*6.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 17mm diameter 6.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D7.0mm_P20.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=20mm, , length*diameter=17*7.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 20mm length 17mm diameter 7.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L17.0mm_D7.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=17*7.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 17mm diameter 7.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D7.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*7.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 7.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D8.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*8.0mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 8.0mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D9.0mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*9mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 9mm +0 +2 +2 +Capacitor_THT +C_Axial_L19.0mm_D9.5mm_P25.00mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=25mm, , length*diameter=19*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 25mm length 19mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L22.0mm_D9.5mm_P27.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=27.5mm, , length*diameter=22*9.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 27.5mm length 22mm diameter 9.5mm +0 +2 +2 +Capacitor_THT +C_Axial_L22.0mm_D10.5mm_P27.50mm_Horizontal +C, Axial series, Axial, Horizontal, pin pitch=27.5mm, , length*diameter=22*10.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B300/STYROFLEX.pdf +C Axial series Axial Horizontal pin pitch 27.5mm length 22mm diameter 10.5mm +0 +2 +2 +Capacitor_THT +C_Disc_D3.0mm_W1.6mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.0*1.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.0mm width 1.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.0mm_W2.0mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3*2mm^2, Capacitor +C Disc series Radial pin pitch 2.50mm diameter 3mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.4mm_W2.1mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.4*2.1mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.4mm width 2.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D3.8mm_W2.6mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=3.8*2.6mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 2.50mm diameter 3.8mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D4.3mm_W1.9mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.3*1.9mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 4.3mm width 1.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D4.7mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=4.7*2.5mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 4.7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.0mm_W2.5mm_P2.50mm +C, Disc series, Radial, pin pitch=2.50mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 2.50mm diameter 5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D5.1mm_W3.2mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=5.1*3.2mm^2, Capacitor, http://www.vishay.com/docs/45233/krseries.pdf +C Disc series Radial pin pitch 5.00mm diameter 5.1mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D6.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=6*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 6mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D6.0mm_W4.4mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=6*4.4mm^2, Capacitor +C Disc series Radial pin pitch 5.00mm diameter 6mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*2.5mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W4.4mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*4.4mm^2, Capacitor +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D7.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=7.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 7.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 8mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D8.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=8*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 8mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=9*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 9mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D9.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=9*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 9mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.0mm_W2.5mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=10*2.5mm^2, Capacitor, http://cdn-reichelt.de/documents/datenblatt/B300/DS_KERKO_TC.pdf +C Disc series Radial pin pitch 5.00mm diameter 10mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D10.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=10.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 10.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P5.00mm +C, Disc series, Radial, pin pitch=5.00mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 5.00mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D11.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=11*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 11mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.0mm_W4.4mm_P7.75mm +C, Disc series, Radial, pin pitch=7.75mm, , diameter*width=12*4.4mm^2, Capacitor +C Disc series Radial pin pitch 7.75mm diameter 12mm width 4.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=12.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 12.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D12.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=12.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 12.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D14.5mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=14.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 14.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D14.5mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=14.5*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 14.5mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D16.0mm_W5.0mm_P7.50mm +C, Disc series, Radial, pin pitch=7.50mm, , diameter*width=16.0*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 7.50mm diameter 16.0mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Disc_D16.0mm_W5.0mm_P10.00mm +C, Disc series, Radial, pin pitch=10.00mm, , diameter*width=16.0*5.0mm^2, Capacitor, http://www.vishay.com/docs/28535/vy2series.pdf +C Disc series Radial pin pitch 10.00mm diameter 16.0mm width 5.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D4.0mm_H5.0mm_P1.50mm +C, Radial series, Radial, pin pitch=1.50mm, diameter=4mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 1.50mm diameter 4mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D4.0mm_H7.0mm_P1.50mm +C, Radial series, Radial, pin pitch=1.50mm, diameter=4mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 1.50mm diameter 4mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H5.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H7.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D5.0mm_H11.0mm_P2.00mm +C, Radial series, Radial, pin pitch=2.00mm, diameter=5mm, height=11mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.00mm diameter 5mm height 11mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H5.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H7.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D6.3mm_H11.0mm_P2.50mm +C, Radial series, Radial, pin pitch=2.50mm, diameter=6.3mm, height=11mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 2.50mm diameter 6.3mm height 11mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D8.0mm_H7.0mm_P3.50mm +C, Radial series, Radial, pin pitch=3.50mm, diameter=8mm, height=7mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 3.50mm diameter 8mm height 7mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D8.0mm_H11.5mm_P3.50mm +C, Radial series, Radial, pin pitch=3.50mm, diameter=8mm, height=11.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 3.50mm diameter 8mm height 11.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H12.5mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=12.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 12.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H16.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=16mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 16mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D10.0mm_H20.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=10mm, height=20mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 10mm height 20mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D12.5mm_H20.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=12.5mm, height=20mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 12.5mm height 20mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D12.5mm_H25.0mm_P5.00mm +C, Radial series, Radial, pin pitch=5.00mm, diameter=12.5mm, height=25mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 5.00mm diameter 12.5mm height 25mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D16.0mm_H25.0mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=16mm, height=25mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 16mm height 25mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D16.0mm_H31.5mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=16mm, height=31.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 16mm height 31.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Radial_D18.0mm_H35.5mm_P7.50mm +C, Radial series, Radial, pin pitch=7.50mm, diameter=18mm, height=35.5mm, Non-Polar Electrolytic Capacitor +C Radial series Radial pin pitch 7.50mm diameter 18mm height 35.5mm Non-Polar Electrolytic Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.0mm_W2.5mm_P2.50mm +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4*2.5mm^2, Capacitor +C Rect series Radial pin pitch 2.50mm length 4mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W2.0mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*2mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W3.0mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*3.0mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W3.8mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*3.8mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 3.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W4.6mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*4.6mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 4.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L4.6mm_W5.5mm_P2.50mm_MKS02_FKP02 +C, Rect series, Radial, pin pitch=2.50mm, , length*width=4.6*5.5mm^2, Capacitor, http://www.wima.de/DE/WIMA_MKS_02.pdf +C Rect series Radial pin pitch 2.50mm length 4.6mm width 5.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W2.0mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*2mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W2.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*2.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W3.5mm_P2.50mm_P5.00mm +C, Rect series, Radial, pin pitch=2.50mm 5.00mm, , length*width=7*3.5mm^2, Capacitor +C Rect series Radial pin pitch 2.50mm 5.00mm length 7mm width 3.5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L7.0mm_W3.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*3.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W4.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*4.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W6.0mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*6mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.0mm_W6.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7*6.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7mm width 6.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W2.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*2.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W3.0mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*3.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W3.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*3.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W4.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*4.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W5.5mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*5.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 5.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W7.2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*7.2mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 7.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W8.5mm_P5.00mm_FKP2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*8.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.2mm_W11.0mm_P5.00mm_FKS2_FKP2_MKS2_MKP2 +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.2*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_2.pdf +C Rect series Radial pin pitch 5.00mm length 7.2mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L7.5mm_W6.5mm_P5.00mm +C, Rect series, Radial, pin pitch=5.00mm, , length*width=7.5*6.5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm length 7.5mm width 6.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.6mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W2.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*2.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 2.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.2mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.3mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.4mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.6mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.8mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W3.9mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*3.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 3.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.0mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.2mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W4.9mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*4.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 4.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W5.1mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W5.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*5.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 5.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W6.4mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W6.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*6.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 6.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W7.7mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*7.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 7.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W8.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*8.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W9.5mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*9.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 9.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L9.0mm_W9.8mm_P7.50mm_MKT +C, Rect series, Radial, pin pitch=7.50mm, , length*width=9*9.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 7.50mm length 9mm width 9.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W2.5mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*2.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 2.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W3.0mm_P7.50mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*3mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W3.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*3.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 3.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W4.0mm_P7.50mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W4.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10*4.0mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.0mm_W5.0mm_P5.00mm_P7.50mm +C, Rect series, Radial, pin pitch=5.00mm 7.50mm, , length*width=10*5mm^2, Capacitor +C Rect series Radial pin pitch 5.00mm 7.50mm length 10mm width 5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L10.3mm_W4.5mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*4.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W5.0mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W5.7mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*5.7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 5.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L10.3mm_W7.2mm_P7.50mm_MKS4 +C, Rect series, Radial, pin pitch=7.50mm, , length*width=10.3*7.2mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 7.50mm length 10.3mm width 7.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W2.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*2.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 2.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W3.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*3.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 3.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W3.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*3.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W4.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*4.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 4.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W4.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*4.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 4.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W5.1mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W5.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*5.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 5.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W6.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*6.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 6.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W6.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W7.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.0mm_W8.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.0*8.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.0mm width 8.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W2.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*2.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 2.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W3.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*3.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 3.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W4.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*4.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 4.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.1mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.2mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W5.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*5.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 5.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.4mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.4mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.6mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W6.9mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*6.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 6.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.3mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W7.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*7.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 7.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W8.0mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*8.0mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 8.0mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W8.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*8.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 8.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W9.5mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*9.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 9.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L11.5mm_W9.8mm_P10.00mm_MKT +C, Rect series, Radial, pin pitch=10.00mm, , length*width=11.5*9.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 10.00mm length 11.5mm width 9.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W3.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*3mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W4.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W5.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W6.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.0mm_W6.5mm_P7.50mm_P10.00mm +C, Rect series, Radial, pin pitch=7.50mm 10.00mm, , length*width=13*6.5mm^2, Capacitor +C Rect series Radial pin pitch 7.50mm 10.00mm length 13mm width 6.5mm Capacitor +0 +4 +2 +Capacitor_THT +C_Rect_L13.0mm_W8.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.5mm_W4.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13.5*4mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13.5mm width 4mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L13.5mm_W5.0mm_P10.00mm_FKS3_FKP3_MKS4 +C, Rect series, Radial, pin pitch=10.00mm, , length*width=13.5*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 10.00mm length 13.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W4.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*4.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 4.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W4.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*4.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 4.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W5.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W6.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W7.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W7.3mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*7.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 7.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W8.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*8.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 8.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W8.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*8.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 8.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W9.0mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W9.2mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*9.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 9.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W10.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*10.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 10.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W10.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*10.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 10.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W11.2mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*11.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 11.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W11.8mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*11.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 11.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.5mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.5mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.7mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L16.5mm_W13.9mm_P15.00mm_MKT +C, Rect series, Radial, pin pitch=15.00mm, , length*width=16.5*13.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 15.00mm length 16.5mm width 13.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W5.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W6.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W7.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W8.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W9.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L18.0mm_W11.0mm_P15.00mm_FKS3_FKP3 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=18*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_FKS_3.pdf +C Rect series Radial pin pitch 15.00mm length 18mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W5.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W6.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W7.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W8.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W9.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L19.0mm_W11.0mm_P15.00mm_MKS4 +C, Rect series, Radial, pin pitch=15.00mm, , length*width=19*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 15.00mm length 19mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W7.0mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*7mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W8.3mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*8.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 8.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W8.6mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*8.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 8.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.1mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.3mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.3mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.3mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W10.9mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*10.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 10.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.2mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.6mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L24.0mm_W12.8mm_P22.50mm_MKT +C, Rect series, Radial, pin pitch=22.50mm, , length*width=24*12.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 22.50mm length 24mm width 12.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W5.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W6.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*6mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W7.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*7mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 7mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W8.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*8.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 8.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W10.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*10.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 10.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L26.5mm_W11.5mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=26.5*11.5mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 26.5mm width 11.5mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W9.0mm_P22.00mm +C, Rect series, Radial, pin pitch=22.00mm, , length*width=27*9mm^2, Capacitor +C Rect series Radial pin pitch 22.00mm length 27mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W9.0mm_P23.00mm +C, Rect series, Radial, pin pitch=23.00mm, , length*width=27*9mm^2, Capacitor +C Rect series Radial pin pitch 23.00mm length 27mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L27.0mm_W11.0mm_P22.00mm +C, Rect series, Radial, pin pitch=22.00mm, , length*width=27*11mm^2, Capacitor +C Rect series Radial pin pitch 22.00mm length 27mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W8.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*8mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W10.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*10mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 10mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L28.0mm_W12.0mm_P22.50mm_MKS4 +C, Rect series, Radial, pin pitch=22.50mm, , length*width=28*12mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 22.50mm length 28mm width 12mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.6mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.8mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W7.9mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*7.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 7.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W9.1mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*9.1mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 9.1mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W9.6mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*9.6mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 9.6mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W11.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*11mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W11.9mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*11.9mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 11.9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W12.2mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*12.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 12.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W13.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*13mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W13.8mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*13.8mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 13.8mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W14.2mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*14.2mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 14.2mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L29.0mm_W16.0mm_P27.50mm_MKT +C, Rect series, Radial, pin pitch=27.50mm, , length*width=29*16mm^2, Capacitor, https://en.tdk.eu/inf/20/20/db/fc_2009/MKT_B32560_564.pdf +C Rect series Radial pin pitch 27.50mm length 29mm width 16mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W9.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W11.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W13.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W15.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W17.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*17mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 17mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L31.5mm_W20.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=31.5*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 31.5mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L32.0mm_W15.0mm_P27.00mm +C, Rect series, Radial, pin pitch=27.00mm, , length*width=32*15mm^2, Capacitor +C Rect series Radial pin pitch 27.00mm length 32mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W13.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W15.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L33.0mm_W20.0mm_P27.50mm_MKS4 +C, Rect series, Radial, pin pitch=27.50mm, , length*width=33*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 27.50mm length 33mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W9.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*9mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 9mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W11.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*11mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 11mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W13.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*13mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 13mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W15.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*15mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 15mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W17.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*17mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 17mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W19.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*19mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 19mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W20.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*20mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 20mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W24.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*24mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 24mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W31.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*31mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 31mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W35.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*35mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 35mm Capacitor +0 +2 +2 +Capacitor_THT +C_Rect_L41.5mm_W40.0mm_P37.50mm_MKS4 +C, Rect series, Radial, pin pitch=37.50mm, , length*width=41.5*40mm^2, Capacitor, http://www.wima.com/EN/WIMA_MKS_4.pdf +C Rect series Radial pin pitch 37.50mm length 41.5mm width 40mm Capacitor +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-08_AVX-J +Tantalum Capacitor SMD AVX-J (1608-08 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-08_AVX-J_Pad1.25x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-J (1608-08 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-10_AVX-L +Tantalum Capacitor SMD AVX-L (1608-10 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-1608-10_AVX-L_Pad1.25x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-L (1608-10 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/48064/_t58_vmn_pt0471_1601.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-12_Kemet-R +Tantalum Capacitor SMD Kemet-R (2012-12 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-12_Kemet-R_Pad1.30x1.05mm_HandSolder +Tantalum Capacitor SMD Kemet-R (2012-12 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-15_AVX-P +Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-2012-15_AVX-P_Pad1.30x1.05mm_HandSolder +Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-10_Kemet-I +Tantalum Capacitor SMD Kemet-I (3216-10 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-10_Kemet-I_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-I (3216-10 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-12_Kemet-S +Tantalum Capacitor SMD Kemet-S (3216-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-12_Kemet-S_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-S (3216-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-18_Kemet-A +Tantalum Capacitor SMD Kemet-A (3216-18 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3216-18_Kemet-A_Pad1.58x1.35mm_HandSolder +Tantalum Capacitor SMD Kemet-A (3216-18 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-12_Kemet-T +Tantalum Capacitor SMD Kemet-T (3528-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-12_Kemet-T_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-T (3528-12 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-15_AVX-H +Tantalum Capacitor SMD AVX-H (3528-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-15_AVX-H_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD AVX-H (3528-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-21_Kemet-B +Tantalum Capacitor SMD Kemet-B (3528-21 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-3528-21_Kemet-B_Pad1.50x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-B (3528-21 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-15_Kemet-U +Tantalum Capacitor SMD Kemet-U (6032-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-15_Kemet-U_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-U (6032-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-20_AVX-F +Tantalum Capacitor SMD AVX-F (6032-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-20_AVX-F_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD AVX-F (6032-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-28_Kemet-C +Tantalum Capacitor SMD Kemet-C (6032-28 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-6032-28_Kemet-C_Pad2.25x2.35mm_HandSolder +Tantalum Capacitor SMD Kemet-C (6032-28 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7132-20_AVX-U +Tantalum Capacitor SMD AVX-U (7132-20 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7132-20_AVX-U_Pad2.72x3.50mm_HandSolder +Tantalum Capacitor SMD AVX-U (7132-20 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7132-28_AVX-C +Tantalum Capacitor SMD AVX-C (7132-28 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7132-28_AVX-C_Pad2.72x3.50mm_HandSolder +Tantalum Capacitor SMD AVX-C (7132-28 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-15_AVX-R +Tantalum Capacitor SMD AVX-R (7260-15 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-15_AVX-R_Pad2.68x6.30mm_HandSolder +Tantalum Capacitor SMD AVX-R (7260-15 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-20_AVX-M +Tantalum Capacitor SMD AVX-M (7260-20 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-20_AVX-M_Pad2.68x6.30mm_HandSolder +Tantalum Capacitor SMD AVX-M (7260-20 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-28_AVX-M +Tantalum Capacitor SMD AVX-M (7260-28 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-28_AVX-M_Pad2.68x6.30mm_HandSolder +Tantalum Capacitor SMD AVX-M (7260-28 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-38_AVX-R +Tantalum Capacitor SMD AVX-R (7260-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7260-38_AVX-R_Pad2.68x6.30mm_HandSolder +Tantalum Capacitor SMD AVX-R (7260-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/F72-F75.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-15_Kemet-W +Tantalum Capacitor SMD Kemet-W (7343-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-15_Kemet-W_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-W (7343-15 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-20_Kemet-V +Tantalum Capacitor SMD Kemet-V (7343-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-20_Kemet-V_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-V (7343-20 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-30_AVX-N +Tantalum Capacitor SMD AVX-N (7343-30 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-30_AVX-N_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD AVX-N (7343-30 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-31_Kemet-D +Tantalum Capacitor SMD Kemet-D (7343-31 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-31_Kemet-D_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-D (7343-31 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-40_Kemet-Y +Tantalum Capacitor SMD Kemet-Y (7343-40 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-40_Kemet-Y_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-Y (7343-40 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-43_Kemet-X +Tantalum Capacitor SMD Kemet-X (7343-43 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7343-43_Kemet-X_Pad2.25x2.55mm_HandSolder +Tantalum Capacitor SMD Kemet-X (7343-43 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7360-38_Kemet-E +Tantalum Capacitor SMD Kemet-E (7360-38 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7360-38_Kemet-E_Pad2.25x4.25mm_HandSolder +Tantalum Capacitor SMD Kemet-E (7360-38 Metric), IPC_7351 nominal, (Body size from: http://www.kemet.com/Lists/ProductCatalog/Attachments/253/KEM_TC101_STD.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-38_AVX-V +Tantalum Capacitor SMD AVX-V (7361-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-38_AVX-V_Pad2.18x3.30mm_HandSolder +Tantalum Capacitor SMD AVX-V (7361-38 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-438_AVX-U +Tantalum Capacitor SMD AVX-U (7361-438 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Capacitor_Tantalum_SMD +CP_EIA-7361-438_AVX-U_Pad2.18x3.30mm_HandSolder +Tantalum Capacitor SMD AVX-U (7361-438 Metric), IPC_7351 nominal, (Body size from: http://datasheets.avx.com/NOS.pdf), generated with kicad-footprint-generator +capacitor tantalum +0 +2 +2 +Connector +Banana_Jack_1Pin +Single banana socket, footprint - 6mm drill +banana socket +0 +1 +1 +Connector +Banana_Jack_2Pin +Dual banana socket, footprint - 2 x 6mm drills +banana socket +0 +2 +2 +Connector +Banana_Jack_3Pin +Triple banana socket, footprint - 3 x 6mm drills +banana socket +0 +3 +3 +Connector +CUI_PD-30 +3 pin connector, PD-30, http://www.cui.com/product/resource/pd-30.pdf +connector 3-pin PD-30 power DIN +0 +4 +4 +Connector +CalTest_CT3151 +Right-angle standard banana jack, http://www.caltestelectronics.com/images/attachments/P315100rH_drawing.pdf +banana jack horizontal +0 +4 +1 +Connector +Connector_SFP_and_Cage +https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=2227302&DocType=Customer+Drawing&DocLang=English +SFP+ SFP +0 +40 +21 +Connector +DTF13-12Px +http://www.te.com/usa-en/product-DTF13-12PA-G003.html +DEUTSCH DT header 12 pin +0 +12 +12 +Connector +FanPinHeader_1x03_P2.54mm_Vertical +3-pin CPU fan Through hole pin header, see http://www.formfactors.org/developer%5Cspecs%5Crev1_2_public.pdf +pin header 3-pin CPU fan +0 +3 +3 +Connector +FanPinHeader_1x04_P2.54mm_Vertical +4-pin CPU fan Through hole pin header, e.g. for Wieson part number 2366C888-007 Molex 47053-1000, Foxconn HF27040-M1, Tyco 1470947-1 or equivalent, see http://www.formfactors.org/developer%5Cspecs%5Crev1_2_public.pdf +pin header 4-pin CPU fan +0 +4 +4 +Connector +GB042-34S-H10 +http://www.lsmtron.com/pdf/Connector&Antenna_catalog.PDF +34pin SMD connector +0 +34 +34 +Connector +IHI_B6A-PCB-45_Vertical +https://lugsdirect.com/PDF_Webprint/B6A-PCB-45-XX(-X).pdf +connector IHI B6A-PCB-45 +0 +49 +1 +Connector +JWT_A3963_1x02_P3.96mm_Vertical +JWT A3963, 3.96mm pitch Pin head connector (http://www.jwt.com.tw/pro_pdf/A3963.pdf) +connector JWT A3963 pinhead +0 +2 +2 +Connector +NS-Tech_Grove_1x04_P2mm_Vertical +https://statics3.seeedstudio.com/images/opl/datasheet/3470130P1.pdf +Grove-1x04 +0 +4 +4 +Connector +SpringContact_Harwin_S1941-46R +7.25mm SMT Multi-directional Spring Contact (T+R), https://cdn.harwin.com/pdfs/S1941R.pdf +spring contact emi emc shield +0 +1 +1 +Connector +Tag-Connect_TC2030-IDC-FP_2x03_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2030-IDC.pdf +tag connect programming header pogo pins +0 +6 +6 +Connector +Tag-Connect_TC2030-IDC-NL_2x03_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2030-IDC-NL.pdf +tag connect programming header pogo pins +0 +6 +6 +Connector +Tag-Connect_TC2050-IDC-FP_2x05_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2050-IDC-430%20Datasheet.pdf +tag connect programming header pogo pins +0 +10 +10 +Connector +Tag-Connect_TC2050-IDC-NL_2x05_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2050-IDC-NL%20Datasheet.pdf +tag connect programming header pogo pins +0 +10 +10 +Connector +Tag-Connect_TC2050-IDC-NL_2x05_P1.27mm_Vertical_with_bottom_clip +Tag-Connect programming header with bottom courtyard for TC2050-NL Clip board ; https://www.tag-connect.com/wp-content/uploads/bsk-pdf-manager/TC2050-IDC-NL_Datasheet_8.pdf https://www.tag-connect.com/wp-content/uploads/bsk-pdf-manager/TC2050-CLIP_Datasheet_25.pdf +tag connect programming header pogo pins +0 +10 +10 +Connector +Tag-Connect_TC2070-IDC-FP_2x07_P1.27mm_Vertical +Tag-Connect programming header; http://www.tag-connect.com/Materials/TC2070-IDC%20Datasheet.pdf +tag connect programming header pogo pins +0 +14 +14 +Connector_AMASS +AMASS_MR30PW-FB_1x03_P3.50mm_Horizontal +Connector XT30 Horizontal PCB Female, https://www.tme.eu/en/Document/5e47640ba39fa492dbd4c0f4c8ae7b93/MR30PW%20SPEC.pdf +RC Connector XT30 +0 +5 +3 +Connector_AMASS +AMASS_MR30PW-M_1x03_P3.50mm_Horizontal +Connector XT30 Horizontal PCB Male, https://www.tme.eu/en/Document/5e47640ba39fa492dbd4c0f4c8ae7b93/MR30PW%20SPEC.pdf +RC Connector XT30 +0 +5 +3 +Connector_AMASS +AMASS_XT30PW-F_1x02_P2.50mm_Horizontal +Connector XT30 Horizontal PCB Female, https://www.tme.eu/en/Document/ce4077e36b79046da520ca73227e15de/XT30PW%20SPEC.pdf +RC Connector XT30 +0 +4 +2 +Connector_AMASS +AMASS_XT30PW-M_1x02_P2.50mm_Horizontal +Connector XT30 Horizontal PCB Male, https://www.tme.eu/en/Document/ce4077e36b79046da520ca73227e15de/XT30PW%20SPEC.pdf +RC Connector XT30 +0 +4 +2 +Connector_AMASS +AMASS_XT30U-F_1x02_P5.0mm_Vertical +Connector XT30 Vertical Cable Female, https://www.tme.eu/en/Document/3cbfa5cfa544d79584972dd5234a409e/XT30U%20SPEC.pdf +RC Connector XT30 +0 +2 +2 +Connector_AMASS +AMASS_XT30U-M_1x02_P5.0mm_Vertical +Connector XT30 Vertical Cable Male, https://www.tme.eu/en/Document/3cbfa5cfa544d79584972dd5234a409e/XT30U%20SPEC.pdf +RC Connector XT30 +0 +2 +2 +Connector_AMASS +AMASS_XT30UPB-F_1x02_P5.0mm_Vertical +Connector XT30 Vertical PCB Female, https://www.tme.eu/en/Document/4acc913878197f8c2e30d4b8cdc47230/XT30UPB%20SPEC.pdf +RC Connector XT30 +0 +2 +2 +Connector_AMASS +AMASS_XT30UPB-M_1x02_P5.0mm_Vertical +Connector XT30 Vertical PCB Male, https://www.tme.eu/en/Document/4acc913878197f8c2e30d4b8cdc47230/XT30UPB%20SPEC.pdf +RC Connector XT30 +0 +2 +2 +Connector_AMASS +AMASS_XT60-F_1x02_P7.20mm_Vertical +AMASS female XT60, through hole, vertical, https://www.tme.eu/Document/2d152ced3b7a446066e6c419d84bb460/XT60%20SPEC.pdf +XT60 female vertical +0 +2 +2 +Connector_AMASS +AMASS_XT60-M_1x02_P7.20mm_Vertical +AMASS female XT60, through hole, vertical, https://www.tme.eu/Document/2d152ced3b7a446066e6c419d84bb460/XT60%20SPEC.pdf +XT60 female vertical +0 +2 +2 +Connector_Amphenol +Amphenol_M8S-03PMMR-SF8001 +M8 Male connector for panel, 90° PCB mount (https://www.amphenolltw.com/2012download/2D%20PDF/03_M%20Series%20Sensor%20Connectors/M8S-XXPMMR-SF8001.pdf) +three-pin M8 +0 +5 +4 +Connector_Audio +Jack_3.5mm_CUI_SJ-3523-SMT_Horizontal +3.5 mm, Stereo, Right Angle, Surface Mount (SMT), Audio Jack Connector (https://www.cui.com/product/resource/sj-352x-smt-series.pdf) +3.5mm audio cui horizontal jack stereo +0 +3 +3 +Connector_Audio +Jack_3.5mm_CUI_SJ-3524-SMT_Horizontal +3.5 mm, Stereo, Right Angle, Surface Mount (SMT), Audio Jack Connector (https://www.cui.com/product/resource/sj-352x-smt-series.pdf) +3.5mm audio cui horizontal jack stereo +0 +4 +4 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3533NG_Horizontal +TRS 3.5mm, horizontal, through-hole, https://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal +0 +3 +3 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3533NG_Horizontal_CircularHoles +TRS 3.5mm, horizontal, through-hole, , circular holeshttps://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal circular +0 +3 +3 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3535NG_Horizontal +TRS 3.5mm, horizontal, through-hole, with switch, https://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal +0 +5 +5 +Connector_Audio +Jack_3.5mm_CUI_SJ1-3535NG_Horizontal_CircularHoles +TRS 3.5mm, horizontal, through-hole, with switch, circular holes, https://www.cui.com/product/resource/sj1-353xng.pdf +TRS audio jack stereo horizontal circular +0 +5 +5 +Connector_Audio +Jack_3.5mm_Ledino_KB3SPRS_Horizontal +https://www.reichelt.de/index.html?ACTION=7&LA=3&OPEN=0&INDEX=0&FILENAME=C160%252FKB3SPRS.pdf +jack stereo TRS +0 +5 +5 +Connector_Audio +Jack_3.5mm_PJ311_Horizontal +PJ311 6pin SMD 3.5mm stereo headphones jack. +headphones jack plug stereo 3.5mm PJ311 +0 +6 +6 +Connector_Audio +Jack_3.5mm_PJ320D_Horizontal +Headphones with microphone connector, 3.5mm, 4 pins (http://www.qingpu-electronics.com/en/products/WQP-PJ320D-72.html) +3.5mm jack mic microphone phones headphones 4pins audio plug +0 +4 +4 +Connector_Audio +Jack_3.5mm_PJ320E_Horizontal +Headphones with microphone connector, 3.5mm, 4 pins (http://www.qingpu-electronics.com/en/products/WQP-PJ320E-177.html) +3.5mm jack mic microphone phones headphones 4pins audio plug +0 +5 +4 +Connector_Audio +Jack_3.5mm_PJ31060-I_Horizontal +PJ31060-I 6pin SMD 3.5mm headphones jack (http://www.china-bsun.com/Product48/1577.html) +headphones jack plug stereo 3.5mm PJ31060-I PJ31060 +0 +6 +6 +Connector_Audio +Jack_3.5mm_QingPu_WQP-PJ398SM_Vertical_CircularHoles +TRS 3.5mm, vertical, Thonkiconn, PCB mount, (http://www.qingpu-electronics.com/en/products/WQP-PJ398SM-362.html) +WQP-PJ398SM WQP-PJ301M-12 TRS 3.5mm mono vertical jack thonkiconn qingpu +0 +3 +3 +Connector_Audio +Jack_3.5mm_Switronic_ST-005-G_horizontal +3.5mm horizontal headphones jack, http://akizukidenshi.com/download/ds/switronic/ST-005-G.pdf +Connector Audio Switronic ST-005-G +0 +4 +3 +Connector_Audio +Jack_6.35mm_Neutrik_NJ2FD-V_Vertical +6.35mm (1/4 in) Vertical Jack, Non-switching mono jack (T/S), https://www.neutrik.com/en/product/nj2fd-v +neutrik jack vertical +0 +2 +2 +Connector_Audio +Jack_6.35mm_Neutrik_NJ3FD-V_Vertical +6.35mm (1/4 in) Vertical Jack, Non-switching stereo jack (T/R/S), https://www.neutrik.com/en/product/nj3fd-v +neutrik jack vertical +0 +3 +3 +Connector_Audio +Jack_6.35mm_Neutrik_NJ5FD-V_Vertical +6.35mm (1/4 in) Vertical Jack, 2 x switching (normalling) stereo jack (T/TN/R/RN/S), https://www.neutrik.com/en/product/nj5fd-v +neutrik jack vertical +0 +5 +5 +Connector_Audio +Jack_6.35mm_Neutrik_NJ6FD-V_Vertical +6.35mm (1/4 in) Vertical Jack, 3 x switching (normalling) stereo jack (T/TN/R/RN/S/SN), https://www.neutrik.com/en/product/nj6fd-v +neutrik jack vertical +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NJ6TB-V_Vertical +6.35mm (1/4 in) Vertical Jack, 3 x switching (normalling) stereo jack B-gauge type (T/TN/R/RN/S/SN), https://www.neutrik.com/en/product/nj6tb-v +neutrik jack vertical +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ4HCD2_Horizontal +M Series, 6.35mm (1/4in) mono jack, switched, with chrome ferrule and straight PCB pins, https://www.neutrik.com/en/product/nmj4hcd2 +neutrik jack m +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ4HFD2_Horizontal +M Series, 6.35mm (1/4in) mono jack, switched, with full threaded nose and straight PCB pins, https://www.neutrik.com/en/product/nmj4hfd2 +neutrik jack m +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ4HFD3_Horizontal +M Series, 6.35mm (1/4in) mono jack, switched, with a full threaded nose and offset PCB pins, https://www.neutrik.com/en/product/nmj4hfd3 +neutrik jack m +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ4HHD2_Horizontal +M Series, 6.35mm (1/4in) mono jack, switched, with a half threaded nose and offset PCB pins, https://www.neutrik.com/en/product/nmj4hhd2 +neutrik jack m +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HCD2_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with chrome ferrule and straight PCB pins, https://www.neutrik.com/en/product/nmj6hcd2 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HCD3_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with chrome ferrule and offset PCB pins, https://www.neutrik.com/en/product/nmj6hcd3 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HFD2-AU_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, full threaded nose, straight PCB pins, gold plated contacts, https://www.neutrik.com/en/product/nmj6hfd2-au +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HFD2_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with full threaded nose and straight PCB pins, https://www.neutrik.com/en/product/nmj6hfd2 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HFD3_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with full threaded nose and offset PCB pins, https://www.neutrik.com/en/product/nmj6hfd3 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HFD4_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with full threaded nose and fishtail PCB pins, https://www.neutrik.com/en/product/nmj6hfd4 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NMJ6HHD2_Horizontal +M Series, 6.35mm (1/4in) stereo jack, switched, with half threaded nose and offset PCB pins, https://www.neutrik.com/en/product/nmj6hhd2 +neutrik jack m +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ3HF-1_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, unswitched, fully threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj3hf-1 +neutrik jack slim +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ4HF-1_Horizontal +Slim Jacks, 6.35mm (1/4in) mono jack, switched, fully threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj4hf-1 +neutrik jack slim +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ4HF_Horizontal +Slim Jacks, 6.35mm (1/4in) mono jack, switched, fully threaded nose, https://www.neutrik.com/en/product/nrj4hf +neutrik jack slim +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ4HH-1_Horizontal +Slim Jacks, 6.35mm (1/4in) mono jack, switched, half threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj4hh-1 +neutrik jack slim +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ4HH_Horizontal +Slim Jacks, 6.35mm (1/4in) mono jack, switched, half threaded nose, https://www.neutrik.com/en/product/nrj4hh +neutrik jack slim +0 +4 +4 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HF-1-AU_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, gold plated contacts, fully threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj6hf-1-au +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HF-1_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, fully threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj6hf-1 +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HF-AU_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, gold plated contacts, fully threaded nose, https://www.neutrik.com/en/product/nrj6hf-au +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HF_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, fully threaded nose, https://www.neutrik.com/en/product/nrj6hf +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HH-1_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, half threaded nose, sleeve contact/front panel connection, https://www.neutrik.com/en/product/nrj6hh-1 +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HH-AU_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, gold plated contacts, half threaded nose, https://www.neutrik.com/en/product/nrj6hh-au +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HH_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, switched, half threaded nose, https://www.neutrik.com/en/product/nrj6hh +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HM-1-AU_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, metal nose, gold plated contacts, efficient chassis ground connection, T+R+S normalling contact, https://www.neutrik.com/en/product/nrj6hm-1-au +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HM-1-PRE_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, metal nose, efficient chassis ground connection, T+R normalling contact, https://www.neutrik.com/en/product/nrj6hm-1-pre +neutrik jack slim +0 +6 +5 +Connector_Audio +Jack_6.35mm_Neutrik_NRJ6HM-1_Horizontal +Slim Jacks, 6.35mm (1/4in) stereo jack, metal nose with efficient chassis ground connection, T+R+S normalling contact, https://www.neutrik.com/en/product/nrj6hm-1 +neutrik jack slim +0 +6 +6 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ8HC_Horizontal +Stacking Jacks, Mono dual jack, full nose, https://www.neutrik.com/en/product/nsj8hc +neutrik jack stacking +0 +9 +9 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ8HL_Horizontal +Stacking Jacks, Mono dual jack, quick fix nose, https://www.neutrik.com/en/product/nsj8hl +neutrik jack stacking +0 +9 +9 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ12HC_Horizontal +Stacking Jacks, Stereo dual jack, full nose, https://www.neutrik.com/en/product/nsj12hc +neutrik jack stacking +0 +13 +13 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ12HF-1_Horizontal +Stacking Jacks, Stereo dual jack, full threaded nose, https://www.neutrik.com/en/product/nsj12hf-1 +neutrik jack stacking +0 +13 +13 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ12HH-1_Horizontal +Stacking Jacks, Stereo dual jack, half threaded nose, https://www.neutrik.com/en/product/nsj12hh-1 +neutrik jack stacking +0 +13 +13 +Connector_Audio +Jack_6.35mm_Neutrik_NSJ12HL_Horizontal +Stacking Jacks, Stereo dual jack, quick fix nose, https://www.neutrik.com/en/product/nsj12hl +neutrik jack stacking +0 +13 +13 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ5FI-H-0_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) mono jack without switching contact, horizontal PCB mount, https://www.neutrik.com/en/product/ncj5fi-h-0 +neutrik jack combo i +0 +6 +6 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ5FI-H_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) mono jack without switching contact, horizontal PCB mount, retention spring, https://www.neutrik.com/en/product/ncj5fi-h +neutrik jack combo i +0 +6 +6 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ5FI-V-0_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) mono jack without switching contact, vertical PCB mount, https://www.neutrik.com/en/product/ncj5fi-v-0 +neutrik jack combo i +0 +6 +6 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ5FI-V_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) mono jack without switching contact, vertical PCB mount, retention spring, https://www.neutrik.com/en/product/ncj5fi-v +neutrik jack combo i +0 +6 +6 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-H-0_Horizontal +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, horizontal PCB mount, retention spring, https://www.neutrik.com/en/product/ncj6fa-h-0 +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-H-DA_Horizontal +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/ncj6fa-h-da +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-H_Horizontal +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, horizontal PCB mount, https://www.neutrik.com/en/product/ncj6fa-h +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-V-0_Vertical +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, vertical PCB mount, retention spring, https://www.neutrik.com/en/product/ncj6fa-v-0 +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-V-DA_Vertical +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/ncj6fa-v-da +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FA-V_Vertical +Combo A series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack, vertical PCB mount, https://www.neutrik.com/en/product/ncj6fa-v +neutrik jack combo a +0 +8 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FI-H-0_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack without switching contact, horizontal PCB mount, https://www.neutrik.com/en/product/ncj6fi-h-0 +neutrik jack combo i +0 +7 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FI-H_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack without switching contact, horizontal PCB mount, retention spring, https://www.neutrik.com/en/product/ncj6fi-h +neutrik jack combo i +0 +7 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FI-V-0_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack without switching contact, vertical PCB mount, https://www.neutrik.com/en/product/ncj6fi-v-0 +neutrik jack combo i +0 +7 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ6FI-V_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) stereo jack without switching contact, vertical PCB mount, retention spring, https://www.neutrik.com/en/product/ncj6fi-v +neutrik jack combo i +0 +7 +7 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ9FI-H-0_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack, horizontal PCB mount, https://www.neutrik.com/en/product/ncj9fi-h-0 +neutrik jack combo i +0 +10 +10 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ9FI-H_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack, horizontal PCB mount, retention spring, https://www.neutrik.com/en/product/ncj9fi-h +neutrik jack combo i +0 +10 +10 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ9FI-V-0_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack, vertical PCB mount, https://www.neutrik.com/en/product/ncj9fi-v-0 +neutrik jack combo i +0 +10 +10 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ9FI-V_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack, vertical PCB mount, retention spring, https://www.neutrik.com/en/product/ncj9fi-v +neutrik jack combo i +0 +10 +10 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ10FI-H-0_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack and switching ground contact, horizontal PCB mount, https://www.neutrik.com/en/product/ncj10fi-h-0 +neutrik jack combo i +0 +11 +11 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ10FI-H_Horizontal +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack and switching ground contact, horizontal PCB mount, retention spring, https://www.neutrik.com/en/product/ncj10fi-h +neutrik jack combo i +0 +11 +11 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ10FI-V-0_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack and switching ground contact, vertical PCB mount, https://www.neutrik.com/en/product/ncj10fi-v-0 +neutrik jack combo i +0 +11 +11 +Connector_Audio +Jack_XLR-6.35mm_Neutrik_NCJ10FI-V_Vertical +Combo I series, 3 pole XLR female receptacle with 6.35mm (1/4in) switching stereo jack and switching ground contact, vertical PCB mount, retention spring, https://www.neutrik.com/en/product/ncj10fi-v +neutrik jack combo i +0 +11 +11 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH-0_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: without ground/shell contact, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faah-0 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH1-0_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faah1-0 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH1-DA_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3faah1-da +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH1_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3faah1 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH2-0_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faah2-0 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH2_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3faah2 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAH_Horizontal +AA Series, 3 pole female XLR receptacle, grounding: without ground/shell contact, horizontal PCB mount, https://www.neutrik.com/en/product/nc3faah +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV-0_Vertical +AA Series, 3 pole female receptacle, grounding: without ground/shell contact, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faav-0 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV1-0_Vertical +AA Series, 3 pole female receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faav1-0 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV1-DA_Vertical +AA Series, 3 pole female receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3faav1-da +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV1_Vertical +AA Series, 3 pole female receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3faav1 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV2-0_Vertical +AA Series, 3 pole female receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3faav2-0 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV2_Vertical +AA Series, 3 pole female receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3faav2 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAAV_Vertical +AA Series, 3 pole female receptacle, grounding: without ground/shell contact, vertical PCB mount, https://www.neutrik.com/en/product/nc3faav +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: without ground/shell contact, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fah-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH1-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fah1-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH1-DA_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fah1-da +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH1_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3fah1 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH2-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fah2-0 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH2-DA_Horizontal +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fah2-da +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH2_Horizontal +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3fah2 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHL-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: without ground/shell contact, lateral left PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fahl-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHL1-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, lateral left PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fahl1-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHL1_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, lateral left PCB mount, https://www.neutrik.com/en/product/nc3fahl1 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHR-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: without ground / shell contact, lateral right PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fahr-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHR1-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, lateral right PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fahr1-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHR1_Horizontal +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, lateral right PCB mount, https://www.neutrik.com/en/product/nc3fahr1 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHR2-0_Horizontal +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, lateral right PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fahr2-0 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAHR2_Horizontal +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, lateral right PCB mount, https://www.neutrik.com/en/product/nc3fahr2 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAH_Horizontal +A Series, 3 pole female XLR receptacle, grounding: without ground/shell contact, horizontal PCB mount, https://www.neutrik.com/en/product/nc3fah +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV-0_Vertical +A Series, 3 pole female XLR receptacle, grounding: without ground / shell contact, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fav-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV1-0_Vertical +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fav1-0 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV1-DA_Vertical +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fav1-da +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV1_Vertical +A Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3fav1 +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV2-0_Vertical +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc3fav2-0 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV2-DA_Vertical +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fav2-da +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV2_Vertical +A Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3fav2 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FAV_Vertical +A Series, 3 pole female XLR receptacle, grounding: without ground / shell contact, vertical PCB mount, https://www.neutrik.com/en/product/nc3fav +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH1-B_Horizontal +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3fbh1-b +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH1-DA_Horizontal +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fbh1-da +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH1-E_Horizontal +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, additional ground contacts, https://www.neutrik.com/en/product/nc3fbh1-e +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH1_Horizontal +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3fbh1 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH2-B_Horizontal +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3fbh2-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH2-DA_Horizontal +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fbh2-da +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH2-E_Horizontal +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, additional ground contacts, https://www.neutrik.com/en/product/nc3fbh2-e +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBH2_Horizontal +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3fbh2 +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBHL1_Horizontal +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, lateral left PCB mount, https://www.neutrik.com/en/product/nc3fbhl1 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV1-0_Vertical +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, retention spring, no latch, https://www.neutrik.com/en/product/nc3fbv1-0 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV1-B_Vertical +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3fbv1-b +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV1-DA_Vertical +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fbv1-da +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV1_Vertical +B Series, 3 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3fbv1 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV2-B_Vertical +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3fbv2-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV2-DA_Vertical +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc3fbv2-da +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV2-SW_Vertical +B Series, 3 pole female XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3fbv2-sw +neutrik xlr b +0 +7 +7 +Connector_Audio +Jack_XLR_Neutrik_NC3FBV2_Vertical +B Series, 3 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3fbv2 +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAH-0_Horizontal +AA Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, horizontal PCB mount, https://www.neutrik.com/en/product/nc3maah-0 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAH-1_Horizontal +AA Series, 3 pole male XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3maah-1 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAH_Horizontal +AA Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3maah +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAV-0_Vertical +AA Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, vertical PCB mount, https://www.neutrik.com/en/product/nc3maav-0 +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAV-1_Vertical +AA Series, 3 pole male XLR receptacle, grounding: mating connector shell to pin1 and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3maav-1 +neutrik xlr aa +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MAAV_Vertical +AA Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3maav +neutrik xlr aa +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAFH-PH_Horizontal +A Series, Chassis connector H female (A series layout), horizontal PCB mount, https://www.neutrik.com/en/product/nc4mafh-ph +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MAH-0_Horizontal +A Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mah-0 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAHL_Horizontal +A Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, lateral left PCB mount, https://www.neutrik.com/en/product/nc3mahl +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAHR_Horizontal +A Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, lateral right PCB mount, https://www.neutrik.com/en/product/nc3mahr +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAH_Horizontal +A Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mah +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAMH-PH_Horizontal +A Series, Chassis connector Phoenix H male (A series layout), horizontal PCB mount, https://www.neutrik.com/en/product/nc4mamh-ph +neutrik xlr a +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MAV-0_Vertical +A Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, vertical PCB mount, https://www.neutrik.com/en/product/nc3mav-0 +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MAV_Vertical +A Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3mav +neutrik xlr a +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBH-0_Horizontal +B Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, steel retention lug, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mbh-0 +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBH-1_Horizontal +B Series, 3 pole male XLR receptacle, grounding: mating connector shell to pin1 and front panel, steel retention lug, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mbh-1 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MBH-B_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, horizontal PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3mbh-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBH-E_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, horizontal PCB mount, additional ground contacts, https://www.neutrik.com/en/product/nc3mbh-e +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBHL-B_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, lateral left PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3mbhl-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBHL_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, lateral left PCB mount, https://www.neutrik.com/en/product/nc3mbhl +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBHR-B_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, lateral right PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3mbhr-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBHR_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, lateral right PCB mount, https://www.neutrik.com/en/product/nc3mbhr +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBH_Horizontal +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mbh +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV-0_Vertical +B Series, 3 pole male XLR receptacle, grounding: ground contact connected to shell ground, but not to front panel and Pin 1, steel retention lug, vertical PCB mount, https://www.neutrik.com/en/product/nc3mbv-0 +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV-1_Vertical +B Series, 3 pole male XLR receptacle, grounding: mating connector shell to pin1 and front panel, steel retention lug, vertical PCB mount, https://www.neutrik.com/en/product/nc3mbv-1 +neutrik xlr b +0 +3 +3 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV-B_Vertical +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, vertical PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc3mbv-b +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV-E_Vertical +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, vertical PCB mount, additional ground contacts, https://www.neutrik.com/en/product/nc3mbv-e +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV-SW_Vertical +B Series, 3 pole male XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc3mbv-sw +neutrik xlr b +0 +7 +7 +Connector_Audio +Jack_XLR_Neutrik_NC3MBV_Vertical +B Series, 3 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, steel retention lug, vertical PCB mount, https://www.neutrik.com/en/product/nc3mbv +neutrik xlr b +0 +4 +4 +Connector_Audio +Jack_XLR_Neutrik_NC4FAH-0_Horizontal +A Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc4fah-0 +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4FAH_Horizontal +A Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc4fah +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4FAV-0_Vertical +A Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc4fav-0 +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4FAV_Vertical +A Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc4fav +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4FBH_Horizontal +B Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc4fbh +neutrik xlr b +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4FBV_Vertical +B Series, 4 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc4fbv +neutrik xlr b +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4MAH_Horizontal +A Series, 4 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc4mah +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4MAV_Vertical +A Series, 4 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc4mav +neutrik xlr a +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4MBH_Horizontal +B Series, 4 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc4mbh +neutrik xlr b +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC4MBV_Vertical +B Series, 4 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc4mbv +neutrik xlr b +0 +5 +5 +Connector_Audio +Jack_XLR_Neutrik_NC5FAH-0_Horizontal +A Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, retention spring instead of latch, https://www.neutrik.com/en/product/nc5fah-0 +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FAH-DA_Horizontal +A Series, 5 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc5fah-da +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FAH_Horizontal +A Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc5fah +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FAV-DA_Vertical +A Series, 5 pole female XLR receptacle, grounding: mating connector shell to pin1 and front panel, horizontal PCB mount, asymmetric push, https://www.neutrik.com/en/product/nc5fav-da +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FAV-SW_Vertical +A Series, 5 pole female XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, color coding possible, https://www.neutrik.com/en/product/nc5fav-sw +neutrik xlr a +0 +9 +9 +Connector_Audio +Jack_XLR_Neutrik_NC5FAV_Vertical +A Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5fav +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FBH-B_Horizontal +B Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc5fbh-b +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FBH_Horizontal +B Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc5fbh +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FBV-B_Vertical +B Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc5fbv-b +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5FBV-SW_Vertical +B Series, 5 pole female XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5fbv-sw +neutrik xlr b +0 +9 +9 +Connector_Audio +Jack_XLR_Neutrik_NC5FBV_Vertical +B Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5fbv +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MAH_Horizontal +A Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc5mah +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MAV-SW_Vertical +A Series, 5 pole male XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5mav-sw +neutrik xlr a +0 +9 +9 +Connector_Audio +Jack_XLR_Neutrik_NC5MAV_Vertical +A Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5mav +neutrik xlr a +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MBH-B_Horizontal +B Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc5mbh-b +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MBH_Horizontal +B Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc5mbh +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MBV-B_Vertical +B Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, black chrome shell, https://www.neutrik.com/en/product/nc5mbv-b +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_XLR_Neutrik_NC5MBV-SW_Vertical +B Series, 5 pole male XLR receptacle, switching contacts, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5mbv-sw +neutrik xlr b +0 +9 +9 +Connector_Audio +Jack_XLR_Neutrik_NC5MBV_Vertical +B Series, 5 pole male XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, https://www.neutrik.com/en/product/nc5mbv +neutrik xlr b +0 +6 +6 +Connector_Audio +Jack_speakON-6.35mm_Neutrik_NLJ2MD-H_Horizontal +speakON Combo, 2 pole combination of speakON socket and 6.35mm (1/4in) jack receptacle, horizontal pcb mount, https://www.neutrik.com/en/product/nlj2md-h +neutrik speakon combo +0 +2 +2 +Connector_Audio +Jack_speakON-6.35mm_Neutrik_NLJ2MD-V_Vertical +speakON Combo, 2 pole combination of speakON socket and 6.35mm (1/4in) jack receptacle, vertical pcb mount, https://www.neutrik.com/en/product/nlj2md-v +neutrik speakon combo +0 +2 +2 +Connector_Audio +Jack_speakON_Neutrik_NL2MD-H_Horizontal +speakON Chassis Connectors, 2 pole chassis connector, gray D-size flange, countersunk thru holes, horizontal PCB, https://www.neutrik.com/en/product/nl2md-h +neutrik speakon +0 +2 +2 +Connector_Audio +Jack_speakON_Neutrik_NL2MD-V_Vertical +speakON Chassis Connectors, 2 pole chassis connector, black D-size flange, countersunk thru holes, vertical PCB mount, https://www.neutrik.com/en/product/nl2md-v +neutrik speakon +0 +2 +2 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-H-1_Horizontal +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, countersunk thru holes, horizontal PCB mount, https://www.neutrik.com/en/product/nl4md-h-1 +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-H-2_Horizontal +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, mirrored self tapping screw holes (A-screw), horizontal PCB mount, https://www.neutrik.com/en/product/nl4md-h-2 +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-H-3_Horizontal +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, self tapping screw holes (A-screw), horizontal PCB mount, https://www.neutrik.com/en/product/nl4md-h-3 +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-H_Horizontal +speakON Chassis Connectors, 4 pole chassis connector, grey D-size flange, self tapping screw holes (A-screw), horizontal PCB mount, https://www.neutrik.com/en/product/nl4md-h +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-V-1_Vertical +speakON Chassis Connectors, 4 pole chassis connector, grey D-size flange, self tapping screw holes (A-screw), vertical PCB mount, https://www.neutrik.com/en/product/nl4md-v-1 +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-V-2_Vertical +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, mirrored self tapping screw holes (A-screw), vertical PCB mount, https://www.neutrik.com/en/product/nl4md-v-2 +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-V-R_Vertical +speakON Chassis Connectors, 4 pole chassis connector, red D-size flange, countersunk thru holes, vertical PCB mount, https://www.neutrik.com/en/product/nl4md-v-r +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-V-S_Vertical +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, switchable version of NL4MD-V with 8 vertical PCB contacts (4 switching contacts), https://www.neutrik.com/en/product/nl4md-v-s +neutrik speakon +0 +8 +8 +Connector_Audio +Jack_speakON_Neutrik_NL4MD-V_Vertical +speakON Chassis Connectors, 4 pole chassis connector, black D-size flange, countersunk thru holes, vertical PCB mount, https://www.neutrik.com/en/product/nl4md-v +neutrik speakon +0 +4 +4 +Connector_Audio +Jack_speakON_Neutrik_NL8MD-V-1_Vertical +speakON Chassis Connectors, 8 pole chassis connector, nickel metal square G-size flange, self tapping screw holes (A-screw), vertical PCB mount, https://www.neutrik.com/en/product/nl8md-v-1 +neutrik speakon +0 +8 +8 +Connector_Audio +Jack_speakON_Neutrik_NL8MD-V_Vertical +speakON Chassis Connectors, 8 pole chassis connector, nickel metal square G-size flange, countersunk thru holes, vertical PCB mount, https://www.neutrik.com/en/product/nl8md-v +neutrik speakon +0 +8 +8 +Connector_Audio +Jack_speakON_Neutrik_NLT4MD-V_Vertical +STX Series, 4 pole male chassis connector, metal housing, vertical PCB mount, self tapping screw holes (A-screw), https://www.neutrik.com/en/product/nlt4md-v +neutrik speakon stx +0 +4 +4 +Connector_Audio +MiniXLR-5_Switchcraft_TRAPC_Horizontal +http://www.switchcraft.com/ProductSummary.aspx?Parent=620 http://www.switchcraft.com/Drawings/TRAPC_X-TRASM_X_SERIES_CD.PDF +THT Mini XLR 5Pin right angle +0 +5 +5 +Connector_BarrelJack +BarrelJack_CLIFF_FC681465S_SMT_Horizontal +Surface-mount DC Barrel Jack, https://www.cliffuk.co.uk/products/dcconnectors/FC681465S.pdf +Power Jack SMT +0 +4 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-036AH-SMT_Horizontal +Surface-mount DC Barrel Jack, http://www.cui.com/product/resource/pj-036ah-smt.pdf +Power Jack SMT +0 +3 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-063AH_Horizontal +Barrel Jack, 2.0mm ID, 5.5mm OD, 24V, 8A, no switch, https://www.cui.com/product/resource/pj-063ah.pdf +barrel jack cui dc power +0 +4 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-063AH_Horizontal_CircularHoles +Barrel Jack, 2.0mm ID, 5.5mm OD, 24V, 8A, no switch, https://www.cui.com/product/resource/pj-063ah.pdf +barrel jack cui dc power +0 +4 +3 +Connector_BarrelJack +BarrelJack_CUI_PJ-102AH_Horizontal +Thin-pin DC Barrel Jack, https://cdn-shop.adafruit.com/datasheets/21mmdcjackDatasheet.pdf +Power Jack +0 +3 +3 +Connector_BarrelJack +BarrelJack_Horizontal +DC Barrel Jack +Power Jack +0 +3 +3 +Connector_BarrelJack +BarrelJack_Wuerth_6941xx301002 +Wuerth electronics barrel jack connector (5.5mm outher diameter, inner diameter 2.05mm or 2.55mm depending on exact order number), See: http://katalog.we-online.de/em/datasheet/6941xx301002.pdf +connector barrel jack +0 +3 +3 +Connector_Card +CF-Card_3M_N7E50-7516PK-20-WF +Compact Flash Card connector (https://multimedia.3m.com/mws/media/22365O/3mtm-cf-card-header-compactflashtm-type-i-sm-ts0662.pdf) +connector cf +0 +54 +50 +Connector_Card +SD_Kyocera_145638009211859+ +SD Card Connector, Normal Type, Outer Tail, Without Ejector (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +13 +Connector_Card +SD_Kyocera_145638009511859+ +SD Card Connector, Normal Type, Outer Tail, Spring Eject Type (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +13 +Connector_Card +SD_Kyocera_145638109211859+ +SD Card Connector, Reverse Type, Outer Tail, Without Ejector (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +13 +Connector_Card +SD_Kyocera_145638109511859+ +SD Card Connector, Reverse Type, Outer Tail, Spring Eject Type (https://global.kyocera.com/prdct/electro/product/pdf/5638.pdf) +sd card smt +0 +13 +13 +Connector_Card +SD_TE_2041021 +SD card connector, top mount, SMT (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F2041021%7FB%7Fpdf%7FEnglish%7FENG_CD_2041021_B_C_2041021_B.pdf%7F2041021-4) +sd card +0 +15 +12 +Connector_Card +microSD_HC_Hirose_DM3AT-SF-PEJM5 +Micro SD, SMD, right-angle, push-pull (https://www.hirose.com/product/en/download_file/key_name/DM3AT-SF-PEJM5/category/Drawing%20(2D)/doc_file_id/44099/?file_category_id=6&item_id=06090031000&is_series=) +Micro SD +0 +14 +11 +Connector_Card +microSD_HC_Hirose_DM3BT-DSF-PEJS +Micro SD, SMD, reverse on-board, right-angle, push-pull (https://www.hirose.com/product/en/download_file/key_name/DM3BT-DSF-PEJS/category/Drawing%20(2D)/doc_file_id/44097/?file_category_id=6&item_id=06090029900&is_series=) +Micro SD +0 +16 +11 +Connector_Card +microSD_HC_Hirose_DM3D-SF +Micro SD, SMD, right-angle, push-pull (https://media.digikey.com/PDF/Data%20Sheets/Hirose%20PDFs/DM3D-SF.pdf) +Micro SD +0 +14 +11 +Connector_Card +microSD_HC_Molex_104031-0811 +1.10mm Pitch microSD Memory Card Connector, Surface Mount, Push-Pull Type, 1.42mm Height, with Detect Switch (https://www.molex.com/pdm_docs/sd/1040310811_sd.pdf) +microSD SD molex +0 +14 +11 +Connector_Card +microSD_HC_Wuerth_693072010801 +http://katalog.we-online.de/em/datasheet/693072010801.pdf +Micro SD Wuerth Wurth Würth +0 +12 +9 +Connector_Card +microSIM_JAE_SF53S006VCBR2000 +https://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ115712.pdf +microSIM GSM Card +0 +14 +7 +Connector_Coaxial +BNC_Amphenol_031-6575_Horizontal +dual independently isolated BNC plug (https://www.amphenolrf.com/downloads/dl/file/id/2980/product/644/031_6575_customer_drawing.pdf) +Dual BNC Amphenol Horizontal +0 +6 +4 +Connector_Coaxial +BNC_Amphenol_B6252HB-NPP3G-50_Horizontal +http://www.farnell.com/datasheets/612848.pdf +BNC Amphenol Horizontal +0 +4 +2 +Connector_Coaxial +BNC_PanelMountable_Vertical +Panel-mountable BNC connector mounted through PCB, vertical +BNC connector +0 +2 +2 +Connector_Coaxial +BNC_TEConnectivity_1478204_Vertical +BNC female PCB mount 4 pin straight chassis connector http://www.te.com/usa-en/product-1-1478204-0.html +BNC female PCB mount 4 pin straight chassis connector +0 +5 +2 +Connector_Coaxial +BNC_Win_364A2x95_Horizontal +Dual front isolated BNC plug (https://www.winconn.com/wp-content/uploads/364A2595.pdf) +Dual BNC Horizontal Isolated +0 +6 +3 +Connector_Coaxial +CoaxialSwitch_Hirose_MS-156C3_Horizontal +Subminiature Coaxial Switch 1.35mm High, DC to 11GHz +Switch Coaxial RF +0 +12 +3 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_0.8mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_1.0mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-0961_Horizontal_1.6mm-PCB +Molex MMCX Horizontal Coaxial https://www.molex.com/pdm_docs/sd/734150961_sd.pdf +Molex MMCX Horizontal Coaxial +0 +3 +2 +Connector_Coaxial +MMCX_Molex_73415-1471_Vertical +http://www.molex.com/pdm_docs/sd/734151471_sd.pdf +Molex MMCX Coaxial Connector 50 ohms Female Jack Vertical THT +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_901-144_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/7023/product/3103/901_144_customer_drawing.pdf +SMA THT Female Jack Vertical +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-10_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/4007/product/2974/132134_10_customer_drawing.pdf +SMA SMD Female Jack Vertical +0 +3 +2 +Connector_Coaxial +SMA_Amphenol_132134-11_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/3406/product/2975/132134_11_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-14_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1793/product/2976/132134_14_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134-16_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1141/product/2978/132134_16_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132134_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/2187/product/2843/132134_customer_drawing.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132203-12_Horizontal +https://www.amphenolrf.com/media/downloads/1769/132203-12.pdf +SMA THT Female Jack Horizontal +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132289_EdgeMount +http://www.amphenolrf.com/132289.html +SMA +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132291-12_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/1688/product/3020/132291_12_customer_drawing.pdf +SMA THT Female Jack Vertical Bulkhead +0 +5 +2 +Connector_Coaxial +SMA_Amphenol_132291_Vertical +https://www.amphenolrf.com/downloads/dl/file/id/3222/product/2918/132291_customer_drawing.pdf +SMA THT Female Jack Vertical Bulkhead +0 +5 +2 +Connector_Coaxial +SMA_Molex_73251-1153_EdgeMount_Horizontal +Molex SMA RF Connectors, Edge Mount, (http://www.molex.com/pdm_docs/sd/732511150_sd.pdf) +sma edge +0 +11 +2 +Connector_Coaxial +SMA_Molex_73251-2120_EdgeMount_Horizontal +Molex SMA RF Connector, Edge Mount, (http://www.molex.com/pdm_docs/sd/732512120_sd.pdf) +sma edge +0 +11 +2 +Connector_Coaxial +SMA_Molex_73251-2200_Horizontal +https://www.molex.com/webdocs/datasheets/pdf/en-us/0732512200_RF_COAX_CONNECTORS.pdf +SMA THT Female Jack Horizontal +0 +5 +2 +Connector_Coaxial +SMA_Samtec_SMA-J-P-X-ST-EM1_EdgeMount +Connector SMA, 0Hz to 20GHz, 50Ohm, Edge Mount (http://suddendocs.samtec.com/prints/sma-j-p-x-st-em1-mkt.pdf) +SMA Straight Samtec Edge Mount +0 +5 +2 +Connector_Coaxial +SMA_Wurth_60312002114503_Vertical +https://www.we-online.de/katalog/datasheet/60312002114503.pdf +SMA THT Female Jack Vertical ExtendedLegs +0 +5 +2 +Connector_Coaxial +SMB_Jack_Vertical +SMB pcb mounting jack +SMB Jack Striaght +0 +5 +2 +Connector_Coaxial +U.FL_Hirose_U.FL-R-SMT-1_Vertical +Hirose U.FL Coaxial https://www.hirose.com/product/en/products/U.FL/U.FL-R-SMT-1%2810%29/ +Hirose U.FL Coaxial +0 +3 +2 +Connector_Coaxial +U.FL_Molex_MCRF_73412-0110_Vertical +Molex Microcoaxial RF Connectors (MCRF), mates Hirose U.FL, (http://www.molex.com/pdm_docs/sd/734120110_sd.pdf) +mcrf hirose ufl u.fl microcoaxial +0 +4 +2 +Connector_DIN +DIN41612_B2_2x8_Female_Vertical_THT +DIN41612 connector, type B/2, Vertical, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/2 +0 +16 +16 +Connector_DIN +DIN41612_B2_2x8_Male_Horizontal_THT +DIN41612 connector, type B/2, Horizontal, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/2 +0 +16 +16 +Connector_DIN +DIN41612_B2_2x16_Female_Vertical_THT +DIN41612 connector, type B/2, Vertical, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/2 +0 +32 +32 +Connector_DIN +DIN41612_B2_2x16_Male_Horizontal_THT +DIN41612 connector, type B/2, Horizontal, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/2 +0 +32 +32 +Connector_DIN +DIN41612_B3_2x5_Female_Vertical_THT +DIN41612 connector, type B/3, Vertical, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/3 +0 +10 +10 +Connector_DIN +DIN41612_B3_2x5_Male_Horizontal_THT +DIN41612 connector, type B/3, Horizontal, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/3 +0 +10 +10 +Connector_DIN +DIN41612_B3_2x10_Female_Vertical_THT +DIN41612 connector, type B/3, Vertical, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/3 +0 +20 +20 +Connector_DIN +DIN41612_B3_2x10_Male_Horizontal_THT +DIN41612 connector, type B/3, Horizontal, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B/3 +0 +20 +20 +Connector_DIN +DIN41612_B_1x32_Female_Vertical_THT +DIN41612 connector, type B, Vertical, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_1x32_Male_Horizontal_THT +DIN41612 connector, type B, Horizontal, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_2x16_Female_Vertical_THT +DIN41612 connector, type B, Vertical, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_2x16_Male_Horizontal_THT +DIN41612 connector, type B, Horizontal, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +32 +32 +Connector_DIN +DIN41612_B_2x32_Female_Vertical_THT +DIN41612 connector, type B, Vertical, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +64 +64 +Connector_DIN +DIN41612_B_2x32_Male_Horizontal_THT +DIN41612 connector, type B, Horizontal, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 B +0 +64 +64 +Connector_DIN +DIN41612_C2_2x16_Female_Vertical_THT +DIN41612 connector, type C/2, Vertical, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/2 +0 +32 +32 +Connector_DIN +DIN41612_C2_2x16_Male_Horizontal_THT +DIN41612 connector, type C/2, Horizontal, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/2 +0 +32 +32 +Connector_DIN +DIN41612_C2_3x16_Female_Vertical_THT +DIN41612 connector, type C/2, Vertical, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/2 +0 +48 +48 +Connector_DIN +DIN41612_C2_3x16_Male_Horizontal_THT +DIN41612 connector, type C/2, Horizontal, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/2 +0 +48 +48 +Connector_DIN +DIN41612_C3_2x10_Female_Vertical_THT +DIN41612 connector, type C/3, Vertical, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/3 +0 +20 +20 +Connector_DIN +DIN41612_C3_2x10_Male_Horizontal_THT +DIN41612 connector, type C/3, Horizontal, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/3 +0 +20 +20 +Connector_DIN +DIN41612_C3_3x10_Female_Vertical_THT +DIN41612 connector, type C/3, Vertical, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/3 +0 +30 +30 +Connector_DIN +DIN41612_C3_3x10_Male_Horizontal_THT +DIN41612 connector, type C/3, Horizontal, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C/3 +0 +30 +30 +Connector_DIN +DIN41612_C_1x32_Female_Vertical_THT +DIN41612 connector, type C, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +32 +32 +Connector_DIN +DIN41612_C_1x32_Male_Horizontal_THT +DIN41612 connector, type C, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +32 +32 +Connector_DIN +DIN41612_C_2x16_Female_Vertical_THT +DIN41612 connector, type C, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +32 +32 +Connector_DIN +DIN41612_C_2x16_Male_Horizontal_THT +DIN41612 connector, type C, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +32 +32 +Connector_DIN +DIN41612_C_2x32_Female_Vertical_THT +DIN41612 connector, type C, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +64 +64 +Connector_DIN +DIN41612_C_2x32_Male_Horizontal_THT +DIN41612 connector, type C, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +64 +64 +Connector_DIN +DIN41612_C_3x16_Female_Vertical_THT +DIN41612 connector, type C, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +48 +48 +Connector_DIN +DIN41612_C_3x16_Male_Horizontal_THT +DIN41612 connector, type C, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +48 +48 +Connector_DIN +DIN41612_C_3x32_Female_Vertical_THT +DIN41612 connector, type C, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +96 +96 +Connector_DIN +DIN41612_C_3x32_Male_Horizontal_THT +DIN41612 connector, type C, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 C +0 +96 +96 +Connector_DIN +DIN41612_D_2x8_Female_Vertical_THT +DIN41612 connector, type D, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 D +0 +16 +16 +Connector_DIN +DIN41612_D_2x8_Male_Horizontal_THT +DIN41612 connector, type D, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 D +0 +16 +16 +Connector_DIN +DIN41612_D_2x16_Female_Vertical_THT +DIN41612 connector, type D, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 D +0 +32 +32 +Connector_DIN +DIN41612_D_2x16_Male_Horizontal_THT +DIN41612 connector, type D, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 D +0 +32 +32 +Connector_DIN +DIN41612_E_2x16_Female_Vertical_THT +DIN41612 connector, type E, Vertical, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +32 +32 +Connector_DIN +DIN41612_E_2x16_Male_Horizontal_THT +DIN41612 connector, type E, Horizontal, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +32 +32 +Connector_DIN +DIN41612_E_2x16_RowsAC_Female_Vertical_THT +DIN41612 connector, type E, Vertical, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +32 +32 +Connector_DIN +DIN41612_E_2x16_RowsAC_Male_Horizontal_THT +DIN41612 connector, type E, Horizontal, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +32 +32 +Connector_DIN +DIN41612_E_3x16_Female_Vertical_THT +DIN41612 connector, type E, Vertical, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +48 +48 +Connector_DIN +DIN41612_E_3x16_Male_Horizontal_THT +DIN41612 connector, type E, Horizontal, 5 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 E +0 +48 +48 +Connector_DIN +DIN41612_F_2x16_Female_Vertical_THT +DIN41612 connector, type F, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +32 +32 +Connector_DIN +DIN41612_F_2x16_Male_Horizontal_THT +DIN41612 connector, type F, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +32 +32 +Connector_DIN +DIN41612_F_2x16_RowsZD_Female_Vertical_THT +DIN41612 connector, type F, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +32 +32 +Connector_DIN +DIN41612_F_2x16_RowsZD_Male_Horizontal_THT +DIN41612 connector, type F, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +32 +32 +Connector_DIN +DIN41612_F_3x16_Female_Vertical_THT +DIN41612 connector, type F, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +48 +48 +Connector_DIN +DIN41612_F_3x16_Male_Horizontal_THT +DIN41612 connector, type F, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 F +0 +48 +48 +Connector_DIN +DIN41612_Q2_2x16_Male_Horizontal_THT +DIN41612 connector, type Q/2, Horizontal, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q/2 +0 +32 +32 +Connector_DIN +DIN41612_Q2_2x16_Male_Vertical_THT +DIN41612 connector, type Q/2, Vertical, 2 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q/2 +0 +32 +32 +Connector_DIN +DIN41612_Q3_2x10_Male_Horizontal_THT +DIN41612 connector, type Q/3, Horizontal, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q/3 +0 +20 +20 +Connector_DIN +DIN41612_Q3_2x10_Male_Vertical_THT +DIN41612 connector, type Q/3, Vertical, 2 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q/3 +0 +20 +20 +Connector_DIN +DIN41612_Q_2x32_Male_Horizontal_THT +DIN41612 connector, type Q, Horizontal, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q +0 +64 +64 +Connector_DIN +DIN41612_Q_2x32_Male_Vertical_THT +DIN41612 connector, type Q, Vertical, 2 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 Q +0 +64 +64 +Connector_DIN +DIN41612_R2_2x16_Male_Horizontal_THT +DIN41612 connector, type R/2, Horizontal, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/2 +0 +32 +32 +Connector_DIN +DIN41612_R2_2x16_Male_Vertical_THT +DIN41612 connector, type R/2, Vertical, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/2 +0 +32 +32 +Connector_DIN +DIN41612_R2_3x16_Male_Horizontal_THT +DIN41612 connector, type R/2, Horizontal, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/2 +0 +48 +48 +Connector_DIN +DIN41612_R2_3x16_Male_Vertical_THT +DIN41612 connector, type R/2, Vertical, 3 rows 16 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/2 +0 +48 +48 +Connector_DIN +DIN41612_R3_2x10_Male_Horizontal_THT +DIN41612 connector, type R/3, Horizontal, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/3 +0 +20 +20 +Connector_DIN +DIN41612_R3_2x10_Male_Vertical_THT +DIN41612 connector, type R/3, Vertical, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/3 +0 +20 +20 +Connector_DIN +DIN41612_R3_3x10_Male_Horizontal_THT +DIN41612 connector, type R/3, Horizontal, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/3 +0 +30 +30 +Connector_DIN +DIN41612_R3_3x10_Male_Vertical_THT +DIN41612 connector, type R/3, Vertical, 3 rows 10 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R/3 +0 +30 +30 +Connector_DIN +DIN41612_R_1x32_Male_Horizontal_THT +DIN41612 connector, type R, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +32 +32 +Connector_DIN +DIN41612_R_1x32_Male_Vertical_THT +DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +32 +32 +Connector_DIN +DIN41612_R_2x16_Male_Horizontal_THT +DIN41612 connector, type R, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +32 +32 +Connector_DIN +DIN41612_R_2x16_Male_Vertical_THT +DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +32 +32 +Connector_DIN +DIN41612_R_2x32_Male_Horizontal_THT +DIN41612 connector, type R, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +64 +64 +Connector_DIN +DIN41612_R_2x32_Male_Vertical_THT +DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +64 +64 +Connector_DIN +DIN41612_R_3x16_Male_Horizontal_THT +DIN41612 connector, type R, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +48 +48 +Connector_DIN +DIN41612_R_3x16_Male_Vertical_THT +DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +48 +48 +Connector_DIN +DIN41612_R_3x32_Male_Horizontal_THT +DIN41612 connector, type R, Horizontal, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +96 +96 +Connector_DIN +DIN41612_R_3x32_Male_Vertical_THT +DIN41612 connector, type R, Vertical, 3 rows 32 pins wide, https://www.erni-x-press.com/de/downloads/kataloge/englische_kataloge/erni-din41612-iec60603-2-e.pdf +DIN 41612 IEC 60603 R +0 +96 +96 +Connector_Dsub +DSUB-9_Female_EdgeMount_P2.77mm +9-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Female_Vertical_P2.77x2.84mm +9-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Female_Vertical_P2.77x2.84mm_MountingHoles +9-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_EdgeMount_P2.77mm +9-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +9-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +11 +10 +Connector_Dsub +DSUB-9_Male_Vertical_P2.77x2.84mm +9-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 25mm +0 +9 +9 +Connector_Dsub +DSUB-9_Male_Vertical_P2.77x2.84mm_MountingHoles +9-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +9-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 25mm +0 +11 +10 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 25mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 25mm mounting-hole-offset 25mm +0 +17 +16 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 25mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 25mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_EdgeMount_P2.77mm +15-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Female_Vertical_P2.77x2.84mm +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Female_Vertical_P2.77x2.84mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_EdgeMount_P2.77mm +15-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +15-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-15_Male_Vertical_P2.77x2.84mm +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +15 +15 +Connector_Dsub +DSUB-15_Male_Vertical_P2.77x2.84mm_MountingHoles +15-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +15-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 33.3mm +0 +17 +16 +Connector_Dsub +DSUB-25_Female_EdgeMount_P2.77mm +25-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Female_Vertical_P2.77x2.84mm +25-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Female_Vertical_P2.77x2.84mm_MountingHoles +25-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_EdgeMount_P2.77mm +25-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +25-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-25_Male_Vertical_P2.77x2.84mm +25-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +25 +25 +Connector_Dsub +DSUB-25_Male_Vertical_P2.77x2.84mm_MountingHoles +25-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +25-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 47.1mm +0 +27 +26 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +26-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 33.3mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 33.3mm mounting-hole-offset 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +26-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +26-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +26 +26 +Connector_Dsub +DSUB-26-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +26-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 33.3mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +26-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 33.3mm +0 +28 +27 +Connector_Dsub +DSUB-37_Female_EdgeMount_P2.77mm +37-pin D-Sub connector, solder-cups edge-mounted, female, x-pin-pitch 2.77mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector edge mount solder cup female x-pin-pitch 2.77mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT female pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Female_Vertical_P2.77x2.84mm +37-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Female_Vertical_P2.77x2.84mm_MountingHoles +37-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT female pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_EdgeMount_P2.77mm +37-pin D-Sub connector, solder-cups edge-mounted, male, x-pin-pitch 2.77mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector edge mount solder cup male x-pin-pitch 2.77mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.54mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.54mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset4.94mm_Housed_MountingHolesOffset7.48mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 4.9399999999999995mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 7.4799999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 4.9399999999999995mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset7.70mm_Housed_MountingHolesOffset9.12mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 7.699999999999999mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 9.12mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 7.699999999999999mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.40mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.4mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset9.90mm_Housed_MountingHolesOffset11.32mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 9.9mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 11.32mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 9.9mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset8.20mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 8.2mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Horizontal_P2.77x2.84mm_EdgePinOffset14.56mm_Housed_MountingHolesOffset15.98mm +37-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.77x2.84mm, pin-PCB-offset 14.56mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 15.979999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector horizontal angled 90deg THT male pitch 2.77x2.84mm pin-PCB-offset 14.56mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-37_Male_Vertical_P2.77x2.84mm +37-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +37 +37 +Connector_Dsub +DSUB-37_Male_Vertical_P2.77x2.84mm_MountingHoles +37-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.77x2.84mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +37-pin D-Sub connector straight vertical THT male pitch 2.77x2.84mm mounting holes distance 63.5mm +0 +39 +38 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Female_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT female pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Female_Vertical_P2.29x1.98mm_MountingHoles +44-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.29x1.98mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector straight vertical THT female pitch 2.29x1.98mm mounting holes distance 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 47.1mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 47.1mm mounting-hole-offset 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x1.98mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x1.98mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Male_Horizontal_P2.29x2.54mm_EdgePinOffset9.40mm +44-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.29x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +44-pin D-Sub connector horizontal angled 90deg THT male pitch 2.29x2.54mm pin-PCB-offset 9.4mm +0 +44 +44 +Connector_Dsub +DSUB-44-HD_Male_Vertical_P2.29x1.98mm_MountingHoles +44-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.29x1.98mm, distance of mounting holes 47.1mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +44-pin D-Sub connector straight vertical THT male pitch 2.29x1.98mm mounting holes distance 47.1mm +0 +46 +45 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x1.98mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x1.98mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Female_Horizontal_P2.41x2.54mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, female, pitch 2.41x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT female pitch 2.41x2.54mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Female_Vertical_P2.41x1.98mm_MountingHoles +62-pin D-Sub connector, straight/vertical, THT-mount, female, pitch 2.41x1.98mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector straight vertical THT female pitch 2.41x1.98mm mounting holes distance 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 3.0300000000000002mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 4.9399999999999995mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 3.0300000000000002mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset8.35mm_Housed_MountingHolesOffset10.89mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 8.35mm, distance of mounting holes 63.5mm, distance of mounting holes to PCB edge 10.889999999999999mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 8.35mm mounting-holes-distance 63.5mm mounting-hole-offset 63.5mm +0 +64 +63 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x1.98mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x1.98mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x1.98mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Male_Horizontal_P2.41x2.54mm_EdgePinOffset9.40mm +62-pin D-Sub connector, horizontal/angled (90 deg), THT-mount, male, pitch 2.41x2.54mm, pin-PCB-offset 9.4mm, see http://docs-europe.electrocomponents.com/webdocs/1585/0900766b81585df2.pdf +62-pin D-Sub connector horizontal angled 90deg THT male pitch 2.41x2.54mm pin-PCB-offset 9.4mm +0 +62 +62 +Connector_Dsub +DSUB-62-HD_Male_Vertical_P2.41x1.98mm_MountingHoles +62-pin D-Sub connector, straight/vertical, THT-mount, male, pitch 2.41x1.98mm, distance of mounting holes 63.5mm, see https://disti-assets.s3.amazonaws.com/tonar/files/datasheets/16730.pdf +62-pin D-Sub connector straight vertical THT male pitch 2.41x1.98mm mounting holes distance 63.5mm +0 +64 +63 +Connector_FFC-FPC +Hirose_FH12-6S-0.5SH_1x06-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-6S-0.5SH, 6 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +8 +7 +Connector_FFC-FPC +Hirose_FH12-8S-0.5SH_1x08-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-8S-0.5SH, 8 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +10 +9 +Connector_FFC-FPC +Hirose_FH12-10S-0.5SH_1x10-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-10S-0.5SH, 10 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +12 +11 +Connector_FFC-FPC +Hirose_FH12-11S-0.5SH_1x11-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-11S-0.5SH, 11 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +13 +12 +Connector_FFC-FPC +Hirose_FH12-12S-0.5SH_1x12-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-12S-0.5SH, 12 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +14 +13 +Connector_FFC-FPC +Hirose_FH12-13S-0.5SH_1x13-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-13S-0.5SH, 13 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +15 +14 +Connector_FFC-FPC +Hirose_FH12-14S-0.5SH_1x14-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-14S-0.5SH, 14 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +16 +15 +Connector_FFC-FPC +Hirose_FH12-15S-0.5SH_1x15-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-15S-0.5SH, 15 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +17 +16 +Connector_FFC-FPC +Hirose_FH12-16S-0.5SH_1x16-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-16S-0.5SH, 16 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +18 +17 +Connector_FFC-FPC +Hirose_FH12-17S-0.5SH_1x17-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-17S-0.5SH, 17 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +19 +18 +Connector_FFC-FPC +Hirose_FH12-18S-0.5SH_1x18-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-18S-0.5SH, 18 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +20 +19 +Connector_FFC-FPC +Hirose_FH12-19S-0.5SH_1x19-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-19S-0.5SH, 19 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +21 +20 +Connector_FFC-FPC +Hirose_FH12-20S-0.5SH_1x20-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-20S-0.5SH, 20 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +22 +21 +Connector_FFC-FPC +Hirose_FH12-22S-0.5SH_1x22-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-22S-0.5SH, 22 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +24 +23 +Connector_FFC-FPC +Hirose_FH12-24S-0.5SH_1x24-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-24S-0.5SH, 24 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +26 +25 +Connector_FFC-FPC +Hirose_FH12-25S-0.5SH_1x25-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-25S-0.5SH, 25 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +27 +26 +Connector_FFC-FPC +Hirose_FH12-26S-0.5SH_1x26-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-26S-0.5SH, 26 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +28 +27 +Connector_FFC-FPC +Hirose_FH12-28S-0.5SH_1x28-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-28S-0.5SH, 28 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +30 +29 +Connector_FFC-FPC +Hirose_FH12-30S-0.5SH_1x30-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-30S-0.5SH, 30 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +32 +31 +Connector_FFC-FPC +Hirose_FH12-32S-0.5SH_1x32-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-32S-0.5SH, 32 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +34 +33 +Connector_FFC-FPC +Hirose_FH12-33S-0.5SH_1x33-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-33S-0.5SH, 33 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +35 +34 +Connector_FFC-FPC +Hirose_FH12-34S-0.5SH_1x34-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-34S-0.5SH, 34 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +36 +35 +Connector_FFC-FPC +Hirose_FH12-35S-0.5SH_1x35-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-35S-0.5SH, 35 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +37 +36 +Connector_FFC-FPC +Hirose_FH12-36S-0.5SH_1x36-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-36S-0.5SH, 36 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +38 +37 +Connector_FFC-FPC +Hirose_FH12-40S-0.5SH_1x40-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-40S-0.5SH, 40 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +42 +41 +Connector_FFC-FPC +Hirose_FH12-45S-0.5SH_1x45-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-45S-0.5SH, 45 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +47 +46 +Connector_FFC-FPC +Hirose_FH12-50S-0.5SH_1x50-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-50S-0.5SH, 50 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +52 +51 +Connector_FFC-FPC +Hirose_FH12-53S-0.5SH_1x53-1MP_P0.50mm_Horizontal +Hirose FH12, FFC/FPC connector, FH12-53S-0.5SH, 53 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator +connector Hirose FH12 horizontal +0 +55 +54 +Connector_FFC-FPC +JAE_FF0825SA1_2Rows-25Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0825SA1, 25 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +25 +25 +Connector_FFC-FPC +JAE_FF0829SA1_2Rows-29Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0829SA1, 29 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +29 +29 +Connector_FFC-FPC +JAE_FF0841SA1_2Rows-41Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0841SA1, 41 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +41 +41 +Connector_FFC-FPC +JAE_FF0851SA1_2Rows-51Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0851SA1, 51 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +51 +51 +Connector_FFC-FPC +JAE_FF0871SA1_2Rows-71Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0871SA1, 71 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +71 +71 +Connector_FFC-FPC +JAE_FF0881SA1_2Rows-81Pins_P0.40mm_Horizontal +Molex JAE 0.2mm pitch, 1mm overall height FFC/FPC connector, FF0881SA1, 81 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ108178.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +81 +81 +Connector_FFC-FPC +Molex_54132-5033_1x50-1MP_P0.5mm_Horizontal +Molex FFC/FPC connector, 50 bottom-side contacts, 0.5mm pitch, 2.0mm height, https://www.molex.com/pdm_docs/sd/541325033_sd.pdf +FFC FPC +0 +54 +51 +Connector_FFC-FPC +Molex_200528-0040_1x04-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0040, 4 Circuits (https://www.molex.com/pdm_docs/sd/2005280040_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +6 +5 +Connector_FFC-FPC +Molex_200528-0050_1x05-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0050, 5 Circuits (https://www.molex.com/pdm_docs/sd/2005280050_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +7 +6 +Connector_FFC-FPC +Molex_200528-0060_1x06-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0060, 6 Circuits (https://www.molex.com/pdm_docs/sd/2005280060_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +8 +7 +Connector_FFC-FPC +Molex_200528-0070_1x07-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0070, 7 Circuits (https://www.molex.com/pdm_docs/sd/2005280070_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +9 +8 +Connector_FFC-FPC +Molex_200528-0080_1x08-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0080, 8 Circuits (https://www.molex.com/pdm_docs/sd/2005280080_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +10 +9 +Connector_FFC-FPC +Molex_200528-0090_1x09-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0090, 9 Circuits (https://www.molex.com/pdm_docs/sd/2005280090_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +11 +10 +Connector_FFC-FPC +Molex_200528-0100_1x10-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0100, 10 Circuits (https://www.molex.com/pdm_docs/sd/2005280100_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +12 +11 +Connector_FFC-FPC +Molex_200528-0110_1x11-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0110, 11 Circuits (https://www.molex.com/pdm_docs/sd/2005280110_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +13 +12 +Connector_FFC-FPC +Molex_200528-0120_1x12-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0120, 12 Circuits (https://www.molex.com/pdm_docs/sd/2005280120_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +14 +13 +Connector_FFC-FPC +Molex_200528-0130_1x13-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0130, 13 Circuits (https://www.molex.com/pdm_docs/sd/2005280130_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +15 +14 +Connector_FFC-FPC +Molex_200528-0140_1x14-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0140, 14 Circuits (https://www.molex.com/pdm_docs/sd/2005280140_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +16 +15 +Connector_FFC-FPC +Molex_200528-0150_1x15-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0150, 15 Circuits (https://www.molex.com/pdm_docs/sd/2005280150_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +17 +16 +Connector_FFC-FPC +Molex_200528-0160_1x16-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0160, 16 Circuits (https://www.molex.com/pdm_docs/sd/2005280160_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +18 +17 +Connector_FFC-FPC +Molex_200528-0170_1x17-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0170, 17 Circuits (https://www.molex.com/pdm_docs/sd/2005280170_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +19 +18 +Connector_FFC-FPC +Molex_200528-0180_1x18-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0180, 18 Circuits (https://www.molex.com/pdm_docs/sd/2005280180_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +20 +19 +Connector_FFC-FPC +Molex_200528-0190_1x19-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0190, 19 Circuits (https://www.molex.com/pdm_docs/sd/2005280190_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +21 +20 +Connector_FFC-FPC +Molex_200528-0200_1x20-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0200, 20 Circuits (https://www.molex.com/pdm_docs/sd/2005280200_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +22 +21 +Connector_FFC-FPC +Molex_200528-0210_1x21-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0210, 21 Circuits (https://www.molex.com/pdm_docs/sd/2005280210_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +23 +22 +Connector_FFC-FPC +Molex_200528-0220_1x22-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0220, 22 Circuits (https://www.molex.com/pdm_docs/sd/2005280220_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +24 +23 +Connector_FFC-FPC +Molex_200528-0230_1x23-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0230, 23 Circuits (https://www.molex.com/pdm_docs/sd/2005280230_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +25 +24 +Connector_FFC-FPC +Molex_200528-0240_1x24-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0240, 24 Circuits (https://www.molex.com/pdm_docs/sd/2005280240_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +26 +25 +Connector_FFC-FPC +Molex_200528-0250_1x25-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0250, 25 Circuits (https://www.molex.com/pdm_docs/sd/2005280250_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +27 +26 +Connector_FFC-FPC +Molex_200528-0260_1x26-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0260, 26 Circuits (https://www.molex.com/pdm_docs/sd/2005280260_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +28 +27 +Connector_FFC-FPC +Molex_200528-0270_1x27-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0270, 27 Circuits (https://www.molex.com/pdm_docs/sd/2005280270_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +29 +28 +Connector_FFC-FPC +Molex_200528-0280_1x28-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0280, 28 Circuits (https://www.molex.com/pdm_docs/sd/2005280280_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +30 +29 +Connector_FFC-FPC +Molex_200528-0290_1x29-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0290, 29 Circuits (https://www.molex.com/pdm_docs/sd/2005280290_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +31 +30 +Connector_FFC-FPC +Molex_200528-0300_1x30-1MP_P1.00mm_Horizontal +Molex Molex 1.00mm Pitch Easy-On BackFlip, Right-Angle, Bottom Contact FFC/FPC, 200528-0300, 30 Circuits (https://www.molex.com/pdm_docs/sd/2005280300_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +32 +31 +Connector_FFC-FPC +Molex_502231-1500_1x15-1SH_P0.5mm_Vertical +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 6.05mm Height, Vertical, Surface Mount, ZIF, 15 Circuits (https://www.molex.com/pdm_docs/sd/5022311500_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm vertical +0 +17 +16 +Connector_FFC-FPC +Molex_502231-2400_1x24-1SH_P0.5mm_Vertical +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 6.05mm Height, Vertical, Surface Mount, ZIF, 24 Circuits (https://www.molex.com/pdm_docs/sd/5022312400_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm vertical +0 +26 +25 +Connector_FFC-FPC +Molex_502231-3300_1x33-1SH_P0.5mm_Vertical +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 6.05mm Height, Vertical, Surface Mount, ZIF, 33 Circuits (https://www.molex.com/pdm_docs/sd/5022313300_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm vertical +0 +36 +34 +Connector_FFC-FPC +Molex_502244-1530_1x15-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 15 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +19 +16 +Connector_FFC-FPC +Molex_502244-2430_1x24-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 24 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +28 +25 +Connector_FFC-FPC +Molex_502244-3330_1x33-1MP_P0.5mm_Horizontal +Molex 0.50mm Pitch Easy-On Type FFC/FPC Connector, For LVDS, 2.33mm Height, Right Angle, Surface Mount, ZIF, Bottom Contact Style, 33 Circuits (http://www.molex.com/pdm_docs/sd/5022441530_sd.pdf) +molex FFC/FPC connector Pitch 0.5mm right angle +0 +39 +34 +Connector_FFC-FPC +Molex_502250-1791_2Rows-17Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-1791, 17 Circuits (http://www.molex.com/pdm_docs/sd/5022501791_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +19 +18 +Connector_FFC-FPC +Molex_502250-2191_2Rows-21Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2191, 21 Circuits (http://www.molex.com/pdm_docs/sd/5022502191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +23 +22 +Connector_FFC-FPC +Molex_502250-2391_2Rows-23Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2391, 23 Circuits (http://www.molex.com/pdm_docs/sd/5022502391_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +25 +24 +Connector_FFC-FPC +Molex_502250-2791_2Rows-27Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-2791, 27 Circuits (http://www.molex.com/pdm_docs/sd/5022502791_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +29 +28 +Connector_FFC-FPC +Molex_502250-3391_2Rows-33Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3391, 33 Circuits (http://www.molex.com/pdm_docs/sd/5022503391_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +35 +34 +Connector_FFC-FPC +Molex_502250-3591_2Rows-35Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3591, 35 Circuits (http://www.molex.com/pdm_docs/sd/5022503591_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +37 +36 +Connector_FFC-FPC +Molex_502250-3991_2Rows-39Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-3991, 39 Circuits (http://www.molex.com/pdm_docs/sd/5022503991_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +41 +40 +Connector_FFC-FPC +Molex_502250-4191_2Rows-41Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-4191, 41 Circuits (http://www.molex.com/pdm_docs/sd/5022504191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +43 +42 +Connector_FFC-FPC +Molex_502250-5191_2Rows-51Pins-1MP_P0.60mm_Horizontal +Molex Molex 0.30mm Pitch Easy-On BackFlip Type FFC/FPC, 502250-5191, 51 Circuits (http://www.molex.com/pdm_docs/sd/5022505191_sd.pdf), generated with kicad-footprint-generator +connector Molex top entry +0 +53 +52 +Connector_FFC-FPC +TE_0-1734839-5_1x05-1MP_P0.5mm_Horizontal +TE FPC connector, 05 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +7 +6 +Connector_FFC-FPC +TE_0-1734839-6_1x06-1MP_P0.5mm_Horizontal +TE FPC connector, 06 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +8 +7 +Connector_FFC-FPC +TE_0-1734839-7_1x07-1MP_P0.5mm_Horizontal +TE FPC connector, 07 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +9 +8 +Connector_FFC-FPC +TE_0-1734839-8_1x08-1MP_P0.5mm_Horizontal +TE FPC connector, 08 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +10 +9 +Connector_FFC-FPC +TE_0-1734839-9_1x09-1MP_P0.5mm_Horizontal +TE FPC connector, 09 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +11 +10 +Connector_FFC-FPC +TE_1-84952-0_1x10-1MP_P1.0mm_Horizontal +TE FPC connector, 10 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +12 +11 +Connector_FFC-FPC +TE_1-84952-1_1x11-1MP_P1.0mm_Horizontal +TE FPC connector, 11 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +13 +12 +Connector_FFC-FPC +TE_1-84952-2_1x12-1MP_P1.0mm_Horizontal +TE FPC connector, 12 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +14 +13 +Connector_FFC-FPC +TE_1-84952-3_1x13-1MP_P1.0mm_Horizontal +TE FPC connector, 13 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +15 +14 +Connector_FFC-FPC +TE_1-84952-4_1x14-1MP_P1.0mm_Horizontal +TE FPC connector, 14 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +16 +15 +Connector_FFC-FPC +TE_1-84952-5_1x15-1MP_P1.0mm_Horizontal +TE FPC connector, 15 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +17 +16 +Connector_FFC-FPC +TE_1-84952-6_1x16-1MP_P1.0mm_Horizontal +TE FPC connector, 16 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +18 +17 +Connector_FFC-FPC +TE_1-84952-7_1x17-1MP_P1.0mm_Horizontal +TE FPC connector, 17 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +19 +18 +Connector_FFC-FPC +TE_1-84952-8_1x18-1MP_P1.0mm_Horizontal +TE FPC connector, 18 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +20 +19 +Connector_FFC-FPC +TE_1-84952-9_1x19-1MP_P1.0mm_Horizontal +TE FPC connector, 19 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +21 +20 +Connector_FFC-FPC +TE_1-84953-0_1x10-1MP_P1.0mm_Horizontal +TE FPC connector, 10 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +12 +11 +Connector_FFC-FPC +TE_1-84953-1_1x11-1MP_P1.0mm_Horizontal +TE FPC connector, 11 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +13 +12 +Connector_FFC-FPC +TE_1-84953-2_1x12-1MP_P1.0mm_Horizontal +TE FPC connector, 12 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +14 +13 +Connector_FFC-FPC +TE_1-84953-3_1x13-1MP_P1.0mm_Horizontal +TE FPC connector, 13 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +15 +14 +Connector_FFC-FPC +TE_1-84953-4_1x14-1MP_P1.0mm_Horizontal +TE FPC connector, 14 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +16 +15 +Connector_FFC-FPC +TE_1-84953-5_1x15-1MP_P1.0mm_Horizontal +TE FPC connector, 15 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +17 +16 +Connector_FFC-FPC +TE_1-84953-6_1x16-1MP_P1.0mm_Horizontal +TE FPC connector, 16 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +18 +17 +Connector_FFC-FPC +TE_1-84953-7_1x17-1MP_P1.0mm_Horizontal +TE FPC connector, 17 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +19 +18 +Connector_FFC-FPC +TE_1-84953-8_1x18-1MP_P1.0mm_Horizontal +TE FPC connector, 18 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +20 +19 +Connector_FFC-FPC +TE_1-84953-9_1x19-1MP_P1.0mm_Horizontal +TE FPC connector, 19 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +21 +20 +Connector_FFC-FPC +TE_1-1734839-0_1x10-1MP_P0.5mm_Horizontal +TE FPC connector, 10 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +12 +11 +Connector_FFC-FPC +TE_1-1734839-1_1x11-1MP_P0.5mm_Horizontal +TE FPC connector, 11 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +13 +12 +Connector_FFC-FPC +TE_1-1734839-2_1x12-1MP_P0.5mm_Horizontal +TE FPC connector, 12 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +14 +13 +Connector_FFC-FPC +TE_1-1734839-3_1x13-1MP_P0.5mm_Horizontal +TE FPC connector, 13 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +15 +14 +Connector_FFC-FPC +TE_1-1734839-4_1x14-1MP_P0.5mm_Horizontal +TE FPC connector, 14 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +16 +15 +Connector_FFC-FPC +TE_1-1734839-5_1x15-1MP_P0.5mm_Horizontal +TE FPC connector, 15 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +17 +16 +Connector_FFC-FPC +TE_1-1734839-6_1x16-1MP_P0.5mm_Horizontal +TE FPC connector, 16 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +18 +17 +Connector_FFC-FPC +TE_1-1734839-7_1x17-1MP_P0.5mm_Horizontal +TE FPC connector, 17 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +19 +18 +Connector_FFC-FPC +TE_1-1734839-8_1x18-1MP_P0.5mm_Horizontal +TE FPC connector, 18 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +20 +19 +Connector_FFC-FPC +TE_1-1734839-9_1x19-1MP_P0.5mm_Horizontal +TE FPC connector, 19 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +21 +20 +Connector_FFC-FPC +TE_2-84952-0_1x20-1MP_P1.0mm_Horizontal +TE FPC connector, 20 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +22 +21 +Connector_FFC-FPC +TE_2-84952-1_1x21-1MP_P1.0mm_Horizontal +TE FPC connector, 21 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +23 +22 +Connector_FFC-FPC +TE_2-84952-2_1x22-1MP_P1.0mm_Horizontal +TE FPC connector, 22 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +24 +23 +Connector_FFC-FPC +TE_2-84952-3_1x23-1MP_P1.0mm_Horizontal +TE FPC connector, 23 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +25 +24 +Connector_FFC-FPC +TE_2-84952-4_1x24-1MP_P1.0mm_Horizontal +TE FPC connector, 24 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +26 +25 +Connector_FFC-FPC +TE_2-84952-5_1x25-1MP_P1.0mm_Horizontal +TE FPC connector, 25 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +27 +26 +Connector_FFC-FPC +TE_2-84952-6_1x26-1MP_P1.0mm_Horizontal +TE FPC connector, 26 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +28 +27 +Connector_FFC-FPC +TE_2-84952-7_1x27-1MP_P1.0mm_Horizontal +TE FPC connector, 27 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +29 +28 +Connector_FFC-FPC +TE_2-84952-8_1x28-1MP_P1.0mm_Horizontal +TE FPC connector, 28 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +30 +29 +Connector_FFC-FPC +TE_2-84952-9_1x29-1MP_P1.0mm_Horizontal +TE FPC connector, 29 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +31 +30 +Connector_FFC-FPC +TE_2-84953-0_1x20-1MP_P1.0mm_Horizontal +TE FPC connector, 20 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +22 +21 +Connector_FFC-FPC +TE_2-84953-1_1x21-1MP_P1.0mm_Horizontal +TE FPC connector, 21 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +23 +22 +Connector_FFC-FPC +TE_2-84953-2_1x22-1MP_P1.0mm_Horizontal +TE FPC connector, 22 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +24 +23 +Connector_FFC-FPC +TE_2-84953-3_1x23-1MP_P1.0mm_Horizontal +TE FPC connector, 23 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +25 +24 +Connector_FFC-FPC +TE_2-84953-4_1x24-1MP_P1.0mm_Horizontal +TE FPC connector, 24 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +26 +25 +Connector_FFC-FPC +TE_2-84953-5_1x25-1MP_P1.0mm_Horizontal +TE FPC connector, 25 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +27 +26 +Connector_FFC-FPC +TE_2-84953-6_1x26-1MP_P1.0mm_Horizontal +TE FPC connector, 26 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +28 +27 +Connector_FFC-FPC +TE_2-84953-7_1x27-1MP_P1.0mm_Horizontal +TE FPC connector, 27 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +29 +28 +Connector_FFC-FPC +TE_2-84953-8_1x28-1MP_P1.0mm_Horizontal +TE FPC connector, 28 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +30 +29 +Connector_FFC-FPC +TE_2-84953-9_1x29-1MP_P1.0mm_Horizontal +TE FPC connector, 29 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +31 +30 +Connector_FFC-FPC +TE_2-1734839-0_1x20-1MP_P0.5mm_Horizontal +TE FPC connector, 20 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +22 +21 +Connector_FFC-FPC +TE_2-1734839-1_1x21-1MP_P0.5mm_Horizontal +TE FPC connector, 21 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +23 +22 +Connector_FFC-FPC +TE_2-1734839-2_1x22-1MP_P0.5mm_Horizontal +TE FPC connector, 22 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +24 +23 +Connector_FFC-FPC +TE_2-1734839-3_1x23-1MP_P0.5mm_Horizontal +TE FPC connector, 23 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +25 +24 +Connector_FFC-FPC +TE_2-1734839-4_1x24-1MP_P0.5mm_Horizontal +TE FPC connector, 24 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +26 +25 +Connector_FFC-FPC +TE_2-1734839-5_1x25-1MP_P0.5mm_Horizontal +TE FPC connector, 25 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +27 +26 +Connector_FFC-FPC +TE_2-1734839-6_1x26-1MP_P0.5mm_Horizontal +TE FPC connector, 26 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +28 +27 +Connector_FFC-FPC +TE_2-1734839-7_1x27-1MP_P0.5mm_Horizontal +TE FPC connector, 27 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +29 +28 +Connector_FFC-FPC +TE_2-1734839-8_1x28-1MP_P0.5mm_Horizontal +TE FPC connector, 28 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +30 +29 +Connector_FFC-FPC +TE_2-1734839-9_1x29-1MP_P0.5mm_Horizontal +TE FPC connector, 29 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +31 +30 +Connector_FFC-FPC +TE_3-84952-0_1x30-1MP_P1.0mm_Horizontal +TE FPC connector, 30 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +32 +31 +Connector_FFC-FPC +TE_3-84953-0_1x30-1MP_P1.0mm_Horizontal +TE FPC connector, 30 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +32 +31 +Connector_FFC-FPC +TE_3-1734839-0_1x30-1MP_P0.5mm_Horizontal +TE FPC connector, 30 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +32 +31 +Connector_FFC-FPC +TE_3-1734839-1_1x31-1MP_P0.5mm_Horizontal +TE FPC connector, 31 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +33 +32 +Connector_FFC-FPC +TE_3-1734839-2_1x32-1MP_P0.5mm_Horizontal +TE FPC connector, 32 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +34 +33 +Connector_FFC-FPC +TE_3-1734839-3_1x33-1MP_P0.5mm_Horizontal +TE FPC connector, 33 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +35 +34 +Connector_FFC-FPC +TE_3-1734839-4_1x34-1MP_P0.5mm_Horizontal +TE FPC connector, 34 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +36 +35 +Connector_FFC-FPC +TE_3-1734839-5_1x35-1MP_P0.5mm_Horizontal +TE FPC connector, 35 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +37 +36 +Connector_FFC-FPC +TE_3-1734839-6_1x36-1MP_P0.5mm_Horizontal +TE FPC connector, 36 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +38 +37 +Connector_FFC-FPC +TE_3-1734839-7_1x37-1MP_P0.5mm_Horizontal +TE FPC connector, 37 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +39 +38 +Connector_FFC-FPC +TE_3-1734839-8_1x38-1MP_P0.5mm_Horizontal +TE FPC connector, 38 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +40 +39 +Connector_FFC-FPC +TE_3-1734839-9_1x39-1MP_P0.5mm_Horizontal +TE FPC connector, 39 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +41 +40 +Connector_FFC-FPC +TE_4-1734839-0_1x40-1MP_P0.5mm_Horizontal +TE FPC connector, 40 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +42 +41 +Connector_FFC-FPC +TE_4-1734839-1_1x41-1MP_P0.5mm_Horizontal +TE FPC connector, 41 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +43 +42 +Connector_FFC-FPC +TE_4-1734839-2_1x42-1MP_P0.5mm_Horizontal +TE FPC connector, 42 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +44 +43 +Connector_FFC-FPC +TE_4-1734839-3_1x43-1MP_P0.5mm_Horizontal +TE FPC connector, 43 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +45 +44 +Connector_FFC-FPC +TE_4-1734839-4_1x44-1MP_P0.5mm_Horizontal +TE FPC connector, 44 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +46 +45 +Connector_FFC-FPC +TE_4-1734839-5_1x45-1MP_P0.5mm_Horizontal +TE FPC connector, 45 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +47 +46 +Connector_FFC-FPC +TE_4-1734839-6_1x46-1MP_P0.5mm_Horizontal +TE FPC connector, 46 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +48 +47 +Connector_FFC-FPC +TE_4-1734839-7_1x47-1MP_P0.5mm_Horizontal +TE FPC connector, 47 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +49 +48 +Connector_FFC-FPC +TE_4-1734839-8_1x48-1MP_P0.5mm_Horizontal +TE FPC connector, 48 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +50 +49 +Connector_FFC-FPC +TE_4-1734839-9_1x49-1MP_P0.5mm_Horizontal +TE FPC connector, 49 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +51 +50 +Connector_FFC-FPC +TE_5-1734839-0_1x50-1MP_P0.5mm_Horizontal +TE FPC connector, 50 top-side contacts, 0.5mm pitch, SMT, https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1734839%7FC%7Fpdf%7FEnglish%7FENG_CD_1734839_C_C_1734839.pdf%7F4-1734839-0 +te fpc 1734839 +0 +52 +51 +Connector_FFC-FPC +TE_84952-4_1x04-1MP_P1.0mm_Horizontal +TE FPC connector, 04 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +6 +5 +Connector_FFC-FPC +TE_84952-5_1x05-1MP_P1.0mm_Horizontal +TE FPC connector, 05 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +7 +6 +Connector_FFC-FPC +TE_84952-6_1x06-1MP_P1.0mm_Horizontal +TE FPC connector, 06 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +8 +7 +Connector_FFC-FPC +TE_84952-7_1x07-1MP_P1.0mm_Horizontal +TE FPC connector, 07 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +9 +8 +Connector_FFC-FPC +TE_84952-8_1x08-1MP_P1.0mm_Horizontal +TE FPC connector, 08 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +10 +9 +Connector_FFC-FPC +TE_84952-9_1x09-1MP_P1.0mm_Horizontal +TE FPC connector, 09 bottom-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84952&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84952-4 +te fpc 84952 +0 +11 +10 +Connector_FFC-FPC +TE_84953-4_1x04-1MP_P1.0mm_Horizontal +TE FPC connector, 04 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +6 +5 +Connector_FFC-FPC +TE_84953-5_1x05-1MP_P1.0mm_Horizontal +TE FPC connector, 05 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +7 +6 +Connector_FFC-FPC +TE_84953-6_1x06-1MP_P1.0mm_Horizontal +TE FPC connector, 06 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +8 +7 +Connector_FFC-FPC +TE_84953-7_1x07-1MP_P1.0mm_Horizontal +TE FPC connector, 07 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +9 +8 +Connector_FFC-FPC +TE_84953-8_1x08-1MP_P1.0mm_Horizontal +TE FPC connector, 08 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +10 +9 +Connector_FFC-FPC +TE_84953-9_1x09-1MP_P1.0mm_Horizontal +TE FPC connector, 09 top-side contacts, 1.0mm pitch, 1.0mm height, SMT, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=84953&DocType=Customer+Drawing&DocLang=English&DocFormat=pdf&PartCntxt=84953-4 +te fpc 84953 +0 +11 +10 +Connector_FFC-FPC +Wuerth_68611214422_1x12-1MP_P1.0mm_Horizontal +http://katalog.we-online.de/em/datasheet/68611214422.pdf +Wuerth FPC 68611214422 connector 12 bottom-side contacts 1.0mm pitch 1.0mm height SMT +0 +14 +13 +Connector_HDMI +HDMI_A_Contact_Technology_HDMI-19APL2_Horizontal +HDMI Contact Technology Type A http://www.contactswitch.com/en/download.aspx?id=1449 +HDMI Contact Technology Type A +0 +23 +20 +Connector_HDMI +HDMI_A_Kycon_KDMIX-SL1-NS-WS-B15_VerticalRightAngle +HDMI, Type A, Kycon KDMIX-SL1-NS-WS-B15, Vertical Right Angle, http://www.kycon.com/Pub_Eng_Draw/KDMIX-SL1-NS-WS-B15.pdf +hdmi type a +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-0x01 +HDMI, Micro, Type D, SMD, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle smd +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-1x01 +HDMI, Micro, Type D, THT, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle tht +0 +23 +20 +Connector_HDMI +HDMI_Micro-D_Molex_46765-2x0x +HDMI, Micro, Type D, THT/SMD hybrid, 0.4mm pitch, 19 ckt, right angle (http://www.molex.com/pdm_docs/sd/467651301_sd.pdf) +hdmi micro type d right angle tht smd hybrid +0 +23 +20 +Connector_Harwin +Harwin_Gecko-G125-FVX0605L0X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row female, vertical entry, PN:G125-FVX0605L0X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-FVX1005L0X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row female, vertical entry, PN:G125-FVX1005L0X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-FVX1205L0X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row female, vertical entry, PN:G125-FVX1205L0X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-FVX1605L0X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row female, vertical entry, PN:G125-FVX1605L0X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-FVX2005L0X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row female, vertical entry, PN:G125-FVX2005L0X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-FVX2605L0X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row female, vertical entry, PN:G125-FVX2605L0X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-FVX3405L0X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row female, vertical entry, PN:G125-FVX3405L0X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-FVX5005L0X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row female, vertical entry, PN:G125-FVX5005L0X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_Gecko-G125-MVX0605L0X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row male, vertical entry, no latches, PN:G125-MVX0605L0X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-MVX0605L1X_2x03_P1.25mm_Vertical +Harwin Gecko Connector, 6 pins, dual row male, vertical entry, with latches, PN:G125-MVX0605L1X +connector harwin gecko +0 +6 +6 +Connector_Harwin +Harwin_Gecko-G125-MVX1005L0X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row male, vertical entry, no latches, PN:G125-MVX1005L0X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-MVX1005L1X_2x05_P1.25mm_Vertical +Harwin Gecko Connector, 10 pins, dual row male, vertical entry, with latches, PN:G125-MVX1005L1X +connector harwin gecko +0 +10 +10 +Connector_Harwin +Harwin_Gecko-G125-MVX1205L0X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row male, vertical entry, no latches, PN:G125-MVX1205L0X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-MVX1205L1X_2x06_P1.25mm_Vertical +Harwin Gecko Connector, 12 pins, dual row male, vertical entry, with latches, PN:G125-MVX1205L1X +connector harwin gecko +0 +12 +12 +Connector_Harwin +Harwin_Gecko-G125-MVX1605L0X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row male, vertical entry, no latches, PN:G125-MVX1605L0X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-MVX1605L1X_2x08_P1.25mm_Vertical +Harwin Gecko Connector, 16 pins, dual row male, vertical entry, with latches, PN:G125-MVX1605L1X +connector harwin gecko +0 +16 +16 +Connector_Harwin +Harwin_Gecko-G125-MVX2005L0X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row male, vertical entry, no latches, PN:G125-MVX2005L0X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-MVX2005L1X_2x10_P1.25mm_Vertical +Harwin Gecko Connector, 20 pins, dual row male, vertical entry, with latches, PN:G125-MVX2005L1X +connector harwin gecko +0 +20 +20 +Connector_Harwin +Harwin_Gecko-G125-MVX2605L0X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row male, vertical entry, no latches, PN:G125-MVX2605L0X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-MVX2605L1X_2x13_P1.25mm_Vertical +Harwin Gecko Connector, 26 pins, dual row male, vertical entry, with latches, PN:G125-MVX2605L1X +connector harwin gecko +0 +26 +26 +Connector_Harwin +Harwin_Gecko-G125-MVX3405L0X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row male, vertical entry, no latches, PN:G125-MVX3405L0X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-MVX3405L1X_2x17_P1.25mm_Vertical +Harwin Gecko Connector, 34 pins, dual row male, vertical entry, with latches, PN:G125-MVX3405L1X +connector harwin gecko +0 +34 +34 +Connector_Harwin +Harwin_Gecko-G125-MVX5005L0X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row male, vertical entry, no latches, PN:G125-MVX5005L0X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_Gecko-G125-MVX5005L1X_2x25_P1.25mm_Vertical +Harwin Gecko Connector, 50 pins, dual row male, vertical entry, with latches, PN:G125-MVX5005L1X +connector harwin gecko +0 +50 +50 +Connector_Harwin +Harwin_LTek-Male_02_P2.00mm_Vertical +Harwin LTek Connector, 2 pins, single row male, vertical entry +connector harwin ltek M80 +0 +2 +2 +Connector_Harwin +Harwin_LTek-Male_02_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 2 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +6 +2 +Connector_Harwin +Harwin_LTek-Male_2x02_P2.00mm_Vertical +Harwin LTek Connector, 4 pins, single row male, vertical entry +connector harwin ltek M80 +0 +4 +4 +Connector_Harwin +Harwin_LTek-Male_2x02_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 4 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +8 +4 +Connector_Harwin +Harwin_LTek-Male_2x03_P2.00mm_Vertical +Harwin LTek Connector, 6 pins, single row male, vertical entry +connector harwin ltek M80 +0 +6 +6 +Connector_Harwin +Harwin_LTek-Male_2x03_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 6 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +10 +6 +Connector_Harwin +Harwin_LTek-Male_2x04_P2.00mm_Vertical +Harwin LTek Connector, 8 pins, single row male, vertical entry +connector harwin ltek M80 +0 +8 +8 +Connector_Harwin +Harwin_LTek-Male_2x04_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 8 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +12 +8 +Connector_Harwin +Harwin_LTek-Male_2x05_P2.00mm_Vertical +Harwin LTek Connector, 10 pins, single row male, vertical entry +connector harwin ltek M80 +0 +10 +10 +Connector_Harwin +Harwin_LTek-Male_2x05_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 10 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +14 +10 +Connector_Harwin +Harwin_LTek-Male_2x06_P2.00mm_Vertical +Harwin LTek Connector, 12 pins, single row male, vertical entry +connector harwin ltek M80 +0 +12 +12 +Connector_Harwin +Harwin_LTek-Male_2x06_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 12 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +16 +12 +Connector_Harwin +Harwin_LTek-Male_2x07_P2.00mm_Vertical +Harwin LTek Connector, 14 pins, single row male, vertical entry +connector harwin ltek M80 +0 +14 +14 +Connector_Harwin +Harwin_LTek-Male_2x07_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 14 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +18 +14 +Connector_Harwin +Harwin_LTek-Male_2x08_P2.00mm_Vertical +Harwin LTek Connector, 16 pins, single row male, vertical entry +connector harwin ltek M80 +0 +16 +16 +Connector_Harwin +Harwin_LTek-Male_2x08_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 16 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +20 +16 +Connector_Harwin +Harwin_LTek-Male_2x09_P2.00mm_Vertical +Harwin LTek Connector, 18 pins, single row male, vertical entry +connector harwin ltek M80 +0 +18 +18 +Connector_Harwin +Harwin_LTek-Male_2x09_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 18 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +22 +18 +Connector_Harwin +Harwin_LTek-Male_2x10_P2.00mm_Vertical +Harwin LTek Connector, 20 pins, single row male, vertical entry +connector harwin ltek M80 +0 +20 +20 +Connector_Harwin +Harwin_LTek-Male_2x10_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 20 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +24 +20 +Connector_Harwin +Harwin_LTek-Male_2x13_P2.00mm_Vertical +Harwin LTek Connector, 26 pins, single row male, vertical entry +connector harwin ltek M80 +0 +26 +26 +Connector_Harwin +Harwin_LTek-Male_2x13_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 26 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +30 +26 +Connector_Harwin +Harwin_LTek-Male_2x17_P2.00mm_Vertical +Harwin LTek Connector, 34 pins, single row male, vertical entry +connector harwin ltek M80 +0 +34 +34 +Connector_Harwin +Harwin_LTek-Male_2x17_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 34 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +38 +34 +Connector_Harwin +Harwin_LTek-Male_2x22_P2.00mm_Vertical +Harwin LTek Connector, 44 pins, single row male, vertical entry +connector harwin ltek M80 +0 +44 +44 +Connector_Harwin +Harwin_LTek-Male_2x22_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 44 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +48 +44 +Connector_Harwin +Harwin_LTek-Male_03_P2.00mm_Vertical +Harwin LTek Connector, 3 pins, single row male, vertical entry +connector harwin ltek M80 +0 +3 +3 +Connector_Harwin +Harwin_LTek-Male_03_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 3 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +7 +3 +Connector_Harwin +Harwin_LTek-Male_04_P2.00mm_Vertical +Harwin LTek Connector, 4 pins, single row male, vertical entry +connector harwin ltek M80 +0 +4 +4 +Connector_Harwin +Harwin_LTek-Male_04_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 4 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +8 +4 +Connector_Harwin +Harwin_LTek-Male_05_P2.00mm_Vertical +Harwin LTek Connector, 5 pins, single row male, vertical entry +connector harwin ltek M80 +0 +5 +5 +Connector_Harwin +Harwin_LTek-Male_05_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 5 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +9 +5 +Connector_Harwin +Harwin_LTek-Male_06_P2.00mm_Vertical +Harwin LTek Connector, 6 pins, single row male, vertical entry +connector harwin ltek M80 +0 +6 +6 +Connector_Harwin +Harwin_LTek-Male_06_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 6 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +10 +6 +Connector_Harwin +Harwin_LTek-Male_07_P2.00mm_Vertical +Harwin LTek Connector, 7 pins, single row male, vertical entry +connector harwin ltek M80 +0 +7 +7 +Connector_Harwin +Harwin_LTek-Male_07_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 7 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +11 +7 +Connector_Harwin +Harwin_LTek-Male_17_P2.00mm_Vertical +Harwin LTek Connector, 17 pins, single row male, vertical entry +connector harwin ltek M80 +0 +17 +17 +Connector_Harwin +Harwin_LTek-Male_17_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 17 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +21 +17 +Connector_Harwin +Harwin_LTek-Male_22_P2.00mm_Vertical +Harwin LTek Connector, 22 pins, single row male, vertical entry +connector harwin ltek M80 +0 +22 +22 +Connector_Harwin +Harwin_LTek-Male_22_P2.00mm_Vertical_StrainRelief +Harwin LTek Connector, 22 pins, single row male, vertical entry, strain relief clip +connector harwin ltek M80 +0 +26 +22 +Connector_Harwin +Harwin_M20-89003xx_1x03_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89003xx, 3 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +4 +3 +Connector_Harwin +Harwin_M20-89004xx_1x04_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89004xx, 4 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +5 +4 +Connector_Harwin +Harwin_M20-89005xx_1x05_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89005xx, 5 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +6 +5 +Connector_Harwin +Harwin_M20-89006xx_1x06_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89006xx, 6 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +7 +6 +Connector_Harwin +Harwin_M20-89007xx_1x07_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89007xx, 7 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +8 +7 +Connector_Harwin +Harwin_M20-89008xx_1x08_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89008xx, 8 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +9 +8 +Connector_Harwin +Harwin_M20-89009xx_1x09_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89009xx, 9 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +10 +9 +Connector_Harwin +Harwin_M20-89010xx_1x10_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89010xx, 10 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +11 +10 +Connector_Harwin +Harwin_M20-89011xx_1x11_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89011xx, 11 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +12 +11 +Connector_Harwin +Harwin_M20-89012xx_1x12_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89012xx, 12 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +13 +12 +Connector_Harwin +Harwin_M20-89013xx_1x13_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89013xx, 13 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +14 +13 +Connector_Harwin +Harwin_M20-89014xx_1x14_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89014xx, 14 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +15 +14 +Connector_Harwin +Harwin_M20-89015xx_1x15_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89015xx, 15 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +16 +15 +Connector_Harwin +Harwin_M20-89016xx_1x16_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89016xx, 16 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +17 +16 +Connector_Harwin +Harwin_M20-89017xx_1x17_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89017xx, 17 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +18 +17 +Connector_Harwin +Harwin_M20-89018xx_1x18_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89018xx, 18 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +19 +18 +Connector_Harwin +Harwin_M20-89019xx_1x19_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89019xx, 19 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +20 +19 +Connector_Harwin +Harwin_M20-89020xx_1x20_P2.54mm_Horizontal +Harwin Male Horizontal Surface Mount Single Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-89020xx, 20 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator +connector Harwin M20-890 horizontal +0 +21 +20 +Connector_Harwin +Harwin_M20-7810245_2x02_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810245, 2 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +4 +4 +Connector_Harwin +Harwin_M20-7810345_2x03_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810345, 3 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +6 +6 +Connector_Harwin +Harwin_M20-7810445_2x04_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810445, 4 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +8 +8 +Connector_Harwin +Harwin_M20-7810545_2x05_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810545, 5 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +10 +10 +Connector_Harwin +Harwin_M20-7810645_2x06_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810645, 6 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +12 +12 +Connector_Harwin +Harwin_M20-7810745_2x07_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810745, 7 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +14 +14 +Connector_Harwin +Harwin_M20-7810845_2x08_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810845, 8 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +16 +16 +Connector_Harwin +Harwin_M20-7810945_2x09_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7810945, 9 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +18 +18 +Connector_Harwin +Harwin_M20-7811045_2x10_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811045, 10 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +20 +20 +Connector_Harwin +Harwin_M20-7811245_2x12_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811245, 12 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +24 +24 +Connector_Harwin +Harwin_M20-7811545_2x15_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7811545, 15 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +30 +30 +Connector_Harwin +Harwin_M20-7812045_2x20_P2.54mm_Vertical +Harwin Female Vertical Surface Mount Double Row 2.54mm (0.1 inch) Pitch PCB Connector, M20-7812045, 20 Pins per row (https://cdn.harwin.com/pdfs/M20-781.pdf), generated with kicad-footprint-generator +connector Harwin M20 side entry +0 +40 +40 +Connector_Hirose +Hirose_BM24_BM24-40DP-2-0.35V_2x20_P0.35mm_PowerPin2_Vertical +Hirose BM24 series connector, BM24-40DP/2-0.35V (https://www.hirose.com/product/en/download_file/key_name/BM24/category/Catalog/doc_file_id/47680/?file_category_id=4&item_id=50&is_series=1) +connector Hirose BM24 40pin header +0 +44 +42 +Connector_Hirose +Hirose_BM24_BM24-40DS-2-0.35V_2x20_P0.35mm_PowerPin2_Vertical +Hirose BM24 series connector, BM24-40DS/2-0.35V (https://www.hirose.com/product/en/download_file/key_name/BM24/category/Catalog/doc_file_id/47680/?file_category_id=4&item_id=50&is_series=1) +connector Hirose 40pin receptacle vertical +0 +42 +42 +Connector_Hirose +Hirose_DF3EA-02P-2H_1x02-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-02P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +4 +3 +Connector_Hirose +Hirose_DF3EA-03P-2H_1x03-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-03P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +5 +4 +Connector_Hirose +Hirose_DF3EA-04P-2H_1x04-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-04P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +6 +5 +Connector_Hirose +Hirose_DF3EA-05P-2H_1x05-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-05P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +7 +6 +Connector_Hirose +Hirose_DF3EA-06P-2H_1x06-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-06P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +8 +7 +Connector_Hirose +Hirose_DF3EA-07P-2H_1x07-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-07P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +9 +8 +Connector_Hirose +Hirose_DF3EA-08P-2H_1x08-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-08P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +10 +9 +Connector_Hirose +Hirose_DF3EA-09P-2H_1x09-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-09P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +11 +10 +Connector_Hirose +Hirose_DF3EA-10P-2H_1x10-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-10P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +12 +11 +Connector_Hirose +Hirose_DF3EA-11P-2H_1x11-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-11P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +13 +12 +Connector_Hirose +Hirose_DF3EA-12P-2H_1x12-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-12P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +14 +13 +Connector_Hirose +Hirose_DF3EA-13P-2H_1x13-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-13P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +15 +14 +Connector_Hirose +Hirose_DF3EA-14P-2H_1x14-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-14P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +16 +15 +Connector_Hirose +Hirose_DF3EA-15P-2H_1x15-1MP_P2.00mm_Horizontal +Hirose series connector, DF3EA-15P-2H (https://www.hirose.com/product/document?clcode=CL0543-0332-0-51&productname=DF3EA-5P-2H(51)&series=DF3&documenttype=2DDrawing&lang=en&documentid=0001163317), generated with kicad-footprint-generator +connector Hirose top entry +0 +17 +16 +Connector_Hirose +Hirose_DF11-4DP-2DSA_2x02_P2.00mm_Vertical +Hirose DF11 through hole, DF11-4DP-2DSA, 2 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +4 +4 +Connector_Hirose +Hirose_DF11-6DP-2DSA_2x03_P2.00mm_Vertical +Hirose DF11 through hole, DF11-6DP-2DSA, 3 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +6 +6 +Connector_Hirose +Hirose_DF11-8DP-2DSA_2x04_P2.00mm_Vertical +Hirose DF11 through hole, DF11-8DP-2DSA, 4 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +8 +8 +Connector_Hirose +Hirose_DF11-10DP-2DSA_2x05_P2.00mm_Vertical +Hirose DF11 through hole, DF11-10DP-2DSA, 5 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +10 +10 +Connector_Hirose +Hirose_DF11-12DP-2DSA_2x06_P2.00mm_Vertical +Hirose DF11 through hole, DF11-12DP-2DSA, 6 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +12 +12 +Connector_Hirose +Hirose_DF11-14DP-2DSA_2x07_P2.00mm_Vertical +Hirose DF11 through hole, DF11-14DP-2DSA, 7 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +14 +14 +Connector_Hirose +Hirose_DF11-16DP-2DSA_2x08_P2.00mm_Vertical +Hirose DF11 through hole, DF11-16DP-2DSA, 8 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +16 +16 +Connector_Hirose +Hirose_DF11-18DP-2DSA_2x09_P2.00mm_Vertical +Hirose DF11 through hole, DF11-18DP-2DSA, 9 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +18 +18 +Connector_Hirose +Hirose_DF11-20DP-2DSA_2x10_P2.00mm_Vertical +Hirose DF11 through hole, DF11-20DP-2DSA, 10 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +20 +20 +Connector_Hirose +Hirose_DF11-22DP-2DSA_2x11_P2.00mm_Vertical +Hirose DF11 through hole, DF11-22DP-2DSA, 11 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +22 +22 +Connector_Hirose +Hirose_DF11-24DP-2DSA_2x12_P2.00mm_Vertical +Hirose DF11 through hole, DF11-24DP-2DSA, 12 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +24 +24 +Connector_Hirose +Hirose_DF11-26DP-2DSA_2x13_P2.00mm_Vertical +Hirose DF11 through hole, DF11-26DP-2DSA, 13 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +26 +26 +Connector_Hirose +Hirose_DF11-28DP-2DSA_2x14_P2.00mm_Vertical +Hirose DF11 through hole, DF11-28DP-2DSA, 14 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +28 +28 +Connector_Hirose +Hirose_DF11-30DP-2DSA_2x15_P2.00mm_Vertical +Hirose DF11 through hole, DF11-30DP-2DSA, 15 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +30 +30 +Connector_Hirose +Hirose_DF11-32DP-2DSA_2x16_P2.00mm_Vertical +Hirose DF11 through hole, DF11-32DP-2DSA, 16 Pins per row (https://www.hirose.com/product/document?clcode=&productname=&series=DF11&documenttype=Catalog&lang=en&documentid=D31688_en), generated with kicad-footprint-generator +connector Hirose DF11 vertical +0 +32 +32 +Connector_Hirose +Hirose_DF12_DF12C3.0-10DS-0.5V_2x05_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-10DS-0.5V, 10 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +20 +10 +Connector_Hirose +Hirose_DF12_DF12C3.0-14DS-0.5V_2x07_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-14DS-0.5V, 14 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +28 +14 +Connector_Hirose +Hirose_DF12_DF12C3.0-20DS-0.5V_2x10_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-20DS-0.5V, 20 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +40 +20 +Connector_Hirose +Hirose_DF12_DF12C3.0-30DS-0.5V_2x15_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-30DS-0.5V, 30 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +60 +30 +Connector_Hirose +Hirose_DF12_DF12C3.0-32DS-0.5V_2x16_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-32DS-0.5V, 32 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +64 +32 +Connector_Hirose +Hirose_DF12_DF12C3.0-36DS-0.5V_2x18_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-36DS-0.5V, 36 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +72 +36 +Connector_Hirose +Hirose_DF12_DF12C3.0-40DS-0.5V_2x20_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-40DS-0.5V, 40 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +80 +40 +Connector_Hirose +Hirose_DF12_DF12C3.0-50DS-0.5V_2x25_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-50DS-0.5V, 50 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +100 +50 +Connector_Hirose +Hirose_DF12_DF12C3.0-60DS-0.5V_2x30_P0.50mm_Vertical +Hirose DF12C SMD, DF12C3.0-60DS-0.5V, 60 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0694-9-81&productname=DF12C(3.0)-50DS-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000994748), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +120 +60 +Connector_Hirose +Hirose_DF12_DF12E3.0-10DP-0.5V_2x05_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-10DP-0.5V, 10 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +20 +10 +Connector_Hirose +Hirose_DF12_DF12E3.0-14DP-0.5V_2x07_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-14DP-0.5V, 14 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +28 +14 +Connector_Hirose +Hirose_DF12_DF12E3.0-20DP-0.5V_2x10_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-20DP-0.5V, 20 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +40 +20 +Connector_Hirose +Hirose_DF12_DF12E3.0-30DP-0.5V_2x15_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-30DP-0.5V, 30 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +60 +30 +Connector_Hirose +Hirose_DF12_DF12E3.0-32DP-0.5V_2x16_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-32DP-0.5V, 32 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +64 +32 +Connector_Hirose +Hirose_DF12_DF12E3.0-36DP-0.5V_2x18_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-36DP-0.5V, 36 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +72 +36 +Connector_Hirose +Hirose_DF12_DF12E3.0-40DP-0.5V_2x20_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-40DP-0.5V, 40 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +80 +40 +Connector_Hirose +Hirose_DF12_DF12E3.0-50DP-0.5V_2x25_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-50DP-0.5V, 50 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +100 +50 +Connector_Hirose +Hirose_DF12_DF12E3.0-60DP-0.5V_2x30_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-60DP-0.5V, 60 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +120 +60 +Connector_Hirose +Hirose_DF12_DF12E3.0-80DP-0.5V_2x40_P0.50mm_Vertical +Hirose DF12E SMD, DF12E3.0-80DP-0.5V, 80 Pins per row (https://www.hirose.com/product/document?clcode=CL0537-0834-6-81&productname=DF12E(3.0)-50DP-0.5V(81)&series=DF12&documenttype=2DDrawing&lang=en&documentid=0000992393), generated with kicad-footprint-generator +connector Hirose DF12 vertical +0 +160 +80 +Connector_Hirose +Hirose_DF13-02P-1.25DSA_1x02_P1.25mm_Vertical +Hirose DF13 through hole, DF13-02P-1.25DSA, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +2 +2 +Connector_Hirose +Hirose_DF13-02P-1.25DS_1x02_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-02P-1.25DS, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +2 +2 +Connector_Hirose +Hirose_DF13-03P-1.25DSA_1x03_P1.25mm_Vertical +Hirose DF13 through hole, DF13-03P-1.25DSA, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +3 +3 +Connector_Hirose +Hirose_DF13-03P-1.25DS_1x03_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-03P-1.25DS, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +3 +3 +Connector_Hirose +Hirose_DF13-04P-1.25DSA_1x04_P1.25mm_Vertical +Hirose DF13 through hole, DF13-04P-1.25DSA, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +4 +4 +Connector_Hirose +Hirose_DF13-04P-1.25DS_1x04_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-04P-1.25DS, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +4 +4 +Connector_Hirose +Hirose_DF13-05P-1.25DSA_1x05_P1.25mm_Vertical +Hirose DF13 through hole, DF13-05P-1.25DSA, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +5 +5 +Connector_Hirose +Hirose_DF13-05P-1.25DS_1x05_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-05P-1.25DS, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +5 +5 +Connector_Hirose +Hirose_DF13-06P-1.25DSA_1x06_P1.25mm_Vertical +Hirose DF13 through hole, DF13-06P-1.25DSA, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +6 +6 +Connector_Hirose +Hirose_DF13-06P-1.25DS_1x06_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-06P-1.25DS, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +6 +6 +Connector_Hirose +Hirose_DF13-07P-1.25DSA_1x07_P1.25mm_Vertical +Hirose DF13 through hole, DF13-07P-1.25DSA, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +7 +7 +Connector_Hirose +Hirose_DF13-07P-1.25DS_1x07_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-07P-1.25DS, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +7 +7 +Connector_Hirose +Hirose_DF13-08P-1.25DSA_1x08_P1.25mm_Vertical +Hirose DF13 through hole, DF13-08P-1.25DSA, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +8 +8 +Connector_Hirose +Hirose_DF13-08P-1.25DS_1x08_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-08P-1.25DS, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +8 +8 +Connector_Hirose +Hirose_DF13-09P-1.25DSA_1x09_P1.25mm_Vertical +Hirose DF13 through hole, DF13-09P-1.25DSA, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +9 +9 +Connector_Hirose +Hirose_DF13-09P-1.25DS_1x09_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-09P-1.25DS, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +9 +9 +Connector_Hirose +Hirose_DF13-10P-1.25DSA_1x10_P1.25mm_Vertical +Hirose DF13 through hole, DF13-10P-1.25DSA, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +10 +10 +Connector_Hirose +Hirose_DF13-10P-1.25DS_1x10_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-10P-1.25DS, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +10 +10 +Connector_Hirose +Hirose_DF13-11P-1.25DSA_1x11_P1.25mm_Vertical +Hirose DF13 through hole, DF13-11P-1.25DSA, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +11 +11 +Connector_Hirose +Hirose_DF13-11P-1.25DS_1x11_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-11P-1.25DS, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +11 +11 +Connector_Hirose +Hirose_DF13-12P-1.25DSA_1x12_P1.25mm_Vertical +Hirose DF13 through hole, DF13-12P-1.25DSA, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +12 +12 +Connector_Hirose +Hirose_DF13-12P-1.25DS_1x12_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-12P-1.25DS, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +12 +12 +Connector_Hirose +Hirose_DF13-13P-1.25DSA_1x13_P1.25mm_Vertical +Hirose DF13 through hole, DF13-13P-1.25DSA, 13 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +13 +13 +Connector_Hirose +Hirose_DF13-14P-1.25DSA_1x14_P1.25mm_Vertical +Hirose DF13 through hole, DF13-14P-1.25DSA, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +14 +14 +Connector_Hirose +Hirose_DF13-14P-1.25DS_1x14_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-14P-1.25DS, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +14 +14 +Connector_Hirose +Hirose_DF13-15P-1.25DSA_1x15_P1.25mm_Vertical +Hirose DF13 through hole, DF13-15P-1.25DSA, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-2P-1.25DSA%2850%29/), generated with kicad-footprint-generator +connector Hirose DF13 vertical +0 +15 +15 +Connector_Hirose +Hirose_DF13-15P-1.25DS_1x15_P1.25mm_Horizontal +Hirose DF13 through hole, DF13-15P-1.25DS, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13-4P-1.25DS%2820%29/), generated with kicad-footprint-generator +connector Hirose DF13 horizontal +0 +15 +15 +Connector_Hirose +Hirose_DF13C_CL535-0402-2-51_1x02-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0402-2-51, 2 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +4 +3 +Connector_Hirose +Hirose_DF13C_CL535-0403-5-51_1x03-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0403-5-51, 3 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +5 +4 +Connector_Hirose +Hirose_DF13C_CL535-0404-8-51_1x04-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0404-8-51, 4 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +6 +5 +Connector_Hirose +Hirose_DF13C_CL535-0405-0-51_1x05-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0405-0-51, 5 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +7 +6 +Connector_Hirose +Hirose_DF13C_CL535-0406-3-51_1x06-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0406-3-51, 6 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +8 +7 +Connector_Hirose +Hirose_DF13C_CL535-0407-6-51_1x07-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0407-6-51, 7 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +9 +8 +Connector_Hirose +Hirose_DF13C_CL535-0408-9-51_1x08-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0408-9-51, 8 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +10 +9 +Connector_Hirose +Hirose_DF13C_CL535-0409-1-51_1x09-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0409-1-51, 9 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +11 +10 +Connector_Hirose +Hirose_DF13C_CL535-0410-4-51_1x10-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0410-4-51, 10 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +12 +11 +Connector_Hirose +Hirose_DF13C_CL535-0411-3-51_1x11-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0411-3-51, 11 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +13 +12 +Connector_Hirose +Hirose_DF13C_CL535-0412-6-51_1x12-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0412-6-51, 12 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +14 +13 +Connector_Hirose +Hirose_DF13C_CL535-0414-1-51_1x14-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0414-1-51, 14 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +16 +15 +Connector_Hirose +Hirose_DF13C_CL535-0415-4-51_1x15-1MP_P1.25mm_Vertical +Hirose DF13C SMD, CL535-0415-4-51, 15 Pins per row (https://www.hirose.com/product/en/products/DF13/DF13C-10P-1.25V%2851%29/), generated with kicad-footprint-generator +connector Hirose DF13C vertical +0 +17 +16 +Connector_Hirose +Hirose_DF52-2S-0.8H_1x02-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-2S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +4 +3 +Connector_Hirose +Hirose_DF52-3S-0.8H_1x03-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-3S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +5 +4 +Connector_Hirose +Hirose_DF52-4S-0.8H_1x04-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-4S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +6 +5 +Connector_Hirose +Hirose_DF52-5S-0.8H_1x05-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-5S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +7 +6 +Connector_Hirose +Hirose_DF52-6S-0.8H_1x06-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-6S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +8 +7 +Connector_Hirose +Hirose_DF52-7S-0.8H_1x07-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-7S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +9 +8 +Connector_Hirose +Hirose_DF52-8S-0.8H_1x08-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-8S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +10 +9 +Connector_Hirose +Hirose_DF52-9S-0.8H_1x09-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-9S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +11 +10 +Connector_Hirose +Hirose_DF52-10S-0.8H_1x10-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-10S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +12 +11 +Connector_Hirose +Hirose_DF52-11S-0.8H_1x11-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-11S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +13 +12 +Connector_Hirose +Hirose_DF52-12S-0.8H_1x12-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-12S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +14 +13 +Connector_Hirose +Hirose_DF52-14S-0.8H_1x14-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-14S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +16 +15 +Connector_Hirose +Hirose_DF52-15S-0.8H_1x15-1MP_P0.80mm_Horizontal +Hirose series connector, DF52-15S-0.8H (https://www.hirose.com/product/en/products/DF52/DF52-3S-0.8H%2821%29/), generated with kicad-footprint-generator +connector Hirose top entry +0 +17 +16 +Connector_Hirose +Hirose_DF63-5P-3.96DSA_1x05_P3.96mm_Vertical +Hirose DF63 through hole, DF63-5P-3.96DSA, 5 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +5 +5 +Connector_Hirose +Hirose_DF63-6P-3.96DSA_1x06_P3.96mm_Vertical +Hirose DF63 through hole, DF63-6P-3.96DSA, 6 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +6 +6 +Connector_Hirose +Hirose_DF63M-1P-3.96DSA_1x01_P3.96mm_Vertical +Hirose DF63 through hole, DF63M-1P-3.96DSA, 1 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +1 +1 +Connector_Hirose +Hirose_DF63M-2P-3.96DSA_1x02_P3.96mm_Vertical +Hirose DF63 through hole, DF63M-2P-3.96DSA, 2 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +2 +2 +Connector_Hirose +Hirose_DF63M-3P-3.96DSA_1x03_P3.96mm_Vertical +Hirose DF63 through hole, DF63M-3P-3.96DSA, 3 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +3 +3 +Connector_Hirose +Hirose_DF63M-4P-3.96DSA_1x04_P3.96mm_Vertical +Hirose DF63 through hole, DF63M-4P-3.96DSA, 4 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +4 +4 +Connector_Hirose +Hirose_DF63R-1P-3.96DSA_1x01_P3.96mm_Vertical +Hirose DF63 through hole, DF63R-1P-3.96DSA, 1 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +1 +1 +Connector_Hirose +Hirose_DF63R-2P-3.96DSA_1x02_P3.96mm_Vertical +Hirose DF63 through hole, DF63R-2P-3.96DSA, 2 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +2 +2 +Connector_Hirose +Hirose_DF63R-3P-3.96DSA_1x03_P3.96mm_Vertical +Hirose DF63 through hole, DF63R-3P-3.96DSA, 3 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +3 +3 +Connector_Hirose +Hirose_DF63R-4P-3.96DSA_1x04_P3.96mm_Vertical +Hirose DF63 through hole, DF63R-4P-3.96DSA, 4 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +4 +4 +Connector_Hirose +Hirose_DF63R-5P-3.96DSA_1x05_P3.96mm_Vertical +Hirose DF63 through hole, DF63R-5P-3.96DSA, 5 Pins per row (https://www.hirose.com/product/en/products/DF63/), generated with kicad-footprint-generator +connector Hirose DF63 vertical +0 +5 +5 +Connector_IDC +IDC-Header_2x03_P2.54mm_Horizontal +Through hole IDC box header, 2x03, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x03 2.54mm double row +0 +6 +6 +Connector_IDC +IDC-Header_2x03_P2.54mm_Vertical +Through hole IDC box header, 2x03, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x03 2.54mm double row +0 +6 +6 +Connector_IDC +IDC-Header_2x04_P2.54mm_Horizontal +Through hole IDC box header, 2x04, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x04 2.54mm double row +0 +8 +8 +Connector_IDC +IDC-Header_2x04_P2.54mm_Vertical +Through hole IDC box header, 2x04, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x04 2.54mm double row +0 +8 +8 +Connector_IDC +IDC-Header_2x05-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +12 +11 +Connector_IDC +IDC-Header_2x05-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +12 +11 +Connector_IDC +IDC-Header_2x05-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +12 +11 +Connector_IDC +IDC-Header_2x05-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x05 2.54mm double row +0 +12 +11 +Connector_IDC +IDC-Header_2x05-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +12 +11 +Connector_IDC +IDC-Header_2x05_P2.54mm_Horizontal +Through hole IDC box header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Latch_Vertical +Through hole IDC header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x05_P2.54mm_Vertical +Through hole IDC box header, 2x05, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x05 2.54mm double row +0 +10 +10 +Connector_IDC +IDC-Header_2x06-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +14 +13 +Connector_IDC +IDC-Header_2x06-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +14 +13 +Connector_IDC +IDC-Header_2x06-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +14 +13 +Connector_IDC +IDC-Header_2x06-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x06 2.54mm double row +0 +14 +13 +Connector_IDC +IDC-Header_2x06-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +14 +13 +Connector_IDC +IDC-Header_2x06_P2.54mm_Horizontal +Through hole IDC box header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Latch_Vertical +Through hole IDC header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x06_P2.54mm_Vertical +Through hole IDC box header, 2x06, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x06 2.54mm double row +0 +12 +12 +Connector_IDC +IDC-Header_2x07-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +16 +15 +Connector_IDC +IDC-Header_2x07-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +16 +15 +Connector_IDC +IDC-Header_2x07-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +16 +15 +Connector_IDC +IDC-Header_2x07-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x07 2.54mm double row +0 +16 +15 +Connector_IDC +IDC-Header_2x07-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +16 +15 +Connector_IDC +IDC-Header_2x07_P2.54mm_Horizontal +Through hole IDC box header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Horizontal_Lock +Connector IDC Locked, 10 contacts, compatible header: PANCON HE10 (Series 50, (https://www.reboul.fr/storage/00003af6.pdf) +connector idc locked +0 +16 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Latch_Vertical +Through hole IDC header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x07_P2.54mm_Vertical +Through hole IDC box header, 2x07, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x07 2.54mm double row +0 +14 +14 +Connector_IDC +IDC-Header_2x08-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +18 +17 +Connector_IDC +IDC-Header_2x08-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +18 +17 +Connector_IDC +IDC-Header_2x08-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +18 +17 +Connector_IDC +IDC-Header_2x08-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x08 2.54mm double row +0 +18 +17 +Connector_IDC +IDC-Header_2x08-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +18 +17 +Connector_IDC +IDC-Header_2x08_P2.54mm_Horizontal +Through hole IDC box header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Latch_Vertical +Through hole IDC header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x08_P2.54mm_Vertical +Through hole IDC box header, 2x08, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x08 2.54mm double row +0 +16 +16 +Connector_IDC +IDC-Header_2x10-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +22 +21 +Connector_IDC +IDC-Header_2x10-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +22 +21 +Connector_IDC +IDC-Header_2x10-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +22 +21 +Connector_IDC +IDC-Header_2x10-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x10 2.54mm double row +0 +22 +21 +Connector_IDC +IDC-Header_2x10-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +22 +21 +Connector_IDC +IDC-Header_2x10_P2.54mm_Horizontal +Through hole IDC box header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Latch_Vertical +Through hole IDC header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x10_P2.54mm_Vertical +Through hole IDC box header, 2x10, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x10 2.54mm double row +0 +20 +20 +Connector_IDC +IDC-Header_2x12-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +26 +25 +Connector_IDC +IDC-Header_2x12-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +26 +25 +Connector_IDC +IDC-Header_2x12-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +26 +25 +Connector_IDC +IDC-Header_2x12-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x12 2.54mm double row +0 +26 +25 +Connector_IDC +IDC-Header_2x12-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +26 +25 +Connector_IDC +IDC-Header_2x12_P2.54mm_Horizontal +Through hole IDC box header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Latch_Vertical +Through hole IDC header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x12_P2.54mm_Vertical +Through hole IDC box header, 2x12, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x12 2.54mm double row +0 +24 +24 +Connector_IDC +IDC-Header_2x13-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +28 +27 +Connector_IDC +IDC-Header_2x13-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +28 +27 +Connector_IDC +IDC-Header_2x13-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +28 +27 +Connector_IDC +IDC-Header_2x13-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x13 2.54mm double row +0 +28 +27 +Connector_IDC +IDC-Header_2x13-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +28 +27 +Connector_IDC +IDC-Header_2x13_P2.54mm_Horizontal +Through hole IDC box header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Latch_Vertical +Through hole IDC header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x13_P2.54mm_Vertical +Through hole IDC box header, 2x13, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x13 2.54mm double row +0 +26 +26 +Connector_IDC +IDC-Header_2x15-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +32 +31 +Connector_IDC +IDC-Header_2x15-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +32 +31 +Connector_IDC +IDC-Header_2x15-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +32 +31 +Connector_IDC +IDC-Header_2x15-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x15 2.54mm double row +0 +32 +31 +Connector_IDC +IDC-Header_2x15-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +32 +31 +Connector_IDC +IDC-Header_2x15_P2.54mm_Horizontal +Through hole IDC box header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Latch_Vertical +Through hole IDC header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x15_P2.54mm_Vertical +Through hole IDC box header, 2x15, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x15 2.54mm double row +0 +30 +30 +Connector_IDC +IDC-Header_2x17-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +36 +35 +Connector_IDC +IDC-Header_2x17-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +36 +35 +Connector_IDC +IDC-Header_2x17-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +36 +35 +Connector_IDC +IDC-Header_2x17-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x17 2.54mm double row +0 +36 +35 +Connector_IDC +IDC-Header_2x17-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +36 +35 +Connector_IDC +IDC-Header_2x17_P2.54mm_Horizontal +Through hole IDC box header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Latch_Vertical +Through hole IDC header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x17_P2.54mm_Vertical +Through hole IDC box header, 2x17, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x17 2.54mm double row +0 +34 +34 +Connector_IDC +IDC-Header_2x20-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +42 +41 +Connector_IDC +IDC-Header_2x20-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +42 +41 +Connector_IDC +IDC-Header_2x20-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +42 +41 +Connector_IDC +IDC-Header_2x20-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x20 2.54mm double row +0 +42 +41 +Connector_IDC +IDC-Header_2x20-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +42 +41 +Connector_IDC +IDC-Header_2x20_P2.54mm_Horizontal +Through hole IDC box header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Latch_Vertical +Through hole IDC header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x20_P2.54mm_Vertical +Through hole IDC box header, 2x20, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x20 2.54mm double row +0 +40 +40 +Connector_IDC +IDC-Header_2x25-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +52 +51 +Connector_IDC +IDC-Header_2x25-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +52 +51 +Connector_IDC +IDC-Header_2x25-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +52 +51 +Connector_IDC +IDC-Header_2x25-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x25 2.54mm double row +0 +52 +51 +Connector_IDC +IDC-Header_2x25-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +52 +51 +Connector_IDC +IDC-Header_2x25_P2.54mm_Horizontal +Through hole IDC box header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Latch_Vertical +Through hole IDC header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x25_P2.54mm_Vertical +Through hole IDC box header, 2x25, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x25 2.54mm double row +0 +50 +50 +Connector_IDC +IDC-Header_2x30-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +62 +61 +Connector_IDC +IDC-Header_2x30-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +62 +61 +Connector_IDC +IDC-Header_2x30-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +62 +61 +Connector_IDC +IDC-Header_2x30-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x30 2.54mm double row +0 +62 +61 +Connector_IDC +IDC-Header_2x30-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +62 +61 +Connector_IDC +IDC-Header_2x30_P2.54mm_Horizontal +Through hole IDC box header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Latch_Vertical +Through hole IDC header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x30_P2.54mm_Vertical +Through hole IDC box header, 2x30, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x30 2.54mm double row +0 +60 +60 +Connector_IDC +IDC-Header_2x32-1MP_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +66 +65 +Connector_IDC +IDC-Header_2x32-1MP_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +66 +65 +Connector_IDC +IDC-Header_2x32-1MP_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +66 +65 +Connector_IDC +IDC-Header_2x32-1MP_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x32 2.54mm double row +0 +66 +65 +Connector_IDC +IDC-Header_2x32-1MP_P2.54mm_Latch_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, mounting holes, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +66 +65 +Connector_IDC +IDC-Header_2x32_P2.54mm_Horizontal +Through hole IDC box header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC box header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Latch6.5mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 6.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Latch9.5mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 9.5mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Latch12.0mm_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, 12.0mm latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Latch_Horizontal +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole horizontal IDC header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Latch_Vertical +Through hole IDC header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows latches, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC header THT 2x32 2.54mm double row +0 +64 +64 +Connector_IDC +IDC-Header_2x32_P2.54mm_Vertical +Through hole IDC box header, 2x32, 2.54mm pitch, DIN 41651 / IEC 60603-13, double rows, https://docs.google.com/spreadsheets/d/16SsEcesNF15N3Lb4niX7dcUr-NY5_MFPQhobNuNppn4/edit#gid=0 +Through hole vertical IDC box header THT 2x32 2.54mm double row +0 +64 +64 +Connector_JAE +JAE_LY20-4P-DLT1_2x02_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-4P-DLT1, 2 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +4 +4 +Connector_JAE +JAE_LY20-4P-DT1_2x02_P2.00mm_Vertical +Molex LY 20 series connector, LY20-4P-DT1, 2 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +4 +4 +Connector_JAE +JAE_LY20-6P-DLT1_2x03_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-6P-DLT1, 3 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +6 +6 +Connector_JAE +JAE_LY20-6P-DT1_2x03_P2.00mm_Vertical +Molex LY 20 series connector, LY20-6P-DT1, 3 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +6 +6 +Connector_JAE +JAE_LY20-8P-DLT1_2x04_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-8P-DLT1, 4 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +8 +8 +Connector_JAE +JAE_LY20-8P-DT1_2x04_P2.00mm_Vertical +Molex LY 20 series connector, LY20-8P-DT1, 4 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +8 +8 +Connector_JAE +JAE_LY20-10P-DLT1_2x05_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-10P-DLT1, 5 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +10 +10 +Connector_JAE +JAE_LY20-10P-DT1_2x05_P2.00mm_Vertical +Molex LY 20 series connector, LY20-10P-DT1, 5 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +10 +10 +Connector_JAE +JAE_LY20-12P-DLT1_2x06_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-12P-DLT1, 6 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +12 +12 +Connector_JAE +JAE_LY20-12P-DT1_2x06_P2.00mm_Vertical +Molex LY 20 series connector, LY20-12P-DT1, 6 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +12 +12 +Connector_JAE +JAE_LY20-14P-DLT1_2x07_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-14P-DLT1, 7 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +14 +14 +Connector_JAE +JAE_LY20-14P-DT1_2x07_P2.00mm_Vertical +Molex LY 20 series connector, LY20-14P-DT1, 7 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +14 +14 +Connector_JAE +JAE_LY20-16P-DLT1_2x08_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-16P-DLT1, 8 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +16 +16 +Connector_JAE +JAE_LY20-16P-DT1_2x08_P2.00mm_Vertical +Molex LY 20 series connector, LY20-16P-DT1, 8 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +16 +16 +Connector_JAE +JAE_LY20-18P-DLT1_2x09_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-18P-DLT1, 9 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +18 +18 +Connector_JAE +JAE_LY20-18P-DT1_2x09_P2.00mm_Vertical +Molex LY 20 series connector, LY20-18P-DT1, 9 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +18 +18 +Connector_JAE +JAE_LY20-20P-DLT1_2x10_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-20P-DLT1, 10 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +20 +20 +Connector_JAE +JAE_LY20-20P-DT1_2x10_P2.00mm_Vertical +Molex LY 20 series connector, LY20-20P-DT1, 10 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +20 +20 +Connector_JAE +JAE_LY20-22P-DLT1_2x11_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-22P-DLT1, 11 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +22 +22 +Connector_JAE +JAE_LY20-22P-DT1_2x11_P2.00mm_Vertical +Molex LY 20 series connector, LY20-22P-DT1, 11 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +22 +22 +Connector_JAE +JAE_LY20-24P-DLT1_2x12_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-24P-DLT1, 12 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +24 +24 +Connector_JAE +JAE_LY20-24P-DT1_2x12_P2.00mm_Vertical +Molex LY 20 series connector, LY20-24P-DT1, 12 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +24 +24 +Connector_JAE +JAE_LY20-26P-DLT1_2x13_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-26P-DLT1, 13 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +26 +26 +Connector_JAE +JAE_LY20-26P-DT1_2x13_P2.00mm_Vertical +Molex LY 20 series connector, LY20-26P-DT1, 13 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +26 +26 +Connector_JAE +JAE_LY20-28P-DLT1_2x14_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-28P-DLT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +28 +28 +Connector_JAE +JAE_LY20-28P-DT1_2x14_P2.00mm_Vertical +Molex LY 20 series connector, LY20-28P-DT1, 14 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +28 +28 +Connector_JAE +JAE_LY20-30P-DLT1_2x15_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-30P-DLT1, 15 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +30 +30 +Connector_JAE +JAE_LY20-30P-DT1_2x15_P2.00mm_Vertical +Molex LY 20 series connector, LY20-30P-DT1, 15 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +30 +30 +Connector_JAE +JAE_LY20-32P-DLT1_2x16_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-32P-DLT1, 16 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +32 +32 +Connector_JAE +JAE_LY20-32P-DT1_2x16_P2.00mm_Vertical +Molex LY 20 series connector, LY20-32P-DT1, 16 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +32 +32 +Connector_JAE +JAE_LY20-34P-DLT1_2x17_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-34P-DLT1, 17 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +34 +34 +Connector_JAE +JAE_LY20-34P-DT1_2x17_P2.00mm_Vertical +Molex LY 20 series connector, LY20-34P-DT1, 17 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +34 +34 +Connector_JAE +JAE_LY20-36P-DLT1_2x18_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-36P-DLT1, 18 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +36 +36 +Connector_JAE +JAE_LY20-36P-DT1_2x18_P2.00mm_Vertical +Molex LY 20 series connector, LY20-36P-DT1, 18 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +36 +36 +Connector_JAE +JAE_LY20-38P-DLT1_2x19_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-38P-DLT1, 19 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +38 +38 +Connector_JAE +JAE_LY20-38P-DT1_2x19_P2.00mm_Vertical +Molex LY 20 series connector, LY20-38P-DT1, 19 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +38 +38 +Connector_JAE +JAE_LY20-40P-DLT1_2x20_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-40P-DLT1, 20 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +40 +40 +Connector_JAE +JAE_LY20-40P-DT1_2x20_P2.00mm_Vertical +Molex LY 20 series connector, LY20-40P-DT1, 20 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +40 +40 +Connector_JAE +JAE_LY20-42P-DLT1_2x21_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-42P-DLT1, 21 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +42 +42 +Connector_JAE +JAE_LY20-42P-DT1_2x21_P2.00mm_Vertical +Molex LY 20 series connector, LY20-42P-DT1, 21 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +42 +42 +Connector_JAE +JAE_LY20-44P-DLT1_2x22_P2.00mm_Horizontal +Molex LY 20 series connector, LY20-44P-DLT1, 22 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ038187.pdf), generated with kicad-footprint-generator +connector JAE top entry +0 +44 +44 +Connector_JAE +JAE_LY20-44P-DT1_2x22_P2.00mm_Vertical +Molex LY 20 series connector, LY20-44P-DT1, 22 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator +connector JAE side entry +0 +44 +44 +Connector_JAE +JAE_MM70-314-310B1 +http://www.heilind.com/marketing/documents/jae/JAE_MM70.pdf +connector JAE MXM +0 +280 +279 +Connector_JAE +JAE_SIM_Card_SF72S006 +SIM Card, Push-Push, https://www.jae.com/direct/topics/topics_file_download/topics_id=68892&ext_no=06&index=0&_lang=en&v=202003111511468456809 +SIM Card with Detect Switch +0 +18 +9 +Connector_JST +JST_ACH_BM01B-ACHSS-A-GAN-ETF_1x01-1MP_P1.20mm_Vertical +JST ACH series connector, BM01B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +3 +2 +Connector_JST +JST_ACH_BM02B-ACHSS-GAN-ETF_1x02-1MP_P1.20mm_Vertical +JST ACH series connector, BM02B-ACHSS-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +4 +3 +Connector_JST +JST_ACH_BM03B-ACHSS-GAN-ETF_1x03-1MP_P1.20mm_Vertical +JST ACH series connector, BM03B-ACHSS-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +5 +4 +Connector_JST +JST_ACH_BM04B-ACHSS-A-GAN-ETF_1x04-1MP_P1.20mm_Vertical +JST ACH series connector, BM04B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +6 +5 +Connector_JST +JST_ACH_BM05B-ACHSS-A-GAN-ETF_1x05-1MP_P1.20mm_Vertical +JST ACH series connector, BM05B-ACHSS-A-GAN-ETF (http://www.jst-mfg.com/product/pdf/eng/eACH.pdf), generated with kicad-footprint-generator +connector JST ACH vertical +0 +7 +6 +Connector_JST +JST_AUH_BM03B-AUHKS-GA-TB_1x03-1MP_P1.50mm_Vertical +JST AUH series connector, BM03B-AUHKS-GA-TB (http://www.jst-mfg.com/product/pdf/eng/eAUH.pdf), generated with kicad-footprint-generator +connector JST AUH side entry +0 +5 +4 +Connector_JST +JST_AUH_BM05B-AUHKS-GA-TB_1x05-1MP_P1.50mm_Vertical +JST AUH series connector, BM05B-AUHKS-GA-TB (http://www.jst-mfg.com/product/pdf/eng/eAUH.pdf), generated with kicad-footprint-generator +connector JST AUH side entry +0 +7 +6 +Connector_JST +JST_EH_B2B-EH-A_1x02_P2.50mm_Vertical +JST EH series connector, B2B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +2 +2 +Connector_JST +JST_EH_B3B-EH-A_1x03_P2.50mm_Vertical +JST EH series connector, B3B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +3 +3 +Connector_JST +JST_EH_B4B-EH-A_1x04_P2.50mm_Vertical +JST EH series connector, B4B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +4 +4 +Connector_JST +JST_EH_B5B-EH-A_1x05_P2.50mm_Vertical +JST EH series connector, B5B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +5 +5 +Connector_JST +JST_EH_B6B-EH-A_1x06_P2.50mm_Vertical +JST EH series connector, B6B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +6 +6 +Connector_JST +JST_EH_B7B-EH-A_1x07_P2.50mm_Vertical +JST EH series connector, B7B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +7 +7 +Connector_JST +JST_EH_B8B-EH-A_1x08_P2.50mm_Vertical +JST EH series connector, B8B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +8 +8 +Connector_JST +JST_EH_B9B-EH-A_1x09_P2.50mm_Vertical +JST EH series connector, B9B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH vertical +0 +9 +9 +Connector_JST +JST_EH_B10B-EH-A_1x10_P2.50mm_Vertical +JST EH series connector, B10B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +10 +10 +Connector_JST +JST_EH_B11B-EH-A_1x11_P2.50mm_Vertical +JST EH series connector, B11B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +11 +11 +Connector_JST +JST_EH_B12B-EH-A_1x12_P2.50mm_Vertical +JST EH series connector, B12B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +12 +12 +Connector_JST +JST_EH_B13B-EH-A_1x13_P2.50mm_Vertical +JST EH series connector, B13B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +13 +13 +Connector_JST +JST_EH_B14B-EH-A_1x14_P2.50mm_Vertical +JST EH series connector, B14B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +14 +14 +Connector_JST +JST_EH_B15B-EH-A_1x15_P2.50mm_Vertical +JST EH series connector, B15B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH side entry +0 +15 +15 +Connector_JST +JST_EH_S2B-EH_1x02_P2.50mm_Horizontal +JST EH series connector, S2B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +2 +2 +Connector_JST +JST_EH_S3B-EH_1x03_P2.50mm_Horizontal +JST EH series connector, S3B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +3 +3 +Connector_JST +JST_EH_S4B-EH_1x04_P2.50mm_Horizontal +JST EH series connector, S4B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +4 +4 +Connector_JST +JST_EH_S5B-EH_1x05_P2.50mm_Horizontal +JST EH series connector, S5B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +5 +5 +Connector_JST +JST_EH_S6B-EH_1x06_P2.50mm_Horizontal +JST EH series connector, S6B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +6 +6 +Connector_JST +JST_EH_S7B-EH_1x07_P2.50mm_Horizontal +JST EH series connector, S7B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +7 +7 +Connector_JST +JST_EH_S8B-EH_1x08_P2.50mm_Horizontal +JST EH series connector, S8B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +8 +8 +Connector_JST +JST_EH_S9B-EH_1x09_P2.50mm_Horizontal +JST EH series connector, S9B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH horizontal +0 +9 +9 +Connector_JST +JST_EH_S10B-EH_1x10_P2.50mm_Horizontal +JST EH series connector, S10B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +10 +10 +Connector_JST +JST_EH_S11B-EH_1x11_P2.50mm_Horizontal +JST EH series connector, S11B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +11 +11 +Connector_JST +JST_EH_S12B-EH_1x12_P2.50mm_Horizontal +JST EH series connector, S12B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +12 +12 +Connector_JST +JST_EH_S13B-EH_1x13_P2.50mm_Horizontal +JST EH series connector, S13B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +13 +13 +Connector_JST +JST_EH_S14B-EH_1x14_P2.50mm_Horizontal +JST EH series connector, S14B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +14 +14 +Connector_JST +JST_EH_S15B-EH_1x15_P2.50mm_Horizontal +JST EH series connector, S15B-EH (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator +connector JST EH top entry +0 +15 +15 +Connector_JST +JST_GH_BM02B-GHS-TBT_1x02-1MP_P1.25mm_Vertical +JST GH series connector, BM02B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +4 +3 +Connector_JST +JST_GH_BM03B-GHS-TBT_1x03-1MP_P1.25mm_Vertical +JST GH series connector, BM03B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +5 +4 +Connector_JST +JST_GH_BM04B-GHS-TBT_1x04-1MP_P1.25mm_Vertical +JST GH series connector, BM04B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +6 +5 +Connector_JST +JST_GH_BM05B-GHS-TBT_1x05-1MP_P1.25mm_Vertical +JST GH series connector, BM05B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +7 +6 +Connector_JST +JST_GH_BM06B-GHS-TBT_1x06-1MP_P1.25mm_Vertical +JST GH series connector, BM06B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +8 +7 +Connector_JST +JST_GH_BM07B-GHS-TBT_1x07-1MP_P1.25mm_Vertical +JST GH series connector, BM07B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +9 +8 +Connector_JST +JST_GH_BM08B-GHS-TBT_1x08-1MP_P1.25mm_Vertical +JST GH series connector, BM08B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +10 +9 +Connector_JST +JST_GH_BM09B-GHS-TBT_1x09-1MP_P1.25mm_Vertical +JST GH series connector, BM09B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +11 +10 +Connector_JST +JST_GH_BM10B-GHS-TBT_1x10-1MP_P1.25mm_Vertical +JST GH series connector, BM10B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +12 +11 +Connector_JST +JST_GH_BM11B-GHS-TBT_1x11-1MP_P1.25mm_Vertical +JST GH series connector, BM11B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +13 +12 +Connector_JST +JST_GH_BM12B-GHS-TBT_1x12-1MP_P1.25mm_Vertical +JST GH series connector, BM12B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +14 +13 +Connector_JST +JST_GH_BM13B-GHS-TBT_1x13-1MP_P1.25mm_Vertical +JST GH series connector, BM13B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +15 +14 +Connector_JST +JST_GH_BM14B-GHS-TBT_1x14-1MP_P1.25mm_Vertical +JST GH series connector, BM14B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +16 +15 +Connector_JST +JST_GH_BM15B-GHS-TBT_1x15-1MP_P1.25mm_Vertical +JST GH series connector, BM15B-GHS-TBT (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH side entry +0 +17 +16 +Connector_JST +JST_GH_SM02B-GHS-TB_1x02-1MP_P1.25mm_Horizontal +JST GH series connector, SM02B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +4 +3 +Connector_JST +JST_GH_SM03B-GHS-TB_1x03-1MP_P1.25mm_Horizontal +JST GH series connector, SM03B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +5 +4 +Connector_JST +JST_GH_SM04B-GHS-TB_1x04-1MP_P1.25mm_Horizontal +JST GH series connector, SM04B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +6 +5 +Connector_JST +JST_GH_SM05B-GHS-TB_1x05-1MP_P1.25mm_Horizontal +JST GH series connector, SM05B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +7 +6 +Connector_JST +JST_GH_SM06B-GHS-TB_1x06-1MP_P1.25mm_Horizontal +JST GH series connector, SM06B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +8 +7 +Connector_JST +JST_GH_SM07B-GHS-TB_1x07-1MP_P1.25mm_Horizontal +JST GH series connector, SM07B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +9 +8 +Connector_JST +JST_GH_SM08B-GHS-TB_1x08-1MP_P1.25mm_Horizontal +JST GH series connector, SM08B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +10 +9 +Connector_JST +JST_GH_SM09B-GHS-TB_1x09-1MP_P1.25mm_Horizontal +JST GH series connector, SM09B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +11 +10 +Connector_JST +JST_GH_SM10B-GHS-TB_1x10-1MP_P1.25mm_Horizontal +JST GH series connector, SM10B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +12 +11 +Connector_JST +JST_GH_SM11B-GHS-TB_1x11-1MP_P1.25mm_Horizontal +JST GH series connector, SM11B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +13 +12 +Connector_JST +JST_GH_SM12B-GHS-TB_1x12-1MP_P1.25mm_Horizontal +JST GH series connector, SM12B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +14 +13 +Connector_JST +JST_GH_SM13B-GHS-TB_1x13-1MP_P1.25mm_Horizontal +JST GH series connector, SM13B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +15 +14 +Connector_JST +JST_GH_SM14B-GHS-TB_1x14-1MP_P1.25mm_Horizontal +JST GH series connector, SM14B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +16 +15 +Connector_JST +JST_GH_SM15B-GHS-TB_1x15-1MP_P1.25mm_Horizontal +JST GH series connector, SM15B-GHS-TB (http://www.jst-mfg.com/product/pdf/eng/eGH.pdf), generated with kicad-footprint-generator +connector JST GH top entry +0 +17 +16 +Connector_JST +JST_J2100_B06B-J21DK-GGXR_2x03_P2.50x4.00mm_Vertical +JST J2100 series connector, B06B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +8 +6 +Connector_JST +JST_J2100_B08B-J21DK-GGXR_2x04_P2.50x4.00mm_Vertical +JST J2100 series connector, B08B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +10 +8 +Connector_JST +JST_J2100_B10B-J21DK-GGXR_2x05_P2.50x4.00mm_Vertical +JST J2100 series connector, B10B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +12 +10 +Connector_JST +JST_J2100_B12B-J21DK-GGXR_2x06_P2.50x4.00mm_Vertical +JST J2100 series connector, B12B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +14 +12 +Connector_JST +JST_J2100_B16B-J21DK-GGXR_2x08_P2.50x4.00mm_Vertical +JST J2100 series connector, B16B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +18 +16 +Connector_JST +JST_J2100_B20B-J21DK-GGXR_2x10_P2.50x4.00mm_Vertical +JST J2100 series connector, B20B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 vertical +0 +22 +20 +Connector_JST +JST_J2100_S06B-J21DK-GGXR_2x03_P2.50mm_Horizontal +JST J2100 series connector, S06B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +7 +6 +Connector_JST +JST_J2100_S08B-J21DK-GGXR_2x04_P2.50mm_Horizontal +JST J2100 series connector, S08B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +10 +8 +Connector_JST +JST_J2100_S10B-J21DK-GGXR_2x05_P2.50mm_Horizontal +JST J2100 series connector, S10B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +12 +10 +Connector_JST +JST_J2100_S12B-J21DK-GGXR_2x06_P2.50mm_Horizontal +JST J2100 series connector, S12B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +14 +12 +Connector_JST +JST_J2100_S16B-J21DK-GGXR_2x08_P2.50mm_Horizontal +JST J2100 series connector, S16B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +18 +16 +Connector_JST +JST_J2100_S20B-J21DK-GGXR_2x10_P2.50mm_Horizontal +JST J2100 series connector, S20B-J21DK-GGXR (http://www.jst-mfg.com/product/pdf/eng/eJFA-J2000.pdf), generated with kicad-footprint-generator +connector JST J2100 horizontal +0 +22 +20 +Connector_JST +JST_JWPF_B02B-JWPF-SK-R_1x02_P2.00mm_Vertical +JST JWPF series connector, B02B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +2 +2 +Connector_JST +JST_JWPF_B03B-JWPF-SK-R_1x03_P2.00mm_Vertical +JST JWPF series connector, B03B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +3 +3 +Connector_JST +JST_JWPF_B04B-JWPF-SK-R_1x04_P2.00mm_Vertical +JST JWPF series connector, B04B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +4 +4 +Connector_JST +JST_JWPF_B06B-JWPF-SK-R_2x03_P2.00mm_Vertical +JST JWPF series connector, B06B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +6 +6 +Connector_JST +JST_JWPF_B08B-JWPF-SK-R_2x04_P2.00mm_Vertical +JST JWPF series connector, B08B-JWPF-SK-R (http://www.jst-mfg.com/product/pdf/eng/eJWPF1.pdf), generated with kicad-footprint-generator +connector JST JWPF side entry +0 +8 +8 +Connector_JST +JST_LEA_SM02B-LEASS-TF_1x02-1MP_P4.20mm_Horizontal +JST LEA series connector, SM02B-LEASS-TF (http://www.jst-mfg.com/product/pdf/eng/eLEA.pdf), generated with kicad-footprint-generator +connector JST LEA top entry +0 +4 +3 +Connector_JST +JST_NV_B02P-NV_1x02_P5.00mm_Vertical +JST NV series connector, B02P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +2 +2 +Connector_JST +JST_NV_B03P-NV_1x03_P5.00mm_Vertical +JST NV series connector, B03P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +3 +3 +Connector_JST +JST_NV_B04P-NV_1x04_P5.00mm_Vertical +JST NV series connector, B04P-NV (http://www.jst-mfg.com/product/pdf/eng/eNV.pdf), generated with kicad-footprint-generator +connector JST NV side entry +0 +4 +4 +Connector_JST +JST_PHD_B8B-PHDSS_2x04_P2.00mm_Vertical +JST PHD series connector, B8B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +8 +8 +Connector_JST +JST_PHD_B10B-PHDSS_2x05_P2.00mm_Vertical +JST PHD series connector, B10B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +10 +10 +Connector_JST +JST_PHD_B12B-PHDSS_2x06_P2.00mm_Vertical +JST PHD series connector, B12B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +12 +12 +Connector_JST +JST_PHD_B14B-PHDSS_2x07_P2.00mm_Vertical +JST PHD series connector, B14B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +14 +14 +Connector_JST +JST_PHD_B16B-PHDSS_2x08_P2.00mm_Vertical +JST PHD series connector, B16B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +16 +16 +Connector_JST +JST_PHD_B18B-PHDSS_2x09_P2.00mm_Vertical +JST PHD series connector, B18B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +18 +18 +Connector_JST +JST_PHD_B20B-PHDSS_2x10_P2.00mm_Vertical +JST PHD series connector, B20B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +20 +20 +Connector_JST +JST_PHD_B22B-PHDSS_2x11_P2.00mm_Vertical +JST PHD series connector, B22B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +22 +22 +Connector_JST +JST_PHD_B24B-PHDSS_2x12_P2.00mm_Vertical +JST PHD series connector, B24B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +24 +24 +Connector_JST +JST_PHD_B26B-PHDSS_2x13_P2.00mm_Vertical +JST PHD series connector, B26B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +26 +26 +Connector_JST +JST_PHD_B28B-PHDSS_2x14_P2.00mm_Vertical +JST PHD series connector, B28B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +28 +28 +Connector_JST +JST_PHD_B30B-PHDSS_2x15_P2.00mm_Vertical +JST PHD series connector, B30B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +30 +30 +Connector_JST +JST_PHD_B32B-PHDSS_2x16_P2.00mm_Vertical +JST PHD series connector, B32B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +32 +32 +Connector_JST +JST_PHD_B34B-PHDSS_2x17_P2.00mm_Vertical +JST PHD series connector, B34B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD vertical +0 +34 +34 +Connector_JST +JST_PHD_S8B-PHDSS_2x04_P2.00mm_Horizontal +JST PHD series connector, S8B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +8 +8 +Connector_JST +JST_PHD_S10B-PHDSS_2x05_P2.00mm_Horizontal +JST PHD series connector, S10B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +10 +10 +Connector_JST +JST_PHD_S12B-PHDSS_2x06_P2.00mm_Horizontal +JST PHD series connector, S12B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +12 +12 +Connector_JST +JST_PHD_S14B-PHDSS_2x07_P2.00mm_Horizontal +JST PHD series connector, S14B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +14 +14 +Connector_JST +JST_PHD_S16B-PHDSS_2x08_P2.00mm_Horizontal +JST PHD series connector, S16B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +16 +16 +Connector_JST +JST_PHD_S18B-PHDSS_2x09_P2.00mm_Horizontal +JST PHD series connector, S18B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +18 +18 +Connector_JST +JST_PHD_S20B-PHDSS_2x10_P2.00mm_Horizontal +JST PHD series connector, S20B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +20 +20 +Connector_JST +JST_PHD_S22B-PHDSS_2x11_P2.00mm_Horizontal +JST PHD series connector, S22B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +22 +22 +Connector_JST +JST_PHD_S24B-PHDSS_2x12_P2.00mm_Horizontal +JST PHD series connector, S24B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +24 +24 +Connector_JST +JST_PHD_S26B-PHDSS_2x13_P2.00mm_Horizontal +JST PHD series connector, S26B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +26 +26 +Connector_JST +JST_PHD_S28B-PHDSS_2x14_P2.00mm_Horizontal +JST PHD series connector, S28B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +28 +28 +Connector_JST +JST_PHD_S30B-PHDSS_2x15_P2.00mm_Horizontal +JST PHD series connector, S30B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +30 +30 +Connector_JST +JST_PHD_S32B-PHDSS_2x16_P2.00mm_Horizontal +JST PHD series connector, S32B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +32 +32 +Connector_JST +JST_PHD_S34B-PHDSS_2x17_P2.00mm_Horizontal +JST PHD series connector, S34B-PHDSS (http://www.jst-mfg.com/product/pdf/eng/ePHD.pdf), generated with kicad-footprint-generator +connector JST PHD horizontal +0 +34 +34 +Connector_JST +JST_PH_B2B-PH-K_1x02_P2.00mm_Vertical +JST PH series connector, B2B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +2 +2 +Connector_JST +JST_PH_B2B-PH-SM4-TB_1x02-1MP_P2.00mm_Vertical +JST PH series connector, B2B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +4 +3 +Connector_JST +JST_PH_B3B-PH-K_1x03_P2.00mm_Vertical +JST PH series connector, B3B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +3 +3 +Connector_JST +JST_PH_B3B-PH-SM4-TB_1x03-1MP_P2.00mm_Vertical +JST PH series connector, B3B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +5 +4 +Connector_JST +JST_PH_B4B-PH-K_1x04_P2.00mm_Vertical +JST PH series connector, B4B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +4 +4 +Connector_JST +JST_PH_B4B-PH-SM4-TB_1x04-1MP_P2.00mm_Vertical +JST PH series connector, B4B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +6 +5 +Connector_JST +JST_PH_B5B-PH-K_1x05_P2.00mm_Vertical +JST PH series connector, B5B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +5 +5 +Connector_JST +JST_PH_B5B-PH-SM4-TB_1x05-1MP_P2.00mm_Vertical +JST PH series connector, B5B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +7 +6 +Connector_JST +JST_PH_B6B-PH-K_1x06_P2.00mm_Vertical +JST PH series connector, B6B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +6 +6 +Connector_JST +JST_PH_B6B-PH-SM4-TB_1x06-1MP_P2.00mm_Vertical +JST PH series connector, B6B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +8 +7 +Connector_JST +JST_PH_B7B-PH-K_1x07_P2.00mm_Vertical +JST PH series connector, B7B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +7 +7 +Connector_JST +JST_PH_B7B-PH-SM4-TB_1x07-1MP_P2.00mm_Vertical +JST PH series connector, B7B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +9 +8 +Connector_JST +JST_PH_B8B-PH-K_1x08_P2.00mm_Vertical +JST PH series connector, B8B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +8 +8 +Connector_JST +JST_PH_B8B-PH-SM4-TB_1x08-1MP_P2.00mm_Vertical +JST PH series connector, B8B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +10 +9 +Connector_JST +JST_PH_B9B-PH-K_1x09_P2.00mm_Vertical +JST PH series connector, B9B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +9 +9 +Connector_JST +JST_PH_B9B-PH-SM4-TB_1x09-1MP_P2.00mm_Vertical +JST PH series connector, B9B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +11 +10 +Connector_JST +JST_PH_B10B-PH-K_1x10_P2.00mm_Vertical +JST PH series connector, B10B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +10 +10 +Connector_JST +JST_PH_B10B-PH-SM4-TB_1x10-1MP_P2.00mm_Vertical +JST PH series connector, B10B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +12 +11 +Connector_JST +JST_PH_B11B-PH-K_1x11_P2.00mm_Vertical +JST PH series connector, B11B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +11 +11 +Connector_JST +JST_PH_B11B-PH-SM4-TB_1x11-1MP_P2.00mm_Vertical +JST PH series connector, B11B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +13 +12 +Connector_JST +JST_PH_B12B-PH-K_1x12_P2.00mm_Vertical +JST PH series connector, B12B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +12 +12 +Connector_JST +JST_PH_B12B-PH-SM4-TB_1x12-1MP_P2.00mm_Vertical +JST PH series connector, B12B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +14 +13 +Connector_JST +JST_PH_B13B-PH-K_1x13_P2.00mm_Vertical +JST PH series connector, B13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +13 +13 +Connector_JST +JST_PH_B13B-PH-SM4-TB_1x13-1MP_P2.00mm_Vertical +JST PH series connector, B13B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +15 +14 +Connector_JST +JST_PH_B14B-PH-K_1x14_P2.00mm_Vertical +JST PH series connector, B14B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +14 +14 +Connector_JST +JST_PH_B14B-PH-SM4-TB_1x14-1MP_P2.00mm_Vertical +JST PH series connector, B14B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +16 +15 +Connector_JST +JST_PH_B15B-PH-K_1x15_P2.00mm_Vertical +JST PH series connector, B15B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +15 +15 +Connector_JST +JST_PH_B15B-PH-SM4-TB_1x15-1MP_P2.00mm_Vertical +JST PH series connector, B15B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +17 +16 +Connector_JST +JST_PH_B16B-PH-K_1x16_P2.00mm_Vertical +JST PH series connector, B16B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +16 +16 +Connector_JST +JST_PH_B16B-PH-SM4-TB_1x16-1MP_P2.00mm_Vertical +JST PH series connector, B16B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH side entry +0 +18 +17 +Connector_JST +JST_PH_S2B-PH-K_1x02_P2.00mm_Horizontal +JST PH series connector, S2B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +2 +2 +Connector_JST +JST_PH_S2B-PH-SM4-TB_1x02-1MP_P2.00mm_Horizontal +JST PH series connector, S2B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +4 +3 +Connector_JST +JST_PH_S3B-PH-K_1x03_P2.00mm_Horizontal +JST PH series connector, S3B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +3 +3 +Connector_JST +JST_PH_S3B-PH-SM4-TB_1x03-1MP_P2.00mm_Horizontal +JST PH series connector, S3B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +5 +4 +Connector_JST +JST_PH_S4B-PH-K_1x04_P2.00mm_Horizontal +JST PH series connector, S4B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +4 +4 +Connector_JST +JST_PH_S4B-PH-SM4-TB_1x04-1MP_P2.00mm_Horizontal +JST PH series connector, S4B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +6 +5 +Connector_JST +JST_PH_S5B-PH-K_1x05_P2.00mm_Horizontal +JST PH series connector, S5B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +5 +5 +Connector_JST +JST_PH_S5B-PH-SM4-TB_1x05-1MP_P2.00mm_Horizontal +JST PH series connector, S5B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +7 +6 +Connector_JST +JST_PH_S6B-PH-K_1x06_P2.00mm_Horizontal +JST PH series connector, S6B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +6 +6 +Connector_JST +JST_PH_S6B-PH-SM4-TB_1x06-1MP_P2.00mm_Horizontal +JST PH series connector, S6B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +8 +7 +Connector_JST +JST_PH_S7B-PH-K_1x07_P2.00mm_Horizontal +JST PH series connector, S7B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +7 +7 +Connector_JST +JST_PH_S7B-PH-SM4-TB_1x07-1MP_P2.00mm_Horizontal +JST PH series connector, S7B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +9 +8 +Connector_JST +JST_PH_S8B-PH-K_1x08_P2.00mm_Horizontal +JST PH series connector, S8B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +8 +8 +Connector_JST +JST_PH_S8B-PH-SM4-TB_1x08-1MP_P2.00mm_Horizontal +JST PH series connector, S8B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +10 +9 +Connector_JST +JST_PH_S9B-PH-K_1x09_P2.00mm_Horizontal +JST PH series connector, S9B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +9 +9 +Connector_JST +JST_PH_S9B-PH-SM4-TB_1x09-1MP_P2.00mm_Horizontal +JST PH series connector, S9B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +11 +10 +Connector_JST +JST_PH_S10B-PH-K_1x10_P2.00mm_Horizontal +JST PH series connector, S10B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +10 +10 +Connector_JST +JST_PH_S10B-PH-SM4-TB_1x10-1MP_P2.00mm_Horizontal +JST PH series connector, S10B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +12 +11 +Connector_JST +JST_PH_S11B-PH-K_1x11_P2.00mm_Horizontal +JST PH series connector, S11B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +11 +11 +Connector_JST +JST_PH_S11B-PH-SM4-TB_1x11-1MP_P2.00mm_Horizontal +JST PH series connector, S11B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +13 +12 +Connector_JST +JST_PH_S12B-PH-K_1x12_P2.00mm_Horizontal +JST PH series connector, S12B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +12 +12 +Connector_JST +JST_PH_S12B-PH-SM4-TB_1x12-1MP_P2.00mm_Horizontal +JST PH series connector, S12B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +14 +13 +Connector_JST +JST_PH_S13B-PH-K_1x13_P2.00mm_Horizontal +JST PH series connector, S13B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +13 +13 +Connector_JST +JST_PH_S13B-PH-SM4-TB_1x13-1MP_P2.00mm_Horizontal +JST PH series connector, S13B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +15 +14 +Connector_JST +JST_PH_S14B-PH-K_1x14_P2.00mm_Horizontal +JST PH series connector, S14B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +14 +14 +Connector_JST +JST_PH_S14B-PH-SM4-TB_1x14-1MP_P2.00mm_Horizontal +JST PH series connector, S14B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +16 +15 +Connector_JST +JST_PH_S15B-PH-K_1x15_P2.00mm_Horizontal +JST PH series connector, S15B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +15 +15 +Connector_JST +JST_PH_S15B-PH-SM4-TB_1x15-1MP_P2.00mm_Horizontal +JST PH series connector, S15B-PH-SM4-TB (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +17 +16 +Connector_JST +JST_PH_S16B-PH-K_1x16_P2.00mm_Horizontal +JST PH series connector, S16B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator +connector JST PH top entry +0 +16 +16 +Connector_JST +JST_PUD_B08B-PUDSS_2x04_P2.00mm_Vertical +JST PUD series connector, B08B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +8 +8 +Connector_JST +JST_PUD_B10B-PUDSS_2x05_P2.00mm_Vertical +JST PUD series connector, B10B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +10 +10 +Connector_JST +JST_PUD_B12B-PUDSS_2x06_P2.00mm_Vertical +JST PUD series connector, B12B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +12 +12 +Connector_JST +JST_PUD_B14B-PUDSS_2x07_P2.00mm_Vertical +JST PUD series connector, B14B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +14 +14 +Connector_JST +JST_PUD_B16B-PUDSS_2x08_P2.00mm_Vertical +JST PUD series connector, B16B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +16 +16 +Connector_JST +JST_PUD_B18B-PUDSS_2x09_P2.00mm_Vertical +JST PUD series connector, B18B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +18 +18 +Connector_JST +JST_PUD_B20B-PUDSS_2x10_P2.00mm_Vertical +JST PUD series connector, B20B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +20 +20 +Connector_JST +JST_PUD_B22B-PUDSS_2x11_P2.00mm_Vertical +JST PUD series connector, B22B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +22 +22 +Connector_JST +JST_PUD_B24B-PUDSS_2x12_P2.00mm_Vertical +JST PUD series connector, B24B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +24 +24 +Connector_JST +JST_PUD_B26B-PUDSS_2x13_P2.00mm_Vertical +JST PUD series connector, B26B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +26 +26 +Connector_JST +JST_PUD_B28B-PUDSS_2x14_P2.00mm_Vertical +JST PUD series connector, B28B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +28 +28 +Connector_JST +JST_PUD_B30B-PUDSS_2x15_P2.00mm_Vertical +JST PUD series connector, B30B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +30 +30 +Connector_JST +JST_PUD_B32B-PUDSS_2x16_P2.00mm_Vertical +JST PUD series connector, B32B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +32 +32 +Connector_JST +JST_PUD_B34B-PUDSS_2x17_P2.00mm_Vertical +JST PUD series connector, B34B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +34 +34 +Connector_JST +JST_PUD_B36B-PUDSS_2x18_P2.00mm_Vertical +JST PUD series connector, B36B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +36 +36 +Connector_JST +JST_PUD_B38B-PUDSS_2x19_P2.00mm_Vertical +JST PUD series connector, B38B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +38 +38 +Connector_JST +JST_PUD_B40B-PUDSS_2x20_P2.00mm_Vertical +JST PUD series connector, B40B-PUDSS (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD side entry +0 +40 +40 +Connector_JST +JST_PUD_S08B-PUDSS-1_2x04_P2.00mm_Horizontal +JST PUD series connector, S08B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +8 +8 +Connector_JST +JST_PUD_S10B-PUDSS-1_2x05_P2.00mm_Horizontal +JST PUD series connector, S10B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +10 +10 +Connector_JST +JST_PUD_S12B-PUDSS-1_2x06_P2.00mm_Horizontal +JST PUD series connector, S12B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +12 +12 +Connector_JST +JST_PUD_S14B-PUDSS-1_2x07_P2.00mm_Horizontal +JST PUD series connector, S14B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +14 +14 +Connector_JST +JST_PUD_S16B-PUDSS-1_2x08_P2.00mm_Horizontal +JST PUD series connector, S16B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +16 +16 +Connector_JST +JST_PUD_S18B-PUDSS-1_2x09_P2.00mm_Horizontal +JST PUD series connector, S18B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +18 +18 +Connector_JST +JST_PUD_S20B-PUDSS-1_2x10_P2.00mm_Horizontal +JST PUD series connector, S20B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +20 +20 +Connector_JST +JST_PUD_S22B-PUDSS-1_2x11_P2.00mm_Horizontal +JST PUD series connector, S22B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +22 +22 +Connector_JST +JST_PUD_S24B-PUDSS-1_2x12_P2.00mm_Horizontal +JST PUD series connector, S24B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +24 +24 +Connector_JST +JST_PUD_S26B-PUDSS-1_2x13_P2.00mm_Horizontal +JST PUD series connector, S26B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +26 +26 +Connector_JST +JST_PUD_S28B-PUDSS-1_2x14_P2.00mm_Horizontal +JST PUD series connector, S28B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +28 +28 +Connector_JST +JST_PUD_S30B-PUDSS-1_2x15_P2.00mm_Horizontal +JST PUD series connector, S30B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +30 +30 +Connector_JST +JST_PUD_S32B-PUDSS-1_2x16_P2.00mm_Horizontal +JST PUD series connector, S32B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +32 +32 +Connector_JST +JST_PUD_S34B-PUDSS-1_2x17_P2.00mm_Horizontal +JST PUD series connector, S34B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +34 +34 +Connector_JST +JST_PUD_S36B-PUDSS-1_2x18_P2.00mm_Horizontal +JST PUD series connector, S36B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +36 +36 +Connector_JST +JST_PUD_S38B-PUDSS-1_2x19_P2.00mm_Horizontal +JST PUD series connector, S38B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +38 +38 +Connector_JST +JST_PUD_S40B-PUDSS-1_2x20_P2.00mm_Horizontal +JST PUD series connector, S40B-PUDSS-1 (http://www.jst-mfg.com/product/pdf/eng/ePUD.pdf), generated with kicad-footprint-generator +connector JST PUD top entry +0 +40 +40 +Connector_JST +JST_SFH_SM02B-SFHRS-TF_1x02-1MP_P4.20mm_Horizontal +JST SFH series connector, SM02B-SFHRS-TF (http://www.jst-mfg.com/product/pdf/eng/eSFH.pdf), generated with kicad-footprint-generator +connector JST SFH horizontal +0 +4 +3 +Connector_JST +JST_SHL_SM02B-SHLS-TF_1x02-1MP_P1.00mm_Horizontal +JST SHL series connector, SM02B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +4 +3 +Connector_JST +JST_SHL_SM05B-SHLS-TF_1x05-1MP_P1.00mm_Horizontal +JST SHL series connector, SM05B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +7 +6 +Connector_JST +JST_SHL_SM06B-SHLS-TF_1x06-1MP_P1.00mm_Horizontal +JST SHL series connector, SM06B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +8 +7 +Connector_JST +JST_SHL_SM07B-SHLS-TF_1x07-1MP_P1.00mm_Horizontal +JST SHL series connector, SM07B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +9 +8 +Connector_JST +JST_SHL_SM08B-SHLS-TF_1x08-1MP_P1.00mm_Horizontal +JST SHL series connector, SM08B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +10 +9 +Connector_JST +JST_SHL_SM10B-SHLS-TF_1x10-1MP_P1.00mm_Horizontal +JST SHL series connector, SM10B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +12 +11 +Connector_JST +JST_SHL_SM11B-SHLS-TF_1x11-1MP_P1.00mm_Horizontal +JST SHL series connector, SM11B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +13 +12 +Connector_JST +JST_SHL_SM12B-SHLS-TF_1x12-1MP_P1.00mm_Horizontal +JST SHL series connector, SM12B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +14 +13 +Connector_JST +JST_SHL_SM14B-SHLS-TF_1x14-1MP_P1.00mm_Horizontal +JST SHL series connector, SM14B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +16 +15 +Connector_JST +JST_SHL_SM16B-SHLS-TF_1x16-1MP_P1.00mm_Horizontal +JST SHL series connector, SM16B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +18 +17 +Connector_JST +JST_SHL_SM20B-SHLS-TF_1x20-1MP_P1.00mm_Horizontal +JST SHL series connector, SM20B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +22 +21 +Connector_JST +JST_SHL_SM22B-SHLS-TF_1x22-1MP_P1.00mm_Horizontal +JST SHL series connector, SM22B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +24 +23 +Connector_JST +JST_SHL_SM26B-SHLS-TF_1x26-1MP_P1.00mm_Horizontal +JST SHL series connector, SM26B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +28 +27 +Connector_JST +JST_SHL_SM30B-SHLS-TF_1x30-1MP_P1.00mm_Horizontal +JST SHL series connector, SM30B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator +connector JST SHL top entry +0 +32 +31 +Connector_JST +JST_SH_BM02B-SRSS-TB_1x02-1MP_P1.00mm_Vertical +JST SH series connector, BM02B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +4 +3 +Connector_JST +JST_SH_BM03B-SRSS-TB_1x03-1MP_P1.00mm_Vertical +JST SH series connector, BM03B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +5 +4 +Connector_JST +JST_SH_BM04B-SRSS-TB_1x04-1MP_P1.00mm_Vertical +JST SH series connector, BM04B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +6 +5 +Connector_JST +JST_SH_BM05B-SRSS-TB_1x05-1MP_P1.00mm_Vertical +JST SH series connector, BM05B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +7 +6 +Connector_JST +JST_SH_BM06B-SRSS-TB_1x06-1MP_P1.00mm_Vertical +JST SH series connector, BM06B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +8 +7 +Connector_JST +JST_SH_BM07B-SRSS-TB_1x07-1MP_P1.00mm_Vertical +JST SH series connector, BM07B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +9 +8 +Connector_JST +JST_SH_BM08B-SRSS-TB_1x08-1MP_P1.00mm_Vertical +JST SH series connector, BM08B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +10 +9 +Connector_JST +JST_SH_BM09B-SRSS-TB_1x09-1MP_P1.00mm_Vertical +JST SH series connector, BM09B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +11 +10 +Connector_JST +JST_SH_BM10B-SRSS-TB_1x10-1MP_P1.00mm_Vertical +JST SH series connector, BM10B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +12 +11 +Connector_JST +JST_SH_BM11B-SRSS-TB_1x11-1MP_P1.00mm_Vertical +JST SH series connector, BM11B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +13 +12 +Connector_JST +JST_SH_BM12B-SRSS-TB_1x12-1MP_P1.00mm_Vertical +JST SH series connector, BM12B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +14 +13 +Connector_JST +JST_SH_BM13B-SRSS-TB_1x13-1MP_P1.00mm_Vertical +JST SH series connector, BM13B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +15 +14 +Connector_JST +JST_SH_BM14B-SRSS-TB_1x14-1MP_P1.00mm_Vertical +JST SH series connector, BM14B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +16 +15 +Connector_JST +JST_SH_BM15B-SRSS-TB_1x15-1MP_P1.00mm_Vertical +JST SH series connector, BM15B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH side entry +0 +17 +16 +Connector_JST +JST_SH_SM02B-SRSS-TB_1x02-1MP_P1.00mm_Horizontal +JST SH series connector, SM02B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +4 +3 +Connector_JST +JST_SH_SM03B-SRSS-TB_1x03-1MP_P1.00mm_Horizontal +JST SH series connector, SM03B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +5 +4 +Connector_JST +JST_SH_SM04B-SRSS-TB_1x04-1MP_P1.00mm_Horizontal +JST SH series connector, SM04B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +6 +5 +Connector_JST +JST_SH_SM05B-SRSS-TB_1x05-1MP_P1.00mm_Horizontal +JST SH series connector, SM05B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +7 +6 +Connector_JST +JST_SH_SM06B-SRSS-TB_1x06-1MP_P1.00mm_Horizontal +JST SH series connector, SM06B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +8 +7 +Connector_JST +JST_SH_SM07B-SRSS-TB_1x07-1MP_P1.00mm_Horizontal +JST SH series connector, SM07B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +9 +8 +Connector_JST +JST_SH_SM08B-SRSS-TB_1x08-1MP_P1.00mm_Horizontal +JST SH series connector, SM08B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +10 +9 +Connector_JST +JST_SH_SM09B-SRSS-TB_1x09-1MP_P1.00mm_Horizontal +JST SH series connector, SM09B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +11 +10 +Connector_JST +JST_SH_SM10B-SRSS-TB_1x10-1MP_P1.00mm_Horizontal +JST SH series connector, SM10B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +12 +11 +Connector_JST +JST_SH_SM11B-SRSS-TB_1x11-1MP_P1.00mm_Horizontal +JST SH series connector, SM11B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +13 +12 +Connector_JST +JST_SH_SM12B-SRSS-TB_1x12-1MP_P1.00mm_Horizontal +JST SH series connector, SM12B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +14 +13 +Connector_JST +JST_SH_SM13B-SRSS-TB_1x13-1MP_P1.00mm_Horizontal +JST SH series connector, SM13B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +15 +14 +Connector_JST +JST_SH_SM14B-SRSS-TB_1x14-1MP_P1.00mm_Horizontal +JST SH series connector, SM14B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +16 +15 +Connector_JST +JST_SH_SM15B-SRSS-TB_1x15-1MP_P1.00mm_Horizontal +JST SH series connector, SM15B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +17 +16 +Connector_JST +JST_SH_SM20B-SRSS-TB_1x20-1MP_P1.00mm_Horizontal +JST SH series connector, SM20B-SRSS-TB (http://www.jst-mfg.com/product/pdf/eng/eSH.pdf), generated with kicad-footprint-generator +connector JST SH top entry +0 +22 +21 +Connector_JST +JST_SUR_BM02B-SURS-TF_1x02-1MP_P0.80mm_Vertical +JST SUR series connector, BM02B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +4 +3 +Connector_JST +JST_SUR_BM03B-SURS-TF_1x03-1MP_P0.80mm_Vertical +JST SUR series connector, BM03B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +5 +4 +Connector_JST +JST_SUR_BM04B-SURS-TF_1x04-1MP_P0.80mm_Vertical +JST SUR series connector, BM04B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +6 +5 +Connector_JST +JST_SUR_BM05B-SURS-TF_1x05-1MP_P0.80mm_Vertical +JST SUR series connector, BM05B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +7 +6 +Connector_JST +JST_SUR_BM06B-SURS-TF_1x06-1MP_P0.80mm_Vertical +JST SUR series connector, BM06B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +8 +7 +Connector_JST +JST_SUR_BM08B-SURS-TF_1x08-1MP_P0.80mm_Vertical +JST SUR series connector, BM08B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +10 +9 +Connector_JST +JST_SUR_BM10B-SURS-TF_1x10-1MP_P0.80mm_Vertical +JST SUR series connector, BM10B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +12 +11 +Connector_JST +JST_SUR_BM12B-SURS-TF_1x12-1MP_P0.80mm_Vertical +JST SUR series connector, BM12B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +14 +13 +Connector_JST +JST_SUR_BM14B-SURS-TF_1x14-1MP_P0.80mm_Vertical +JST SUR series connector, BM14B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +16 +15 +Connector_JST +JST_SUR_BM15B-SURS-TF_1x15-1MP_P0.80mm_Vertical +JST SUR series connector, BM15B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +17 +16 +Connector_JST +JST_SUR_BM16B-SURS-TF_1x16-1MP_P0.80mm_Vertical +JST SUR series connector, BM16B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +18 +17 +Connector_JST +JST_SUR_BM17B-SURS-TF_1x17-1MP_P0.80mm_Vertical +JST SUR series connector, BM17B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +19 +18 +Connector_JST +JST_SUR_BM20B-SURS-TF_1x20-1MP_P0.80mm_Vertical +JST SUR series connector, BM20B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR side entry +0 +22 +21 +Connector_JST +JST_SUR_SM02B-SURS-TF_1x02-1MP_P0.80mm_Horizontal +JST SUR series connector, SM02B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +4 +3 +Connector_JST +JST_SUR_SM03B-SURS-TF_1x03-1MP_P0.80mm_Horizontal +JST SUR series connector, SM03B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +5 +4 +Connector_JST +JST_SUR_SM04B-SURS-TF_1x04-1MP_P0.80mm_Horizontal +JST SUR series connector, SM04B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +6 +5 +Connector_JST +JST_SUR_SM05B-SURS-TF_1x05-1MP_P0.80mm_Horizontal +JST SUR series connector, SM05B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +7 +6 +Connector_JST +JST_SUR_SM06B-SURS-TF_1x06-1MP_P0.80mm_Horizontal +JST SUR series connector, SM06B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +8 +7 +Connector_JST +JST_SUR_SM08B-SURS-TF_1x08-1MP_P0.80mm_Horizontal +JST SUR series connector, SM08B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +10 +9 +Connector_JST +JST_SUR_SM10B-SURS-TF_1x10-1MP_P0.80mm_Horizontal +JST SUR series connector, SM10B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +12 +11 +Connector_JST +JST_SUR_SM12B-SURS-TF_1x12-1MP_P0.80mm_Horizontal +JST SUR series connector, SM12B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +14 +13 +Connector_JST +JST_SUR_SM14B-SURS-TF_1x14-1MP_P0.80mm_Horizontal +JST SUR series connector, SM14B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +16 +15 +Connector_JST +JST_SUR_SM15B-SURS-TF_1x15-1MP_P0.80mm_Horizontal +JST SUR series connector, SM15B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +17 +16 +Connector_JST +JST_SUR_SM16B-SURS-TF_1x16-1MP_P0.80mm_Horizontal +JST SUR series connector, SM16B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +18 +17 +Connector_JST +JST_SUR_SM17B-SURS-TF_1x17-1MP_P0.80mm_Horizontal +JST SUR series connector, SM17B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +19 +18 +Connector_JST +JST_SUR_SM20B-SURS-TF_1x20-1MP_P0.80mm_Horizontal +JST SUR series connector, SM20B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +22 +21 +Connector_JST +JST_SUR_SM22B-SURS-TF_1x22-1MP_P0.80mm_Horizontal +JST SUR series connector, SM22B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator +connector JST SUR top entry +0 +24 +23 +Connector_JST +JST_VH_B2P-VH-B_1x02_P3.96mm_Vertical +JST VH PBT series connector, B2P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +2 +2 +Connector_JST +JST_VH_B2P-VH-FB-B_1x02_P3.96mm_Vertical +JST VH series connector, B2P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +2 +2 +Connector_JST +JST_VH_B2P-VH_1x02_P3.96mm_Vertical +JST VH series connector, B2P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +2 +2 +Connector_JST +JST_VH_B2P3-VH_1x02_P7.92mm_Vertical +JST VH series connector, B2P3-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +2 +2 +Connector_JST +JST_VH_B2PS-VH_1x02_P3.96mm_Horizontal +JST VH series connector, B2PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +2 +2 +Connector_JST +JST_VH_B3P-VH-B_1x03_P3.96mm_Vertical +JST VH PBT series connector, B3P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +3 +3 +Connector_JST +JST_VH_B3P-VH-FB-B_1x03_P3.96mm_Vertical +JST VH series connector, B3P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +3 +3 +Connector_JST +JST_VH_B3P-VH_1x03_P3.96mm_Vertical +JST VH series connector, B3P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +3 +3 +Connector_JST +JST_VH_B3PS-VH_1x03_P3.96mm_Horizontal +JST VH series connector, B3PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +3 +3 +Connector_JST +JST_VH_B4P-VH-B_1x04_P3.96mm_Vertical +JST VH PBT series connector, B4P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +4 +4 +Connector_JST +JST_VH_B4P-VH-FB-B_1x04_P3.96mm_Vertical +JST VH series connector, B4P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +4 +4 +Connector_JST +JST_VH_B4P-VH_1x04_P3.96mm_Vertical +JST VH series connector, B4P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +4 +4 +Connector_JST +JST_VH_B4PS-VH_1x04_P3.96mm_Horizontal +JST VH series connector, B4PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +4 +4 +Connector_JST +JST_VH_B5P-VH-B_1x05_P3.96mm_Vertical +JST VH PBT series connector, B5P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +5 +5 +Connector_JST +JST_VH_B5P-VH-FB-B_1x05_P3.96mm_Vertical +JST VH series connector, B5P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +5 +5 +Connector_JST +JST_VH_B5P-VH_1x05_P3.96mm_Vertical +JST VH series connector, B5P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +5 +5 +Connector_JST +JST_VH_B5PS-VH_1x05_P3.96mm_Horizontal +JST VH series connector, B5PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +5 +5 +Connector_JST +JST_VH_B6P-VH-B_1x06_P3.96mm_Vertical +JST VH PBT series connector, B6P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +6 +6 +Connector_JST +JST_VH_B6P-VH-FB-B_1x06_P3.96mm_Vertical +JST VH series connector, B6P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +6 +6 +Connector_JST +JST_VH_B6P-VH_1x06_P3.96mm_Vertical +JST VH series connector, B6P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +6 +6 +Connector_JST +JST_VH_B6PS-VH_1x06_P3.96mm_Horizontal +JST VH series connector, B6PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +6 +6 +Connector_JST +JST_VH_B7P-VH-B_1x07_P3.96mm_Vertical +JST VH PBT series connector, B7P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +7 +7 +Connector_JST +JST_VH_B7P-VH-FB-B_1x07_P3.96mm_Vertical +JST VH series connector, B7P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +7 +7 +Connector_JST +JST_VH_B7P-VH_1x07_P3.96mm_Vertical +JST VH series connector, B7P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +7 +7 +Connector_JST +JST_VH_B7PS-VH_1x07_P3.96mm_Horizontal +JST VH series connector, B7PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +7 +7 +Connector_JST +JST_VH_B8P-VH-B_1x08_P3.96mm_Vertical +JST VH PBT series connector, B8P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +8 +8 +Connector_JST +JST_VH_B8P-VH-FB-B_1x08_P3.96mm_Vertical +JST VH series connector, B8P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +8 +8 +Connector_JST +JST_VH_B8P-VH_1x08_P3.96mm_Vertical +JST VH series connector, B8P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +8 +8 +Connector_JST +JST_VH_B8PS-VH_1x08_P3.96mm_Horizontal +JST VH series connector, B8PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +8 +8 +Connector_JST +JST_VH_B9P-VH-B_1x09_P3.96mm_Vertical +JST VH PBT series connector, B9P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +9 +9 +Connector_JST +JST_VH_B9P-VH-FB-B_1x09_P3.96mm_Vertical +JST VH series connector, B9P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +9 +9 +Connector_JST +JST_VH_B9P-VH_1x09_P3.96mm_Vertical +JST VH series connector, B9P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +9 +9 +Connector_JST +JST_VH_B9PS-VH_1x09_P3.96mm_Horizontal +JST VH series connector, B9PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +9 +9 +Connector_JST +JST_VH_B10P-VH-B_1x10_P3.96mm_Vertical +JST VH PBT series connector, B10P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +10 +10 +Connector_JST +JST_VH_B10P-VH-FB-B_1x10_P3.96mm_Vertical +JST VH series connector, B10P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH side entry +0 +10 +10 +Connector_JST +JST_VH_B10P-VH_1x10_P3.96mm_Vertical +JST VH series connector, B10P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +10 +10 +Connector_JST +JST_VH_B10PS-VH_1x10_P3.96mm_Horizontal +JST VH series connector, B10PS-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +10 +10 +Connector_JST +JST_VH_B11P-VH-B_1x11_P3.96mm_Vertical +JST VH PBT series connector, B11P-VH-B (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH vertical +0 +11 +11 +Connector_JST +JST_VH_S2P-VH_1x02_P3.96mm_Horizontal +JST VH series connector, S2P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +2 +2 +Connector_JST +JST_VH_S3P-VH_1x03_P3.96mm_Horizontal +JST VH series connector, S3P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +3 +3 +Connector_JST +JST_VH_S4P-VH_1x04_P3.96mm_Horizontal +JST VH series connector, S4P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +4 +4 +Connector_JST +JST_VH_S5P-VH_1x05_P3.96mm_Horizontal +JST VH series connector, S5P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +5 +5 +Connector_JST +JST_VH_S6P-VH_1x06_P3.96mm_Horizontal +JST VH series connector, S6P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +6 +6 +Connector_JST +JST_VH_S7P-VH_1x07_P3.96mm_Horizontal +JST VH series connector, S7P-VH (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator +connector JST VH top entry +0 +7 +7 +Connector_JST +JST_XAG_SM05B-XAGKS-BN-TB_1x05-1MP_P2.50mm_Horizontal +JST XAG series connector, SM05B-XAGKS-BN-TB (http://www.jst-mfg.com/product/pdf/eng/eXAG.pdf), generated with kicad-footprint-generator +connector JST XAG top entry +0 +7 +6 +Connector_JST +JST_XH_B1B-XH-AM_1x01_P2.50mm_Vertical +JST XH series connector, B1B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +1 +1 +Connector_JST +JST_XH_B2B-XH-AM_1x02_P2.50mm_Vertical +JST XH series connector, B2B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +2 +2 +Connector_JST +JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical +JST XH series connector, B2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +2 +2 +Connector_JST +JST_XH_B3B-XH-AM_1x03_P2.50mm_Vertical +JST XH series connector, B3B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +3 +3 +Connector_JST +JST_XH_B3B-XH-A_1x03_P2.50mm_Vertical +JST XH series connector, B3B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +3 +3 +Connector_JST +JST_XH_B4B-XH-AM_1x04_P2.50mm_Vertical +JST XH series connector, B4B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +4 +4 +Connector_JST +JST_XH_B4B-XH-A_1x04_P2.50mm_Vertical +JST XH series connector, B4B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +4 +4 +Connector_JST +JST_XH_B5B-XH-AM_1x05_P2.50mm_Vertical +JST XH series connector, B5B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +5 +5 +Connector_JST +JST_XH_B5B-XH-A_1x05_P2.50mm_Vertical +JST XH series connector, B5B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +5 +5 +Connector_JST +JST_XH_B6B-XH-AM_1x06_P2.50mm_Vertical +JST XH series connector, B6B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +6 +6 +Connector_JST +JST_XH_B6B-XH-A_1x06_P2.50mm_Vertical +JST XH series connector, B6B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +6 +6 +Connector_JST +JST_XH_B7B-XH-AM_1x07_P2.50mm_Vertical +JST XH series connector, B7B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +7 +7 +Connector_JST +JST_XH_B7B-XH-A_1x07_P2.50mm_Vertical +JST XH series connector, B7B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +7 +7 +Connector_JST +JST_XH_B8B-XH-AM_1x08_P2.50mm_Vertical +JST XH series connector, B8B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +8 +8 +Connector_JST +JST_XH_B8B-XH-A_1x08_P2.50mm_Vertical +JST XH series connector, B8B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +8 +8 +Connector_JST +JST_XH_B9B-XH-AM_1x09_P2.50mm_Vertical +JST XH series connector, B9B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical boss +0 +9 +9 +Connector_JST +JST_XH_B9B-XH-A_1x09_P2.50mm_Vertical +JST XH series connector, B9B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH vertical +0 +9 +9 +Connector_JST +JST_XH_B10B-XH-AM_1x10_P2.50mm_Vertical +JST XH series connector, B10B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry boss +0 +10 +10 +Connector_JST +JST_XH_B10B-XH-A_1x10_P2.50mm_Vertical +JST XH series connector, B10B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +10 +10 +Connector_JST +JST_XH_B11B-XH-A_1x11_P2.50mm_Vertical +JST XH series connector, B11B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +11 +11 +Connector_JST +JST_XH_B12B-XH-AM_1x12_P2.50mm_Vertical +JST XH series connector, B12B-XH-AM, with boss (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry boss +0 +12 +12 +Connector_JST +JST_XH_B12B-XH-A_1x12_P2.50mm_Vertical +JST XH series connector, B12B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +12 +12 +Connector_JST +JST_XH_B13B-XH-A_1x13_P2.50mm_Vertical +JST XH series connector, B13B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +13 +13 +Connector_JST +JST_XH_B14B-XH-A_1x14_P2.50mm_Vertical +JST XH series connector, B14B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +14 +14 +Connector_JST +JST_XH_B15B-XH-A_1x15_P2.50mm_Vertical +JST XH series connector, B15B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +15 +15 +Connector_JST +JST_XH_B16B-XH-A_1x16_P2.50mm_Vertical +JST XH series connector, B16B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +16 +16 +Connector_JST +JST_XH_B20B-XH-A_1x20_P2.50mm_Vertical +JST XH series connector, B20B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH side entry +0 +20 +20 +Connector_JST +JST_XH_S2B-XH-A-1_1x02_P2.50mm_Horizontal +JST XH series connector, S2B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +2 +2 +Connector_JST +JST_XH_S2B-XH-A_1x02_P2.50mm_Horizontal +JST XH series connector, S2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +2 +2 +Connector_JST +JST_XH_S3B-XH-A-1_1x03_P2.50mm_Horizontal +JST XH series connector, S3B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +3 +3 +Connector_JST +JST_XH_S3B-XH-A_1x03_P2.50mm_Horizontal +JST XH series connector, S3B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +3 +3 +Connector_JST +JST_XH_S4B-XH-A-1_1x04_P2.50mm_Horizontal +JST XH series connector, S4B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +4 +4 +Connector_JST +JST_XH_S4B-XH-A_1x04_P2.50mm_Horizontal +JST XH series connector, S4B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +4 +4 +Connector_JST +JST_XH_S5B-XH-A-1_1x05_P2.50mm_Horizontal +JST XH series connector, S5B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +5 +5 +Connector_JST +JST_XH_S5B-XH-A_1x05_P2.50mm_Horizontal +JST XH series connector, S5B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +5 +5 +Connector_JST +JST_XH_S6B-XH-A-1_1x06_P2.50mm_Horizontal +JST XH series connector, S6B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +6 +6 +Connector_JST +JST_XH_S6B-XH-A_1x06_P2.50mm_Horizontal +JST XH series connector, S6B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +6 +6 +Connector_JST +JST_XH_S7B-XH-A-1_1x07_P2.50mm_Horizontal +JST XH series connector, S7B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +7 +7 +Connector_JST +JST_XH_S7B-XH-A_1x07_P2.50mm_Horizontal +JST XH series connector, S7B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +7 +7 +Connector_JST +JST_XH_S8B-XH-A-1_1x08_P2.50mm_Horizontal +JST XH series connector, S8B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +8 +8 +Connector_JST +JST_XH_S8B-XH-A_1x08_P2.50mm_Horizontal +JST XH series connector, S8B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +8 +8 +Connector_JST +JST_XH_S9B-XH-A-1_1x09_P2.50mm_Horizontal +JST XH series connector, S9B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +9 +9 +Connector_JST +JST_XH_S9B-XH-A_1x09_P2.50mm_Horizontal +JST XH series connector, S9B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH horizontal +0 +9 +9 +Connector_JST +JST_XH_S10B-XH-A-1_1x10_P2.50mm_Horizontal +JST XH series connector, S10B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +10 +10 +Connector_JST +JST_XH_S10B-XH-A_1x10_P2.50mm_Horizontal +JST XH series connector, S10B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +10 +10 +Connector_JST +JST_XH_S11B-XH-A-1_1x11_P2.50mm_Horizontal +JST XH series connector, S11B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +11 +11 +Connector_JST +JST_XH_S11B-XH-A_1x11_P2.50mm_Horizontal +JST XH series connector, S11B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +11 +11 +Connector_JST +JST_XH_S12B-XH-A-1_1x12_P2.50mm_Horizontal +JST XH series connector, S12B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +12 +12 +Connector_JST +JST_XH_S12B-XH-A_1x12_P2.50mm_Horizontal +JST XH series connector, S12B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +12 +12 +Connector_JST +JST_XH_S13B-XH-A-1_1x13_P2.50mm_Horizontal +JST XH series connector, S13B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +13 +13 +Connector_JST +JST_XH_S13B-XH-A_1x13_P2.50mm_Horizontal +JST XH series connector, S13B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +13 +13 +Connector_JST +JST_XH_S14B-XH-A-1_1x14_P2.50mm_Horizontal +JST XH series connector, S14B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +14 +14 +Connector_JST +JST_XH_S14B-XH-A_1x14_P2.50mm_Horizontal +JST XH series connector, S14B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +14 +14 +Connector_JST +JST_XH_S15B-XH-A-1_1x15_P2.50mm_Horizontal +JST XH series connector, S15B-XH-A-1 (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +15 +15 +Connector_JST +JST_XH_S15B-XH-A_1x15_P2.50mm_Horizontal +JST XH series connector, S15B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +15 +15 +Connector_JST +JST_XH_S16B-XH-A_1x16_P2.50mm_Horizontal +JST XH series connector, S16B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator +connector JST XH top entry +0 +16 +16 +Connector_JST +JST_ZE_B02B-ZESK-1D_1x02_P1.50mm_Vertical +JST ZE series connector, B02B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +2 +2 +Connector_JST +JST_ZE_B03B-ZESK-1D_1x03_P1.50mm_Vertical +JST ZE series connector, B03B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +3 +3 +Connector_JST +JST_ZE_B03B-ZESK-D_1x03_P1.50mm_Vertical +JST ZE series connector, B03B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +3 +3 +Connector_JST +JST_ZE_B04B-ZESK-1D_1x04_P1.50mm_Vertical +JST ZE series connector, B04B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +4 +4 +Connector_JST +JST_ZE_B04B-ZESK-D_1x04_P1.50mm_Vertical +JST ZE series connector, B04B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +4 +4 +Connector_JST +JST_ZE_B05B-ZESK-1D_1x05_P1.50mm_Vertical +JST ZE series connector, B05B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +5 +5 +Connector_JST +JST_ZE_B05B-ZESK-D_1x05_P1.50mm_Vertical +JST ZE series connector, B05B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +5 +5 +Connector_JST +JST_ZE_B06B-ZESK-1D_1x06_P1.50mm_Vertical +JST ZE series connector, B06B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +6 +6 +Connector_JST +JST_ZE_B06B-ZESK-D_1x06_P1.50mm_Vertical +JST ZE series connector, B06B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +6 +6 +Connector_JST +JST_ZE_B07B-ZESK-1D_1x07_P1.50mm_Vertical +JST ZE series connector, B07B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +7 +7 +Connector_JST +JST_ZE_B07B-ZESK-D_1x07_P1.50mm_Vertical +JST ZE series connector, B07B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +7 +7 +Connector_JST +JST_ZE_B08B-ZESK-1D_1x08_P1.50mm_Vertical +JST ZE series connector, B08B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +8 +8 +Connector_JST +JST_ZE_B08B-ZESK-D_1x08_P1.50mm_Vertical +JST ZE series connector, B08B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +8 +8 +Connector_JST +JST_ZE_B09B-ZESK-1D_1x09_P1.50mm_Vertical +JST ZE series connector, B09B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +9 +9 +Connector_JST +JST_ZE_B09B-ZESK-D_1x09_P1.50mm_Vertical +JST ZE series connector, B09B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +9 +9 +Connector_JST +JST_ZE_B10B-ZESK-1D_1x10_P1.50mm_Vertical +JST ZE series connector, B10B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +10 +10 +Connector_JST +JST_ZE_B10B-ZESK-D_1x10_P1.50mm_Vertical +JST ZE series connector, B10B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +10 +10 +Connector_JST +JST_ZE_B11B-ZESK-1D_1x11_P1.50mm_Vertical +JST ZE series connector, B11B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +11 +11 +Connector_JST +JST_ZE_B11B-ZESK-D_1x11_P1.50mm_Vertical +JST ZE series connector, B11B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +11 +11 +Connector_JST +JST_ZE_B12B-ZESK-1D_1x12_P1.50mm_Vertical +JST ZE series connector, B12B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +12 +12 +Connector_JST +JST_ZE_B12B-ZESK-D_1x12_P1.50mm_Vertical +JST ZE series connector, B12B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +12 +12 +Connector_JST +JST_ZE_B13B-ZESK-1D_1x13_P1.50mm_Vertical +JST ZE series connector, B13B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +13 +13 +Connector_JST +JST_ZE_B13B-ZESK-D_1x13_P1.50mm_Vertical +JST ZE series connector, B13B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +13 +13 +Connector_JST +JST_ZE_B14B-ZESK-1D_1x14_P1.50mm_Vertical +JST ZE series connector, B14B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +14 +14 +Connector_JST +JST_ZE_B14B-ZESK-D_1x14_P1.50mm_Vertical +JST ZE series connector, B14B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +14 +14 +Connector_JST +JST_ZE_B15B-ZESK-1D_1x15_P1.50mm_Vertical +JST ZE series connector, B15B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +15 +15 +Connector_JST +JST_ZE_B15B-ZESK-D_1x15_P1.50mm_Vertical +JST ZE series connector, B15B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +15 +15 +Connector_JST +JST_ZE_B16B-ZESK-1D_1x16_P1.50mm_Vertical +JST ZE series connector, B16B-ZESK-1D, with boss (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry boss +0 +16 +16 +Connector_JST +JST_ZE_B16B-ZESK-D_1x16_P1.50mm_Vertical +JST ZE series connector, B16B-ZESK-D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE side entry +0 +16 +16 +Connector_JST +JST_ZE_BM02B-ZESS-TBT_1x02-1MP_P1.50mm_Vertical +JST ZE series connector, BM02B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +4 +3 +Connector_JST +JST_ZE_BM03B-ZESS-TBT_1x03-1MP_P1.50mm_Vertical +JST ZE series connector, BM03B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +5 +4 +Connector_JST +JST_ZE_BM04B-ZESS-TBT_1x04-1MP_P1.50mm_Vertical +JST ZE series connector, BM04B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +6 +5 +Connector_JST +JST_ZE_BM05B-ZESS-TBT_1x05-1MP_P1.50mm_Vertical +JST ZE series connector, BM05B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +7 +6 +Connector_JST +JST_ZE_BM06B-ZESS-TBT_1x06-1MP_P1.50mm_Vertical +JST ZE series connector, BM06B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +8 +7 +Connector_JST +JST_ZE_BM07B-ZESS-TBT_1x07-1MP_P1.50mm_Vertical +JST ZE series connector, BM07B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +9 +8 +Connector_JST +JST_ZE_BM08B-ZESS-TBT_1x08-1MP_P1.50mm_Vertical +JST ZE series connector, BM08B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +10 +9 +Connector_JST +JST_ZE_BM09B-ZESS-TBT_1x09-1MP_P1.50mm_Vertical +JST ZE series connector, BM09B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +11 +10 +Connector_JST +JST_ZE_BM10B-ZESS-TBT_1x10-1MP_P1.50mm_Vertical +JST ZE series connector, BM10B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +12 +11 +Connector_JST +JST_ZE_BM11B-ZESS-TBT_1x11-1MP_P1.50mm_Vertical +JST ZE series connector, BM11B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +13 +12 +Connector_JST +JST_ZE_BM12B-ZESS-TBT_1x12-1MP_P1.50mm_Vertical +JST ZE series connector, BM12B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +14 +13 +Connector_JST +JST_ZE_BM13B-ZESS-TBT_1x13-1MP_P1.50mm_Vertical +JST ZE series connector, BM13B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +15 +14 +Connector_JST +JST_ZE_BM14B-ZESS-TBT_1x14-1MP_P1.50mm_Vertical +JST ZE series connector, BM14B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +16 +15 +Connector_JST +JST_ZE_BM15B-ZESS-TBT_1x15-1MP_P1.50mm_Vertical +JST ZE series connector, BM15B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +17 +16 +Connector_JST +JST_ZE_BM16B-ZESS-TBT_1x16-1MP_P1.50mm_Vertical +JST ZE series connector, BM16B-ZESS-TBT (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE vertical +0 +18 +17 +Connector_JST +JST_ZE_S02B-ZESK-2D_1x02_P1.50mm_Horizontal +JST ZE series connector, S02B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +2 +2 +Connector_JST +JST_ZE_S03B-ZESK-2D_1x03_P1.50mm_Horizontal +JST ZE series connector, S03B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +3 +3 +Connector_JST +JST_ZE_S04B-ZESK-2D_1x04_P1.50mm_Horizontal +JST ZE series connector, S04B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +4 +4 +Connector_JST +JST_ZE_S05B-ZESK-2D_1x05_P1.50mm_Horizontal +JST ZE series connector, S05B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +5 +5 +Connector_JST +JST_ZE_S06B-ZESK-2D_1x06_P1.50mm_Horizontal +JST ZE series connector, S06B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +6 +6 +Connector_JST +JST_ZE_S07B-ZESK-2D_1x07_P1.50mm_Horizontal +JST ZE series connector, S07B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +7 +7 +Connector_JST +JST_ZE_S08B-ZESK-2D_1x08_P1.50mm_Horizontal +JST ZE series connector, S08B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +8 +8 +Connector_JST +JST_ZE_S09B-ZESK-2D_1x09_P1.50mm_Horizontal +JST ZE series connector, S09B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +9 +9 +Connector_JST +JST_ZE_S10B-ZESK-2D_1x10_P1.50mm_Horizontal +JST ZE series connector, S10B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +10 +10 +Connector_JST +JST_ZE_S11B-ZESK-2D_1x11_P1.50mm_Horizontal +JST ZE series connector, S11B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +11 +11 +Connector_JST +JST_ZE_S12B-ZESK-2D_1x12_P1.50mm_Horizontal +JST ZE series connector, S12B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +12 +12 +Connector_JST +JST_ZE_S13B-ZESK-2D_1x13_P1.50mm_Horizontal +JST ZE series connector, S13B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +13 +13 +Connector_JST +JST_ZE_S14B-ZESK-2D_1x14_P1.50mm_Horizontal +JST ZE series connector, S14B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +14 +14 +Connector_JST +JST_ZE_S15B-ZESK-2D_1x15_P1.50mm_Horizontal +JST ZE series connector, S15B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +15 +15 +Connector_JST +JST_ZE_S16B-ZESK-2D_1x16_P1.50mm_Horizontal +JST ZE series connector, S16B-ZESK-2D (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE top entry +0 +16 +16 +Connector_JST +JST_ZE_SM02B-ZESS-TB_1x02-1MP_P1.50mm_Horizontal +JST ZE series connector, SM02B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +4 +3 +Connector_JST +JST_ZE_SM03B-ZESS-TB_1x03-1MP_P1.50mm_Horizontal +JST ZE series connector, SM03B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +5 +4 +Connector_JST +JST_ZE_SM04B-ZESS-TB_1x04-1MP_P1.50mm_Horizontal +JST ZE series connector, SM04B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +6 +5 +Connector_JST +JST_ZE_SM05B-ZESS-TB_1x05-1MP_P1.50mm_Horizontal +JST ZE series connector, SM05B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +7 +6 +Connector_JST +JST_ZE_SM06B-ZESS-TB_1x06-1MP_P1.50mm_Horizontal +JST ZE series connector, SM06B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +8 +7 +Connector_JST +JST_ZE_SM07B-ZESS-TB_1x07-1MP_P1.50mm_Horizontal +JST ZE series connector, SM07B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +9 +8 +Connector_JST +JST_ZE_SM08B-ZESS-TB_1x08-1MP_P1.50mm_Horizontal +JST ZE series connector, SM08B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +10 +9 +Connector_JST +JST_ZE_SM09B-ZESS-TB_1x09-1MP_P1.50mm_Horizontal +JST ZE series connector, SM09B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +11 +10 +Connector_JST +JST_ZE_SM10B-ZESS-TB_1x10-1MP_P1.50mm_Horizontal +JST ZE series connector, SM10B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +12 +11 +Connector_JST +JST_ZE_SM11B-ZESS-TB_1x11-1MP_P1.50mm_Horizontal +JST ZE series connector, SM11B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +13 +12 +Connector_JST +JST_ZE_SM12B-ZESS-TB_1x12-1MP_P1.50mm_Horizontal +JST ZE series connector, SM12B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +14 +13 +Connector_JST +JST_ZE_SM13B-ZESS-TB_1x13-1MP_P1.50mm_Horizontal +JST ZE series connector, SM13B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +15 +14 +Connector_JST +JST_ZE_SM14B-ZESS-TB_1x14-1MP_P1.50mm_Horizontal +JST ZE series connector, SM14B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +16 +15 +Connector_JST +JST_ZE_SM15B-ZESS-TB_1x15-1MP_P1.50mm_Horizontal +JST ZE series connector, SM15B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +17 +16 +Connector_JST +JST_ZE_SM16B-ZESS-TB_1x16-1MP_P1.50mm_Horizontal +JST ZE series connector, SM16B-ZESS-TB (http://www.jst-mfg.com/product/pdf/eng/eZE.pdf), generated with kicad-footprint-generator +connector JST ZE horizontal +0 +18 +17 +Connector_Molex +Molex_CLIK-Mate_502382-0270_1x02-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0270 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502382-0370_1x03-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0370 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502382-0470_1x04-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0470 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502382-0570_1x05-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0570 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502382-0670_1x06-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0670 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502382-0770_1x07-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0770 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502382-0870_1x08-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0870 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502382-0970_1x09-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-0970 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502382-1070_1x10-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1070 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502382-1170_1x11-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1170 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502382-1270_1x12-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1270 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502382-1370_1x13-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1370 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502382-1470_1x14-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1470 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502382-1570_1x15-1MP_P1.25mm_Vertical +Molex CLIK-Mate series connector, 502382-1570 (http://www.molex.com/pdm_docs/sd/5023820270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502386-0270_1x02-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502386-0370_1x03-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0370 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502386-0470_1x04-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0470 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502386-0570_1x05-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0570 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502386-0670_1x06-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0670 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502386-0770_1x07-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0770 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502386-0870_1x08-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0870 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502386-0970_1x09-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-0970 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502386-1070_1x10-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1070 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502386-1170_1x11-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1170 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502386-1270_1x12-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502386-1370_1x13-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1370 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502386-1470_1x14-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1470 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502386-1570_1x15-1MP_P1.25mm_Horizontal +Molex CLIK-Mate series connector, 502386-1570 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502443-0270_1x02-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0270 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502443-0370_1x03-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0370 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502443-0470_1x04-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0470 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502443-0570_1x05-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0570 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502443-0670_1x06-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0670 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502443-0770_1x07-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0770 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502443-0870_1x08-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0870 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502443-0970_1x09-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-0970 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502443-1270_1x12-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1270 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502443-1370_1x13-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1370 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502443-1470_1x14-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1470 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502443-1570_1x15-1MP_P2.00mm_Vertical +Molex CLIK-Mate series connector, 502443-1570 (http://www.molex.com/pdm_docs/sd/5024430270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502494-0270_1x02-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0270 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502494-0370_1x03-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0370 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502494-0470_1x04-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0470 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502494-0670_1x06-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0670 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-0870 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502494-1070_1x10-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1070 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502494-1270_1x12-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1270 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502494-1370_1x13-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1370 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502494-1470_1x14-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1470 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502494-1570_1x15-1MP_P2.00mm_Horizontal +Molex CLIK-Mate series connector, 502494-1570 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_502585-0270_1x02-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0270 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_502585-0370_1x03-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0370 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_502585-0470_1x04-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0470 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_502585-0570_1x05-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0570 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_502585-0670_1x06-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0670 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_502585-0770_1x07-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0770 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_502585-0870_1x08-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0870 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_502585-0970_1x09-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-0970 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_502585-1070_1x10-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1070 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_502585-1170_1x11-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1170 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_502585-1270_1x12-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1270 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_502585-1370_1x13-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1370 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_502585-1470_1x14-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1470 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_502585-1570_1x15-1MP_P1.50mm_Horizontal +Molex CLIK-Mate series connector, 502585-1570 (http://www.molex.com/pdm_docs/sd/5025850270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate top entry +0 +17 +16 +Connector_Molex +Molex_CLIK-Mate_505405-0270_1x02-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0270 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +4 +3 +Connector_Molex +Molex_CLIK-Mate_505405-0370_1x03-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0370 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +5 +4 +Connector_Molex +Molex_CLIK-Mate_505405-0470_1x04-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0470 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +6 +5 +Connector_Molex +Molex_CLIK-Mate_505405-0570_1x05-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0570 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +7 +6 +Connector_Molex +Molex_CLIK-Mate_505405-0670_1x06-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0670 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +8 +7 +Connector_Molex +Molex_CLIK-Mate_505405-0770_1x07-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0770 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +9 +8 +Connector_Molex +Molex_CLIK-Mate_505405-0870_1x08-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0870 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +10 +9 +Connector_Molex +Molex_CLIK-Mate_505405-0970_1x09-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-0970 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +11 +10 +Connector_Molex +Molex_CLIK-Mate_505405-1070_1x10-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1070 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +12 +11 +Connector_Molex +Molex_CLIK-Mate_505405-1170_1x11-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1170 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +13 +12 +Connector_Molex +Molex_CLIK-Mate_505405-1270_1x12-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1270 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +14 +13 +Connector_Molex +Molex_CLIK-Mate_505405-1370_1x13-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1370 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +15 +14 +Connector_Molex +Molex_CLIK-Mate_505405-1470_1x14-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1470 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +16 +15 +Connector_Molex +Molex_CLIK-Mate_505405-1570_1x15-1MP_P1.50mm_Vertical +Molex CLIK-Mate series connector, 505405-1570 (http://www.molex.com/pdm_docs/sd/5054050270_sd.pdf), generated with kicad-footprint-generator +connector Molex CLIK-Mate side entry +0 +17 +16 +Connector_Molex +Molex_KK-254_AE-6410-02A_1x02_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-02A example for new part number: 22-27-2021, 2 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +2 +2 +Connector_Molex +Molex_KK-254_AE-6410-03A_1x03_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-03A example for new part number: 22-27-2031, 3 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +3 +3 +Connector_Molex +Molex_KK-254_AE-6410-04A_1x04_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-04A example for new part number: 22-27-2041, 4 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +4 +4 +Connector_Molex +Molex_KK-254_AE-6410-05A_1x05_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-05A example for new part number: 22-27-2051, 5 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +5 +5 +Connector_Molex +Molex_KK-254_AE-6410-06A_1x06_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-06A example for new part number: 22-27-2061, 6 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +6 +6 +Connector_Molex +Molex_KK-254_AE-6410-07A_1x07_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-07A example for new part number: 22-27-2071, 7 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +7 +7 +Connector_Molex +Molex_KK-254_AE-6410-08A_1x08_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-08A example for new part number: 22-27-2081, 8 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +8 +8 +Connector_Molex +Molex_KK-254_AE-6410-09A_1x09_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-09A example for new part number: 22-27-2091, 9 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +9 +9 +Connector_Molex +Molex_KK-254_AE-6410-10A_1x10_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-10A example for new part number: 22-27-2101, 10 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +10 +10 +Connector_Molex +Molex_KK-254_AE-6410-11A_1x11_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-11A example for new part number: 22-27-2111, 11 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +11 +11 +Connector_Molex +Molex_KK-254_AE-6410-12A_1x12_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-12A example for new part number: 22-27-2121, 12 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +12 +12 +Connector_Molex +Molex_KK-254_AE-6410-13A_1x13_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-13A example for new part number: 22-27-2131, 13 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +13 +13 +Connector_Molex +Molex_KK-254_AE-6410-14A_1x14_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-14A example for new part number: 22-27-2141, 14 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +14 +14 +Connector_Molex +Molex_KK-254_AE-6410-15A_1x15_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-15A example for new part number: 22-27-2151, 15 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +15 +15 +Connector_Molex +Molex_KK-254_AE-6410-16A_1x16_P2.54mm_Vertical +Molex KK-254 Interconnect System, old/engineering part number: AE-6410-16A example for new part number: 22-27-2161, 16 Pins (http://www.molex.com/pdm_docs/sd/022272021_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-254 vertical +0 +16 +16 +Connector_Molex +Molex_KK-396_A-41791-0002_1x02_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0002 example for new part number: 26-60-4020, 2 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +2 +2 +Connector_Molex +Molex_KK-396_A-41791-0003_1x03_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0003 example for new part number: 26-60-4030, 3 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +3 +3 +Connector_Molex +Molex_KK-396_A-41791-0004_1x04_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0004 example for new part number: 26-60-4040, 4 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +4 +4 +Connector_Molex +Molex_KK-396_A-41791-0005_1x05_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0005 example for new part number: 26-60-4050, 5 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +5 +5 +Connector_Molex +Molex_KK-396_A-41791-0006_1x06_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0006 example for new part number: 26-60-4060, 6 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +6 +6 +Connector_Molex +Molex_KK-396_A-41791-0007_1x07_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0007 example for new part number: 26-60-4070, 7 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +7 +7 +Connector_Molex +Molex_KK-396_A-41791-0008_1x08_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0008 example for new part number: 26-60-4080, 8 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +8 +8 +Connector_Molex +Molex_KK-396_A-41791-0009_1x09_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0009 example for new part number: 26-60-4090, 9 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +9 +9 +Connector_Molex +Molex_KK-396_A-41791-0010_1x10_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0010 example for new part number: 26-60-4100, 10 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +10 +10 +Connector_Molex +Molex_KK-396_A-41791-0011_1x11_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0011 example for new part number: 26-60-4110, 11 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +11 +11 +Connector_Molex +Molex_KK-396_A-41791-0012_1x12_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0012 example for new part number: 26-60-4120, 12 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +12 +12 +Connector_Molex +Molex_KK-396_A-41791-0013_1x13_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0013 example for new part number: 26-60-4130, 13 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +13 +13 +Connector_Molex +Molex_KK-396_A-41791-0014_1x14_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0014 example for new part number: 26-60-4140, 14 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +14 +14 +Connector_Molex +Molex_KK-396_A-41791-0015_1x15_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0015 example for new part number: 26-60-4150, 15 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +15 +15 +Connector_Molex +Molex_KK-396_A-41791-0016_1x16_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0016 example for new part number: 26-60-4160, 16 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +16 +16 +Connector_Molex +Molex_KK-396_A-41791-0017_1x17_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0017 example for new part number: 26-60-4170, 17 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +17 +17 +Connector_Molex +Molex_KK-396_A-41791-0018_1x18_P3.96mm_Vertical +Molex KK 396 Interconnect System, old/engineering part number: A-41791-0018 example for new part number: 26-60-4180, 18 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator +connector Molex KK-396 vertical +0 +18 +18 +Connector_Molex +Molex_Mega-Fit_76825-0002_2x01_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0002 (compatible alternatives: 172064-0002, 172064-1002), 1 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76825-0004_2x02_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0004 (compatible alternatives: 172064-0004, 172064-1004), 2 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76825-0006_2x03_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0006 (compatible alternatives: 172064-0006, 172064-1006), 3 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76825-0008_2x04_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0008 (compatible alternatives: 172064-0008, 172064-1008), 4 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76825-0010_2x05_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0010 (compatible alternatives: 172064-0010, 172064-1010), 5 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76825-0012_2x06_P5.70mm_Horizontal +Molex Mega-Fit Power Connectors, 76825-0012 (compatible alternatives: 172064-0012, 172064-1012), 6 Pins per row (http://www.molex.com/pdm_docs/sd/1720640002_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit top entry +0 +12 +12 +Connector_Molex +Molex_Mega-Fit_76829-0002_2x01_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0002 (compatible alternatives: 172065-0002, 172065-1002), 1 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76829-0004_2x02_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0004 (compatible alternatives: 172065-0004, 172065-1004), 2 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76829-0006_2x03_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0006 (compatible alternatives: 172065-0006, 172065-1006), 3 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76829-0008_2x04_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0008 (compatible alternatives: 172065-0008, 172065-1008), 4 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76829-0010_2x05_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0010 (compatible alternatives: 172065-0010, 172065-1010), 5 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76829-0012_2x06_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0012 (compatible alternatives: 172065-0012, 172065-1012), 6 Pins per row (http://www.molex.com/pdm_docs/sd/768290004_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Mega-Fit_76829-0102_2x01_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0102 (compatible alternatives: 172065-0202, 172065-0302), 1 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Mega-Fit_76829-0104_2x02_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0104 (compatible alternatives: 172065-0204, 172065-0304), 2 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Mega-Fit_76829-0106_2x03_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0106 (compatible alternatives: 172065-0206, 172065-0306), 3 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Mega-Fit_76829-0108_2x04_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0108 (compatible alternatives: 172065-0208, 172065-0308), 4 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Mega-Fit_76829-0110_2x05_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0110 (compatible alternatives: 172065-0210, 172065-0310), 5 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Mega-Fit_76829-0112_2x06_P5.70mm_Vertical +Molex Mega-Fit Power Connectors, 76829-0112 (compatible alternatives: 172065-0212, 172065-0312), 6 Pins per row (http://www.molex.com/pdm_docs/sd/768290102_sd.pdf), generated with kicad-footprint-generator +connector Molex Mega-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0200_2x01_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0200 (alternative finishes: 43045-020x), 1 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0210_2x01-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0210 (compatible alternatives: 43045-0211, 43045-0209), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +4 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0212_2x01_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0212 (compatible alternatives: 43045-0213, 43045-0224), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0215_2x01_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0215 (compatible alternatives: 43045-0216, 43045-0217), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0218_2x01-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0218 (compatible alternatives: 43045-0219, 43045-0220), 1 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0221_2x01-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0221 (alternative finishes: 43045-022x), 1 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +4 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0400_2x02_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0400 (alternative finishes: 43045-040x), 2 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0410_2x02-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0410 (compatible alternatives: 43045-0411, 43045-0409), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +6 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0412_2x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0412 (compatible alternatives: 43045-0413, 43045-0424), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0415_2x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0415 (compatible alternatives: 43045-0416, 43045-0417), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0418_2x02-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0418 (compatible alternatives: 43045-0419, 43045-0420), 2 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0421_2x02-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0421 (alternative finishes: 43045-042x), 2 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +6 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0600_2x03_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0600 (alternative finishes: 43045-060x), 3 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0610_2x03-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0610 (compatible alternatives: 43045-0611, 43045-0609), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +8 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0612_2x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0612 (compatible alternatives: 43045-0613, 43045-0624), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0615_2x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0615 (compatible alternatives: 43045-0616, 43045-0617), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0618_2x03-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0618 (compatible alternatives: 43045-0619, 43045-0620), 3 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0621_2x03-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0621 (alternative finishes: 43045-062x), 3 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +8 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0800_2x04_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0800 (alternative finishes: 43045-080x), 4 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0810_2x04-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0810 (compatible alternatives: 43045-0811, 43045-0809), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +10 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0812_2x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0812 (compatible alternatives: 43045-0813, 43045-0824), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0815_2x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0815 (compatible alternatives: 43045-0816, 43045-0817), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0818_2x04-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-0818 (compatible alternatives: 43045-0819, 43045-0820), 4 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43045-0821_2x04-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-0821 (alternative finishes: 43045-082x), 4 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +10 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1000_2x05_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1000 (alternative finishes: 43045-100x), 5 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1010_2x05-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1010 (compatible alternatives: 43045-1011, 43045-1009), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +12 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1012_2x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1012 (compatible alternatives: 43045-1013, 43045-1024), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1015_2x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1015 (compatible alternatives: 43045-1016, 43045-1017), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1018_2x05-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1018 (compatible alternatives: 43045-1019, 43045-1020), 5 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1021_2x05-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1021 (alternative finishes: 43045-102x), 5 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +12 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1200_2x06_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1200 (alternative finishes: 43045-120x), 6 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1210_2x06-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1210 (compatible alternatives: 43045-1211, 43045-1209), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +14 +13 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1212_2x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1212 (compatible alternatives: 43045-1213, 43045-1224), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1215_2x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1215 (compatible alternatives: 43045-1216, 43045-1217), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1218_2x06-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1218 (compatible alternatives: 43045-1219, 43045-1220), 6 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +13 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1221_2x06-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1221 (alternative finishes: 43045-122x), 6 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +14 +13 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1400_2x07_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1400 (alternative finishes: 43045-140x), 7 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1410_2x07-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1410 (compatible alternatives: 43045-1411, 43045-1409), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +16 +15 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1412_2x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1412 (compatible alternatives: 43045-1413, 43045-1424), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1415_2x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1415 (compatible alternatives: 43045-1416, 43045-1417), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1418_2x07-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1418 (compatible alternatives: 43045-1419, 43045-1420), 7 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +15 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1421_2x07-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1421 (alternative finishes: 43045-142x), 7 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +16 +15 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1600_2x08_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1600 (alternative finishes: 43045-160x), 8 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1610_2x08-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1610 (compatible alternatives: 43045-1611, 43045-1609), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +18 +17 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1612_2x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1612 (compatible alternatives: 43045-1613, 43045-1624), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1615_2x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1615 (compatible alternatives: 43045-1616, 43045-1617), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +16 +16 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1618_2x08-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1618 (compatible alternatives: 43045-1619, 43045-1620), 8 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +17 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1621_2x08-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1621 (alternative finishes: 43045-162x), 8 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +18 +17 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1800_2x09_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1800 (alternative finishes: 43045-180x), 9 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1810_2x09-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1810 (compatible alternatives: 43045-1811, 43045-1809), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +20 +19 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1812_2x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1812 (compatible alternatives: 43045-1813, 43045-1824), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1815_2x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1815 (compatible alternatives: 43045-1816, 43045-1817), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +18 +18 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1818_2x09-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-1818 (compatible alternatives: 43045-1819, 43045-1820), 9 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +19 +Connector_Molex +Molex_Micro-Fit_3.0_43045-1821_2x09-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-1821 (alternative finishes: 43045-182x), 9 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +20 +19 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2000_2x10_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2000 (alternative finishes: 43045-200x), 10 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2010_2x10-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2010 (compatible alternatives: 43045-2011, 43045-2009), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +22 +21 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2012_2x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2012 (compatible alternatives: 43045-2013, 43045-2024), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2015_2x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2015 (compatible alternatives: 43045-2016, 43045-2017), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +20 +20 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2018_2x10-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2018 (compatible alternatives: 43045-2019, 43045-2020), 10 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +21 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2021_2x10-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2021 (alternative finishes: 43045-202x), 10 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +22 +21 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2200_2x11_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2200 (alternative finishes: 43045-220x), 11 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2210_2x11-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2210 (compatible alternatives: 43045-2211, 43045-2209), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +24 +23 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2212_2x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2212 (compatible alternatives: 43045-2213, 43045-2224), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2215_2x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2215 (compatible alternatives: 43045-2216, 43045-2217), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +22 +22 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2218_2x11-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2218 (compatible alternatives: 43045-2219, 43045-2220), 11 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +23 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2221_2x11-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2221 (alternative finishes: 43045-222x), 11 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +24 +23 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2400_2x12_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2400 (alternative finishes: 43045-240x), 12 Pins per row (https://www.molex.com/pdm_docs/sd/430450201_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2410_2x12-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2410 (compatible alternatives: 43045-2411, 43045-2409), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450210_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +26 +25 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2412_2x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2412 (compatible alternatives: 43045-2413, 43045-2424), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450212_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2415_2x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2415 (compatible alternatives: 43045-2416, 43045-2417), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450217_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +24 +24 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2418_2x12-1MP_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43045-2418 (compatible alternatives: 43045-2419, 43045-2420), 12 Pins per row (http://www.molex.com/pdm_docs/sd/430450218_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 side entry +0 +26 +25 +Connector_Molex +Molex_Micro-Fit_3.0_43045-2421_2x12-1MP_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43045-2421 (alternative finishes: 43045-242x), 12 Pins per row (https://www.molex.com/pdm_docs/sd/430450221_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 horizontal +0 +26 +25 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0200_1x02_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0200 (compatible alternatives: 43650-0201, 43650-0202), 2 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0215_1x02_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0215 (compatible alternatives: 43650-0216, 43650-0217), 2 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +2 +2 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0300_1x03_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0300 (compatible alternatives: 43650-0301, 43650-0302), 3 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +3 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0315_1x03_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0315 (compatible alternatives: 43650-0316, 43650-0317), 3 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +3 +3 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0400_1x04_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0400 (compatible alternatives: 43650-0401, 43650-0402), 4 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0415_1x04_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0415 (compatible alternatives: 43650-0416, 43650-0417), 4 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +4 +4 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0500_1x05_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0500 (compatible alternatives: 43650-0501, 43650-0502), 5 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +5 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0515_1x05_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0515 (compatible alternatives: 43650-0516, 43650-0517), 5 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +5 +5 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0600_1x06_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0600 (compatible alternatives: 43650-0601, 43650-0602), 6 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0615_1x06_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0615 (compatible alternatives: 43650-0616, 43650-0617), 6 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +6 +6 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0700_1x07_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0700 (compatible alternatives: 43650-0701, 43650-0702), 7 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +7 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0715_1x07_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0715 (compatible alternatives: 43650-0716, 43650-0717), 7 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +7 +7 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0800_1x08_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0800 (compatible alternatives: 43650-0801, 43650-0802), 8 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0815_1x08_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0815 (compatible alternatives: 43650-0816, 43650-0817), 8 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +8 +8 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0900_1x09_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-0900 (compatible alternatives: 43650-0901, 43650-0902), 9 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +9 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43650-0915_1x09_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-0915 (compatible alternatives: 43650-0916, 43650-0917), 9 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +9 +9 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1000_1x10_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1000 (compatible alternatives: 43650-1001, 43650-1002), 10 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1015_1x10_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1015 (compatible alternatives: 43650-1016, 43650-1017), 10 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +10 +10 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1100_1x11_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1100 (compatible alternatives: 43650-1101, 43650-1102), 11 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +11 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1115_1x11_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1115 (compatible alternatives: 43650-1116, 43650-1117), 11 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +11 +11 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1200_1x12_P3.00mm_Horizontal +Molex Micro-Fit 3.0 Connector System, 43650-1200 (compatible alternatives: 43650-1201, 43650-1202), 12 Pins per row (https://www.molex.com/pdm_docs/sd/436500300_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 top entry +0 +12 +12 +Connector_Molex +Molex_Micro-Fit_3.0_43650-1215_1x12_P3.00mm_Vertical +Molex Micro-Fit 3.0 Connector System, 43650-1215 (compatible alternatives: 43650-1216, 43650-1217), 12 Pins per row (http://www.molex.com/pdm_docs/sd/436500215_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Fit_3.0 vertical +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53253-0270_1x02_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0270 (compatible alternatives: 53253-0250), 2 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +2 +2 +Connector_Molex +Molex_Micro-Latch_53253-0370_1x03_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0370 (compatible alternatives: 53253-0350), 3 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +3 +3 +Connector_Molex +Molex_Micro-Latch_53253-0470_1x04_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0470 (compatible alternatives: 53253-0450), 4 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +4 +4 +Connector_Molex +Molex_Micro-Latch_53253-0570_1x05_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0570 (compatible alternatives: 53253-0550), 5 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +5 +5 +Connector_Molex +Molex_Micro-Latch_53253-0670_1x06_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0670 (compatible alternatives: 53253-0650), 6 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +6 +6 +Connector_Molex +Molex_Micro-Latch_53253-0770_1x07_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0770 (compatible alternatives: 53253-0750), 7 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +7 +7 +Connector_Molex +Molex_Micro-Latch_53253-0870_1x08_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0870 (compatible alternatives: 53253-0850), 8 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +8 +8 +Connector_Molex +Molex_Micro-Latch_53253-0970_1x09_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-0970 (compatible alternatives: 53253-0950), 9 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +9 +9 +Connector_Molex +Molex_Micro-Latch_53253-1070_1x10_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1070 (compatible alternatives: 53253-1050), 10 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +10 +10 +Connector_Molex +Molex_Micro-Latch_53253-1170_1x11_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1170 (compatible alternatives: 53253-1150), 11 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +11 +11 +Connector_Molex +Molex_Micro-Latch_53253-1270_1x12_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1270 (compatible alternatives: 53253-1250), 12 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53253-1370_1x13_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1370 (compatible alternatives: 53253-1350), 13 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +13 +13 +Connector_Molex +Molex_Micro-Latch_53253-1470_1x14_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1470 (compatible alternatives: 53253-1450), 14 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +14 +14 +Connector_Molex +Molex_Micro-Latch_53253-1570_1x15_P2.00mm_Vertical +Molex Micro-Latch Wire-to-Board Connector System, 53253-1570 (compatible alternatives: 53253-1550), 15 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch side entry +0 +15 +15 +Connector_Molex +Molex_Micro-Latch_53254-0270_1x02_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0270 (compatible alternatives: 53254-0250), 2 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +2 +2 +Connector_Molex +Molex_Micro-Latch_53254-0370_1x03_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0370 (compatible alternatives: 53254-0350), 3 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +3 +3 +Connector_Molex +Molex_Micro-Latch_53254-0470_1x04_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0470 (compatible alternatives: 53254-0450), 4 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +4 +4 +Connector_Molex +Molex_Micro-Latch_53254-0570_1x05_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0570 (compatible alternatives: 53254-0550), 5 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +5 +5 +Connector_Molex +Molex_Micro-Latch_53254-0670_1x06_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0670 (compatible alternatives: 53254-0650), 6 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +6 +6 +Connector_Molex +Molex_Micro-Latch_53254-0770_1x07_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0770 (compatible alternatives: 53254-0750), 7 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +7 +7 +Connector_Molex +Molex_Micro-Latch_53254-0870_1x08_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0870 (compatible alternatives: 53254-0850), 8 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +8 +8 +Connector_Molex +Molex_Micro-Latch_53254-0970_1x09_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-0970 (compatible alternatives: 53254-0950), 9 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +9 +9 +Connector_Molex +Molex_Micro-Latch_53254-1070_1x10_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1070 (compatible alternatives: 53254-1050), 10 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +10 +10 +Connector_Molex +Molex_Micro-Latch_53254-1170_1x11_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1170 (compatible alternatives: 53254-1150), 11 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +11 +11 +Connector_Molex +Molex_Micro-Latch_53254-1270_1x12_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1270 (compatible alternatives: 53254-1250), 12 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +12 +12 +Connector_Molex +Molex_Micro-Latch_53254-1370_1x13_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1370 (compatible alternatives: 53254-1350), 13 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +13 +13 +Connector_Molex +Molex_Micro-Latch_53254-1470_1x14_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1470 (compatible alternatives: 53254-1450), 14 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +14 +14 +Connector_Molex +Molex_Micro-Latch_53254-1570_1x15_P2.00mm_Horizontal +Molex Micro-Latch Wire-to-Board Connector System, 53254-1570 (compatible alternatives: 53254-1550), 15 Pins per row (http://www.molex.com/pdm_docs/sd/532530770_sd.pdf), generated with kicad-footprint-generator +connector Molex Micro-Latch top entry +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55932-0210_1x02_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0210, with PCB locator, 2 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55932-0230_1x02_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0230, 2 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55932-0310_1x03_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0310, with PCB locator, 3 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55932-0330_1x03_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0330, 3 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55932-0410_1x04_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0410, with PCB locator, 4 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55932-0430_1x04_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0430, 4 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55932-0510_1x05_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0510, with PCB locator, 5 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55932-0530_1x05_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0530, 5 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55932-0610_1x06_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0610, with PCB locator, 6 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55932-0630_1x06_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0630, 6 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55932-0710_1x07_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0710, with PCB locator, 7 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55932-0730_1x07_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0730, 7 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55932-0810_1x08_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0810, with PCB locator, 8 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55932-0830_1x08_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0830, 8 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55932-0910_1x09_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0910, with PCB locator, 9 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55932-0930_1x09_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-0930, 9 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55932-1010_1x10_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1010, with PCB locator, 10 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55932-1030_1x10_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1030, 10 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55932-1110_1x11_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1110, with PCB locator, 11 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55932-1130_1x11_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1130, 11 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55932-1210_1x12_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1210, with PCB locator, 12 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55932-1230_1x12_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1230, 12 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55932-1310_1x13_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1310, with PCB locator, 13 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55932-1330_1x13_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1330, 13 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55932-1410_1x14_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1410, with PCB locator, 14 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55932-1430_1x14_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1430, 14 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55932-1510_1x15_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1510, with PCB locator, 15 Pins (http://www.molex.com/pdm_docs/sd/559320210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55932-1530_1x15_P2.00mm_Vertical +Molex MicroClasp Wire-to-Board System, 55932-1530, 15 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp side entry +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55935-0210_1x02_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0210, with PCB locator, 2 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55935-0230_1x02_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0230, 2 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +2 +2 +Connector_Molex +Molex_MicroClasp_55935-0310_1x03_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0310, with PCB locator, 3 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55935-0330_1x03_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0330, 3 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +3 +3 +Connector_Molex +Molex_MicroClasp_55935-0410_1x04_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0410, with PCB locator, 4 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55935-0430_1x04_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0430, 4 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +4 +4 +Connector_Molex +Molex_MicroClasp_55935-0510_1x05_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0510, with PCB locator, 5 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55935-0530_1x05_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0530, 5 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +5 +5 +Connector_Molex +Molex_MicroClasp_55935-0610_1x06_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0610, with PCB locator, 6 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55935-0630_1x06_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0630, 6 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +6 +6 +Connector_Molex +Molex_MicroClasp_55935-0710_1x07_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0710, with PCB locator, 7 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55935-0730_1x07_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0730, 7 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +7 +7 +Connector_Molex +Molex_MicroClasp_55935-0810_1x08_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0810, with PCB locator, 8 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55935-0830_1x08_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0830, 8 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +8 +8 +Connector_Molex +Molex_MicroClasp_55935-0910_1x09_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0910, with PCB locator, 9 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55935-0930_1x09_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-0930, 9 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +9 +9 +Connector_Molex +Molex_MicroClasp_55935-1010_1x10_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1010, with PCB locator, 10 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55935-1030_1x10_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1030, 10 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +10 +10 +Connector_Molex +Molex_MicroClasp_55935-1110_1x11_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1110, with PCB locator, 11 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55935-1130_1x11_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1130, 11 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +11 +11 +Connector_Molex +Molex_MicroClasp_55935-1210_1x12_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1210, with PCB locator, 12 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55935-1230_1x12_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1230, 12 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +12 +12 +Connector_Molex +Molex_MicroClasp_55935-1310_1x13_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1310, with PCB locator, 13 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55935-1330_1x13_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1330, 13 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +13 +13 +Connector_Molex +Molex_MicroClasp_55935-1410_1x14_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1410, with PCB locator, 14 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55935-1430_1x14_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1430, 14 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +14 +14 +Connector_Molex +Molex_MicroClasp_55935-1510_1x15_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1510, with PCB locator, 15 Pins (http://www.molex.com/pdm_docs/sd/559350210_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +15 +15 +Connector_Molex +Molex_MicroClasp_55935-1530_1x15_P2.00mm_Horizontal +Molex MicroClasp Wire-to-Board System, 55935-1530, 15 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator +connector Molex MicroClasp horizontal +0 +15 +15 +Connector_Molex +Molex_Mini-Fit_Jr_5566-02A2_2x01_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-02A2, example for new mpn: 39-28-902x, 1 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5566-02A_2x01_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-02A, example for new mpn: 39-28-x02x, 1 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5566-04A2_2x02_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-04A2, example for new mpn: 39-28-904x, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5566-04A_2x02_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-04A, example for new mpn: 39-28-x04x, 2 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5566-06A2_2x03_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-06A2, example for new mpn: 39-28-906x, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5566-06A_2x03_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-06A, example for new mpn: 39-28-x06x, 3 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5566-08A2_2x04_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-08A2, example for new mpn: 39-28-908x, 4 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5566-08A_2x04_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-08A, example for new mpn: 39-28-x08x, 4 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5566-10A2_2x05_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-10A2, example for new mpn: 39-28-910x, 5 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5566-10A_2x05_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-10A, example for new mpn: 39-28-x10x, 5 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5566-12A2_2x06_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-12A2, example for new mpn: 39-28-912x, 6 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5566-12A_2x06_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-12A, example for new mpn: 39-28-x12x, 6 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5566-14A2_2x07_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-14A2, example for new mpn: 39-28-914x, 7 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5566-14A_2x07_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-14A, example for new mpn: 39-28-x14x, 7 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5566-16A2_2x08_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-16A2, example for new mpn: 39-28-916x, 8 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5566-16A_2x08_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-16A, example for new mpn: 39-28-x16x, 8 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5566-18A2_2x09_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-18A2, example for new mpn: 39-28-918x, 9 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5566-18A_2x09_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-18A, example for new mpn: 39-28-x18x, 9 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5566-20A2_2x10_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-20A2, example for new mpn: 39-28-920x, 10 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5566-20A_2x10_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-20A, example for new mpn: 39-28-x20x, 10 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5566-22A2_2x11_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-22A2, example for new mpn: 39-28-922x, 11 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5566-22A_2x11_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-22A, example for new mpn: 39-28-x22x, 11 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5566-24A2_2x12_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-24A2, example for new mpn: 39-28-924x, 12 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039289068_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entryplastic_peg +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5566-24A_2x12_P4.20mm_Vertical +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5566-24A, example for new mpn: 39-28-x24x, 12 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr side entry +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5569-02A1_2x01_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-02A1, example for new mpn: 39-29-4029, 1 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5569-02A2_2x01_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-02A2, example for new mpn: 39-30-0020, 1 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +2 +2 +Connector_Molex +Molex_Mini-Fit_Jr_5569-04A1_2x02_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A1, example for new mpn: 39-29-4049, 2 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5569-04A2_2x02_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-04A2, example for new mpn: 39-30-0040, 2 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +4 +4 +Connector_Molex +Molex_Mini-Fit_Jr_5569-06A1_2x03_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A1, example for new mpn: 39-29-4069, 3 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5569-06A2_2x03_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-06A2, example for new mpn: 39-30-0060, 3 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +6 +6 +Connector_Molex +Molex_Mini-Fit_Jr_5569-08A1_2x04_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-08A1, example for new mpn: 39-29-4089, 4 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5569-08A2_2x04_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-08A2, example for new mpn: 39-30-0080, 4 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +8 +8 +Connector_Molex +Molex_Mini-Fit_Jr_5569-10A1_2x05_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-10A1, example for new mpn: 39-29-4109, 5 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5569-10A2_2x05_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-10A2, example for new mpn: 39-30-0100, 5 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +10 +10 +Connector_Molex +Molex_Mini-Fit_Jr_5569-12A1_2x06_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-12A1, example for new mpn: 39-29-4129, 6 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5569-12A2_2x06_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-12A2, example for new mpn: 39-30-0120, 6 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +12 +12 +Connector_Molex +Molex_Mini-Fit_Jr_5569-14A1_2x07_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-14A1, example for new mpn: 39-29-4149, 7 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5569-14A2_2x07_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-14A2, example for new mpn: 39-30-0140, 7 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +14 +14 +Connector_Molex +Molex_Mini-Fit_Jr_5569-16A1_2x08_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-16A1, example for new mpn: 39-29-4169, 8 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5569-16A2_2x08_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-16A2, example for new mpn: 39-30-0160, 8 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +16 +16 +Connector_Molex +Molex_Mini-Fit_Jr_5569-18A1_2x09_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-18A1, example for new mpn: 39-29-4189, 9 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5569-18A2_2x09_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-18A2, example for new mpn: 39-30-0180, 9 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +18 +18 +Connector_Molex +Molex_Mini-Fit_Jr_5569-20A1_2x10_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-20A1, example for new mpn: 39-29-4209, 10 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5569-20A2_2x10_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-20A2, example for new mpn: 39-30-0200, 10 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +20 +20 +Connector_Molex +Molex_Mini-Fit_Jr_5569-22A1_2x11_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-22A1, example for new mpn: 39-29-4229, 11 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5569-22A2_2x11_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-22A2, example for new mpn: 39-30-0220, 11 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +22 +22 +Connector_Molex +Molex_Mini-Fit_Jr_5569-24A1_2x12_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-24A1, example for new mpn: 39-29-4249, 12 Pins per row, Mounting: PCB Mounting Flange (http://www.molex.com/pdm_docs/sd/039291047_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryscrew_flange +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Jr_5569-24A2_2x12_P4.20mm_Horizontal +Molex Mini-Fit Jr. Power Connectors, old mpn/engineering number: 5569-24A2, example for new mpn: 39-30-0240, 12 Pins per row, Mounting: Snap-in Plastic Peg PCB Lock (http://www.molex.com/pdm_docs/sd/039300020_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Jr top entryplastic_peg +0 +24 +24 +Connector_Molex +Molex_Mini-Fit_Sr_42819-22XX_1x02_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-22XX, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +6 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42819-22XX_1x02_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-22XX, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +32 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42819-32XX_1x03_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-32XX, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +8 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42819-32XX_1x03_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-32XX, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +47 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42819-42XX_1x04_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-42XX, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +10 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42819-42XX_1x04_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-42XX, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +62 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42819-52XX_1x05_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-52XX, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +12 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42819-52XX_1x05_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-52XX, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +77 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42819-62XX_1x06_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 42819-62XX, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42819-62XX_1x06_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42819-62XX, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428192214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42820-22XX_1x02_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-22XX, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +6 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42820-22XX_1x02_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-22XX, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +32 +2 +Connector_Molex +Molex_Mini-Fit_Sr_42820-32XX_1x03_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-32XX, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +8 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42820-32XX_1x03_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-32XX, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +47 +3 +Connector_Molex +Molex_Mini-Fit_Sr_42820-42XX_1x04_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-42XX, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +10 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42820-42XX_1x04_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-42XX, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +62 +4 +Connector_Molex +Molex_Mini-Fit_Sr_42820-52XX_1x05_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-52XX, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +12 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42820-52XX_1x05_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-52XX, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +77 +5 +Connector_Molex +Molex_Mini-Fit_Sr_42820-62XX_1x06_P10.00mm_Horizontal +Molex Mini-Fit Sr. Power Connectors, 42820-62XX, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_42820-62XX_1x06_P10.00mm_Horizontal_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 42820-62XX, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr top entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx06_2x03_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +14 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx06_2x03_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx06, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +92 +6 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx08_2x04_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +18 +8 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx08_2x04_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx08, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +122 +8 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx10_2x05_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +22 +10 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx10_2x05_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx10, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +152 +10 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx12_2x06_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +26 +12 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx12_2x06_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx12, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +182 +12 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx14_2x07_P10.00mm_Vertical +Molex Mini-Fit Sr. Power Connectors, 43915-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +30 +14 +Connector_Molex +Molex_Mini-Fit_Sr_43915-xx14_2x07_P10.00mm_Vertical_ThermalVias +Molex Mini-Fit Sr. Power Connectors, 43915-xx14, With thermal vias in pads, 7 Pins per row (http://www.molex.com/pdm_docs/sd/439151404_sd.pdf), generated with kicad-footprint-generator +connector Molex Mini-Fit_Sr side entry +0 +212 +14 +Connector_Molex +Molex_Nano-Fit_105309-xx02_1x02_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx02, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +2 +2 +Connector_Molex +Molex_Nano-Fit_105309-xx03_1x03_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx03, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +3 +3 +Connector_Molex +Molex_Nano-Fit_105309-xx04_1x04_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx04, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105309-xx05_1x05_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx05, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +5 +5 +Connector_Molex +Molex_Nano-Fit_105309-xx06_1x06_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx06, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105309-xx07_1x07_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx07, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +7 +7 +Connector_Molex +Molex_Nano-Fit_105309-xx08_1x08_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105309-xx08, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105310-xx04_2x02_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx04, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105310-xx06_2x03_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105310-xx08_2x04_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105310-xx10_2x05_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +10 +10 +Connector_Molex +Molex_Nano-Fit_105310-xx12_2x06_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +12 +12 +Connector_Molex +Molex_Nano-Fit_105310-xx14_2x07_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +14 +14 +Connector_Molex +Molex_Nano-Fit_105310-xx16_2x08_P2.50mm_Vertical +Molex Nano-Fit Power Connectors, 105310-xx16, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053101208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit side entry +0 +16 +16 +Connector_Molex +Molex_Nano-Fit_105313-xx02_1x02_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx02, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +2 +2 +Connector_Molex +Molex_Nano-Fit_105313-xx03_1x03_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx03, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +3 +3 +Connector_Molex +Molex_Nano-Fit_105313-xx04_1x04_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx04, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105313-xx05_1x05_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx05, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +5 +5 +Connector_Molex +Molex_Nano-Fit_105313-xx06_1x06_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx06, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105313-xx07_1x07_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx07, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +7 +7 +Connector_Molex +Molex_Nano-Fit_105313-xx08_1x08_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105313-xx08, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053131208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105314-xx04_2x02_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx04, 2 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +4 +4 +Connector_Molex +Molex_Nano-Fit_105314-xx06_2x03_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx06, 3 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +6 +6 +Connector_Molex +Molex_Nano-Fit_105314-xx08_2x04_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx08, 4 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +8 +8 +Connector_Molex +Molex_Nano-Fit_105314-xx10_2x05_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx10, 5 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +10 +10 +Connector_Molex +Molex_Nano-Fit_105314-xx12_2x06_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx12, 6 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +12 +12 +Connector_Molex +Molex_Nano-Fit_105314-xx14_2x07_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx14, 7 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +14 +14 +Connector_Molex +Molex_Nano-Fit_105314-xx16_2x08_P2.50mm_Horizontal +Molex Nano-Fit Power Connectors, 105314-xx16, 8 Pins per row (http://www.molex.com/pdm_docs/sd/1053141208_sd.pdf), generated with kicad-footprint-generator +connector Molex Nano-Fit top entry +0 +16 +16 +Connector_Molex +Molex_Panelmate_53780-0270_1x02-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0270 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +4 +3 +Connector_Molex +Molex_Panelmate_53780-0370_1x03-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0370 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +5 +4 +Connector_Molex +Molex_Panelmate_53780-0470_1x04-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0470 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +6 +5 +Connector_Molex +Molex_Panelmate_53780-0570_1x05-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0570 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +7 +6 +Connector_Molex +Molex_Panelmate_53780-0670_1x06-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0670 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +8 +7 +Connector_Molex +Molex_Panelmate_53780-0770_1x07-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0770 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +9 +8 +Connector_Molex +Molex_Panelmate_53780-0870_1x08-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0870 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +10 +9 +Connector_Molex +Molex_Panelmate_53780-0970_1x09-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-0970 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +11 +10 +Connector_Molex +Molex_Panelmate_53780-1070_1x10-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1070 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +12 +11 +Connector_Molex +Molex_Panelmate_53780-1270_1x12-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1270 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +14 +13 +Connector_Molex +Molex_Panelmate_53780-1470_1x14-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1470 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +16 +15 +Connector_Molex +Molex_Panelmate_53780-1570_1x15-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1570 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +17 +16 +Connector_Molex +Molex_Panelmate_53780-1870_1x18-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-1870 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +20 +19 +Connector_Molex +Molex_Panelmate_53780-3070_1x30-1MP_P1.25mm_Horizontal +Molex Panelmate series connector, 53780-3070 (), generated with kicad-footprint-generator +connector Molex Panelmate top entry +0 +32 +31 +Connector_Molex +Molex_Pico-Clasp_202396-0207_1x02-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0207 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +4 +3 +Connector_Molex +Molex_Pico-Clasp_202396-0307_1x03-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0307 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +5 +4 +Connector_Molex +Molex_Pico-Clasp_202396-0407_1x04-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0407 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +6 +5 +Connector_Molex +Molex_Pico-Clasp_202396-0507_1x05-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0507 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +7 +6 +Connector_Molex +Molex_Pico-Clasp_202396-0607_1x06-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0607 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +8 +7 +Connector_Molex +Molex_Pico-Clasp_202396-0707_1x07-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0707 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +9 +8 +Connector_Molex +Molex_Pico-Clasp_202396-0807_1x08-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0807 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +10 +9 +Connector_Molex +Molex_Pico-Clasp_202396-0907_1x09-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-0907 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +11 +10 +Connector_Molex +Molex_Pico-Clasp_202396-1007_1x10-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1007 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +12 +11 +Connector_Molex +Molex_Pico-Clasp_202396-1107_1x11-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1107 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +13 +12 +Connector_Molex +Molex_Pico-Clasp_202396-1207_1x12-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1207 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +14 +13 +Connector_Molex +Molex_Pico-Clasp_202396-1307_1x13-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1307 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +15 +14 +Connector_Molex +Molex_Pico-Clasp_202396-1407_1x14-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1407 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +16 +15 +Connector_Molex +Molex_Pico-Clasp_202396-1507_1x15-1MP_P1.00mm_Horizontal +Molex Pico-Clasp series connector, 202396-1507 (http://www.molex.com/pdm_docs/sd/2023960207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp top entry +0 +17 +16 +Connector_Molex +Molex_Pico-Clasp_501331-0207_1x02-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0207 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +4 +3 +Connector_Molex +Molex_Pico-Clasp_501331-0307_1x03-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0307 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +5 +4 +Connector_Molex +Molex_Pico-Clasp_501331-0407_1x04-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0407 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +6 +5 +Connector_Molex +Molex_Pico-Clasp_501331-0507_1x05-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0507 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +7 +6 +Connector_Molex +Molex_Pico-Clasp_501331-0607_1x06-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0607 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +8 +7 +Connector_Molex +Molex_Pico-Clasp_501331-0707_1x07-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0707 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +9 +8 +Connector_Molex +Molex_Pico-Clasp_501331-0807_1x08-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0807 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +10 +9 +Connector_Molex +Molex_Pico-Clasp_501331-0907_1x09-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-0907 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +11 +10 +Connector_Molex +Molex_Pico-Clasp_501331-1007_1x10-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1007 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +12 +11 +Connector_Molex +Molex_Pico-Clasp_501331-1107_1x11-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1107 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +13 +12 +Connector_Molex +Molex_Pico-Clasp_501331-1207_1x12-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1207 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +14 +13 +Connector_Molex +Molex_Pico-Clasp_501331-1307_1x13-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1307 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +15 +14 +Connector_Molex +Molex_Pico-Clasp_501331-1407_1x14-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1407 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +16 +15 +Connector_Molex +Molex_Pico-Clasp_501331-1507_1x15-1MP_P1.00mm_Vertical +Molex Pico-Clasp series connector, 501331-1507 (http://www.molex.com/pdm_docs/sd/5013310207_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Clasp side entry +0 +17 +16 +Connector_Molex +Molex_Pico-EZmate_78171-0002_1x02-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0002 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +4 +3 +Connector_Molex +Molex_Pico-EZmate_78171-0003_1x03-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0003 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +5 +4 +Connector_Molex +Molex_Pico-EZmate_78171-0004_1x04-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0004 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +6 +5 +Connector_Molex +Molex_Pico-EZmate_78171-0005_1x05-1MP_P1.20mm_Vertical +Molex Pico-EZmate series connector, 78171-0005 (http://www.molex.com/pdm_docs/sd/781710002_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate side entry +0 +7 +6 +Connector_Molex +Molex_Pico-EZmate_Slim_202656-0021_1x02-1MP_P1.20mm_Vertical +Molex Pico-EZmate_Slim series connector, 202656-0021 (http://www.molex.com/pdm_docs/sd/2026560021_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-EZmate_Slim side entry +0 +4 +3 +Connector_Molex +Molex_Pico-Lock_504050-0491_1x04-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0491 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +6 +5 +Connector_Molex +Molex_Pico-Lock_504050-0591_1x05-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0591 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +7 +6 +Connector_Molex +Molex_Pico-Lock_504050-0691_1x06-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0691 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +8 +7 +Connector_Molex +Molex_Pico-Lock_504050-0791_1x07-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0791 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +9 +8 +Connector_Molex +Molex_Pico-Lock_504050-0891_1x08-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-0891 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +10 +9 +Connector_Molex +Molex_Pico-Lock_504050-1091_1x10-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-1091 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +12 +11 +Connector_Molex +Molex_Pico-Lock_504050-1291_1x12-1MP_P1.50mm_Horizontal +Molex Pico-Lock series connector, 504050-1291 (http://www.molex.com/pdm_docs/sd/5040500891_sd.pdf), generated with kicad-footprint-generator +connector Molex Pico-Lock horizontal +0 +14 +13 +Connector_Molex +Molex_Pico-SPOX_87437-1443_1x14-P1.5mm_Vertical +Molex Pico-SPOX Connector System, 87437-1443, 14 Pins per row (https://www.molex.com/pdm_docs/sd/874371443_sd.pdf#page=2) +molex pico spox 14 +0 +28 +14 +Connector_Molex +Molex_PicoBlade_53047-0210_1x02_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0210, 2 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +2 +2 +Connector_Molex +Molex_PicoBlade_53047-0310_1x03_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0310, 3 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +3 +3 +Connector_Molex +Molex_PicoBlade_53047-0410_1x04_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0410, 4 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +4 +4 +Connector_Molex +Molex_PicoBlade_53047-0510_1x05_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0510, 5 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +5 +5 +Connector_Molex +Molex_PicoBlade_53047-0610_1x06_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0610, 6 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +6 +6 +Connector_Molex +Molex_PicoBlade_53047-0710_1x07_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0710, 7 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +7 +7 +Connector_Molex +Molex_PicoBlade_53047-0810_1x08_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0810, 8 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +8 +8 +Connector_Molex +Molex_PicoBlade_53047-0910_1x09_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-0910, 9 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +9 +9 +Connector_Molex +Molex_PicoBlade_53047-1010_1x10_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1010, 10 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +10 +10 +Connector_Molex +Molex_PicoBlade_53047-1110_1x11_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1110, 11 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +11 +11 +Connector_Molex +Molex_PicoBlade_53047-1210_1x12_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1210, 12 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +12 +12 +Connector_Molex +Molex_PicoBlade_53047-1310_1x13_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1310, 13 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +13 +13 +Connector_Molex +Molex_PicoBlade_53047-1410_1x14_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1410, 14 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +14 +14 +Connector_Molex +Molex_PicoBlade_53047-1510_1x15_P1.25mm_Vertical +Molex PicoBlade Connector System, 53047-1510, 15 Pins per row (http://www.molex.com/pdm_docs/sd/530470610_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +15 +15 +Connector_Molex +Molex_PicoBlade_53048-0210_1x02_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0210, 2 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +2 +2 +Connector_Molex +Molex_PicoBlade_53048-0310_1x03_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0310, 3 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +3 +3 +Connector_Molex +Molex_PicoBlade_53048-0410_1x04_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0410, 4 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +4 +4 +Connector_Molex +Molex_PicoBlade_53048-0510_1x05_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0510, 5 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +5 +5 +Connector_Molex +Molex_PicoBlade_53048-0610_1x06_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0610, 6 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +6 +6 +Connector_Molex +Molex_PicoBlade_53048-0710_1x07_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0710, 7 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +7 +7 +Connector_Molex +Molex_PicoBlade_53048-0810_1x08_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0810, 8 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +8 +8 +Connector_Molex +Molex_PicoBlade_53048-0910_1x09_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-0910, 9 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +9 +9 +Connector_Molex +Molex_PicoBlade_53048-1010_1x10_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1010, 10 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +10 +10 +Connector_Molex +Molex_PicoBlade_53048-1110_1x11_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1110, 11 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +11 +11 +Connector_Molex +Molex_PicoBlade_53048-1210_1x12_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1210, 12 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +12 +12 +Connector_Molex +Molex_PicoBlade_53048-1310_1x13_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1310, 13 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +13 +13 +Connector_Molex +Molex_PicoBlade_53048-1410_1x14_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1410, 14 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +14 +14 +Connector_Molex +Molex_PicoBlade_53048-1510_1x15_P1.25mm_Horizontal +Molex PicoBlade Connector System, 53048-1510, 15 Pins per row (http://www.molex.com/pdm_docs/sd/530480210_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +15 +15 +Connector_Molex +Molex_PicoBlade_53261-0271_1x02-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0271 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +4 +3 +Connector_Molex +Molex_PicoBlade_53261-0371_1x03-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0371 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +5 +4 +Connector_Molex +Molex_PicoBlade_53261-0471_1x04-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0471 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +6 +5 +Connector_Molex +Molex_PicoBlade_53261-0571_1x05-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0571 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +7 +6 +Connector_Molex +Molex_PicoBlade_53261-0671_1x06-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0671 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +8 +7 +Connector_Molex +Molex_PicoBlade_53261-0771_1x07-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0771 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +9 +8 +Connector_Molex +Molex_PicoBlade_53261-0871_1x08-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0871 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +10 +9 +Connector_Molex +Molex_PicoBlade_53261-0971_1x09-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-0971 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +11 +10 +Connector_Molex +Molex_PicoBlade_53261-1071_1x10-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1071 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +12 +11 +Connector_Molex +Molex_PicoBlade_53261-1171_1x11-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1171 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +13 +12 +Connector_Molex +Molex_PicoBlade_53261-1271_1x12-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1271 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +14 +13 +Connector_Molex +Molex_PicoBlade_53261-1371_1x13-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1371 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +15 +14 +Connector_Molex +Molex_PicoBlade_53261-1471_1x14-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1471 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +16 +15 +Connector_Molex +Molex_PicoBlade_53261-1571_1x15-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1571 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +17 +16 +Connector_Molex +Molex_PicoBlade_53261-1771_1x17-1MP_P1.25mm_Horizontal +Molex PicoBlade series connector, 53261-1771 (http://www.molex.com/pdm_docs/sd/532610271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade top entry +0 +19 +18 +Connector_Molex +Molex_PicoBlade_53398-0271_1x02-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0271 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +4 +3 +Connector_Molex +Molex_PicoBlade_53398-0371_1x03-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0371 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +5 +4 +Connector_Molex +Molex_PicoBlade_53398-0471_1x04-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0471 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +6 +5 +Connector_Molex +Molex_PicoBlade_53398-0571_1x05-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0571 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +7 +6 +Connector_Molex +Molex_PicoBlade_53398-0671_1x06-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0671 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +8 +7 +Connector_Molex +Molex_PicoBlade_53398-0771_1x07-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0771 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +9 +8 +Connector_Molex +Molex_PicoBlade_53398-0871_1x08-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0871 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +10 +9 +Connector_Molex +Molex_PicoBlade_53398-0971_1x09-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-0971 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +11 +10 +Connector_Molex +Molex_PicoBlade_53398-1071_1x10-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1071 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +12 +11 +Connector_Molex +Molex_PicoBlade_53398-1171_1x11-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1171 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +13 +12 +Connector_Molex +Molex_PicoBlade_53398-1271_1x12-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1271 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +14 +13 +Connector_Molex +Molex_PicoBlade_53398-1371_1x13-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1371 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +15 +14 +Connector_Molex +Molex_PicoBlade_53398-1471_1x14-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1471 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +16 +15 +Connector_Molex +Molex_PicoBlade_53398-1571_1x15-1MP_P1.25mm_Vertical +Molex PicoBlade series connector, 53398-1571 (http://www.molex.com/pdm_docs/sd/533980271_sd.pdf), generated with kicad-footprint-generator +connector Molex PicoBlade side entry +0 +17 +16 +Connector_Molex +Molex_Picoflex_90325-0004_2x02_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0004, 4 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +4 +4 +Connector_Molex +Molex_Picoflex_90325-0006_2x03_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0006, 6 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +6 +6 +Connector_Molex +Molex_Picoflex_90325-0008_2x04_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0008, 8 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +8 +8 +Connector_Molex +Molex_Picoflex_90325-0010_2x05_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0010, 10 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +10 +10 +Connector_Molex +Molex_Picoflex_90325-0012_2x06_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0012, 12 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +12 +12 +Connector_Molex +Molex_Picoflex_90325-0014_2x07_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0014, 14 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +14 +14 +Connector_Molex +Molex_Picoflex_90325-0016_2x08_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0016, 16 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +16 +16 +Connector_Molex +Molex_Picoflex_90325-0018_2x09_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0018, 18 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +18 +18 +Connector_Molex +Molex_Picoflex_90325-0020_2x10_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0020, 20 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +20 +20 +Connector_Molex +Molex_Picoflex_90325-0022_2x11_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0022, 22 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +22 +22 +Connector_Molex +Molex_Picoflex_90325-0024_2x12_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0024, 24 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +24 +24 +Connector_Molex +Molex_Picoflex_90325-0026_2x13_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90325-0026, 26 Pins (http://www.molex.com/pdm_docs/sd/903250004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +26 +26 +Connector_Molex +Molex_Picoflex_90814-0004_2x02_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0004, 4 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +4 +4 +Connector_Molex +Molex_Picoflex_90814-0006_2x03_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0006, 6 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +6 +6 +Connector_Molex +Molex_Picoflex_90814-0008_2x04_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0008, 8 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +8 +8 +Connector_Molex +Molex_Picoflex_90814-0010_2x05_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0010, 10 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +10 +10 +Connector_Molex +Molex_Picoflex_90814-0012_2x06_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0012, 12 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +12 +12 +Connector_Molex +Molex_Picoflex_90814-0014_2x07_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0014, 14 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +14 +14 +Connector_Molex +Molex_Picoflex_90814-0016_2x08_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0016, 16 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +16 +16 +Connector_Molex +Molex_Picoflex_90814-0018_2x09_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0018, 18 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +18 +18 +Connector_Molex +Molex_Picoflex_90814-0020_2x10_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0020, 20 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +20 +20 +Connector_Molex +Molex_Picoflex_90814-0022_2x11_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0022, 22 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +22 +22 +Connector_Molex +Molex_Picoflex_90814-0024_2x12_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0024, 24 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +24 +24 +Connector_Molex +Molex_Picoflex_90814-0026_2x13_P1.27mm_Vertical +Molex Picoflex Ribbon-Cable Connectors, 90814-0026, 26 Pins (http://www.molex.com/pdm_docs/sd/908140004_sd.pdf), generated with kicad-footprint-generator +connector Molex Picoflex side entry +0 +26 +26 +Connector_Molex +Molex_SL_171971-0002_1x02_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0002 (compatible alternatives: 171971-0102, 171971-0202), 2 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +2 +2 +Connector_Molex +Molex_SL_171971-0003_1x03_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0003 (compatible alternatives: 171971-0103, 171971-0203), 3 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +3 +3 +Connector_Molex +Molex_SL_171971-0004_1x04_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0004 (compatible alternatives: 171971-0104, 171971-0204), 4 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +4 +4 +Connector_Molex +Molex_SL_171971-0005_1x05_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0005 (compatible alternatives: 171971-0105, 171971-0205), 5 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +5 +5 +Connector_Molex +Molex_SL_171971-0006_1x06_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0006 (compatible alternatives: 171971-0106, 171971-0206), 6 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +6 +6 +Connector_Molex +Molex_SL_171971-0007_1x07_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0007 (compatible alternatives: 171971-0107, 171971-0207), 7 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +7 +7 +Connector_Molex +Molex_SL_171971-0008_1x08_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0008 (compatible alternatives: 171971-0108, 171971-0208), 8 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +8 +8 +Connector_Molex +Molex_SL_171971-0009_1x09_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0009 (compatible alternatives: 171971-0109, 171971-0209), 9 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +9 +9 +Connector_Molex +Molex_SL_171971-0010_1x10_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0010 (compatible alternatives: 171971-0110, 171971-0210), 10 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +10 +10 +Connector_Molex +Molex_SL_171971-0011_1x11_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0011 (compatible alternatives: 171971-0111, 171971-0211), 11 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +11 +11 +Connector_Molex +Molex_SL_171971-0012_1x12_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0012 (compatible alternatives: 171971-0112, 171971-0212), 12 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +12 +12 +Connector_Molex +Molex_SL_171971-0013_1x13_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0013 (compatible alternatives: 171971-0113, 171971-0213), 13 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +13 +13 +Connector_Molex +Molex_SL_171971-0014_1x14_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0014 (compatible alternatives: 171971-0114, 171971-0214), 14 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +14 +14 +Connector_Molex +Molex_SL_171971-0015_1x15_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0015 (compatible alternatives: 171971-0115, 171971-0215), 15 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +15 +15 +Connector_Molex +Molex_SL_171971-0016_1x16_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0016 (compatible alternatives: 171971-0116, 171971-0216), 16 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +16 +16 +Connector_Molex +Molex_SL_171971-0017_1x17_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0017 (compatible alternatives: 171971-0117, 171971-0217), 17 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +17 +17 +Connector_Molex +Molex_SL_171971-0018_1x18_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0018 (compatible alternatives: 171971-0118, 171971-0218), 18 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +18 +18 +Connector_Molex +Molex_SL_171971-0019_1x19_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0019 (compatible alternatives: 171971-0119, 171971-0219), 19 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +19 +19 +Connector_Molex +Molex_SL_171971-0020_1x20_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0020 (compatible alternatives: 171971-0120, 171971-0220), 20 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +20 +20 +Connector_Molex +Molex_SL_171971-0021_1x21_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0021 (compatible alternatives: 171971-0121, 171971-0221), 21 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +21 +21 +Connector_Molex +Molex_SL_171971-0022_1x22_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0022 (compatible alternatives: 171971-0122, 171971-0222), 22 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +22 +22 +Connector_Molex +Molex_SL_171971-0023_1x23_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0023 (compatible alternatives: 171971-0123, 171971-0223), 23 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +23 +23 +Connector_Molex +Molex_SL_171971-0024_1x24_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0024 (compatible alternatives: 171971-0124, 171971-0224), 24 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +24 +24 +Connector_Molex +Molex_SL_171971-0025_1x25_P2.54mm_Vertical +Molex Stackable Linear Connector, 171971-0025 (compatible alternatives: 171971-0125, 171971-0225), 25 Pins per row (https://www.molex.com/pdm_docs/sd/1719710002_sd.pdf), generated with kicad-footprint-generator +connector Molex SL vertical +0 +25 +25 +Connector_Molex +Molex_SPOX_5267-02A_1x02_P2.50mm_Vertical +Molex SPOX Connector System, 5267-02A, 2 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +2 +2 +Connector_Molex +Molex_SPOX_5267-03A_1x03_P2.50mm_Vertical +Molex SPOX Connector System, 5267-03A, 3 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +3 +3 +Connector_Molex +Molex_SPOX_5267-04A_1x04_P2.50mm_Vertical +Molex SPOX Connector System, 5267-04A, 4 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +4 +4 +Connector_Molex +Molex_SPOX_5267-05A_1x05_P2.50mm_Vertical +Molex SPOX Connector System, 5267-05A, 5 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +5 +5 +Connector_Molex +Molex_SPOX_5267-06A_1x06_P2.50mm_Vertical +Molex SPOX Connector System, 5267-06A, 6 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +6 +6 +Connector_Molex +Molex_SPOX_5267-07A_1x07_P2.50mm_Vertical +Molex SPOX Connector System, 5267-07A, 7 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +7 +7 +Connector_Molex +Molex_SPOX_5267-08A_1x08_P2.50mm_Vertical +Molex SPOX Connector System, 5267-08A, 8 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +8 +8 +Connector_Molex +Molex_SPOX_5267-09A_1x09_P2.50mm_Vertical +Molex SPOX Connector System, 5267-09A, 9 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +9 +9 +Connector_Molex +Molex_SPOX_5267-10A_1x10_P2.50mm_Vertical +Molex SPOX Connector System, 5267-10A, 10 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +10 +10 +Connector_Molex +Molex_SPOX_5267-11A_1x11_P2.50mm_Vertical +Molex SPOX Connector System, 5267-11A, 11 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +11 +11 +Connector_Molex +Molex_SPOX_5267-12A_1x12_P2.50mm_Vertical +Molex SPOX Connector System, 5267-12A, 12 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +12 +12 +Connector_Molex +Molex_SPOX_5267-13A_1x13_P2.50mm_Vertical +Molex SPOX Connector System, 5267-13A, 13 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +13 +13 +Connector_Molex +Molex_SPOX_5267-14A_1x14_P2.50mm_Vertical +Molex SPOX Connector System, 5267-14A, 14 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +14 +14 +Connector_Molex +Molex_SPOX_5267-15A_1x15_P2.50mm_Vertical +Molex SPOX Connector System, 5267-15A, 15 Pins per row (http://www.molex.com/pdm_docs/sd/022035035_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX side entry +0 +15 +15 +Connector_Molex +Molex_SPOX_5268-02A_1x02_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-02A, 2 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +2 +2 +Connector_Molex +Molex_SPOX_5268-03A_1x03_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-03A, 3 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +3 +3 +Connector_Molex +Molex_SPOX_5268-04A_1x04_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-04A, 4 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +4 +4 +Connector_Molex +Molex_SPOX_5268-05A_1x05_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-05A, 5 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +5 +5 +Connector_Molex +Molex_SPOX_5268-06A_1x06_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-06A, 6 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +6 +6 +Connector_Molex +Molex_SPOX_5268-07A_1x07_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-07A, 7 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +7 +7 +Connector_Molex +Molex_SPOX_5268-08A_1x08_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-08A, 8 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +8 +8 +Connector_Molex +Molex_SPOX_5268-09A_1x09_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-09A, 9 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +9 +9 +Connector_Molex +Molex_SPOX_5268-10A_1x10_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-10A, 10 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +10 +10 +Connector_Molex +Molex_SPOX_5268-11A_1x11_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-11A, 11 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +11 +11 +Connector_Molex +Molex_SPOX_5268-12A_1x12_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-12A, 12 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +12 +12 +Connector_Molex +Molex_SPOX_5268-13A_1x13_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-13A, 13 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +13 +13 +Connector_Molex +Molex_SPOX_5268-14A_1x14_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-14A, 14 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +14 +14 +Connector_Molex +Molex_SPOX_5268-15A_1x15_P2.50mm_Horizontal +Molex SPOX Connector System, 5268-15A, 15 Pins per row (https://www.molex.com/pdm_docs/sd/022057045_sd.pdf), generated with kicad-footprint-generator +connector Molex SPOX horizontal +0 +15 +15 +Connector_Molex +Molex_Sabre_43160-0102_1x02_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +4 +2 +Connector_Molex +Molex_Sabre_43160-0102_1x02_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +30 +2 +Connector_Molex +Molex_Sabre_43160-0103_1x03_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +6 +3 +Connector_Molex +Molex_Sabre_43160-0103_1x03_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +45 +3 +Connector_Molex +Molex_Sabre_43160-0104_1x04_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +8 +4 +Connector_Molex +Molex_Sabre_43160-0104_1x04_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +60 +4 +Connector_Molex +Molex_Sabre_43160-0105_1x05_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +10 +5 +Connector_Molex +Molex_Sabre_43160-0105_1x05_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +75 +5 +Connector_Molex +Molex_Sabre_43160-0106_1x06_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-0106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +12 +6 +Connector_Molex +Molex_Sabre_43160-0106_1x06_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-0106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431600105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +90 +6 +Connector_Molex +Molex_Sabre_43160-1102_1x02_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +6 +2 +Connector_Molex +Molex_Sabre_43160-1102_1x02_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +32 +2 +Connector_Molex +Molex_Sabre_43160-1103_1x03_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +8 +3 +Connector_Molex +Molex_Sabre_43160-1103_1x03_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +47 +3 +Connector_Molex +Molex_Sabre_43160-1104_1x04_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +10 +4 +Connector_Molex +Molex_Sabre_43160-1104_1x04_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +62 +4 +Connector_Molex +Molex_Sabre_43160-1105_1x05_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +12 +5 +Connector_Molex +Molex_Sabre_43160-1105_1x05_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +77 +5 +Connector_Molex +Molex_Sabre_43160-1106_1x06_P7.49mm_Horizontal +Molex Sabre Power Connector, 43160-1106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +14 +6 +Connector_Molex +Molex_Sabre_43160-1106_1x06_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 43160-1106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431605304_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +92 +6 +Connector_Molex +Molex_Sabre_43160-2102_1x02_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +6 +2 +Connector_Molex +Molex_Sabre_43160-2102_1x02_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +32 +2 +Connector_Molex +Molex_Sabre_43160-2103_1x03_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +8 +3 +Connector_Molex +Molex_Sabre_43160-2103_1x03_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +47 +3 +Connector_Molex +Molex_Sabre_43160-2104_1x04_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +10 +4 +Connector_Molex +Molex_Sabre_43160-2104_1x04_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +62 +4 +Connector_Molex +Molex_Sabre_43160-2105_1x05_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +12 +5 +Connector_Molex +Molex_Sabre_43160-2105_1x05_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +77 +5 +Connector_Molex +Molex_Sabre_43160-2106_1x06_P7.49mm_Vertical +Molex Sabre Power Connector, 43160-2106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +14 +6 +Connector_Molex +Molex_Sabre_43160-2106_1x06_P7.49mm_Vertical_ThermalVias +Molex Sabre Power Connector, 43160-2106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/431602102_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre side entry +0 +92 +6 +Connector_Molex +Molex_Sabre_46007-1102_1x02_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1102, 2 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +4 +2 +Connector_Molex +Molex_Sabre_46007-1102_1x02_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1102, With thermal vias in pads, 2 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +30 +2 +Connector_Molex +Molex_Sabre_46007-1103_1x03_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1103, 3 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +6 +3 +Connector_Molex +Molex_Sabre_46007-1103_1x03_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1103, With thermal vias in pads, 3 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +45 +3 +Connector_Molex +Molex_Sabre_46007-1104_1x04_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1104, 4 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +8 +4 +Connector_Molex +Molex_Sabre_46007-1104_1x04_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1104, With thermal vias in pads, 4 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +60 +4 +Connector_Molex +Molex_Sabre_46007-1105_1x05_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1105, 5 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +10 +5 +Connector_Molex +Molex_Sabre_46007-1105_1x05_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1105, With thermal vias in pads, 5 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +75 +5 +Connector_Molex +Molex_Sabre_46007-1106_1x06_P7.49mm_Horizontal +Molex Sabre Power Connector, 46007-1106, 6 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +12 +6 +Connector_Molex +Molex_Sabre_46007-1106_1x06_P7.49mm_Horizontal_ThermalVias +Molex Sabre Power Connector, 46007-1106, With thermal vias in pads, 6 Pins per row (http://www.molex.com/pdm_docs/sd/460071105_sd.pdf), generated with kicad-footprint-generator +connector Molex Sabre top entry +0 +90 +6 +Connector_Molex +Molex_SlimStack_52991-0208_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0208, 20 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +20 +20 +Connector_Molex +Molex_SlimStack_52991-0308_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0308, 30 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +30 +30 +Connector_Molex +Molex_SlimStack_52991-0408_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0408, 40 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +40 +40 +Connector_Molex +Molex_SlimStack_52991-0508_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0508, 50 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +50 +50 +Connector_Molex +Molex_SlimStack_52991-0608_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0608, 60 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +60 +60 +Connector_Molex +Molex_SlimStack_52991-0708_2x35_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0708, 70 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +70 +70 +Connector_Molex +Molex_SlimStack_52991-0808_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 52991-0808, 80 Pins (http://www.molex.com/pdm_docs/sd/529910308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +80 +80 +Connector_Molex +Molex_SlimStack_53748-0208_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0208, 20 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +20 +20 +Connector_Molex +Molex_SlimStack_53748-0308_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0308, 30 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +30 +30 +Connector_Molex +Molex_SlimStack_53748-0408_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0408, 40 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +40 +40 +Connector_Molex +Molex_SlimStack_53748-0608_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0608, 60 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +60 +60 +Connector_Molex +Molex_SlimStack_53748-0708_2x35_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0708, 70 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +70 +70 +Connector_Molex +Molex_SlimStack_53748-0808_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 53748-0808, 80 Pins (https://www.molex.com/pdm_docs/sd/537480308_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack vertical +0 +80 +80 +Connector_Molex +Molex_SlimStack_54722-0164_2x08_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0164, 16 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +16 +16 +Connector_Molex +Molex_SlimStack_54722-0204_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0204, 20 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_54722-0224_2x11_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0224, 22 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_54722-0244_2x12_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0244, 24 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_54722-0304_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0304, 30 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_54722-0344_2x17_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0344, 34 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_54722-0404_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0404, 40 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_54722-0504_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0504, 50 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_54722-0604_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0604, 60 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_54722-0804_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 54722-0804, 80 Pins (http://www.molex.com/pdm_docs/sd/547220804_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_55560-0161_2x08_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0161, 16 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +16 +16 +Connector_Molex +Molex_SlimStack_55560-0201_2x10_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0201, 20 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_55560-0221_2x11_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0221, 22 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_55560-0241_2x12_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0241, 24 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_55560-0301_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0301, 30 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_55560-0341_2x17_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0341, 34 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_55560-0401_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0401, 40 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_55560-0501_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0501, 50 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_55560-0601_2x30_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0601, 60 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_55560-0801_2x40_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0801, 80 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_501920-3001_2x15_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-3001, 30 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_501920-4001_2x20_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-4001, 40 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_501920-5001_2x25_P0.50mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 501920-5001, 50 Pins (http://www.molex.com/pdm_docs/sd/5019204001_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502426-0810_2x04_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-0810, 8 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +8 +8 +Connector_Molex +Molex_SlimStack_502426-1410_2x07_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-1410, 14 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +14 +14 +Connector_Molex +Molex_SlimStack_502426-2010_2x10_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2010, 20 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_502426-2210_2x11_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2210, 22 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_502426-2410_2x12_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2410, 24 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_502426-2610_2x13_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-2610, 26 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +26 +26 +Connector_Molex +Molex_SlimStack_502426-3010_2x15_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3010, 30 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_502426-3210_2x16_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3210, 32 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +32 +32 +Connector_Molex +Molex_SlimStack_502426-3410_2x17_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-3410, 34 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_502426-4010_2x20_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-4010, 40 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_502426-4410_2x22_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-4410, 44 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +44 +44 +Connector_Molex +Molex_SlimStack_502426-5010_2x25_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-5010, 50 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502426-6010_2x30_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-6010, 60 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_502426-6410_2x32_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-6410, 64 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +64 +64 +Connector_Molex +Molex_SlimStack_502426-8010_2x40_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502426-8010, 80 Pins (http://www.molex.com/pdm_docs/sd/5024260810_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_Molex +Molex_SlimStack_502430-0820_2x04_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-0820, 8 Pins (http://www.molex.com/pdm_docs/sd/5024300820_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +8 +8 +Connector_Molex +Molex_SlimStack_502430-1410_2x07_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-1410, 14 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +14 +14 +Connector_Molex +Molex_SlimStack_502430-2010_2x10_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2010, 20 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +20 +20 +Connector_Molex +Molex_SlimStack_502430-2210_2x11_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2210, 22 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +22 +22 +Connector_Molex +Molex_SlimStack_502430-2410_2x12_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2410, 24 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +24 +24 +Connector_Molex +Molex_SlimStack_502430-2610_2x13_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-2610, 26 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +26 +26 +Connector_Molex +Molex_SlimStack_502430-3010_2x15_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3010, 30 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +30 +30 +Connector_Molex +Molex_SlimStack_502430-3210_2x16_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3210, 32 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +32 +32 +Connector_Molex +Molex_SlimStack_502430-3410_2x17_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-3410, 34 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +34 +34 +Connector_Molex +Molex_SlimStack_502430-4010_2x20_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-4010, 40 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +40 +40 +Connector_Molex +Molex_SlimStack_502430-4410_2x22_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-4410, 44 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +44 +44 +Connector_Molex +Molex_SlimStack_502430-5010_2x25_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-5010, 50 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +50 +50 +Connector_Molex +Molex_SlimStack_502430-6010_2x30_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-6010, 60 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +60 +60 +Connector_Molex +Molex_SlimStack_502430-6410_2x32_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-6410, 64 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +64 +64 +Connector_Molex +Molex_SlimStack_502430-8010_2x40_P0.40mm_Vertical +Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 502430-8010, 80 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator +connector Molex SlimStack side entry +0 +80 +80 +Connector_PCBEdge +4UCON_10156_2x40_P1.27mm_Socket_Horizontal +4UCON 10156 Card edge socket with 80 contacts (40 each side), through-hole, http://www.4uconnector.com/online/object/4udrawing/10156.pdf +4UCON 10156 Card edge socket with 80 contacts +0 +80 +80 +Connector_PCBEdge +BUS_AT +AT ISA 16 bits Bus Edge Connector +BUS ISA AT Edge connector +0 +98 +98 +Connector_PCBEdge +BUS_PCI +PCI bus Edge Connector +PCI bus Edge Connector +0 +240 +120 +Connector_PCBEdge +BUS_PCI_Express_Mini +Mini-PCI Express bus connector (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=11) +mini pcie +0 +54 +53 +Connector_PCBEdge +BUS_PCI_Express_Mini_Dual +Mini-PCI Express bus connector full size with dual clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=28) +mini pcie +0 +54 +53 +Connector_PCBEdge +BUS_PCI_Express_Mini_Full +Mini-PCI Express bus connector full size with clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=24) +mini pcie +0 +54 +53 +Connector_PCBEdge +BUS_PCI_Express_Mini_Half +Mini-PCI Express bus connector half size with clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=25) +mini pcie +0 +54 +53 +Connector_PCBEdge +BUS_PCIexpress_x1 +PCIexpress Bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 +PCIe +0 +36 +36 +Connector_PCBEdge +BUS_PCIexpress_x4 +PCIexpress Bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 +PCIe +0 +64 +64 +Connector_PCBEdge +BUS_PCIexpress_x8 +PCIexpress Bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 +PCIe +0 +98 +98 +Connector_PCBEdge +BUS_PCIexpress_x16 +PCIexpress Bus Edge Connector x1 http://www.ritrontek.com/uploadfile/2016/1026/20161026105231124.pdf#page=70 +PCIe +0 +164 +164 +Connector_PCBEdge +Samtec_MECF-05-0_-L-DV_2x05_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-0_-NP-L-DV_2x05_P1.27mm_Edge +Highspeed card edge connector for PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-05-01-L-DV-WT_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +10 +8 +Connector_PCBEdge +Samtec_MECF-05-01-L-DV_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-01-NP-L-DV-WT_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +12 +10 +Connector_PCBEdge +Samtec_MECF-05-01-NP-L-DV_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-05-02-L-DV-WT_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +10 +8 +Connector_PCBEdge +Samtec_MECF-05-02-L-DV_2x05_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (polarized) +conn samtec card-edge high-speed +0 +8 +8 +Connector_PCBEdge +Samtec_MECF-05-02-NP-L-DV-WT_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +12 +10 +Connector_PCBEdge +Samtec_MECF-05-02-NP-L-DV_2x05_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 05 contacts (not polarized) +conn samtec card-edge high-speed +0 +10 +10 +Connector_PCBEdge +Samtec_MECF-08-0_-L-DV_2x08_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-0_-NP-L-DV_2x08_P1.27mm_Edge +Highspeed card edge connector for PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-08-01-L-DV-WT_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +16 +14 +Connector_PCBEdge +Samtec_MECF-08-01-L-DV_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-01-NP-L-DV-WT_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +18 +16 +Connector_PCBEdge +Samtec_MECF-08-01-NP-L-DV_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-08-02-L-DV-WT_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +16 +14 +Connector_PCBEdge +Samtec_MECF-08-02-L-DV_2x08_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (polarized) +conn samtec card-edge high-speed +0 +14 +14 +Connector_PCBEdge +Samtec_MECF-08-02-NP-L-DV-WT_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +18 +16 +Connector_PCBEdge +Samtec_MECF-08-02-NP-L-DV_2x08_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 08 contacts (not polarized) +conn samtec card-edge high-speed +0 +16 +16 +Connector_PCBEdge +Samtec_MECF-20-0_-L-DV_2x20_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-0_-NP-L-DV_2x20_P1.27mm_Edge +Highspeed card edge connector for PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-20-01-L-DV-WT_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +40 +38 +Connector_PCBEdge +Samtec_MECF-20-01-L-DV_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-01-NP-L-DV-WT_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +42 +40 +Connector_PCBEdge +Samtec_MECF-20-01-NP-L-DV_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-20-02-L-DV-WT_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +40 +38 +Connector_PCBEdge +Samtec_MECF-20-02-L-DV_2x20_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (polarized) +conn samtec card-edge high-speed +0 +38 +38 +Connector_PCBEdge +Samtec_MECF-20-02-NP-L-DV-WT_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +42 +40 +Connector_PCBEdge +Samtec_MECF-20-02-NP-L-DV_2x20_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 20 contacts (not polarized) +conn samtec card-edge high-speed +0 +40 +40 +Connector_PCBEdge +Samtec_MECF-30-0_-L-DV_2x30_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-0_-NP-L-DV_2x30_P1.27mm_Edge +Highspeed card edge connector for PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-30-01-L-DV-WT_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +60 +58 +Connector_PCBEdge +Samtec_MECF-30-01-L-DV_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-01-NP-L-DV-WT_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +62 +60 +Connector_PCBEdge +Samtec_MECF-30-01-NP-L-DV_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-30-02-L-DV-WT_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +60 +58 +Connector_PCBEdge +Samtec_MECF-30-02-L-DV_2x30_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (polarized) +conn samtec card-edge high-speed +0 +58 +58 +Connector_PCBEdge +Samtec_MECF-30-02-NP-L-DV-WT_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +62 +60 +Connector_PCBEdge +Samtec_MECF-30-02-NP-L-DV_2x30_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 30 contacts (not polarized) +conn samtec card-edge high-speed +0 +60 +60 +Connector_PCBEdge +Samtec_MECF-40-0_-L-DV_2x40_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-0_-NP-L-DV_2x40_P1.27mm_Edge +Highspeed card edge connector for PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-40-01-L-DV-WT_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +80 +78 +Connector_PCBEdge +Samtec_MECF-40-01-L-DV_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-01-NP-L-DV-WT_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +82 +80 +Connector_PCBEdge +Samtec_MECF-40-01-NP-L-DV_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-40-02-L-DV-WT_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +80 +78 +Connector_PCBEdge +Samtec_MECF-40-02-L-DV_2x40_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (polarized) +conn samtec card-edge high-speed +0 +78 +78 +Connector_PCBEdge +Samtec_MECF-40-02-NP-L-DV-WT_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +82 +80 +Connector_PCBEdge +Samtec_MECF-40-02-NP-L-DV_2x40_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 40 contacts (not polarized) +conn samtec card-edge high-speed +0 +80 +80 +Connector_PCBEdge +Samtec_MECF-50-0_-L-DV_2x50_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-0_-NP-L-DV_2x50_P1.27mm_Edge +Highspeed card edge connector for PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-50-01-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +100 +98 +Connector_PCBEdge +Samtec_MECF-50-01-L-DV_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-01-NP-L-DV-WT_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +102 +100 +Connector_PCBEdge +Samtec_MECF-50-01-NP-L-DV_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-50-02-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +100 +98 +Connector_PCBEdge +Samtec_MECF-50-02-L-DV_2x50_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (polarized) +conn samtec card-edge high-speed +0 +98 +98 +Connector_PCBEdge +Samtec_MECF-50-02-NP-L-DV-WT_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +102 +100 +Connector_PCBEdge +Samtec_MECF-50-02-NP-L-DV_2x50_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 50 contacts (not polarized) +conn samtec card-edge high-speed +0 +100 +100 +Connector_PCBEdge +Samtec_MECF-60-0_-L-DV_2x60_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-0_-NP-L-DV_2x60_P1.27mm_Edge +Highspeed card edge connector for PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-60-01-L-DV-WT_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +118 +116 +Connector_PCBEdge +Samtec_MECF-60-01-L-DV_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-01-NP-L-DV-WT_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +122 +120 +Connector_PCBEdge +Samtec_MECF-60-01-NP-L-DV_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-60-02-L-DV-WT_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +118 +116 +Connector_PCBEdge +Samtec_MECF-60-02-L-DV_2x60_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (polarized) +conn samtec card-edge high-speed +0 +116 +116 +Connector_PCBEdge +Samtec_MECF-60-02-NP-L-DV-WT_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +122 +120 +Connector_PCBEdge +Samtec_MECF-60-02-NP-L-DV_2x60_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 60 contacts (not polarized) +conn samtec card-edge high-speed +0 +120 +120 +Connector_PCBEdge +Samtec_MECF-70-0_-L-DV_2x70_P1.27mm_Polarized_Edge +Highspeed card edge connector for PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-0_-NP-L-DV_2x70_P1.27mm_Edge +Highspeed card edge connector for PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_PCBEdge +Samtec_MECF-70-01-L-DV-WT_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +138 +136 +Connector_PCBEdge +Samtec_MECF-70-01-L-DV_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-01-NP-L-DV-WT_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +142 +140 +Connector_PCBEdge +Samtec_MECF-70-01-NP-L-DV_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 1.6mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_PCBEdge +Samtec_MECF-70-02-L-DV-WT_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +138 +136 +Connector_PCBEdge +Samtec_MECF-70-02-L-DV_2x70_P1.27mm_Polarized_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (polarized) +conn samtec card-edge high-speed +0 +136 +136 +Connector_PCBEdge +Samtec_MECF-70-02-NP-L-DV-WT_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +142 +140 +Connector_PCBEdge +Samtec_MECF-70-02-NP-L-DV_2x70_P1.27mm_Socket_Horizontal +Highspeed card edge connector for 2.4mm PCB's with 70 contacts (not polarized) +conn samtec card-edge high-speed +0 +140 +140 +Connector_PCBEdge +molex_EDGELOCK_2-CKT +https://www.molex.com/pdm_docs/sd/2008900106_sd.pdf +Connector PCBEdge molex EDGELOCK +0 +2 +2 +Connector_PCBEdge +molex_EDGELOCK_4-CKT +https://www.molex.com/pdm_docs/sd/2008900106_sd.pdf +Connector PCBEdge molex EDGELOCK +0 +4 +4 +Connector_PCBEdge +molex_EDGELOCK_6-CKT +https://www.molex.com/pdm_docs/sd/2008900106_sd.pdf +Connector PCBEdge molex EDGELOCK +0 +6 +6 +Connector_PCBEdge +molex_EDGELOCK_8-CKT +https://www.molex.com/pdm_docs/sd/2008900106_sd.pdf +Connector PCBEdge molex EDGELOCK +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_2-G-7,62_1x02_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/2-G-7,62; number of pins: 02; pin pitch: 7.62mm; Angled || order number: 1766233 12A 630V +phoenix_contact connector GMSTBA_01x02_G_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_2-G_1x02_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/2-G; number of pins: 02; pin pitch: 7.50mm; Angled || order number: 1766343 12A 630V +phoenix_contact connector GMSTBA_01x02_G_7.50mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_3-G-7,62_1x03_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/3-G-7,62; number of pins: 03; pin pitch: 7.62mm; Angled || order number: 1766246 12A 630V +phoenix_contact connector GMSTBA_01x03_G_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_3-G_1x03_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/3-G; number of pins: 03; pin pitch: 7.50mm; Angled || order number: 1766356 12A 630V +phoenix_contact connector GMSTBA_01x03_G_7.50mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_4-G-7,62_1x04_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/4-G-7,62; number of pins: 04; pin pitch: 7.62mm; Angled || order number: 1766259 12A 630V +phoenix_contact connector GMSTBA_01x04_G_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_4-G_1x04_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/4-G; number of pins: 04; pin pitch: 7.50mm; Angled || order number: 1766369 12A 630V +phoenix_contact connector GMSTBA_01x04_G_7.50mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_5-G-7,62_1x05_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/5-G-7,62; number of pins: 05; pin pitch: 7.62mm; Angled || order number: 1766262 12A 630V +phoenix_contact connector GMSTBA_01x05_G_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_5-G_1x05_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/5-G; number of pins: 05; pin pitch: 7.50mm; Angled || order number: 1766372 12A 630V +phoenix_contact connector GMSTBA_01x05_G_7.50mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_6-G-7,62_1x06_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/6-G-7,62; number of pins: 06; pin pitch: 7.62mm; Angled || order number: 1766275 12A 630V +phoenix_contact connector GMSTBA_01x06_G_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_6-G_1x06_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/6-G; number of pins: 06; pin pitch: 7.50mm; Angled || order number: 1766385 12A 630V +phoenix_contact connector GMSTBA_01x06_G_7.50mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_7-G-7,62_1x07_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/7-G-7,62; number of pins: 07; pin pitch: 7.62mm; Angled || order number: 1766288 12A 630V +phoenix_contact connector GMSTBA_01x07_G_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_7-G_1x07_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/7-G; number of pins: 07; pin pitch: 7.50mm; Angled || order number: 1766398 12A 630V +phoenix_contact connector GMSTBA_01x07_G_7.50mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_8-G-7,62_1x08_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/8-G-7,62; number of pins: 08; pin pitch: 7.62mm; Angled || order number: 1766291 12A 630V +phoenix_contact connector GMSTBA_01x08_G_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_8-G_1x08_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/8-G; number of pins: 08; pin pitch: 7.50mm; Angled || order number: 1766408 12A 630V +phoenix_contact connector GMSTBA_01x08_G_7.50mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_9-G-7,62_1x09_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/9-G-7,62; number of pins: 09; pin pitch: 7.62mm; Angled || order number: 1766301 12A 630V +phoenix_contact connector GMSTBA_01x09_G_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_9-G_1x09_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/9-G; number of pins: 09; pin pitch: 7.50mm; Angled || order number: 1766411 12A 630V +phoenix_contact connector GMSTBA_01x09_G_7.50mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_10-G-7,62_1x10_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/10-G-7,62; number of pins: 10; pin pitch: 7.62mm; Angled || order number: 1766314 12A 630V +phoenix_contact connector GMSTBA_01x10_G_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_10-G_1x10_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/10-G; number of pins: 10; pin pitch: 7.50mm; Angled || order number: 1766424 12A 630V +phoenix_contact connector GMSTBA_01x10_G_7.50mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_11-G-7,62_1x11_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/11-G-7,62; number of pins: 11; pin pitch: 7.62mm; Angled || order number: 1766327 12A 630V +phoenix_contact connector GMSTBA_01x11_G_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_11-G_1x11_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/11-G; number of pins: 11; pin pitch: 7.50mm; Angled || order number: 1766437 12A 630V +phoenix_contact connector GMSTBA_01x11_G_7.50mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_12-G-7,62_1x12_P7.62mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/12-G-7,62; number of pins: 12; pin pitch: 7.62mm; Angled || order number: 1766330 12A 630V +phoenix_contact connector GMSTBA_01x12_G_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBA_2,5_12-G_1x12_P7.50mm_Horizontal +Generic Phoenix Contact connector footprint for: GMSTBA_2,5/12-G; number of pins: 12; pin pitch: 7.50mm; Angled || order number: 1766440 12A 630V +phoenix_contact connector GMSTBA_01x12_G_7.50mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_2-G-7,62_1x02_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/2-G-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical || order number: 1766770 12A 630V +phoenix_contact connector GMSTBVA_01x02_G_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_2-G_1x02_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/2-G; number of pins: 02; pin pitch: 7.50mm; Vertical || order number: 1766660 12A 630V +phoenix_contact connector GMSTBVA_01x02_G_7.50mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_3-G-7,62_1x03_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/3-G-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical || order number: 1766783 12A 630V +phoenix_contact connector GMSTBVA_01x03_G_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_3-G_1x03_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/3-G; number of pins: 03; pin pitch: 7.50mm; Vertical || order number: 1766673 12A 630V +phoenix_contact connector GMSTBVA_01x03_G_7.50mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_4-G-7,62_1x04_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/4-G-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical || order number: 1766796 12A 630V +phoenix_contact connector GMSTBVA_01x04_G_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_4-G_1x04_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/4-G; number of pins: 04; pin pitch: 7.50mm; Vertical || order number: 1766686 12A 630V +phoenix_contact connector GMSTBVA_01x04_G_7.50mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_5-G-7,62_1x05_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/5-G-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical || order number: 1766806 12A 630V +phoenix_contact connector GMSTBVA_01x05_G_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_5-G_1x05_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/5-G; number of pins: 05; pin pitch: 7.50mm; Vertical || order number: 1766699 12A 630V +phoenix_contact connector GMSTBVA_01x05_G_7.50mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_6-G-7,62_1x06_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/6-G-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical || order number: 1766819 12A 630V +phoenix_contact connector GMSTBVA_01x06_G_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_6-G_1x06_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/6-G; number of pins: 06; pin pitch: 7.50mm; Vertical || order number: 1766709 12A 630V +phoenix_contact connector GMSTBVA_01x06_G_7.50mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_7-G-7,62_1x07_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/7-G-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical || order number: 1766822 12A 630V +phoenix_contact connector GMSTBVA_01x07_G_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_7-G_1x07_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/7-G; number of pins: 07; pin pitch: 7.50mm; Vertical || order number: 1766712 12A 630V +phoenix_contact connector GMSTBVA_01x07_G_7.50mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_8-G-7,62_1x08_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/8-G-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical || order number: 1766835 12A 630V +phoenix_contact connector GMSTBVA_01x08_G_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_8-G_1x08_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/8-G; number of pins: 08; pin pitch: 7.50mm; Vertical || order number: 1766725 12A 630V +phoenix_contact connector GMSTBVA_01x08_G_7.50mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_9-G-7,62_1x09_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/9-G-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical || order number: 1766848 12A 630V +phoenix_contact connector GMSTBVA_01x09_G_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_9-G_1x09_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/9-G; number of pins: 09; pin pitch: 7.50mm; Vertical || order number: 1766738 12A 630V +phoenix_contact connector GMSTBVA_01x09_G_7.50mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_10-G-7,62_1x10_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/10-G-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical || order number: 1766851 12A 630V +phoenix_contact connector GMSTBVA_01x10_G_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_10-G_1x10_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/10-G; number of pins: 10; pin pitch: 7.50mm; Vertical || order number: 1766741 12A 630V +phoenix_contact connector GMSTBVA_01x10_G_7.50mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_11-G-7,62_1x11_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/11-G-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical || order number: 1766864 12A 630V +phoenix_contact connector GMSTBVA_01x11_G_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_11-G_1x11_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/11-G; number of pins: 11; pin pitch: 7.50mm; Vertical || order number: 1766754 12A 630V +phoenix_contact connector GMSTBVA_01x11_G_7.50mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_12-G-7,62_1x12_P7.62mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/12-G-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical || order number: 1766877 12A 630V +phoenix_contact connector GMSTBVA_01x12_G_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBVA_2,5_12-G_1x12_P7.50mm_Vertical +Generic Phoenix Contact connector footprint for: GMSTBVA_2,5/12-G; number of pins: 12; pin pitch: 7.50mm; Vertical || order number: 1766767 12A 630V +phoenix_contact connector GMSTBVA_01x12_G_7.50mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_2-GF-7,62_1x02_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829154 12A 630V +phoenix_contact connector GMSTBV_01x02_GF_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_2-GF-7,62_1x02_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829154 12A 630V +phoenix_contact connector GMSTBV_01x02_GF_7.62mm_MH +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_3-GF-7,62_1x03_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829167 12A 630V +phoenix_contact connector GMSTBV_01x03_GF_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_3-GF-7,62_1x03_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829167 12A 630V +phoenix_contact connector GMSTBV_01x03_GF_7.62mm_MH +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_4-GF-7,62_1x04_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829170 12A 630V +phoenix_contact connector GMSTBV_01x04_GF_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_4-GF-7,62_1x04_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829170 12A 630V +phoenix_contact connector GMSTBV_01x04_GF_7.62mm_MH +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_5-GF-7,62_1x05_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829183 12A 630V +phoenix_contact connector GMSTBV_01x05_GF_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_5-GF-7,62_1x05_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829183 12A 630V +phoenix_contact connector GMSTBV_01x05_GF_7.62mm_MH +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_6-GF-7,62_1x06_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829196 12A 630V +phoenix_contact connector GMSTBV_01x06_GF_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_6-GF-7,62_1x06_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829196 12A 630V +phoenix_contact connector GMSTBV_01x06_GF_7.62mm_MH +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_7-GF-7,62_1x07_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829206 12A 630V +phoenix_contact connector GMSTBV_01x07_GF_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_7-GF-7,62_1x07_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829206 12A 630V +phoenix_contact connector GMSTBV_01x07_GF_7.62mm_MH +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_8-GF-7,62_1x08_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829219 12A 630V +phoenix_contact connector GMSTBV_01x08_GF_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_8-GF-7,62_1x08_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829219 12A 630V +phoenix_contact connector GMSTBV_01x08_GF_7.62mm_MH +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_9-GF-7,62_1x09_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829222 12A 630V +phoenix_contact connector GMSTBV_01x09_GF_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_9-GF-7,62_1x09_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829222 12A 630V +phoenix_contact connector GMSTBV_01x09_GF_7.62mm_MH +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_10-GF-7,62_1x10_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829235 12A 630V +phoenix_contact connector GMSTBV_01x10_GF_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_10-GF-7,62_1x10_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829235 12A 630V +phoenix_contact connector GMSTBV_01x10_GF_7.62mm_MH +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_11-GF-7,62_1x11_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829248 12A 630V +phoenix_contact connector GMSTBV_01x11_GF_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_11-GF-7,62_1x11_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829248 12A 630V +phoenix_contact connector GMSTBV_01x11_GF_7.62mm_MH +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_12-GF-7,62_1x12_P7.62mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical; threaded flange || order number: 1829251 12A 630V +phoenix_contact connector GMSTBV_01x12_GF_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTBV_2,5_12-GF-7,62_1x12_P7.62mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTBV_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1829251 12A 630V +phoenix_contact connector GMSTBV_01x12_GF_7.62mm_MH +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_2-GF-7,62_1x02_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806229 12A 630V +phoenix_contact connector GMSTB_01x02_GF_7.62mm +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_2-GF-7,62_1x02_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/2-GF-7,62; number of pins: 02; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806229 12A 630V +phoenix_contact connector GMSTB_01x02_GF_7.62mm_MH +0 +2 +2 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_3-GF-7,62_1x03_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806232 12A 630V +phoenix_contact connector GMSTB_01x03_GF_7.62mm +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_3-GF-7,62_1x03_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/3-GF-7,62; number of pins: 03; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806232 12A 630V +phoenix_contact connector GMSTB_01x03_GF_7.62mm_MH +0 +3 +3 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_4-GF-7,62_1x04_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806245 12A 630V +phoenix_contact connector GMSTB_01x04_GF_7.62mm +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_4-GF-7,62_1x04_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/4-GF-7,62; number of pins: 04; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806245 12A 630V +phoenix_contact connector GMSTB_01x04_GF_7.62mm_MH +0 +4 +4 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_5-GF-7,62_1x05_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806258 12A 630V +phoenix_contact connector GMSTB_01x05_GF_7.62mm +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_5-GF-7,62_1x05_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/5-GF-7,62; number of pins: 05; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806258 12A 630V +phoenix_contact connector GMSTB_01x05_GF_7.62mm_MH +0 +5 +5 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_6-GF-7,62_1x06_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806261 12A 630V +phoenix_contact connector GMSTB_01x06_GF_7.62mm +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_6-GF-7,62_1x06_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/6-GF-7,62; number of pins: 06; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806261 12A 630V +phoenix_contact connector GMSTB_01x06_GF_7.62mm_MH +0 +6 +6 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_7-GF-7,62_1x07_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806274 12A 630V +phoenix_contact connector GMSTB_01x07_GF_7.62mm +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_7-GF-7,62_1x07_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/7-GF-7,62; number of pins: 07; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806274 12A 630V +phoenix_contact connector GMSTB_01x07_GF_7.62mm_MH +0 +7 +7 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_8-GF-7,62_1x08_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806287 12A 630V +phoenix_contact connector GMSTB_01x08_GF_7.62mm +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_8-GF-7,62_1x08_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/8-GF-7,62; number of pins: 08; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806287 12A 630V +phoenix_contact connector GMSTB_01x08_GF_7.62mm_MH +0 +8 +8 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_9-GF-7,62_1x09_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806290 12A 630V +phoenix_contact connector GMSTB_01x09_GF_7.62mm +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_9-GF-7,62_1x09_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/9-GF-7,62; number of pins: 09; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806290 12A 630V +phoenix_contact connector GMSTB_01x09_GF_7.62mm_MH +0 +9 +9 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_10-GF-7,62_1x10_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806300 12A 630V +phoenix_contact connector GMSTB_01x10_GF_7.62mm +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_10-GF-7,62_1x10_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/10-GF-7,62; number of pins: 10; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806300 12A 630V +phoenix_contact connector GMSTB_01x10_GF_7.62mm_MH +0 +10 +10 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_11-GF-7,62_1x11_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806313 12A 630V +phoenix_contact connector GMSTB_01x11_GF_7.62mm +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_11-GF-7,62_1x11_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/11-GF-7,62; number of pins: 11; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806313 12A 630V +phoenix_contact connector GMSTB_01x11_GF_7.62mm_MH +0 +11 +11 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_12-GF-7,62_1x12_P7.62mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: GMSTB_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Angled; threaded flange || order number: 1806326 12A 630V +phoenix_contact connector GMSTB_01x12_GF_7.62mm +0 +12 +12 +Connector_Phoenix_GMSTB +PhoenixContact_GMSTB_2,5_12-GF-7,62_1x12_P7.62mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: GMSTB_2,5/12-GF-7,62; number of pins: 12; pin pitch: 7.62mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806326 12A 630V +phoenix_contact connector GMSTB_01x12_GF_7.62mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-G-3.5_1x02_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical || order number: 1843606 8A 160V +phoenix_contact connector MCV_01x02_G_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-G-3.81_1x02_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical || order number: 1803426 8A 160V +phoenix_contact connector MCV_01x02_G_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.5_1x02_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843224 8A 160V +phoenix_contact connector MCV_01x02_GF_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.5_1x02_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843224 8A 160V +phoenix_contact connector MCV_01x02_GF_3.5mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.81_1x02_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830596 8A 160V +phoenix_contact connector MCV_01x02_GF_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_2-GF-3.81_1x02_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830596 8A 160V +phoenix_contact connector MCV_01x02_GF_3.81mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-G-3.5_1x03_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical || order number: 1843619 8A 160V +phoenix_contact connector MCV_01x03_G_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-G-3.81_1x03_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical || order number: 1803439 8A 160V +phoenix_contact connector MCV_01x03_G_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.5_1x03_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843237 8A 160V +phoenix_contact connector MCV_01x03_GF_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.5_1x03_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843237 8A 160V +phoenix_contact connector MCV_01x03_GF_3.5mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.81_1x03_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830606 8A 160V +phoenix_contact connector MCV_01x03_GF_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_3-GF-3.81_1x03_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830606 8A 160V +phoenix_contact connector MCV_01x03_GF_3.81mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-G-3.5_1x04_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical || order number: 1843622 8A 160V +phoenix_contact connector MCV_01x04_G_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-G-3.81_1x04_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical || order number: 1803442 8A 160V +phoenix_contact connector MCV_01x04_G_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.5_1x04_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843240 8A 160V +phoenix_contact connector MCV_01x04_GF_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.5_1x04_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843240 8A 160V +phoenix_contact connector MCV_01x04_GF_3.5mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.81_1x04_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830619 8A 160V +phoenix_contact connector MCV_01x04_GF_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_4-GF-3.81_1x04_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830619 8A 160V +phoenix_contact connector MCV_01x04_GF_3.81mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-G-3.5_1x05_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical || order number: 1843635 8A 160V +phoenix_contact connector MCV_01x05_G_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-G-3.81_1x05_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical || order number: 1803455 8A 160V +phoenix_contact connector MCV_01x05_G_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.5_1x05_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843253 8A 160V +phoenix_contact connector MCV_01x05_GF_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.5_1x05_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843253 8A 160V +phoenix_contact connector MCV_01x05_GF_3.5mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.81_1x05_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830622 8A 160V +phoenix_contact connector MCV_01x05_GF_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_5-GF-3.81_1x05_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830622 8A 160V +phoenix_contact connector MCV_01x05_GF_3.81mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-G-3.5_1x06_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical || order number: 1843648 8A 160V +phoenix_contact connector MCV_01x06_G_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-G-3.81_1x06_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical || order number: 1803468 8A 160V +phoenix_contact connector MCV_01x06_G_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.5_1x06_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843266 8A 160V +phoenix_contact connector MCV_01x06_GF_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.5_1x06_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843266 8A 160V +phoenix_contact connector MCV_01x06_GF_3.5mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.81_1x06_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830635 8A 160V +phoenix_contact connector MCV_01x06_GF_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_6-GF-3.81_1x06_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830635 8A 160V +phoenix_contact connector MCV_01x06_GF_3.81mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-G-3.5_1x07_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical || order number: 1843651 8A 160V +phoenix_contact connector MCV_01x07_G_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-G-3.81_1x07_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical || order number: 1803471 8A 160V +phoenix_contact connector MCV_01x07_G_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.5_1x07_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843279 8A 160V +phoenix_contact connector MCV_01x07_GF_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.5_1x07_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843279 8A 160V +phoenix_contact connector MCV_01x07_GF_3.5mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.81_1x07_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830648 8A 160V +phoenix_contact connector MCV_01x07_GF_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_7-GF-3.81_1x07_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830648 8A 160V +phoenix_contact connector MCV_01x07_GF_3.81mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-G-3.5_1x08_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical || order number: 1843664 8A 160V +phoenix_contact connector MCV_01x08_G_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-G-3.81_1x08_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical || order number: 1803484 8A 160V +phoenix_contact connector MCV_01x08_G_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.5_1x08_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843282 8A 160V +phoenix_contact connector MCV_01x08_GF_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.5_1x08_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843282 8A 160V +phoenix_contact connector MCV_01x08_GF_3.5mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.81_1x08_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830651 8A 160V +phoenix_contact connector MCV_01x08_GF_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_8-GF-3.81_1x08_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830651 8A 160V +phoenix_contact connector MCV_01x08_GF_3.81mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-G-3.5_1x09_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical || order number: 1843677 8A 160V +phoenix_contact connector MCV_01x09_G_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-G-3.81_1x09_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical || order number: 1803497 8A 160V +phoenix_contact connector MCV_01x09_G_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.5_1x09_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843295 8A 160V +phoenix_contact connector MCV_01x09_GF_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.5_1x09_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843295 8A 160V +phoenix_contact connector MCV_01x09_GF_3.5mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.81_1x09_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830664 8A 160V +phoenix_contact connector MCV_01x09_GF_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_9-GF-3.81_1x09_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830664 8A 160V +phoenix_contact connector MCV_01x09_GF_3.81mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-G-3.5_1x10_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical || order number: 1843680 8A 160V +phoenix_contact connector MCV_01x10_G_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-G-3.81_1x10_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical || order number: 1803507 8A 160V +phoenix_contact connector MCV_01x10_G_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.5_1x10_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843305 8A 160V +phoenix_contact connector MCV_01x10_GF_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.5_1x10_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843305 8A 160V +phoenix_contact connector MCV_01x10_GF_3.5mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.81_1x10_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830677 8A 160V +phoenix_contact connector MCV_01x10_GF_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_10-GF-3.81_1x10_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830677 8A 160V +phoenix_contact connector MCV_01x10_GF_3.81mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-G-3.5_1x11_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical || order number: 1843693 8A 160V +phoenix_contact connector MCV_01x11_G_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-G-3.81_1x11_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical || order number: 1803510 8A 160V +phoenix_contact connector MCV_01x11_G_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.5_1x11_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843318 8A 160V +phoenix_contact connector MCV_01x11_GF_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.5_1x11_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843318 8A 160V +phoenix_contact connector MCV_01x11_GF_3.5mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.81_1x11_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830680 8A 160V +phoenix_contact connector MCV_01x11_GF_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_11-GF-3.81_1x11_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830680 8A 160V +phoenix_contact connector MCV_01x11_GF_3.81mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-G-3.5_1x12_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical || order number: 1843703 8A 160V +phoenix_contact connector MCV_01x12_G_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-G-3.81_1x12_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical || order number: 1803523 8A 160V +phoenix_contact connector MCV_01x12_G_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.5_1x12_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843321 8A 160V +phoenix_contact connector MCV_01x12_GF_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.5_1x12_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843321 8A 160V +phoenix_contact connector MCV_01x12_GF_3.5mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.81_1x12_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830693 8A 160V +phoenix_contact connector MCV_01x12_GF_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_12-GF-3.81_1x12_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830693 8A 160V +phoenix_contact connector MCV_01x12_GF_3.81mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-G-3.5_1x13_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/13-G-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical || order number: 1843716 8A 160V +phoenix_contact connector MCV_01x13_G_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-G-3.81_1x13_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/13-G-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical || order number: 1803536 8A 160V +phoenix_contact connector MCV_01x13_G_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.5_1x13_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843334 8A 160V +phoenix_contact connector MCV_01x13_GF_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.5_1x13_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843334 8A 160V +phoenix_contact connector MCV_01x13_GF_3.5mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.81_1x13_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830703 8A 160V +phoenix_contact connector MCV_01x13_GF_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_13-GF-3.81_1x13_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830703 8A 160V +phoenix_contact connector MCV_01x13_GF_3.81mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-G-3.5_1x14_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/14-G-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical || order number: 1843729 8A 160V +phoenix_contact connector MCV_01x14_G_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-G-3.81_1x14_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/14-G-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical || order number: 1803549 8A 160V +phoenix_contact connector MCV_01x14_G_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.5_1x14_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843347 8A 160V +phoenix_contact connector MCV_01x14_GF_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.5_1x14_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843347 8A 160V +phoenix_contact connector MCV_01x14_GF_3.5mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.81_1x14_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830716 8A 160V +phoenix_contact connector MCV_01x14_GF_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_14-GF-3.81_1x14_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830716 8A 160V +phoenix_contact connector MCV_01x14_GF_3.81mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-G-3.5_1x15_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/15-G-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical || order number: 1843732 8A 160V +phoenix_contact connector MCV_01x15_G_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-G-3.81_1x15_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/15-G-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical || order number: 1803552 8A 160V +phoenix_contact connector MCV_01x15_G_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.5_1x15_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843350 8A 160V +phoenix_contact connector MCV_01x15_GF_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.5_1x15_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843350 8A 160V +phoenix_contact connector MCV_01x15_GF_3.5mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.81_1x15_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830729 8A 160V +phoenix_contact connector MCV_01x15_GF_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_15-GF-3.81_1x15_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830729 8A 160V +phoenix_contact connector MCV_01x15_GF_3.81mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-G-3.5_1x16_P3.50mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/16-G-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical || order number: 1843745 8A 160V +phoenix_contact connector MCV_01x16_G_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-G-3.81_1x16_P3.81mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/16-G-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical || order number: 1803565 8A 160V +phoenix_contact connector MCV_01x16_G_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.5_1x16_P3.50mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical; threaded flange || order number: 1843363 8A 160V +phoenix_contact connector MCV_01x16_GF_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.5_1x16_P3.50mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843363 8A 160V +phoenix_contact connector MCV_01x16_GF_3.5mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.81_1x16_P3.81mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical; threaded flange || order number: 1830732 8A 160V +phoenix_contact connector MCV_01x16_GF_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MCV_1,5_16-GF-3.81_1x16_P3.81mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1830732 8A 160V +phoenix_contact connector MCV_01x16_GF_3.81mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-G-3.5_1x02_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-3.5; number of pins: 02; pin pitch: 3.50mm; Angled || order number: 1844210 8A 160V +phoenix_contact connector MC_01x02_G_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-G-3.81_1x02_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-3.81; number of pins: 02; pin pitch: 3.81mm; Angled || order number: 1803277 8A 160V +phoenix_contact connector MC_01x02_G_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.5_1x02_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843790 8A 160V +phoenix_contact connector MC_01x02_GF_3.5mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.5_1x02_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.5; number of pins: 02; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843790 8A 160V +phoenix_contact connector MC_01x02_GF_3.5mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.81_1x02_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827868 8A 160V +phoenix_contact connector MC_01x02_GF_3.81mm +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_2-GF-3.81_1x02_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-3.81; number of pins: 02; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827868 8A 160V +phoenix_contact connector MC_01x02_GF_3.81mm_MH +0 +2 +2 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-G-3.5_1x03_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-3.5; number of pins: 03; pin pitch: 3.50mm; Angled || order number: 1844223 8A 160V +phoenix_contact connector MC_01x03_G_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-G-3.81_1x03_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-3.81; number of pins: 03; pin pitch: 3.81mm; Angled || order number: 1803280 8A 160V +phoenix_contact connector MC_01x03_G_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.5_1x03_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843800 8A 160V +phoenix_contact connector MC_01x03_GF_3.5mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.5_1x03_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.5; number of pins: 03; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843800 8A 160V +phoenix_contact connector MC_01x03_GF_3.5mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.81_1x03_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827871 8A 160V +phoenix_contact connector MC_01x03_GF_3.81mm +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_3-GF-3.81_1x03_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-3.81; number of pins: 03; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827871 8A 160V +phoenix_contact connector MC_01x03_GF_3.81mm_MH +0 +3 +3 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-G-3.5_1x04_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-3.5; number of pins: 04; pin pitch: 3.50mm; Angled || order number: 1844236 8A 160V +phoenix_contact connector MC_01x04_G_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-G-3.81_1x04_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-3.81; number of pins: 04; pin pitch: 3.81mm; Angled || order number: 1803293 8A 160V +phoenix_contact connector MC_01x04_G_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.5_1x04_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843813 8A 160V +phoenix_contact connector MC_01x04_GF_3.5mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.5_1x04_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.5; number of pins: 04; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843813 8A 160V +phoenix_contact connector MC_01x04_GF_3.5mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.81_1x04_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827884 8A 160V +phoenix_contact connector MC_01x04_GF_3.81mm +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_4-GF-3.81_1x04_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-3.81; number of pins: 04; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827884 8A 160V +phoenix_contact connector MC_01x04_GF_3.81mm_MH +0 +4 +4 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-G-3.5_1x05_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-3.5; number of pins: 05; pin pitch: 3.50mm; Angled || order number: 1844249 8A 160V +phoenix_contact connector MC_01x05_G_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-G-3.81_1x05_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-3.81; number of pins: 05; pin pitch: 3.81mm; Angled || order number: 1803303 8A 160V +phoenix_contact connector MC_01x05_G_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.5_1x05_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843826 8A 160V +phoenix_contact connector MC_01x05_GF_3.5mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.5_1x05_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.5; number of pins: 05; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843826 8A 160V +phoenix_contact connector MC_01x05_GF_3.5mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.81_1x05_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827897 8A 160V +phoenix_contact connector MC_01x05_GF_3.81mm +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_5-GF-3.81_1x05_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-3.81; number of pins: 05; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827897 8A 160V +phoenix_contact connector MC_01x05_GF_3.81mm_MH +0 +5 +5 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-G-3.5_1x06_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-3.5; number of pins: 06; pin pitch: 3.50mm; Angled || order number: 1844252 8A 160V +phoenix_contact connector MC_01x06_G_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-G-3.81_1x06_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-3.81; number of pins: 06; pin pitch: 3.81mm; Angled || order number: 1803316 8A 160V +phoenix_contact connector MC_01x06_G_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.5_1x06_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843839 8A 160V +phoenix_contact connector MC_01x06_GF_3.5mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.5_1x06_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.5; number of pins: 06; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843839 8A 160V +phoenix_contact connector MC_01x06_GF_3.5mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.81_1x06_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827907 8A 160V +phoenix_contact connector MC_01x06_GF_3.81mm +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_6-GF-3.81_1x06_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-3.81; number of pins: 06; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827907 8A 160V +phoenix_contact connector MC_01x06_GF_3.81mm_MH +0 +6 +6 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-G-3.5_1x07_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-3.5; number of pins: 07; pin pitch: 3.50mm; Angled || order number: 1844265 8A 160V +phoenix_contact connector MC_01x07_G_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-G-3.81_1x07_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-3.81; number of pins: 07; pin pitch: 3.81mm; Angled || order number: 1803329 8A 160V +phoenix_contact connector MC_01x07_G_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.5_1x07_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843842 8A 160V +phoenix_contact connector MC_01x07_GF_3.5mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.5_1x07_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.5; number of pins: 07; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843842 8A 160V +phoenix_contact connector MC_01x07_GF_3.5mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.81_1x07_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827910 8A 160V +phoenix_contact connector MC_01x07_GF_3.81mm +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_7-GF-3.81_1x07_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-3.81; number of pins: 07; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827910 8A 160V +phoenix_contact connector MC_01x07_GF_3.81mm_MH +0 +7 +7 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-G-3.5_1x08_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-3.5; number of pins: 08; pin pitch: 3.50mm; Angled || order number: 1844278 8A 160V +phoenix_contact connector MC_01x08_G_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-G-3.81_1x08_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-3.81; number of pins: 08; pin pitch: 3.81mm; Angled || order number: 1803332 8A 160V +phoenix_contact connector MC_01x08_G_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.5_1x08_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843855 8A 160V +phoenix_contact connector MC_01x08_GF_3.5mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.5_1x08_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.5; number of pins: 08; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843855 8A 160V +phoenix_contact connector MC_01x08_GF_3.5mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.81_1x08_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827923 8A 160V +phoenix_contact connector MC_01x08_GF_3.81mm +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_8-GF-3.81_1x08_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-3.81; number of pins: 08; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827923 8A 160V +phoenix_contact connector MC_01x08_GF_3.81mm_MH +0 +8 +8 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-G-3.5_1x09_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-3.5; number of pins: 09; pin pitch: 3.50mm; Angled || order number: 1844281 8A 160V +phoenix_contact connector MC_01x09_G_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-G-3.81_1x09_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-3.81; number of pins: 09; pin pitch: 3.81mm; Angled || order number: 1803345 8A 160V +phoenix_contact connector MC_01x09_G_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.5_1x09_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843868 8A 160V +phoenix_contact connector MC_01x09_GF_3.5mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.5_1x09_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.5; number of pins: 09; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843868 8A 160V +phoenix_contact connector MC_01x09_GF_3.5mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.81_1x09_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827936 8A 160V +phoenix_contact connector MC_01x09_GF_3.81mm +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_9-GF-3.81_1x09_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.81; number of pins: 09; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827936 8A 160V +phoenix_contact connector MC_01x09_GF_3.81mm_MH +0 +9 +9 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-G-3.5_1x10_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-3.5; number of pins: 10; pin pitch: 3.50mm; Angled || order number: 1844294 8A 160V +phoenix_contact connector MC_01x10_G_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-G-3.81_1x10_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-3.81; number of pins: 10; pin pitch: 3.81mm; Angled || order number: 1803358 8A 160V +phoenix_contact connector MC_01x10_G_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.5_1x10_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843871 8A 160V +phoenix_contact connector MC_01x10_GF_3.5mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.5_1x10_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.5; number of pins: 10; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843871 8A 160V +phoenix_contact connector MC_01x10_GF_3.5mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.81_1x10_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827949 8A 160V +phoenix_contact connector MC_01x10_GF_3.81mm +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_10-GF-3.81_1x10_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-3.81; number of pins: 10; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827949 8A 160V +phoenix_contact connector MC_01x10_GF_3.81mm_MH +0 +10 +10 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-G-3.5_1x11_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-3.5; number of pins: 11; pin pitch: 3.50mm; Angled || order number: 1844304 8A 160V +phoenix_contact connector MC_01x11_G_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-G-3.81_1x11_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-3.81; number of pins: 11; pin pitch: 3.81mm; Angled || order number: 1803361 8A 160V +phoenix_contact connector MC_01x11_G_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.5_1x11_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843884 8A 160V +phoenix_contact connector MC_01x11_GF_3.5mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.5_1x11_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.5; number of pins: 11; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843884 8A 160V +phoenix_contact connector MC_01x11_GF_3.5mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.81_1x11_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827952 8A 160V +phoenix_contact connector MC_01x11_GF_3.81mm +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_11-GF-3.81_1x11_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-3.81; number of pins: 11; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827952 8A 160V +phoenix_contact connector MC_01x11_GF_3.81mm_MH +0 +11 +11 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-G-3.5_1x12_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-3.5; number of pins: 12; pin pitch: 3.50mm; Angled || order number: 1844317 8A 160V +phoenix_contact connector MC_01x12_G_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-G-3.81_1x12_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-3.81; number of pins: 12; pin pitch: 3.81mm; Angled || order number: 1803374 8A 160V +phoenix_contact connector MC_01x12_G_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.5_1x12_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843897 8A 160V +phoenix_contact connector MC_01x12_GF_3.5mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.5_1x12_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.5; number of pins: 12; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843897 8A 160V +phoenix_contact connector MC_01x12_GF_3.5mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.81_1x12_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827965 8A 160V +phoenix_contact connector MC_01x12_GF_3.81mm +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_12-GF-3.81_1x12_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-3.81; number of pins: 12; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827965 8A 160V +phoenix_contact connector MC_01x12_GF_3.81mm_MH +0 +12 +12 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-G-3.5_1x13_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/13-G-3.5; number of pins: 13; pin pitch: 3.50mm; Angled || order number: 1844320 8A 160V +phoenix_contact connector MC_01x13_G_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-G-3.81_1x13_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/13-G-3.81; number of pins: 13; pin pitch: 3.81mm; Angled || order number: 1803387 8A 160V +phoenix_contact connector MC_01x13_G_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.5_1x13_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843907 8A 160V +phoenix_contact connector MC_01x13_GF_3.5mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.5_1x13_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.5; number of pins: 13; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843907 8A 160V +phoenix_contact connector MC_01x13_GF_3.5mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.81_1x13_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827978 8A 160V +phoenix_contact connector MC_01x13_GF_3.81mm +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_13-GF-3.81_1x13_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/13-GF-3.81; number of pins: 13; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827978 8A 160V +phoenix_contact connector MC_01x13_GF_3.81mm_MH +0 +13 +13 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-G-3.5_1x14_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/14-G-3.5; number of pins: 14; pin pitch: 3.50mm; Angled || order number: 1844333 8A 160V +phoenix_contact connector MC_01x14_G_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-G-3.81_1x14_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/14-G-3.81; number of pins: 14; pin pitch: 3.81mm; Angled || order number: 1803390 8A 160V +phoenix_contact connector MC_01x14_G_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.5_1x14_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843910 8A 160V +phoenix_contact connector MC_01x14_GF_3.5mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.5_1x14_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.5; number of pins: 14; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843910 8A 160V +phoenix_contact connector MC_01x14_GF_3.5mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.81_1x14_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827981 8A 160V +phoenix_contact connector MC_01x14_GF_3.81mm +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_14-GF-3.81_1x14_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/14-GF-3.81; number of pins: 14; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827981 8A 160V +phoenix_contact connector MC_01x14_GF_3.81mm_MH +0 +14 +14 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-G-3.5_1x15_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/15-G-3.5; number of pins: 15; pin pitch: 3.50mm; Angled || order number: 1844346 8A 160V +phoenix_contact connector MC_01x15_G_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-G-3.81_1x15_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/15-G-3.81; number of pins: 15; pin pitch: 3.81mm; Angled || order number: 1803400 8A 160V +phoenix_contact connector MC_01x15_G_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.5_1x15_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843923 8A 160V +phoenix_contact connector MC_01x15_GF_3.5mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.5_1x15_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.5; number of pins: 15; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843923 8A 160V +phoenix_contact connector MC_01x15_GF_3.5mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.81_1x15_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Angled; threaded flange || order number: 1827994 8A 160V +phoenix_contact connector MC_01x15_GF_3.81mm +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_15-GF-3.81_1x15_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/15-GF-3.81; number of pins: 15; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1827994 8A 160V +phoenix_contact connector MC_01x15_GF_3.81mm_MH +0 +15 +15 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-G-3.5_1x16_P3.50mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/16-G-3.5; number of pins: 16; pin pitch: 3.50mm; Angled || order number: 1844359 8A 160V +phoenix_contact connector MC_01x16_G_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-G-3.81_1x16_P3.81mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/16-G-3.81; number of pins: 16; pin pitch: 3.81mm; Angled || order number: 1803413 8A 160V +phoenix_contact connector MC_01x16_G_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.5_1x16_P3.50mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Angled; threaded flange || order number: 1843936 8A 160V +phoenix_contact connector MC_01x16_GF_3.5mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.5_1x16_P3.50mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.5; number of pins: 16; pin pitch: 3.50mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1843936 8A 160V +phoenix_contact connector MC_01x16_GF_3.5mm_MH +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.81_1x16_P3.81mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Angled; threaded flange || order number: 1828003 8A 160V +phoenix_contact connector MC_01x16_GF_3.81mm +0 +16 +16 +Connector_Phoenix_MC +PhoenixContact_MC_1,5_16-GF-3.81_1x16_P3.81mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/16-GF-3.81; number of pins: 16; pin pitch: 3.81mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1828003 8A 160V +phoenix_contact connector MC_01x16_GF_3.81mm_MH +0 +16 +16 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-G-5.08_1x02_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/2-G-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical || order number: 1836299 8A 320V +phoenix_contact connector MCV_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-GF-5.08_1x02_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847615 8A 320V +phoenix_contact connector MCV_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_2-GF-5.08_1x02_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847615 8A 320V +phoenix_contact connector MCV_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-G-5.08_1x03_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/3-G-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical || order number: 1836309 8A 320V +phoenix_contact connector MCV_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-GF-5.08_1x03_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847628 8A 320V +phoenix_contact connector MCV_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_3-GF-5.08_1x03_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847628 8A 320V +phoenix_contact connector MCV_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-G-5.08_1x04_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/4-G-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical || order number: 1836312 8A 320V +phoenix_contact connector MCV_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-GF-5.08_1x04_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847631 8A 320V +phoenix_contact connector MCV_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_4-GF-5.08_1x04_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847631 8A 320V +phoenix_contact connector MCV_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-G-5.08_1x05_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/5-G-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical || order number: 1836325 8A 320V +phoenix_contact connector MCV_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-GF-5.08_1x05_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847644 8A 320V +phoenix_contact connector MCV_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_5-GF-5.08_1x05_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847644 8A 320V +phoenix_contact connector MCV_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-G-5.08_1x06_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/6-G-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical || order number: 1836338 8A 320V +phoenix_contact connector MCV_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-GF-5.08_1x06_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847657 8A 320V +phoenix_contact connector MCV_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_6-GF-5.08_1x06_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847657 8A 320V +phoenix_contact connector MCV_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-G-5.08_1x07_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/7-G-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical || order number: 1836341 8A 320V +phoenix_contact connector MCV_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-GF-5.08_1x07_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847660 8A 320V +phoenix_contact connector MCV_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_7-GF-5.08_1x07_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847660 8A 320V +phoenix_contact connector MCV_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-G-5.08_1x08_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/8-G-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical || order number: 1836354 8A 320V +phoenix_contact connector MCV_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-GF-5.08_1x08_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847673 8A 320V +phoenix_contact connector MCV_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_8-GF-5.08_1x08_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847673 8A 320V +phoenix_contact connector MCV_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-G-5.08_1x09_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/9-G-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical || order number: 1836367 8A 320V +phoenix_contact connector MCV_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-GF-5.08_1x09_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847686 8A 320V +phoenix_contact connector MCV_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_9-GF-5.08_1x09_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847686 8A 320V +phoenix_contact connector MCV_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-G-5.08_1x10_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical || order number: 1836370 8A 320V +phoenix_contact connector MCV_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-GF-5.08_1x10_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847699 8A 320V +phoenix_contact connector MCV_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_10-GF-5.08_1x10_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847699 8A 320V +phoenix_contact connector MCV_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-G-5.08_1x11_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/11-G-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical || order number: 1836383 8A 320V +phoenix_contact connector MCV_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-GF-5.08_1x11_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847709 8A 320V +phoenix_contact connector MCV_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_11-GF-5.08_1x11_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847709 8A 320V +phoenix_contact connector MCV_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-G-5.08_1x12_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MCV_1,5/12-G-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical || order number: 1836396 8A 320V +phoenix_contact connector MCV_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-GF-5.08_1x12_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1847712 8A 320V +phoenix_contact connector MCV_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MCV_1,5_12-GF-5.08_1x12_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MCV_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847712 8A 320V +phoenix_contact connector MCV_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-G-5.08_1x02_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/2-G-5.08; number of pins: 02; pin pitch: 5.08mm; Angled || order number: 1836189 8A 320V +phoenix_contact connector MC_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-GF-5.08_1x02_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847466 8A 320V +phoenix_contact connector MC_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_2-GF-5.08_1x02_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/2-GF-5.08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847466 8A 320V +phoenix_contact connector MC_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-G-5.08_1x03_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/3-G-5.08; number of pins: 03; pin pitch: 5.08mm; Angled || order number: 1836192 8A 320V +phoenix_contact connector MC_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-GF-5.08_1x03_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847479 8A 320V +phoenix_contact connector MC_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_3-GF-5.08_1x03_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/3-GF-5.08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847479 8A 320V +phoenix_contact connector MC_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-G-5.08_1x04_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/4-G-5.08; number of pins: 04; pin pitch: 5.08mm; Angled || order number: 1836202 8A 320V +phoenix_contact connector MC_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-GF-5.08_1x04_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847482 8A 320V +phoenix_contact connector MC_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_4-GF-5.08_1x04_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/4-GF-5.08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847482 8A 320V +phoenix_contact connector MC_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-G-5.08_1x05_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/5-G-5.08; number of pins: 05; pin pitch: 5.08mm; Angled || order number: 1836215 8A 320V +phoenix_contact connector MC_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-GF-5.08_1x05_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847495 8A 320V +phoenix_contact connector MC_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_5-GF-5.08_1x05_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/5-GF-5.08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847495 8A 320V +phoenix_contact connector MC_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-G-5.08_1x06_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/6-G-5.08; number of pins: 06; pin pitch: 5.08mm; Angled || order number: 1836228 8A 320V +phoenix_contact connector MC_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-GF-5.08_1x06_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847505 8A 320V +phoenix_contact connector MC_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_6-GF-5.08_1x06_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/6-GF-5.08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847505 8A 320V +phoenix_contact connector MC_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-G-5.08_1x07_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/7-G-5.08; number of pins: 07; pin pitch: 5.08mm; Angled || order number: 1836231 8A 320V +phoenix_contact connector MC_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-GF-5.08_1x07_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847518 8A 320V +phoenix_contact connector MC_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_7-GF-5.08_1x07_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/7-GF-5.08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847518 8A 320V +phoenix_contact connector MC_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-G-5.08_1x08_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/8-G-5.08; number of pins: 08; pin pitch: 5.08mm; Angled || order number: 1836244 8A 320V +phoenix_contact connector MC_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-GF-5.08_1x08_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847521 8A 320V +phoenix_contact connector MC_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_8-GF-5.08_1x08_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/8-GF-5.08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847521 8A 320V +phoenix_contact connector MC_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-G-5.08_1x09_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/9-G-5.08; number of pins: 09; pin pitch: 5.08mm; Angled || order number: 1836257 8A 320V +phoenix_contact connector MC_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-GF-5.08_1x09_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847534 8A 320V +phoenix_contact connector MC_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_9-GF-5.08_1x09_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-5.08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847534 8A 320V +phoenix_contact connector MC_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-G-5.08_1x10_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/10-G-5.08; number of pins: 10; pin pitch: 5.08mm; Angled || order number: 1836260 8A 320V +phoenix_contact connector MC_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-GF-5.08_1x10_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847547 8A 320V +phoenix_contact connector MC_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_10-GF-5.08_1x10_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/10-GF-5.08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847547 8A 320V +phoenix_contact connector MC_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-G-5.08_1x11_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/11-G-5.08; number of pins: 11; pin pitch: 5.08mm; Angled || order number: 1836273 8A 320V +phoenix_contact connector MC_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-GF-5.08_1x11_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847550 8A 320V +phoenix_contact connector MC_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_11-GF-5.08_1x11_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/11-GF-5.08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847550 8A 320V +phoenix_contact connector MC_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-G-5.08_1x12_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MC_1,5/12-G-5.08; number of pins: 12; pin pitch: 5.08mm; Angled || order number: 1836286 8A 320V +phoenix_contact connector MC_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-GF-5.08_1x12_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange || order number: 1847563 8A 320V +phoenix_contact connector MC_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MC_HighVoltage +PhoenixContact_MC_1,5_12-GF-5.08_1x12_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MC_1,5/12-GF-5.08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x4.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1847563 8A 320V +phoenix_contact connector MC_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_2-G-5,08_1x02_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/2-G-5,08; number of pins: 02; pin pitch: 5.08mm; Angled || order number: 1757242 12A || order number: 1923869 16A (HC) +phoenix_contact connector MSTBA_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_2-G_1x02_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/2-G; number of pins: 02; pin pitch: 5.00mm; Angled || order number: 1757475 12A || order number: 1923759 16A (HC) +phoenix_contact connector MSTBA_01x02_G_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_3-G-5,08_1x03_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/3-G-5,08; number of pins: 03; pin pitch: 5.08mm; Angled || order number: 1757255 12A || order number: 1923872 16A (HC) +phoenix_contact connector MSTBA_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_3-G_1x03_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/3-G; number of pins: 03; pin pitch: 5.00mm; Angled || order number: 1757488 12A || order number: 1923762 16A (HC) +phoenix_contact connector MSTBA_01x03_G_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_4-G-5,08_1x04_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/4-G-5,08; number of pins: 04; pin pitch: 5.08mm; Angled || order number: 1757268 12A || order number: 1923885 16A (HC) +phoenix_contact connector MSTBA_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_4-G_1x04_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/4-G; number of pins: 04; pin pitch: 5.00mm; Angled || order number: 1757491 12A || order number: 1923775 16A (HC) +phoenix_contact connector MSTBA_01x04_G_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_5-G-5,08_1x05_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/5-G-5,08; number of pins: 05; pin pitch: 5.08mm; Angled || order number: 1757271 12A || order number: 1923898 16A (HC) +phoenix_contact connector MSTBA_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_5-G_1x05_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/5-G; number of pins: 05; pin pitch: 5.00mm; Angled || order number: 1757501 12A || order number: 1923788 16A (HC) +phoenix_contact connector MSTBA_01x05_G_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_6-G-5,08_1x06_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/6-G-5,08; number of pins: 06; pin pitch: 5.08mm; Angled || order number: 1757284 12A || order number: 1923908 16A (HC) +phoenix_contact connector MSTBA_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_6-G_1x06_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/6-G; number of pins: 06; pin pitch: 5.00mm; Angled || order number: 1757514 12A || order number: 1923791 16A (HC) +phoenix_contact connector MSTBA_01x06_G_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_7-G-5,08_1x07_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/7-G-5,08; number of pins: 07; pin pitch: 5.08mm; Angled || order number: 1757297 12A || order number: 1923911 16A (HC) +phoenix_contact connector MSTBA_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_7-G_1x07_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/7-G; number of pins: 07; pin pitch: 5.00mm; Angled || order number: 1757493 12A || order number: 1923801 16A (HC) +phoenix_contact connector MSTBA_01x07_G_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_8-G-5,08_1x08_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/8-G-5,08; number of pins: 08; pin pitch: 5.08mm; Angled || order number: 1757307 12A || order number: 1923924 16A (HC) +phoenix_contact connector MSTBA_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_8-G_1x08_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/8-G; number of pins: 08; pin pitch: 5.00mm; Angled || order number: 1757527 12A || order number: 1923814 16A (HC) +phoenix_contact connector MSTBA_01x08_G_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_9-G-5,08_1x09_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/9-G-5,08; number of pins: 09; pin pitch: 5.08mm; Angled || order number: 1757310 12A || order number: 1923937 16A (HC) +phoenix_contact connector MSTBA_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_9-G_1x09_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/9-G; number of pins: 09; pin pitch: 5.00mm; Angled || order number: 1757530 12A || order number: 1923827 16A (HC) +phoenix_contact connector MSTBA_01x09_G_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_10-G-5,08_1x10_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/10-G-5,08; number of pins: 10; pin pitch: 5.08mm; Angled || order number: 1757323 12A || order number: 1923940 16A (HC) +phoenix_contact connector MSTBA_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_10-G_1x10_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/10-G; number of pins: 10; pin pitch: 5.00mm; Angled || order number: 1757543 12A || order number: 1923830 16A (HC) +phoenix_contact connector MSTBA_01x10_G_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_11-G-5,08_1x11_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/11-G-5,08; number of pins: 11; pin pitch: 5.08mm; Angled || order number: 1757336 12A || order number: 1923953 16A (HC) +phoenix_contact connector MSTBA_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_11-G_1x11_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/11-G; number of pins: 11; pin pitch: 5.00mm; Angled || order number: 1757556 12A || order number: 1923843 16A (HC) +phoenix_contact connector MSTBA_01x11_G_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_12-G-5,08_1x12_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/12-G-5,08; number of pins: 12; pin pitch: 5.08mm; Angled || order number: 1757349 12A || order number: 1923966 16A (HC) +phoenix_contact connector MSTBA_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_12-G_1x12_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/12-G; number of pins: 12; pin pitch: 5.00mm; Angled || order number: 1757569 12A || order number: 1923856 16A (HC) +phoenix_contact connector MSTBA_01x12_G_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_13-G-5,08_1x13_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/13-G-5,08; number of pins: 13; pin pitch: 5.08mm; Angled || order number: 1757352 12A +phoenix_contact connector MSTBA_01x13_G_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_13-G_1x13_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/13-G; number of pins: 13; pin pitch: 5.00mm; Angled || order number: 1757572 12A +phoenix_contact connector MSTBA_01x13_G_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_14-G-5,08_1x14_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/14-G-5,08; number of pins: 14; pin pitch: 5.08mm; Angled || order number: 1757365 12A +phoenix_contact connector MSTBA_01x14_G_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_14-G_1x14_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/14-G; number of pins: 14; pin pitch: 5.00mm; Angled || order number: 1757585 12A +phoenix_contact connector MSTBA_01x14_G_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_15-G-5,08_1x15_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/15-G-5,08; number of pins: 15; pin pitch: 5.08mm; Angled || order number: 1757378 12A +phoenix_contact connector MSTBA_01x15_G_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_15-G_1x15_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/15-G; number of pins: 15; pin pitch: 5.00mm; Angled || order number: 1757598 12A +phoenix_contact connector MSTBA_01x15_G_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_16-G-5,08_1x16_P5.08mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/16-G-5,08; number of pins: 16; pin pitch: 5.08mm; Angled || order number: 1757381 12A +phoenix_contact connector MSTBA_01x16_G_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBA_2,5_16-G_1x16_P5.00mm_Horizontal +Generic Phoenix Contact connector footprint for: MSTBA_2,5/16-G; number of pins: 16; pin pitch: 5.00mm; Angled || order number: 1757608 12A +phoenix_contact connector MSTBA_01x16_G_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_2-G-5,08_1x02_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/2-G-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical || order number: 1755736 12A || order number: 1924305 16A (HC) +phoenix_contact connector MSTBVA_01x02_G_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_2-G_1x02_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/2-G; number of pins: 02; pin pitch: 5.00mm; Vertical || order number: 1755516 12A || order number: 1924198 16A (HC) +phoenix_contact connector MSTBVA_01x02_G_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_3-G-5,08_1x03_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/3-G-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical || order number: 1755749 12A || order number: 1924318 16A (HC) +phoenix_contact connector MSTBVA_01x03_G_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_3-G_1x03_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/3-G; number of pins: 03; pin pitch: 5.00mm; Vertical || order number: 1755529 12A || order number: 1924208 16A (HC) +phoenix_contact connector MSTBVA_01x03_G_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_4-G-5,08_1x04_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/4-G-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical || order number: 1755752 12A || order number: 1924321 16A (HC) +phoenix_contact connector MSTBVA_01x04_G_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_4-G_1x04_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/4-G; number of pins: 04; pin pitch: 5.00mm; Vertical || order number: 1755532 12A || order number: 1924211 16A (HC) +phoenix_contact connector MSTBVA_01x04_G_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_5-G-5,08_1x05_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/5-G-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical || order number: 1755765 12A || order number: 1924334 16A (HC) +phoenix_contact connector MSTBVA_01x05_G_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_5-G_1x05_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/5-G; number of pins: 05; pin pitch: 5.00mm; Vertical || order number: 1755545 12A || order number: 1924224 16A (HC) +phoenix_contact connector MSTBVA_01x05_G_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_6-G-5,08_1x06_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/6-G-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical || order number: 1755778 12A || order number: 1924347 16A (HC) +phoenix_contact connector MSTBVA_01x06_G_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_6-G_1x06_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/6-G; number of pins: 06; pin pitch: 5.00mm; Vertical || order number: 1755558 12A || order number: 1924237 16A (HC) +phoenix_contact connector MSTBVA_01x06_G_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_7-G-5,08_1x07_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/7-G-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical || order number: 1755781 12A || order number: 1924350 16A (HC) +phoenix_contact connector MSTBVA_01x07_G_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_7-G_1x07_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/7-G; number of pins: 07; pin pitch: 5.00mm; Vertical || order number: 1755561 12A || order number: 1924240 16A (HC) +phoenix_contact connector MSTBVA_01x07_G_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_8-G-5,08_1x08_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/8-G-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical || order number: 1755794 12A || order number: 1924363 16A (HC) +phoenix_contact connector MSTBVA_01x08_G_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_8-G_1x08_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/8-G; number of pins: 08; pin pitch: 5.00mm; Vertical || order number: 1755574 12A || order number: 1924253 16A (HC) +phoenix_contact connector MSTBVA_01x08_G_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_9-G-5,08_1x09_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/9-G-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical || order number: 1755804 12A || order number: 1924376 16A (HC) +phoenix_contact connector MSTBVA_01x09_G_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_9-G_1x09_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/9-G; number of pins: 09; pin pitch: 5.00mm; Vertical || order number: 1755587 12A || order number: 1924266 16A (HC) +phoenix_contact connector MSTBVA_01x09_G_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_10-G-5,08_1x10_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/10-G-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical || order number: 1755817 12A || order number: 1924389 16A (HC) +phoenix_contact connector MSTBVA_01x10_G_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_10-G_1x10_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/10-G; number of pins: 10; pin pitch: 5.00mm; Vertical || order number: 1755503 12A || order number: 1924279 16A (HC) +phoenix_contact connector MSTBVA_01x10_G_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_11-G-5,08_1x11_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/11-G-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical || order number: 1755820 12A || order number: 1924392 16A (HC) +phoenix_contact connector MSTBVA_01x11_G_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_11-G_1x11_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/11-G; number of pins: 11; pin pitch: 5.00mm; Vertical || order number: 1755590 12A || order number: 1924282 16A (HC) +phoenix_contact connector MSTBVA_01x11_G_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_12-G-5,08_1x12_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/12-G-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical || order number: 1755833 12A || order number: 1924402 16A (HC) +phoenix_contact connector MSTBVA_01x12_G_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_12-G_1x12_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/12-G; number of pins: 12; pin pitch: 5.00mm; Vertical || order number: 1755600 12A || order number: 1924295 16A (HC) +phoenix_contact connector MSTBVA_01x12_G_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_13-G-5,08_1x13_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/13-G-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical || order number: 1755846 12A +phoenix_contact connector MSTBVA_01x13_G_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_13-G_1x13_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/13-G; number of pins: 13; pin pitch: 5.00mm; Vertical || order number: 1755613 12A +phoenix_contact connector MSTBVA_01x13_G_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_14-G-5,08_1x14_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/14-G-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical || order number: 1755859 12A +phoenix_contact connector MSTBVA_01x14_G_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_14-G_1x14_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/14-G; number of pins: 14; pin pitch: 5.00mm; Vertical || order number: 1755626 12A +phoenix_contact connector MSTBVA_01x14_G_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_15-G-5,08_1x15_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/15-G-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical || order number: 1755862 12A +phoenix_contact connector MSTBVA_01x15_G_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_15-G_1x15_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/15-G; number of pins: 15; pin pitch: 5.00mm; Vertical || order number: 1755639 12A +phoenix_contact connector MSTBVA_01x15_G_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_16-G-5,08_1x16_P5.08mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/16-G-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical || order number: 1755875 12A +phoenix_contact connector MSTBVA_01x16_G_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBVA_2,5_16-G_1x16_P5.00mm_Vertical +Generic Phoenix Contact connector footprint for: MSTBVA_2,5/16-G; number of pins: 16; pin pitch: 5.00mm; Vertical || order number: 1755642 12A +phoenix_contact connector MSTBVA_01x16_G_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF-5,08_1x02_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777073 12A || order number: 1924525 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF-5,08_1x02_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777073 12A || order number: 1924525 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF_1x02_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776883 12A || order number: 1924415 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_2-GF_1x02_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776883 12A || order number: 1924415 16A (HC) +phoenix_contact connector MSTBV_01x02_GF_5.00mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF-5,08_1x03_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777086 12A || order number: 1924538 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF-5,08_1x03_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777086 12A || order number: 1924538 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF_1x03_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776896 12A || order number: 1924428 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_3-GF_1x03_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776896 12A || order number: 1924428 16A (HC) +phoenix_contact connector MSTBV_01x03_GF_5.00mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF-5,08_1x04_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777099 12A || order number: 1924541 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF-5,08_1x04_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777099 12A || order number: 1924541 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF_1x04_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776906 12A || order number: 1924431 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_4-GF_1x04_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776906 12A || order number: 1924431 16A (HC) +phoenix_contact connector MSTBV_01x04_GF_5.00mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF-5,08_1x05_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777109 12A || order number: 1924554 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF-5,08_1x05_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777109 12A || order number: 1924554 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF_1x05_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776919 12A || order number: 1924444 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_5-GF_1x05_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776919 12A || order number: 1924444 16A (HC) +phoenix_contact connector MSTBV_01x05_GF_5.00mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF-5,08_1x06_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777112 12A || order number: 1924567 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF-5,08_1x06_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777112 12A || order number: 1924567 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF_1x06_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776922 12A || order number: 1924457 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_6-GF_1x06_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776922 12A || order number: 1924457 16A (HC) +phoenix_contact connector MSTBV_01x06_GF_5.00mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF-5,08_1x07_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777125 12A || order number: 1924570 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF-5,08_1x07_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777125 12A || order number: 1924570 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF_1x07_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776935 12A || order number: 1924460 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_7-GF_1x07_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776935 12A || order number: 1924460 16A (HC) +phoenix_contact connector MSTBV_01x07_GF_5.00mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF-5,08_1x08_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777138 12A || order number: 1924583 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF-5,08_1x08_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777138 12A || order number: 1924583 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF_1x08_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776948 12A || order number: 1924473 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_8-GF_1x08_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776948 12A || order number: 1924473 16A (HC) +phoenix_contact connector MSTBV_01x08_GF_5.00mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF-5,08_1x09_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777141 12A || order number: 1924596 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF-5,08_1x09_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777141 12A || order number: 1924596 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF_1x09_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776951 12A || order number: 1924486 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_9-GF_1x09_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776951 12A || order number: 1924486 16A (HC) +phoenix_contact connector MSTBV_01x09_GF_5.00mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF-5,08_1x10_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777154 12A || order number: 1924606 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF-5,08_1x10_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777154 12A || order number: 1924606 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF_1x10_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776964 12A || order number: 1924499 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_10-GF_1x10_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776964 12A || order number: 1924499 16A (HC) +phoenix_contact connector MSTBV_01x10_GF_5.00mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF-5,08_1x11_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777167 12A || order number: 1924619 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF-5,08_1x11_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777167 12A || order number: 1924619 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF_1x11_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776977 12A || order number: 1924509 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_11-GF_1x11_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776977 12A || order number: 1924509 16A (HC) +phoenix_contact connector MSTBV_01x11_GF_5.00mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF-5,08_1x12_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777170 12A || order number: 1924622 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF-5,08_1x12_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777170 12A || order number: 1924622 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF_1x12_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776980 12A || order number: 1924512 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_12-GF_1x12_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776980 12A || order number: 1924512 16A (HC) +phoenix_contact connector MSTBV_01x12_GF_5.00mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF-5,08_1x13_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777183 12A +phoenix_contact connector MSTBV_01x13_GF_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF-5,08_1x13_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777183 12A +phoenix_contact connector MSTBV_01x13_GF_5.08mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF_1x13_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776993 12A +phoenix_contact connector MSTBV_01x13_GF_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_13-GF_1x13_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776993 12A +phoenix_contact connector MSTBV_01x13_GF_5.00mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF-5,08_1x14_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777196 12A +phoenix_contact connector MSTBV_01x14_GF_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF-5,08_1x14_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777196 12A +phoenix_contact connector MSTBV_01x14_GF_5.08mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF_1x14_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776002 12A +phoenix_contact connector MSTBV_01x14_GF_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_14-GF_1x14_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776002 12A +phoenix_contact connector MSTBV_01x14_GF_5.00mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF-5,08_1x15_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777206 12A +phoenix_contact connector MSTBV_01x15_GF_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF-5,08_1x15_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777206 12A +phoenix_contact connector MSTBV_01x15_GF_5.08mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF_1x15_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776015 12A +phoenix_contact connector MSTBV_01x15_GF_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_15-GF_1x15_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776015 12A +phoenix_contact connector MSTBV_01x15_GF_5.00mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF-5,08_1x16_P5.08mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical; threaded flange || order number: 1777219 12A +phoenix_contact connector MSTBV_01x16_GF_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF-5,08_1x16_P5.08mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1777219 12A +phoenix_contact connector MSTBV_01x16_GF_5.08mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF_1x16_P5.00mm_Vertical_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Vertical; threaded flange || order number: 1776028 12A +phoenix_contact connector MSTBV_01x16_GF_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTBV_2,5_16-GF_1x16_P5.00mm_Vertical_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTBV_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Vertical; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776028 12A +phoenix_contact connector MSTBV_01x16_GF_5.00mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF-5,08_1x02_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776508 12A || order number: 1924088 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.08mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF-5,08_1x02_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF-5,08; number of pins: 02; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776508 12A || order number: 1924088 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.08mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF_1x02_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776692 12A || order number: 1923979 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.00mm +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_2-GF_1x02_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/2-GF; number of pins: 02; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776692 12A || order number: 1923979 16A (HC) +phoenix_contact connector MSTB_01x02_GF_5.00mm_MH +0 +2 +2 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF-5,08_1x03_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776511 12A || order number: 1924091 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.08mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF-5,08_1x03_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF-5,08; number of pins: 03; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776511 12A || order number: 1924091 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.08mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF_1x03_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776702 12A || order number: 1923982 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.00mm +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_3-GF_1x03_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/3-GF; number of pins: 03; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776702 12A || order number: 1923982 16A (HC) +phoenix_contact connector MSTB_01x03_GF_5.00mm_MH +0 +3 +3 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF-5,08_1x04_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776524 12A || order number: 1924101 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.08mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF-5,08_1x04_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF-5,08; number of pins: 04; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776524 12A || order number: 1924101 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.08mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF_1x04_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776715 12A || order number: 1923995 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.00mm +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_4-GF_1x04_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/4-GF; number of pins: 04; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776715 12A || order number: 1923995 16A (HC) +phoenix_contact connector MSTB_01x04_GF_5.00mm_MH +0 +4 +4 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF-5,08_1x05_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776537 12A || order number: 1924114 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.08mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF-5,08_1x05_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF-5,08; number of pins: 05; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776537 12A || order number: 1924114 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.08mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF_1x05_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776728 12A || order number: 1924004 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.00mm +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_5-GF_1x05_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/5-GF; number of pins: 05; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776728 12A || order number: 1924004 16A (HC) +phoenix_contact connector MSTB_01x05_GF_5.00mm_MH +0 +5 +5 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF-5,08_1x06_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776540 12A || order number: 1924127 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.08mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF-5,08_1x06_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF-5,08; number of pins: 06; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776540 12A || order number: 1924127 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.08mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF_1x06_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776731 12A || order number: 1924017 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.00mm +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_6-GF_1x06_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/6-GF; number of pins: 06; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776731 12A || order number: 1924017 16A (HC) +phoenix_contact connector MSTB_01x06_GF_5.00mm_MH +0 +6 +6 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF-5,08_1x07_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776553 12A || order number: 1924130 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.08mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF-5,08_1x07_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF-5,08; number of pins: 07; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776553 12A || order number: 1924130 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.08mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF_1x07_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776744 12A || order number: 1924020 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.00mm +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_7-GF_1x07_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/7-GF; number of pins: 07; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776744 12A || order number: 1924020 16A (HC) +phoenix_contact connector MSTB_01x07_GF_5.00mm_MH +0 +7 +7 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF-5,08_1x08_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776566 12A || order number: 1924143 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.08mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF-5,08_1x08_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF-5,08; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776566 12A || order number: 1924143 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.08mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF_1x08_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776757 12A || order number: 1924033 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.00mm +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_8-GF_1x08_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/8-GF; number of pins: 08; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776757 12A || order number: 1924033 16A (HC) +phoenix_contact connector MSTB_01x08_GF_5.00mm_MH +0 +8 +8 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF-5,08_1x09_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776579 12A || order number: 1924156 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.08mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF-5,08_1x09_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF-5,08; number of pins: 09; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776579 12A || order number: 1924156 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.08mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF_1x09_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776760 12A || order number: 1924046 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.00mm +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_9-GF_1x09_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/9-GF; number of pins: 09; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776760 12A || order number: 1924046 16A (HC) +phoenix_contact connector MSTB_01x09_GF_5.00mm_MH +0 +9 +9 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF-5,08_1x10_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776582 12A || order number: 1924169 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.08mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF-5,08_1x10_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF-5,08; number of pins: 10; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776582 12A || order number: 1924169 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.08mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF_1x10_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776773 12A || order number: 1924059 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.00mm +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_10-GF_1x10_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/10-GF; number of pins: 10; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776773 12A || order number: 1924059 16A (HC) +phoenix_contact connector MSTB_01x10_GF_5.00mm_MH +0 +10 +10 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF-5,08_1x11_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776595 12A || order number: 1924172 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.08mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF-5,08_1x11_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF-5,08; number of pins: 11; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776595 12A || order number: 1924172 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.08mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF_1x11_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776786 12A || order number: 1924062 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.00mm +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_11-GF_1x11_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/11-GF; number of pins: 11; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776786 12A || order number: 1924062 16A (HC) +phoenix_contact connector MSTB_01x11_GF_5.00mm_MH +0 +11 +11 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF-5,08_1x12_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776605 12A || order number: 1924185 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.08mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF-5,08_1x12_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF-5,08; number of pins: 12; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776605 12A || order number: 1924185 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.08mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF_1x12_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776799 12A || order number: 1924075 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.00mm +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_12-GF_1x12_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/12-GF; number of pins: 12; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776799 12A || order number: 1924075 16A (HC) +phoenix_contact connector MSTB_01x12_GF_5.00mm_MH +0 +12 +12 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF-5,08_1x13_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776618 12A +phoenix_contact connector MSTB_01x13_GF_5.08mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF-5,08_1x13_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF-5,08; number of pins: 13; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776618 12A +phoenix_contact connector MSTB_01x13_GF_5.08mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF_1x13_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776809 12A +phoenix_contact connector MSTB_01x13_GF_5.00mm +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_13-GF_1x13_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/13-GF; number of pins: 13; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776809 12A +phoenix_contact connector MSTB_01x13_GF_5.00mm_MH +0 +13 +13 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF-5,08_1x14_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776621 12A +phoenix_contact connector MSTB_01x14_GF_5.08mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF-5,08_1x14_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF-5,08; number of pins: 14; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776621 12A +phoenix_contact connector MSTB_01x14_GF_5.08mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF_1x14_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776812 12A +phoenix_contact connector MSTB_01x14_GF_5.00mm +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_14-GF_1x14_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/14-GF; number of pins: 14; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776812 12A +phoenix_contact connector MSTB_01x14_GF_5.00mm_MH +0 +14 +14 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF-5,08_1x15_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776634 12A +phoenix_contact connector MSTB_01x15_GF_5.08mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF-5,08_1x15_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF-5,08; number of pins: 15; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776634 12A +phoenix_contact connector MSTB_01x15_GF_5.08mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF_1x15_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776825 12A +phoenix_contact connector MSTB_01x15_GF_5.00mm +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_15-GF_1x15_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/15-GF; number of pins: 15; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776825 12A +phoenix_contact connector MSTB_01x15_GF_5.00mm_MH +0 +15 +15 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF-5,08_1x16_P5.08mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Angled; threaded flange || order number: 1776647 12A +phoenix_contact connector MSTB_01x16_GF_5.08mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF-5,08_1x16_P5.08mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF-5,08; number of pins: 16; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776647 12A +phoenix_contact connector MSTB_01x16_GF_5.08mm_MH +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF_1x16_P5.00mm_Horizontal_ThreadedFlange +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Angled; threaded flange || order number: 1776838 12A +phoenix_contact connector MSTB_01x16_GF_5.00mm +0 +16 +16 +Connector_Phoenix_MSTB +PhoenixContact_MSTB_2,5_16-GF_1x16_P5.00mm_Horizontal_ThreadedFlange_MountHole +Generic Phoenix Contact connector footprint for: MSTB_2,5/16-GF; number of pins: 16; pin pitch: 5.00mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x6.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1776838 12A +phoenix_contact connector MSTB_01x16_GF_5.00mm_MH +0 +16 +16 +Connector_Pin +Pin_D0.7mm_L6.5mm_W1.8mm_FlatFork +solder Pin_ with flat fork, hole diameter 0.7mm, length 6.5mm, width 1.8mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D0.9mm_L10.0mm_W2.4mm_FlatFork +solder Pin_ with flat fork, hole diameter 0.9mm, length 10.0mm, width 2.4mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.0mm_L10.0mm +solder Pin_ diameter 1.0mm, hole diameter 1.0mm (press fit), length 10.0mm +solder Pin_ press fit +0 +1 +1 +Connector_Pin +Pin_D1.0mm_L10.0mm_LooseFit +solder Pin_ diameter 1.0mm, hole diameter 1.2mm (loose fit), length 10.0mm +solder Pin_ loose fit +0 +1 +1 +Connector_Pin +Pin_D1.1mm_L8.5mm_W2.5mm_FlatFork +solder Pin_ with flat fork, hole diameter 1.1mm, length 8.5mm, width 2.5mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.1mm_L10.2mm_W3.5mm_Flat +solder Pin_ with flat with hole, hole diameter 1.1mm, length 10.2mm, width 3.5mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.2mm_L10.2mm_W2.9mm_FlatFork +solder Pin_ with flat with fork, hole diameter 1.2mm, length 11.3mm, width 3.0mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.2mm_L11.3mm_W3.0mm_Flat +solder Pin_ with flat with hole, hole diameter 1.2mm, length 11.3mm, width 3.0mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L10.0mm_W3.5mm_Flat +solder Pin_ with flat with hole, hole diameter 1.3mm, length 10.0mm, width 3.5mm, e.g. Ettinger 13.13.865, https://katalog.ettinger.de/#p=434 +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.0mm +solder Pin_ diameter 1.3mm, hole diameter 1.3mm, length 11.0mm +solder Pin_ pressfit +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.0mm_LooseFit +solder Pin_ diameter 1.3mm, hole diameter 1.5mm (loose fit), length 11.0mm +solder Pin_ loose fit +0 +1 +1 +Connector_Pin +Pin_D1.3mm_L11.3mm_W2.8mm_Flat +solder Pin_ with flat with hole, hole diameter 1.3mm, length 11.3mm, width 2.8mm +solder Pin_ with flat fork +0 +1 +1 +Connector_Pin +Pin_D1.4mm_L8.5mm_W2.8mm_FlatFork +solder Pin_ with flat with fork, hole diameter 1.4mm, length 8.5mm, width 2.8mm, e.g. Ettinger 13.13.890, https://katalog.ettinger.de/#p=434 +solder Pin_ with flat fork +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x01_P1.00mm_Horizontal +Through hole angled pin header, 1x01, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x01 1.00mm single row +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x01_P1.00mm_Vertical +Through hole straight pin header, 1x01, 1.00mm pitch, single row +Through hole pin header THT 1x01 1.00mm single row +0 +1 +1 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Horizontal +Through hole angled pin header, 1x02, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical +Through hole straight pin header, 1x02, 1.00mm pitch, single row +Through hole pin header THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 1.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x02_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 1.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Horizontal +Through hole angled pin header, 1x03, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical +Through hole straight pin header, 1x03, 1.00mm pitch, single row +Through hole pin header THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 1.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x03_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 1.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Horizontal +Through hole angled pin header, 1x04, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical +Through hole straight pin header, 1x04, 1.00mm pitch, single row +Through hole pin header THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 1.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x04_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 1.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Horizontal +Through hole angled pin header, 1x05, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical +Through hole straight pin header, 1x05, 1.00mm pitch, single row +Through hole pin header THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 1.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x05_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 1.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Horizontal +Through hole angled pin header, 1x06, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical +Through hole straight pin header, 1x06, 1.00mm pitch, single row +Through hole pin header THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 1.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x06_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 1.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Horizontal +Through hole angled pin header, 1x07, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical +Through hole straight pin header, 1x07, 1.00mm pitch, single row +Through hole pin header THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 1.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x07_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 1.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Horizontal +Through hole angled pin header, 1x08, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical +Through hole straight pin header, 1x08, 1.00mm pitch, single row +Through hole pin header THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 1.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x08_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 1.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Horizontal +Through hole angled pin header, 1x09, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical +Through hole straight pin header, 1x09, 1.00mm pitch, single row +Through hole pin header THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 1.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x09_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 1.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Horizontal +Through hole angled pin header, 1x10, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical +Through hole straight pin header, 1x10, 1.00mm pitch, single row +Through hole pin header THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 1.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x10_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 1.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Horizontal +Through hole angled pin header, 1x11, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical +Through hole straight pin header, 1x11, 1.00mm pitch, single row +Through hole pin header THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 1.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x11_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 1.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Horizontal +Through hole angled pin header, 1x12, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical +Through hole straight pin header, 1x12, 1.00mm pitch, single row +Through hole pin header THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 1.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x12_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 1.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Horizontal +Through hole angled pin header, 1x13, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical +Through hole straight pin header, 1x13, 1.00mm pitch, single row +Through hole pin header THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 1.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x13_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 1.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Horizontal +Through hole angled pin header, 1x14, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical +Through hole straight pin header, 1x14, 1.00mm pitch, single row +Through hole pin header THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 1.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x14_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 1.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Horizontal +Through hole angled pin header, 1x15, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical +Through hole straight pin header, 1x15, 1.00mm pitch, single row +Through hole pin header THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 1.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x15_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 1.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Horizontal +Through hole angled pin header, 1x16, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical +Through hole straight pin header, 1x16, 1.00mm pitch, single row +Through hole pin header THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 1.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x16_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 1.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Horizontal +Through hole angled pin header, 1x17, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical +Through hole straight pin header, 1x17, 1.00mm pitch, single row +Through hole pin header THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 1.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x17_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 1.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Horizontal +Through hole angled pin header, 1x18, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical +Through hole straight pin header, 1x18, 1.00mm pitch, single row +Through hole pin header THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 1.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x18_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 1.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Horizontal +Through hole angled pin header, 1x19, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical +Through hole straight pin header, 1x19, 1.00mm pitch, single row +Through hole pin header THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 1.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x19_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 1.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Horizontal +Through hole angled pin header, 1x20, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical +Through hole straight pin header, 1x20, 1.00mm pitch, single row +Through hole pin header THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 1.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x20_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 1.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Horizontal +Through hole angled pin header, 1x21, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical +Through hole straight pin header, 1x21, 1.00mm pitch, single row +Through hole pin header THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 1.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x21_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 1.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Horizontal +Through hole angled pin header, 1x22, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical +Through hole straight pin header, 1x22, 1.00mm pitch, single row +Through hole pin header THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 1.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x22_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 1.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Horizontal +Through hole angled pin header, 1x23, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical +Through hole straight pin header, 1x23, 1.00mm pitch, single row +Through hole pin header THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 1.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x23_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 1.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Horizontal +Through hole angled pin header, 1x24, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical +Through hole straight pin header, 1x24, 1.00mm pitch, single row +Through hole pin header THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 1.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x24_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 1.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Horizontal +Through hole angled pin header, 1x25, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical +Through hole straight pin header, 1x25, 1.00mm pitch, single row +Through hole pin header THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 1.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x25_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 1.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Horizontal +Through hole angled pin header, 1x26, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical +Through hole straight pin header, 1x26, 1.00mm pitch, single row +Through hole pin header THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 1.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x26_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 1.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Horizontal +Through hole angled pin header, 1x27, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical +Through hole straight pin header, 1x27, 1.00mm pitch, single row +Through hole pin header THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 1.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x27_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 1.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Horizontal +Through hole angled pin header, 1x28, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical +Through hole straight pin header, 1x28, 1.00mm pitch, single row +Through hole pin header THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 1.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x28_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 1.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Horizontal +Through hole angled pin header, 1x29, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical +Through hole straight pin header, 1x29, 1.00mm pitch, single row +Through hole pin header THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 1.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x29_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 1.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Horizontal +Through hole angled pin header, 1x30, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical +Through hole straight pin header, 1x30, 1.00mm pitch, single row +Through hole pin header THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 1.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x30_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 1.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Horizontal +Through hole angled pin header, 1x31, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical +Through hole straight pin header, 1x31, 1.00mm pitch, single row +Through hole pin header THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 1.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x31_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 1.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Horizontal +Through hole angled pin header, 1x32, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical +Through hole straight pin header, 1x32, 1.00mm pitch, single row +Through hole pin header THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 1.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x32_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 1.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Horizontal +Through hole angled pin header, 1x33, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical +Through hole straight pin header, 1x33, 1.00mm pitch, single row +Through hole pin header THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 1.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x33_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 1.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Horizontal +Through hole angled pin header, 1x34, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical +Through hole straight pin header, 1x34, 1.00mm pitch, single row +Through hole pin header THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 1.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x34_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 1.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Horizontal +Through hole angled pin header, 1x35, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical +Through hole straight pin header, 1x35, 1.00mm pitch, single row +Through hole pin header THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 1.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x35_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 1.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Horizontal +Through hole angled pin header, 1x36, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical +Through hole straight pin header, 1x36, 1.00mm pitch, single row +Through hole pin header THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 1.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x36_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 1.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Horizontal +Through hole angled pin header, 1x37, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical +Through hole straight pin header, 1x37, 1.00mm pitch, single row +Through hole pin header THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 1.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x37_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 1.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Horizontal +Through hole angled pin header, 1x38, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical +Through hole straight pin header, 1x38, 1.00mm pitch, single row +Through hole pin header THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 1.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x38_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 1.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Horizontal +Through hole angled pin header, 1x39, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical +Through hole straight pin header, 1x39, 1.00mm pitch, single row +Through hole pin header THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 1.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x39_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 1.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Horizontal +Through hole angled pin header, 1x40, 1.00mm pitch, 2.0mm pin length, single row +Through hole angled pin header THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical +Through hole straight pin header, 1x40, 1.00mm pitch, single row +Through hole pin header THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 1.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 1.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_1x40_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 1.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 1.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Horizontal +Through hole angled pin header, 2x01, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Vertical +Through hole straight pin header, 2x01, 1.00mm pitch, double rows +Through hole pin header THT 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x01_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x01 1.00mm double row +0 +2 +2 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Horizontal +Through hole angled pin header, 2x02, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Vertical +Through hole straight pin header, 2x02, 1.00mm pitch, double rows +Through hole pin header THT 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x02_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x02 1.00mm double row +0 +4 +4 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Horizontal +Through hole angled pin header, 2x03, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Vertical +Through hole straight pin header, 2x03, 1.00mm pitch, double rows +Through hole pin header THT 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x03_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x03 1.00mm double row +0 +6 +6 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Horizontal +Through hole angled pin header, 2x04, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Vertical +Through hole straight pin header, 2x04, 1.00mm pitch, double rows +Through hole pin header THT 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x04_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x04 1.00mm double row +0 +8 +8 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Horizontal +Through hole angled pin header, 2x05, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Vertical +Through hole straight pin header, 2x05, 1.00mm pitch, double rows +Through hole pin header THT 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x05_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x05 1.00mm double row +0 +10 +10 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Horizontal +Through hole angled pin header, 2x06, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Vertical +Through hole straight pin header, 2x06, 1.00mm pitch, double rows +Through hole pin header THT 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x06_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x06 1.00mm double row +0 +12 +12 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Horizontal +Through hole angled pin header, 2x07, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Vertical +Through hole straight pin header, 2x07, 1.00mm pitch, double rows +Through hole pin header THT 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x07_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x07 1.00mm double row +0 +14 +14 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Horizontal +Through hole angled pin header, 2x08, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Vertical +Through hole straight pin header, 2x08, 1.00mm pitch, double rows +Through hole pin header THT 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x08_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x08 1.00mm double row +0 +16 +16 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Horizontal +Through hole angled pin header, 2x09, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Vertical +Through hole straight pin header, 2x09, 1.00mm pitch, double rows +Through hole pin header THT 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x09_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x09 1.00mm double row +0 +18 +18 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Horizontal +Through hole angled pin header, 2x10, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Vertical +Through hole straight pin header, 2x10, 1.00mm pitch, double rows +Through hole pin header THT 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x10_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x10 1.00mm double row +0 +20 +20 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Horizontal +Through hole angled pin header, 2x11, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Vertical +Through hole straight pin header, 2x11, 1.00mm pitch, double rows +Through hole pin header THT 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x11_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x11 1.00mm double row +0 +22 +22 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Horizontal +Through hole angled pin header, 2x12, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Vertical +Through hole straight pin header, 2x12, 1.00mm pitch, double rows +Through hole pin header THT 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x12_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x12 1.00mm double row +0 +24 +24 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Horizontal +Through hole angled pin header, 2x13, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Vertical +Through hole straight pin header, 2x13, 1.00mm pitch, double rows +Through hole pin header THT 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x13_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x13 1.00mm double row +0 +26 +26 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Horizontal +Through hole angled pin header, 2x14, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Vertical +Through hole straight pin header, 2x14, 1.00mm pitch, double rows +Through hole pin header THT 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x14_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x14 1.00mm double row +0 +28 +28 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Horizontal +Through hole angled pin header, 2x15, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Vertical +Through hole straight pin header, 2x15, 1.00mm pitch, double rows +Through hole pin header THT 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x15_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x15 1.00mm double row +0 +30 +30 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Horizontal +Through hole angled pin header, 2x16, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Vertical +Through hole straight pin header, 2x16, 1.00mm pitch, double rows +Through hole pin header THT 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x16_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x16 1.00mm double row +0 +32 +32 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Horizontal +Through hole angled pin header, 2x17, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Vertical +Through hole straight pin header, 2x17, 1.00mm pitch, double rows +Through hole pin header THT 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x17_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x17 1.00mm double row +0 +34 +34 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Horizontal +Through hole angled pin header, 2x18, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Vertical +Through hole straight pin header, 2x18, 1.00mm pitch, double rows +Through hole pin header THT 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x18_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x18 1.00mm double row +0 +36 +36 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Horizontal +Through hole angled pin header, 2x19, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Vertical +Through hole straight pin header, 2x19, 1.00mm pitch, double rows +Through hole pin header THT 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x19_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x19 1.00mm double row +0 +38 +38 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Horizontal +Through hole angled pin header, 2x20, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Vertical +Through hole straight pin header, 2x20, 1.00mm pitch, double rows +Through hole pin header THT 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x20_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x20 1.00mm double row +0 +40 +40 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Horizontal +Through hole angled pin header, 2x21, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Vertical +Through hole straight pin header, 2x21, 1.00mm pitch, double rows +Through hole pin header THT 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x21_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x21 1.00mm double row +0 +42 +42 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Horizontal +Through hole angled pin header, 2x22, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Vertical +Through hole straight pin header, 2x22, 1.00mm pitch, double rows +Through hole pin header THT 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x22_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x22 1.00mm double row +0 +44 +44 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Horizontal +Through hole angled pin header, 2x23, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Vertical +Through hole straight pin header, 2x23, 1.00mm pitch, double rows +Through hole pin header THT 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x23_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x23 1.00mm double row +0 +46 +46 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Horizontal +Through hole angled pin header, 2x24, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Vertical +Through hole straight pin header, 2x24, 1.00mm pitch, double rows +Through hole pin header THT 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x24_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x24 1.00mm double row +0 +48 +48 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Horizontal +Through hole angled pin header, 2x25, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Vertical +Through hole straight pin header, 2x25, 1.00mm pitch, double rows +Through hole pin header THT 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x25_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x25 1.00mm double row +0 +50 +50 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Horizontal +Through hole angled pin header, 2x26, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Vertical +Through hole straight pin header, 2x26, 1.00mm pitch, double rows +Through hole pin header THT 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x26_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x26 1.00mm double row +0 +52 +52 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Horizontal +Through hole angled pin header, 2x27, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Vertical +Through hole straight pin header, 2x27, 1.00mm pitch, double rows +Through hole pin header THT 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x27_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x27 1.00mm double row +0 +54 +54 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Horizontal +Through hole angled pin header, 2x28, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Vertical +Through hole straight pin header, 2x28, 1.00mm pitch, double rows +Through hole pin header THT 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x28_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x28 1.00mm double row +0 +56 +56 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Horizontal +Through hole angled pin header, 2x29, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Vertical +Through hole straight pin header, 2x29, 1.00mm pitch, double rows +Through hole pin header THT 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x29_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x29 1.00mm double row +0 +58 +58 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Horizontal +Through hole angled pin header, 2x30, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Vertical +Through hole straight pin header, 2x30, 1.00mm pitch, double rows +Through hole pin header THT 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x30_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x30 1.00mm double row +0 +60 +60 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Horizontal +Through hole angled pin header, 2x31, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Vertical +Through hole straight pin header, 2x31, 1.00mm pitch, double rows +Through hole pin header THT 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x31_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x31 1.00mm double row +0 +62 +62 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Horizontal +Through hole angled pin header, 2x32, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Vertical +Through hole straight pin header, 2x32, 1.00mm pitch, double rows +Through hole pin header THT 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x32_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x32 1.00mm double row +0 +64 +64 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Horizontal +Through hole angled pin header, 2x33, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Vertical +Through hole straight pin header, 2x33, 1.00mm pitch, double rows +Through hole pin header THT 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x33_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x33 1.00mm double row +0 +66 +66 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Horizontal +Through hole angled pin header, 2x34, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Vertical +Through hole straight pin header, 2x34, 1.00mm pitch, double rows +Through hole pin header THT 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x34_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x34 1.00mm double row +0 +68 +68 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Horizontal +Through hole angled pin header, 2x35, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Vertical +Through hole straight pin header, 2x35, 1.00mm pitch, double rows +Through hole pin header THT 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x35_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x35 1.00mm double row +0 +70 +70 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Horizontal +Through hole angled pin header, 2x36, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Vertical +Through hole straight pin header, 2x36, 1.00mm pitch, double rows +Through hole pin header THT 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x36_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x36 1.00mm double row +0 +72 +72 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Horizontal +Through hole angled pin header, 2x37, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Vertical +Through hole straight pin header, 2x37, 1.00mm pitch, double rows +Through hole pin header THT 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x37_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x37 1.00mm double row +0 +74 +74 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Horizontal +Through hole angled pin header, 2x38, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Vertical +Through hole straight pin header, 2x38, 1.00mm pitch, double rows +Through hole pin header THT 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x38_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x38 1.00mm double row +0 +76 +76 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Horizontal +Through hole angled pin header, 2x39, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Vertical +Through hole straight pin header, 2x39, 1.00mm pitch, double rows +Through hole pin header THT 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x39_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x39 1.00mm double row +0 +78 +78 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Horizontal +Through hole angled pin header, 2x40, 1.00mm pitch, 2.0mm pin length, double rows +Through hole angled pin header THT 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Vertical +Through hole straight pin header, 2x40, 1.00mm pitch, double rows +Through hole pin header THT 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.00mm +PinHeader_2x40_P1.00mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 1.00mm pitch, double rows +Surface mounted pin header SMD 2x40 1.00mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_1x01_P1.27mm_Horizontal +Through hole angled pin header, 1x01, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinHeader_1.27mm +PinHeader_1x01_P1.27mm_Vertical +Through hole straight pin header, 1x01, 1.27mm pitch, single row +Through hole pin header THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Horizontal +Through hole angled pin header, 1x02, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical +Through hole straight pin header, 1x02, 1.27mm pitch, single row +Through hole pin header THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 1.27mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 1.27mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Horizontal +Through hole angled pin header, 1x03, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical +Through hole straight pin header, 1x03, 1.27mm pitch, single row +Through hole pin header THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 1.27mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 1.27mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Horizontal +Through hole angled pin header, 1x04, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical +Through hole straight pin header, 1x04, 1.27mm pitch, single row +Through hole pin header THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 1.27mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 1.27mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Horizontal +Through hole angled pin header, 1x05, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical +Through hole straight pin header, 1x05, 1.27mm pitch, single row +Through hole pin header THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 1.27mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 1.27mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Horizontal +Through hole angled pin header, 1x06, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical +Through hole straight pin header, 1x06, 1.27mm pitch, single row +Through hole pin header THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 1.27mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 1.27mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Horizontal +Through hole angled pin header, 1x07, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical +Through hole straight pin header, 1x07, 1.27mm pitch, single row +Through hole pin header THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 1.27mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 1.27mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Horizontal +Through hole angled pin header, 1x08, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical +Through hole straight pin header, 1x08, 1.27mm pitch, single row +Through hole pin header THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 1.27mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 1.27mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Horizontal +Through hole angled pin header, 1x09, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical +Through hole straight pin header, 1x09, 1.27mm pitch, single row +Through hole pin header THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 1.27mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 1.27mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Horizontal +Through hole angled pin header, 1x10, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical +Through hole straight pin header, 1x10, 1.27mm pitch, single row +Through hole pin header THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 1.27mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 1.27mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Horizontal +Through hole angled pin header, 1x11, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical +Through hole straight pin header, 1x11, 1.27mm pitch, single row +Through hole pin header THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 1.27mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 1.27mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Horizontal +Through hole angled pin header, 1x12, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical +Through hole straight pin header, 1x12, 1.27mm pitch, single row +Through hole pin header THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 1.27mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 1.27mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Horizontal +Through hole angled pin header, 1x13, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical +Through hole straight pin header, 1x13, 1.27mm pitch, single row +Through hole pin header THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 1.27mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 1.27mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Horizontal +Through hole angled pin header, 1x14, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical +Through hole straight pin header, 1x14, 1.27mm pitch, single row +Through hole pin header THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 1.27mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 1.27mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Horizontal +Through hole angled pin header, 1x15, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical +Through hole straight pin header, 1x15, 1.27mm pitch, single row +Through hole pin header THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 1.27mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 1.27mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Horizontal +Through hole angled pin header, 1x16, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical +Through hole straight pin header, 1x16, 1.27mm pitch, single row +Through hole pin header THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 1.27mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 1.27mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Horizontal +Through hole angled pin header, 1x17, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical +Through hole straight pin header, 1x17, 1.27mm pitch, single row +Through hole pin header THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 1.27mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 1.27mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Horizontal +Through hole angled pin header, 1x18, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical +Through hole straight pin header, 1x18, 1.27mm pitch, single row +Through hole pin header THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 1.27mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 1.27mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Horizontal +Through hole angled pin header, 1x19, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical +Through hole straight pin header, 1x19, 1.27mm pitch, single row +Through hole pin header THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 1.27mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 1.27mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Horizontal +Through hole angled pin header, 1x20, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical +Through hole straight pin header, 1x20, 1.27mm pitch, single row +Through hole pin header THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 1.27mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 1.27mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Horizontal +Through hole angled pin header, 1x21, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical +Through hole straight pin header, 1x21, 1.27mm pitch, single row +Through hole pin header THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 1.27mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 1.27mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Horizontal +Through hole angled pin header, 1x22, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical +Through hole straight pin header, 1x22, 1.27mm pitch, single row +Through hole pin header THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 1.27mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 1.27mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Horizontal +Through hole angled pin header, 1x23, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical +Through hole straight pin header, 1x23, 1.27mm pitch, single row +Through hole pin header THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 1.27mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 1.27mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Horizontal +Through hole angled pin header, 1x24, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical +Through hole straight pin header, 1x24, 1.27mm pitch, single row +Through hole pin header THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 1.27mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 1.27mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Horizontal +Through hole angled pin header, 1x25, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical +Through hole straight pin header, 1x25, 1.27mm pitch, single row +Through hole pin header THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 1.27mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 1.27mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Horizontal +Through hole angled pin header, 1x26, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical +Through hole straight pin header, 1x26, 1.27mm pitch, single row +Through hole pin header THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 1.27mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 1.27mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Horizontal +Through hole angled pin header, 1x27, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical +Through hole straight pin header, 1x27, 1.27mm pitch, single row +Through hole pin header THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 1.27mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 1.27mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Horizontal +Through hole angled pin header, 1x28, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical +Through hole straight pin header, 1x28, 1.27mm pitch, single row +Through hole pin header THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 1.27mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 1.27mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Horizontal +Through hole angled pin header, 1x29, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical +Through hole straight pin header, 1x29, 1.27mm pitch, single row +Through hole pin header THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 1.27mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 1.27mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Horizontal +Through hole angled pin header, 1x30, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical +Through hole straight pin header, 1x30, 1.27mm pitch, single row +Through hole pin header THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 1.27mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 1.27mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Horizontal +Through hole angled pin header, 1x31, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical +Through hole straight pin header, 1x31, 1.27mm pitch, single row +Through hole pin header THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 1.27mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 1.27mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Horizontal +Through hole angled pin header, 1x32, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical +Through hole straight pin header, 1x32, 1.27mm pitch, single row +Through hole pin header THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 1.27mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 1.27mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Horizontal +Through hole angled pin header, 1x33, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical +Through hole straight pin header, 1x33, 1.27mm pitch, single row +Through hole pin header THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 1.27mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 1.27mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Horizontal +Through hole angled pin header, 1x34, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical +Through hole straight pin header, 1x34, 1.27mm pitch, single row +Through hole pin header THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 1.27mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 1.27mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Horizontal +Through hole angled pin header, 1x35, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical +Through hole straight pin header, 1x35, 1.27mm pitch, single row +Through hole pin header THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 1.27mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 1.27mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Horizontal +Through hole angled pin header, 1x36, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical +Through hole straight pin header, 1x36, 1.27mm pitch, single row +Through hole pin header THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 1.27mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 1.27mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Horizontal +Through hole angled pin header, 1x37, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical +Through hole straight pin header, 1x37, 1.27mm pitch, single row +Through hole pin header THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 1.27mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 1.27mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Horizontal +Through hole angled pin header, 1x38, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical +Through hole straight pin header, 1x38, 1.27mm pitch, single row +Through hole pin header THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 1.27mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 1.27mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Horizontal +Through hole angled pin header, 1x39, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical +Through hole straight pin header, 1x39, 1.27mm pitch, single row +Through hole pin header THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 1.27mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 1.27mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Horizontal +Through hole angled pin header, 1x40, 1.27mm pitch, 4.0mm pin length, single row +Through hole angled pin header THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical +Through hole straight pin header, 1x40, 1.27mm pitch, single row +Through hole pin header THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 1.27mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 1.27mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Horizontal +Through hole angled pin header, 2x01, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Vertical +Through hole straight pin header, 2x01, 1.27mm pitch, double rows +Through hole pin header THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x01_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x01 1.27mm double row +0 +2 +2 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Horizontal +Through hole angled pin header, 2x02, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Vertical +Through hole straight pin header, 2x02, 1.27mm pitch, double rows +Through hole pin header THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x02_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x02 1.27mm double row +0 +4 +4 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Horizontal +Through hole angled pin header, 2x03, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Vertical +Through hole straight pin header, 2x03, 1.27mm pitch, double rows +Through hole pin header THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x03_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x03 1.27mm double row +0 +6 +6 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Horizontal +Through hole angled pin header, 2x04, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Vertical +Through hole straight pin header, 2x04, 1.27mm pitch, double rows +Through hole pin header THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x04_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x04 1.27mm double row +0 +8 +8 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Horizontal +Through hole angled pin header, 2x05, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Vertical +Through hole straight pin header, 2x05, 1.27mm pitch, double rows +Through hole pin header THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x05_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x05 1.27mm double row +0 +10 +10 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Horizontal +Through hole angled pin header, 2x06, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Vertical +Through hole straight pin header, 2x06, 1.27mm pitch, double rows +Through hole pin header THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x06_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x06 1.27mm double row +0 +12 +12 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Horizontal +Through hole angled pin header, 2x07, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Vertical +Through hole straight pin header, 2x07, 1.27mm pitch, double rows +Through hole pin header THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x07_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x07 1.27mm double row +0 +14 +14 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Horizontal +Through hole angled pin header, 2x08, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Vertical +Through hole straight pin header, 2x08, 1.27mm pitch, double rows +Through hole pin header THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x08_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x08 1.27mm double row +0 +16 +16 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Horizontal +Through hole angled pin header, 2x09, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Vertical +Through hole straight pin header, 2x09, 1.27mm pitch, double rows +Through hole pin header THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x09_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x09 1.27mm double row +0 +18 +18 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Horizontal +Through hole angled pin header, 2x10, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Vertical +Through hole straight pin header, 2x10, 1.27mm pitch, double rows +Through hole pin header THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x10_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x10 1.27mm double row +0 +20 +20 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Horizontal +Through hole angled pin header, 2x11, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Vertical +Through hole straight pin header, 2x11, 1.27mm pitch, double rows +Through hole pin header THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x11_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x11 1.27mm double row +0 +22 +22 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Horizontal +Through hole angled pin header, 2x12, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Vertical +Through hole straight pin header, 2x12, 1.27mm pitch, double rows +Through hole pin header THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x12_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x12 1.27mm double row +0 +24 +24 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Horizontal +Through hole angled pin header, 2x13, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Vertical +Through hole straight pin header, 2x13, 1.27mm pitch, double rows +Through hole pin header THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x13_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x13 1.27mm double row +0 +26 +26 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Horizontal +Through hole angled pin header, 2x14, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Vertical +Through hole straight pin header, 2x14, 1.27mm pitch, double rows +Through hole pin header THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x14_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x14 1.27mm double row +0 +28 +28 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Horizontal +Through hole angled pin header, 2x15, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Vertical +Through hole straight pin header, 2x15, 1.27mm pitch, double rows +Through hole pin header THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x15_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x15 1.27mm double row +0 +30 +30 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Horizontal +Through hole angled pin header, 2x16, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Vertical +Through hole straight pin header, 2x16, 1.27mm pitch, double rows +Through hole pin header THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x16_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x16 1.27mm double row +0 +32 +32 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Horizontal +Through hole angled pin header, 2x17, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Vertical +Through hole straight pin header, 2x17, 1.27mm pitch, double rows +Through hole pin header THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x17_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x17 1.27mm double row +0 +34 +34 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Horizontal +Through hole angled pin header, 2x18, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Vertical +Through hole straight pin header, 2x18, 1.27mm pitch, double rows +Through hole pin header THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x18_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x18 1.27mm double row +0 +36 +36 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Horizontal +Through hole angled pin header, 2x19, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Vertical +Through hole straight pin header, 2x19, 1.27mm pitch, double rows +Through hole pin header THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x19_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x19 1.27mm double row +0 +38 +38 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Horizontal +Through hole angled pin header, 2x20, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Vertical +Through hole straight pin header, 2x20, 1.27mm pitch, double rows +Through hole pin header THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x20_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x20 1.27mm double row +0 +40 +40 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Horizontal +Through hole angled pin header, 2x21, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Vertical +Through hole straight pin header, 2x21, 1.27mm pitch, double rows +Through hole pin header THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x21_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x21 1.27mm double row +0 +42 +42 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Horizontal +Through hole angled pin header, 2x22, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Vertical +Through hole straight pin header, 2x22, 1.27mm pitch, double rows +Through hole pin header THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x22_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x22 1.27mm double row +0 +44 +44 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Horizontal +Through hole angled pin header, 2x23, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Vertical +Through hole straight pin header, 2x23, 1.27mm pitch, double rows +Through hole pin header THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x23_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x23 1.27mm double row +0 +46 +46 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Horizontal +Through hole angled pin header, 2x24, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Vertical +Through hole straight pin header, 2x24, 1.27mm pitch, double rows +Through hole pin header THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x24_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x24 1.27mm double row +0 +48 +48 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Horizontal +Through hole angled pin header, 2x25, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Vertical +Through hole straight pin header, 2x25, 1.27mm pitch, double rows +Through hole pin header THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x25_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x25 1.27mm double row +0 +50 +50 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Horizontal +Through hole angled pin header, 2x26, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Vertical +Through hole straight pin header, 2x26, 1.27mm pitch, double rows +Through hole pin header THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x26_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x26 1.27mm double row +0 +52 +52 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Horizontal +Through hole angled pin header, 2x27, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Vertical +Through hole straight pin header, 2x27, 1.27mm pitch, double rows +Through hole pin header THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x27_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x27 1.27mm double row +0 +54 +54 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Horizontal +Through hole angled pin header, 2x28, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Vertical +Through hole straight pin header, 2x28, 1.27mm pitch, double rows +Through hole pin header THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x28_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x28 1.27mm double row +0 +56 +56 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Horizontal +Through hole angled pin header, 2x29, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Vertical +Through hole straight pin header, 2x29, 1.27mm pitch, double rows +Through hole pin header THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x29_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x29 1.27mm double row +0 +58 +58 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Horizontal +Through hole angled pin header, 2x30, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Vertical +Through hole straight pin header, 2x30, 1.27mm pitch, double rows +Through hole pin header THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x30_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x30 1.27mm double row +0 +60 +60 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Horizontal +Through hole angled pin header, 2x31, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Vertical +Through hole straight pin header, 2x31, 1.27mm pitch, double rows +Through hole pin header THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x31_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x31 1.27mm double row +0 +62 +62 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Horizontal +Through hole angled pin header, 2x32, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Vertical +Through hole straight pin header, 2x32, 1.27mm pitch, double rows +Through hole pin header THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x32_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x32 1.27mm double row +0 +64 +64 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Horizontal +Through hole angled pin header, 2x33, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Vertical +Through hole straight pin header, 2x33, 1.27mm pitch, double rows +Through hole pin header THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x33_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x33 1.27mm double row +0 +66 +66 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Horizontal +Through hole angled pin header, 2x34, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Vertical +Through hole straight pin header, 2x34, 1.27mm pitch, double rows +Through hole pin header THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x34_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x34 1.27mm double row +0 +68 +68 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Horizontal +Through hole angled pin header, 2x35, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Vertical +Through hole straight pin header, 2x35, 1.27mm pitch, double rows +Through hole pin header THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x35_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x35 1.27mm double row +0 +70 +70 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Horizontal +Through hole angled pin header, 2x36, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Vertical +Through hole straight pin header, 2x36, 1.27mm pitch, double rows +Through hole pin header THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x36_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x36 1.27mm double row +0 +72 +72 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Horizontal +Through hole angled pin header, 2x37, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Vertical +Through hole straight pin header, 2x37, 1.27mm pitch, double rows +Through hole pin header THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x37_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x37 1.27mm double row +0 +74 +74 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Horizontal +Through hole angled pin header, 2x38, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Vertical +Through hole straight pin header, 2x38, 1.27mm pitch, double rows +Through hole pin header THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x38_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x38 1.27mm double row +0 +76 +76 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Horizontal +Through hole angled pin header, 2x39, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Vertical +Through hole straight pin header, 2x39, 1.27mm pitch, double rows +Through hole pin header THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x39_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x39 1.27mm double row +0 +78 +78 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Horizontal +Through hole angled pin header, 2x40, 1.27mm pitch, 4.0mm pin length, double rows +Through hole angled pin header THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Vertical +Through hole straight pin header, 2x40, 1.27mm pitch, double rows +Through hole pin header THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_1.27mm +PinHeader_2x40_P1.27mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 1.27mm pitch, double rows +Surface mounted pin header SMD 2x40 1.27mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_1x01_P2.00mm_Horizontal +Through hole angled pin header, 1x01, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinHeader_2.00mm +PinHeader_1x01_P2.00mm_Vertical +Through hole straight pin header, 1x01, 2.00mm pitch, single row +Through hole pin header THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Horizontal +Through hole angled pin header, 1x02, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical +Through hole straight pin header, 1x02, 2.00mm pitch, single row +Through hole pin header THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 2.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x02_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 2.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Horizontal +Through hole angled pin header, 1x03, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical +Through hole straight pin header, 1x03, 2.00mm pitch, single row +Through hole pin header THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 2.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x03_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 2.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Horizontal +Through hole angled pin header, 1x04, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical +Through hole straight pin header, 1x04, 2.00mm pitch, single row +Through hole pin header THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 2.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x04_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 2.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Horizontal +Through hole angled pin header, 1x05, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical +Through hole straight pin header, 1x05, 2.00mm pitch, single row +Through hole pin header THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 2.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x05_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 2.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Horizontal +Through hole angled pin header, 1x06, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical +Through hole straight pin header, 1x06, 2.00mm pitch, single row +Through hole pin header THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 2.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x06_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 2.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Horizontal +Through hole angled pin header, 1x07, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical +Through hole straight pin header, 1x07, 2.00mm pitch, single row +Through hole pin header THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 2.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x07_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 2.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Horizontal +Through hole angled pin header, 1x08, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical +Through hole straight pin header, 1x08, 2.00mm pitch, single row +Through hole pin header THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 2.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x08_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 2.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Horizontal +Through hole angled pin header, 1x09, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical +Through hole straight pin header, 1x09, 2.00mm pitch, single row +Through hole pin header THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 2.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x09_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 2.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Horizontal +Through hole angled pin header, 1x10, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical +Through hole straight pin header, 1x10, 2.00mm pitch, single row +Through hole pin header THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 2.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x10_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 2.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Horizontal +Through hole angled pin header, 1x11, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical +Through hole straight pin header, 1x11, 2.00mm pitch, single row +Through hole pin header THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 2.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x11_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 2.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Horizontal +Through hole angled pin header, 1x12, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical +Through hole straight pin header, 1x12, 2.00mm pitch, single row +Through hole pin header THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 2.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x12_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 2.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Horizontal +Through hole angled pin header, 1x13, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical +Through hole straight pin header, 1x13, 2.00mm pitch, single row +Through hole pin header THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 2.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x13_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 2.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Horizontal +Through hole angled pin header, 1x14, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical +Through hole straight pin header, 1x14, 2.00mm pitch, single row +Through hole pin header THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 2.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x14_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 2.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Horizontal +Through hole angled pin header, 1x15, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical +Through hole straight pin header, 1x15, 2.00mm pitch, single row +Through hole pin header THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 2.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x15_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 2.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Horizontal +Through hole angled pin header, 1x16, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical +Through hole straight pin header, 1x16, 2.00mm pitch, single row +Through hole pin header THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 2.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x16_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 2.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Horizontal +Through hole angled pin header, 1x17, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical +Through hole straight pin header, 1x17, 2.00mm pitch, single row +Through hole pin header THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 2.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x17_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 2.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Horizontal +Through hole angled pin header, 1x18, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical +Through hole straight pin header, 1x18, 2.00mm pitch, single row +Through hole pin header THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 2.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x18_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 2.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Horizontal +Through hole angled pin header, 1x19, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical +Through hole straight pin header, 1x19, 2.00mm pitch, single row +Through hole pin header THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 2.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x19_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 2.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Horizontal +Through hole angled pin header, 1x20, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical +Through hole straight pin header, 1x20, 2.00mm pitch, single row +Through hole pin header THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 2.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x20_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 2.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Horizontal +Through hole angled pin header, 1x21, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical +Through hole straight pin header, 1x21, 2.00mm pitch, single row +Through hole pin header THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 2.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x21_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 2.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Horizontal +Through hole angled pin header, 1x22, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical +Through hole straight pin header, 1x22, 2.00mm pitch, single row +Through hole pin header THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 2.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x22_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 2.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Horizontal +Through hole angled pin header, 1x23, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical +Through hole straight pin header, 1x23, 2.00mm pitch, single row +Through hole pin header THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 2.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x23_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 2.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Horizontal +Through hole angled pin header, 1x24, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical +Through hole straight pin header, 1x24, 2.00mm pitch, single row +Through hole pin header THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 2.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x24_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 2.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Horizontal +Through hole angled pin header, 1x25, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical +Through hole straight pin header, 1x25, 2.00mm pitch, single row +Through hole pin header THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 2.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x25_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 2.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Horizontal +Through hole angled pin header, 1x26, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical +Through hole straight pin header, 1x26, 2.00mm pitch, single row +Through hole pin header THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 2.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x26_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 2.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Horizontal +Through hole angled pin header, 1x27, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical +Through hole straight pin header, 1x27, 2.00mm pitch, single row +Through hole pin header THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 2.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x27_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 2.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Horizontal +Through hole angled pin header, 1x28, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical +Through hole straight pin header, 1x28, 2.00mm pitch, single row +Through hole pin header THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 2.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x28_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 2.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Horizontal +Through hole angled pin header, 1x29, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical +Through hole straight pin header, 1x29, 2.00mm pitch, single row +Through hole pin header THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 2.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x29_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 2.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Horizontal +Through hole angled pin header, 1x30, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical +Through hole straight pin header, 1x30, 2.00mm pitch, single row +Through hole pin header THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 2.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x30_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 2.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Horizontal +Through hole angled pin header, 1x31, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical +Through hole straight pin header, 1x31, 2.00mm pitch, single row +Through hole pin header THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 2.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x31_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 2.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Horizontal +Through hole angled pin header, 1x32, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical +Through hole straight pin header, 1x32, 2.00mm pitch, single row +Through hole pin header THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 2.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x32_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 2.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Horizontal +Through hole angled pin header, 1x33, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical +Through hole straight pin header, 1x33, 2.00mm pitch, single row +Through hole pin header THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 2.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x33_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 2.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Horizontal +Through hole angled pin header, 1x34, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical +Through hole straight pin header, 1x34, 2.00mm pitch, single row +Through hole pin header THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 2.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x34_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 2.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Horizontal +Through hole angled pin header, 1x35, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical +Through hole straight pin header, 1x35, 2.00mm pitch, single row +Through hole pin header THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 2.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x35_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 2.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Horizontal +Through hole angled pin header, 1x36, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical +Through hole straight pin header, 1x36, 2.00mm pitch, single row +Through hole pin header THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 2.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x36_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 2.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Horizontal +Through hole angled pin header, 1x37, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical +Through hole straight pin header, 1x37, 2.00mm pitch, single row +Through hole pin header THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 2.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x37_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 2.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Horizontal +Through hole angled pin header, 1x38, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical +Through hole straight pin header, 1x38, 2.00mm pitch, single row +Through hole pin header THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 2.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x38_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 2.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Horizontal +Through hole angled pin header, 1x39, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical +Through hole straight pin header, 1x39, 2.00mm pitch, single row +Through hole pin header THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 2.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x39_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 2.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Horizontal +Through hole angled pin header, 1x40, 2.00mm pitch, 4.2mm pin length, single row +Through hole angled pin header THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical +Through hole straight pin header, 1x40, 2.00mm pitch, single row +Through hole pin header THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 2.00mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 2.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_1x40_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 2.00mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 2.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Horizontal +Through hole angled pin header, 2x01, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Vertical +Through hole straight pin header, 2x01, 2.00mm pitch, double rows +Through hole pin header THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x01_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x01 2.00mm double row +0 +2 +2 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Horizontal +Through hole angled pin header, 2x02, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Vertical +Through hole straight pin header, 2x02, 2.00mm pitch, double rows +Through hole pin header THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x02_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x02 2.00mm double row +0 +4 +4 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Horizontal +Through hole angled pin header, 2x03, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Vertical +Through hole straight pin header, 2x03, 2.00mm pitch, double rows +Through hole pin header THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x03_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x03 2.00mm double row +0 +6 +6 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Horizontal +Through hole angled pin header, 2x04, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Vertical +Through hole straight pin header, 2x04, 2.00mm pitch, double rows +Through hole pin header THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x04_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x04 2.00mm double row +0 +8 +8 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Horizontal +Through hole angled pin header, 2x05, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Vertical +Through hole straight pin header, 2x05, 2.00mm pitch, double rows +Through hole pin header THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x05_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x05 2.00mm double row +0 +10 +10 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Horizontal +Through hole angled pin header, 2x06, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Vertical +Through hole straight pin header, 2x06, 2.00mm pitch, double rows +Through hole pin header THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x06_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x06 2.00mm double row +0 +12 +12 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Horizontal +Through hole angled pin header, 2x07, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Vertical +Through hole straight pin header, 2x07, 2.00mm pitch, double rows +Through hole pin header THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x07_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x07 2.00mm double row +0 +14 +14 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Horizontal +Through hole angled pin header, 2x08, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Vertical +Through hole straight pin header, 2x08, 2.00mm pitch, double rows +Through hole pin header THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x08_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x08 2.00mm double row +0 +16 +16 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Horizontal +Through hole angled pin header, 2x09, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Vertical +Through hole straight pin header, 2x09, 2.00mm pitch, double rows +Through hole pin header THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x09_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x09 2.00mm double row +0 +18 +18 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Horizontal +Through hole angled pin header, 2x10, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Vertical +Through hole straight pin header, 2x10, 2.00mm pitch, double rows +Through hole pin header THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x10_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x10 2.00mm double row +0 +20 +20 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Horizontal +Through hole angled pin header, 2x11, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Vertical +Through hole straight pin header, 2x11, 2.00mm pitch, double rows +Through hole pin header THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x11_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x11 2.00mm double row +0 +22 +22 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Horizontal +Through hole angled pin header, 2x12, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Vertical +Through hole straight pin header, 2x12, 2.00mm pitch, double rows +Through hole pin header THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x12_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x12 2.00mm double row +0 +24 +24 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Horizontal +Through hole angled pin header, 2x13, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Vertical +Through hole straight pin header, 2x13, 2.00mm pitch, double rows +Through hole pin header THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x13_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x13 2.00mm double row +0 +26 +26 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Horizontal +Through hole angled pin header, 2x14, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Vertical +Through hole straight pin header, 2x14, 2.00mm pitch, double rows +Through hole pin header THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x14_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x14 2.00mm double row +0 +28 +28 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Horizontal +Through hole angled pin header, 2x15, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Vertical +Through hole straight pin header, 2x15, 2.00mm pitch, double rows +Through hole pin header THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x15_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x15 2.00mm double row +0 +30 +30 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Horizontal +Through hole angled pin header, 2x16, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Vertical +Through hole straight pin header, 2x16, 2.00mm pitch, double rows +Through hole pin header THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x16_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x16 2.00mm double row +0 +32 +32 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Horizontal +Through hole angled pin header, 2x17, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Vertical +Through hole straight pin header, 2x17, 2.00mm pitch, double rows +Through hole pin header THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x17_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x17 2.00mm double row +0 +34 +34 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Horizontal +Through hole angled pin header, 2x18, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Vertical +Through hole straight pin header, 2x18, 2.00mm pitch, double rows +Through hole pin header THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x18_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x18 2.00mm double row +0 +36 +36 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Horizontal +Through hole angled pin header, 2x19, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Vertical +Through hole straight pin header, 2x19, 2.00mm pitch, double rows +Through hole pin header THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x19_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x19 2.00mm double row +0 +38 +38 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Horizontal +Through hole angled pin header, 2x20, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Vertical +Through hole straight pin header, 2x20, 2.00mm pitch, double rows +Through hole pin header THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x20_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x20 2.00mm double row +0 +40 +40 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Horizontal +Through hole angled pin header, 2x21, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Vertical +Through hole straight pin header, 2x21, 2.00mm pitch, double rows +Through hole pin header THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x21_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x21 2.00mm double row +0 +42 +42 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Horizontal +Through hole angled pin header, 2x22, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Vertical +Through hole straight pin header, 2x22, 2.00mm pitch, double rows +Through hole pin header THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x22_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x22 2.00mm double row +0 +44 +44 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Horizontal +Through hole angled pin header, 2x23, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Vertical +Through hole straight pin header, 2x23, 2.00mm pitch, double rows +Through hole pin header THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x23_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x23 2.00mm double row +0 +46 +46 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Horizontal +Through hole angled pin header, 2x24, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Vertical +Through hole straight pin header, 2x24, 2.00mm pitch, double rows +Through hole pin header THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x24_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x24 2.00mm double row +0 +48 +48 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Horizontal +Through hole angled pin header, 2x25, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Vertical +Through hole straight pin header, 2x25, 2.00mm pitch, double rows +Through hole pin header THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x25_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x25 2.00mm double row +0 +50 +50 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Horizontal +Through hole angled pin header, 2x26, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Vertical +Through hole straight pin header, 2x26, 2.00mm pitch, double rows +Through hole pin header THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x26_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x26 2.00mm double row +0 +52 +52 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Horizontal +Through hole angled pin header, 2x27, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Vertical +Through hole straight pin header, 2x27, 2.00mm pitch, double rows +Through hole pin header THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x27_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x27 2.00mm double row +0 +54 +54 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Horizontal +Through hole angled pin header, 2x28, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Vertical +Through hole straight pin header, 2x28, 2.00mm pitch, double rows +Through hole pin header THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x28_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x28 2.00mm double row +0 +56 +56 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Horizontal +Through hole angled pin header, 2x29, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Vertical +Through hole straight pin header, 2x29, 2.00mm pitch, double rows +Through hole pin header THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x29_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x29 2.00mm double row +0 +58 +58 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Horizontal +Through hole angled pin header, 2x30, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Vertical +Through hole straight pin header, 2x30, 2.00mm pitch, double rows +Through hole pin header THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x30_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x30 2.00mm double row +0 +60 +60 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Horizontal +Through hole angled pin header, 2x31, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Vertical +Through hole straight pin header, 2x31, 2.00mm pitch, double rows +Through hole pin header THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x31_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x31 2.00mm double row +0 +62 +62 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Horizontal +Through hole angled pin header, 2x32, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Vertical +Through hole straight pin header, 2x32, 2.00mm pitch, double rows +Through hole pin header THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x32_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x32 2.00mm double row +0 +64 +64 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Horizontal +Through hole angled pin header, 2x33, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Vertical +Through hole straight pin header, 2x33, 2.00mm pitch, double rows +Through hole pin header THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x33_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x33 2.00mm double row +0 +66 +66 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Horizontal +Through hole angled pin header, 2x34, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Vertical +Through hole straight pin header, 2x34, 2.00mm pitch, double rows +Through hole pin header THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x34_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x34 2.00mm double row +0 +68 +68 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Horizontal +Through hole angled pin header, 2x35, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Vertical +Through hole straight pin header, 2x35, 2.00mm pitch, double rows +Through hole pin header THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x35_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x35 2.00mm double row +0 +70 +70 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Horizontal +Through hole angled pin header, 2x36, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Vertical +Through hole straight pin header, 2x36, 2.00mm pitch, double rows +Through hole pin header THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x36_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x36 2.00mm double row +0 +72 +72 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Horizontal +Through hole angled pin header, 2x37, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Vertical +Through hole straight pin header, 2x37, 2.00mm pitch, double rows +Through hole pin header THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x37_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x37 2.00mm double row +0 +74 +74 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Horizontal +Through hole angled pin header, 2x38, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Vertical +Through hole straight pin header, 2x38, 2.00mm pitch, double rows +Through hole pin header THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x38_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x38 2.00mm double row +0 +76 +76 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Horizontal +Through hole angled pin header, 2x39, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Vertical +Through hole straight pin header, 2x39, 2.00mm pitch, double rows +Through hole pin header THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x39_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x39 2.00mm double row +0 +78 +78 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Horizontal +Through hole angled pin header, 2x40, 2.00mm pitch, 4.2mm pin length, double rows +Through hole angled pin header THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Vertical +Through hole straight pin header, 2x40, 2.00mm pitch, double rows +Through hole pin header THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.00mm +PinHeader_2x40_P2.00mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 2.00mm pitch, double rows +Surface mounted pin header SMD 2x40 2.00mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_1x01_P2.54mm_Horizontal +Through hole angled pin header, 1x01, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinHeader_2.54mm +PinHeader_1x01_P2.54mm_Vertical +Through hole straight pin header, 1x01, 2.54mm pitch, single row +Through hole pin header THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Horizontal +Through hole angled pin header, 1x02, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical +Through hole straight pin header, 1x02, 2.54mm pitch, single row +Through hole pin header THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x02, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x02 2.54mm single row style1 pin1 left +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x02_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x02, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x02 2.54mm single row style2 pin1 right +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Horizontal +Through hole angled pin header, 1x03, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical +Through hole straight pin header, 1x03, 2.54mm pitch, single row +Through hole pin header THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x03, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x03 2.54mm single row style1 pin1 left +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x03_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x03, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x03 2.54mm single row style2 pin1 right +0 +3 +3 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Horizontal +Through hole angled pin header, 1x04, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical +Through hole straight pin header, 1x04, 2.54mm pitch, single row +Through hole pin header THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x04, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x04 2.54mm single row style1 pin1 left +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x04_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x04, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x04 2.54mm single row style2 pin1 right +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Horizontal +Through hole angled pin header, 1x05, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical +Through hole straight pin header, 1x05, 2.54mm pitch, single row +Through hole pin header THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x05, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x05 2.54mm single row style1 pin1 left +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x05_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x05, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x05 2.54mm single row style2 pin1 right +0 +5 +5 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Horizontal +Through hole angled pin header, 1x06, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical +Through hole straight pin header, 1x06, 2.54mm pitch, single row +Through hole pin header THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x06, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x06 2.54mm single row style1 pin1 left +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x06_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x06, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x06 2.54mm single row style2 pin1 right +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Horizontal +Through hole angled pin header, 1x07, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical +Through hole straight pin header, 1x07, 2.54mm pitch, single row +Through hole pin header THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x07 2.54mm single row style1 pin1 left +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x07_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x07, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x07 2.54mm single row style2 pin1 right +0 +7 +7 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Horizontal +Through hole angled pin header, 1x08, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical +Through hole straight pin header, 1x08, 2.54mm pitch, single row +Through hole pin header THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x08, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x08 2.54mm single row style1 pin1 left +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x08_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x08, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x08 2.54mm single row style2 pin1 right +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Horizontal +Through hole angled pin header, 1x09, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical +Through hole straight pin header, 1x09, 2.54mm pitch, single row +Through hole pin header THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x09, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x09 2.54mm single row style1 pin1 left +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x09_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x09, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x09 2.54mm single row style2 pin1 right +0 +9 +9 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Horizontal +Through hole angled pin header, 1x10, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical +Through hole straight pin header, 1x10, 2.54mm pitch, single row +Through hole pin header THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x10, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x10 2.54mm single row style1 pin1 left +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x10_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x10, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x10 2.54mm single row style2 pin1 right +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Horizontal +Through hole angled pin header, 1x11, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical +Through hole straight pin header, 1x11, 2.54mm pitch, single row +Through hole pin header THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x11, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x11 2.54mm single row style1 pin1 left +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x11_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x11, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x11 2.54mm single row style2 pin1 right +0 +11 +11 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Horizontal +Through hole angled pin header, 1x12, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical +Through hole straight pin header, 1x12, 2.54mm pitch, single row +Through hole pin header THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x12, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x12 2.54mm single row style1 pin1 left +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x12_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x12, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x12 2.54mm single row style2 pin1 right +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Horizontal +Through hole angled pin header, 1x13, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical +Through hole straight pin header, 1x13, 2.54mm pitch, single row +Through hole pin header THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x13, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x13 2.54mm single row style1 pin1 left +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x13_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x13, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x13 2.54mm single row style2 pin1 right +0 +13 +13 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Horizontal +Through hole angled pin header, 1x14, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical +Through hole straight pin header, 1x14, 2.54mm pitch, single row +Through hole pin header THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x14, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x14 2.54mm single row style1 pin1 left +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x14_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x14, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x14 2.54mm single row style2 pin1 right +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Horizontal +Through hole angled pin header, 1x15, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical +Through hole straight pin header, 1x15, 2.54mm pitch, single row +Through hole pin header THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x15, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x15 2.54mm single row style1 pin1 left +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x15_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x15, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x15 2.54mm single row style2 pin1 right +0 +15 +15 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Horizontal +Through hole angled pin header, 1x16, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical +Through hole straight pin header, 1x16, 2.54mm pitch, single row +Through hole pin header THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x16, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x16 2.54mm single row style1 pin1 left +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x16_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x16, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x16 2.54mm single row style2 pin1 right +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Horizontal +Through hole angled pin header, 1x17, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical +Through hole straight pin header, 1x17, 2.54mm pitch, single row +Through hole pin header THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x17, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x17 2.54mm single row style1 pin1 left +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x17_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x17, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x17 2.54mm single row style2 pin1 right +0 +17 +17 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Horizontal +Through hole angled pin header, 1x18, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical +Through hole straight pin header, 1x18, 2.54mm pitch, single row +Through hole pin header THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x18, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x18 2.54mm single row style1 pin1 left +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x18_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x18, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x18 2.54mm single row style2 pin1 right +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Horizontal +Through hole angled pin header, 1x19, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical +Through hole straight pin header, 1x19, 2.54mm pitch, single row +Through hole pin header THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x19, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x19 2.54mm single row style1 pin1 left +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x19_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x19, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x19 2.54mm single row style2 pin1 right +0 +19 +19 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Horizontal +Through hole angled pin header, 1x20, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical +Through hole straight pin header, 1x20, 2.54mm pitch, single row +Through hole pin header THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x20, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x20 2.54mm single row style1 pin1 left +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x20_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x20, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x20 2.54mm single row style2 pin1 right +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Horizontal +Through hole angled pin header, 1x21, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical +Through hole straight pin header, 1x21, 2.54mm pitch, single row +Through hole pin header THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x21, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x21 2.54mm single row style1 pin1 left +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x21_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x21, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x21 2.54mm single row style2 pin1 right +0 +21 +21 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Horizontal +Through hole angled pin header, 1x22, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical +Through hole straight pin header, 1x22, 2.54mm pitch, single row +Through hole pin header THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x22, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x22 2.54mm single row style1 pin1 left +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x22_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x22, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x22 2.54mm single row style2 pin1 right +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Horizontal +Through hole angled pin header, 1x23, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical +Through hole straight pin header, 1x23, 2.54mm pitch, single row +Through hole pin header THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x23, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x23 2.54mm single row style1 pin1 left +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x23_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x23, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x23 2.54mm single row style2 pin1 right +0 +23 +23 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Horizontal +Through hole angled pin header, 1x24, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical +Through hole straight pin header, 1x24, 2.54mm pitch, single row +Through hole pin header THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x24, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x24 2.54mm single row style1 pin1 left +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x24_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x24, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x24 2.54mm single row style2 pin1 right +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Horizontal +Through hole angled pin header, 1x25, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical +Through hole straight pin header, 1x25, 2.54mm pitch, single row +Through hole pin header THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x25, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x25 2.54mm single row style1 pin1 left +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x25_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x25, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x25 2.54mm single row style2 pin1 right +0 +25 +25 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Horizontal +Through hole angled pin header, 1x26, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical +Through hole straight pin header, 1x26, 2.54mm pitch, single row +Through hole pin header THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x26, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x26 2.54mm single row style1 pin1 left +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x26_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x26, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x26 2.54mm single row style2 pin1 right +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Horizontal +Through hole angled pin header, 1x27, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical +Through hole straight pin header, 1x27, 2.54mm pitch, single row +Through hole pin header THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x27, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x27 2.54mm single row style1 pin1 left +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x27_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x27, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x27 2.54mm single row style2 pin1 right +0 +27 +27 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Horizontal +Through hole angled pin header, 1x28, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical +Through hole straight pin header, 1x28, 2.54mm pitch, single row +Through hole pin header THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x28, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x28 2.54mm single row style1 pin1 left +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x28_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x28, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x28 2.54mm single row style2 pin1 right +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Horizontal +Through hole angled pin header, 1x29, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical +Through hole straight pin header, 1x29, 2.54mm pitch, single row +Through hole pin header THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x29, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x29 2.54mm single row style1 pin1 left +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x29_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x29, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x29 2.54mm single row style2 pin1 right +0 +29 +29 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Horizontal +Through hole angled pin header, 1x30, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical +Through hole straight pin header, 1x30, 2.54mm pitch, single row +Through hole pin header THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x30, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x30 2.54mm single row style1 pin1 left +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x30_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x30, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x30 2.54mm single row style2 pin1 right +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Horizontal +Through hole angled pin header, 1x31, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical +Through hole straight pin header, 1x31, 2.54mm pitch, single row +Through hole pin header THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x31, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x31 2.54mm single row style1 pin1 left +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x31_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x31, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x31 2.54mm single row style2 pin1 right +0 +31 +31 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Horizontal +Through hole angled pin header, 1x32, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical +Through hole straight pin header, 1x32, 2.54mm pitch, single row +Through hole pin header THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x32, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x32 2.54mm single row style1 pin1 left +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x32_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x32, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x32 2.54mm single row style2 pin1 right +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Horizontal +Through hole angled pin header, 1x33, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical +Through hole straight pin header, 1x33, 2.54mm pitch, single row +Through hole pin header THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x33, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x33 2.54mm single row style1 pin1 left +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x33_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x33, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x33 2.54mm single row style2 pin1 right +0 +33 +33 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Horizontal +Through hole angled pin header, 1x34, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical +Through hole straight pin header, 1x34, 2.54mm pitch, single row +Through hole pin header THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x34, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x34 2.54mm single row style1 pin1 left +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x34_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x34, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x34 2.54mm single row style2 pin1 right +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Horizontal +Through hole angled pin header, 1x35, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical +Through hole straight pin header, 1x35, 2.54mm pitch, single row +Through hole pin header THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x35, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x35 2.54mm single row style1 pin1 left +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x35_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x35, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x35 2.54mm single row style2 pin1 right +0 +35 +35 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Horizontal +Through hole angled pin header, 1x36, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical +Through hole straight pin header, 1x36, 2.54mm pitch, single row +Through hole pin header THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x36, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x36 2.54mm single row style1 pin1 left +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x36_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x36, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x36 2.54mm single row style2 pin1 right +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Horizontal +Through hole angled pin header, 1x37, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical +Through hole straight pin header, 1x37, 2.54mm pitch, single row +Through hole pin header THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x37, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x37 2.54mm single row style1 pin1 left +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x37_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x37, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x37 2.54mm single row style2 pin1 right +0 +37 +37 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Horizontal +Through hole angled pin header, 1x38, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical +Through hole straight pin header, 1x38, 2.54mm pitch, single row +Through hole pin header THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x38, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x38 2.54mm single row style1 pin1 left +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x38_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x38, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x38 2.54mm single row style2 pin1 right +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Horizontal +Through hole angled pin header, 1x39, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical +Through hole straight pin header, 1x39, 2.54mm pitch, single row +Through hole pin header THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x39, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x39 2.54mm single row style1 pin1 left +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x39_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x39, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x39 2.54mm single row style2 pin1 right +0 +39 +39 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Horizontal +Through hole angled pin header, 1x40, 2.54mm pitch, 6mm pin length, single row +Through hole angled pin header THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical +Through hole straight pin header, 1x40, 2.54mm pitch, single row +Through hole pin header THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight pin header, 1x40, 2.54mm pitch, single row, style 1 (pin 1 left) +Surface mounted pin header SMD 1x40 2.54mm single row style1 pin1 left +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_1x40_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight pin header, 1x40, 2.54mm pitch, single row, style 2 (pin 1 right) +Surface mounted pin header SMD 1x40 2.54mm single row style2 pin1 right +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Horizontal +Through hole angled pin header, 2x01, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Vertical +Through hole straight pin header, 2x01, 2.54mm pitch, double rows +Through hole pin header THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x01_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x01, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x01 2.54mm double row +0 +2 +2 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Horizontal +Through hole angled pin header, 2x02, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Vertical +Through hole straight pin header, 2x02, 2.54mm pitch, double rows +Through hole pin header THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x02_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x02, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x02 2.54mm double row +0 +4 +4 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Horizontal +Through hole angled pin header, 2x03, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Vertical +Through hole straight pin header, 2x03, 2.54mm pitch, double rows +Through hole pin header THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x03_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x03, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x03 2.54mm double row +0 +6 +6 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Horizontal +Through hole angled pin header, 2x04, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Vertical +Through hole straight pin header, 2x04, 2.54mm pitch, double rows +Through hole pin header THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x04_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x04, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x04 2.54mm double row +0 +8 +8 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Horizontal +Through hole angled pin header, 2x05, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Vertical +Through hole straight pin header, 2x05, 2.54mm pitch, double rows +Through hole pin header THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x05_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x05, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x05 2.54mm double row +0 +10 +10 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Horizontal +Through hole angled pin header, 2x06, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Vertical +Through hole straight pin header, 2x06, 2.54mm pitch, double rows +Through hole pin header THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x06_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x06, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x06 2.54mm double row +0 +12 +12 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Horizontal +Through hole angled pin header, 2x07, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Vertical +Through hole straight pin header, 2x07, 2.54mm pitch, double rows +Through hole pin header THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x07_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x07, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x07 2.54mm double row +0 +14 +14 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Horizontal +Through hole angled pin header, 2x08, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Vertical +Through hole straight pin header, 2x08, 2.54mm pitch, double rows +Through hole pin header THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x08_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x08, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x08 2.54mm double row +0 +16 +16 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Horizontal +Through hole angled pin header, 2x09, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Vertical +Through hole straight pin header, 2x09, 2.54mm pitch, double rows +Through hole pin header THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x09_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x09, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x09 2.54mm double row +0 +18 +18 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Horizontal +Through hole angled pin header, 2x10, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Vertical +Through hole straight pin header, 2x10, 2.54mm pitch, double rows +Through hole pin header THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x10_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x10, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x10 2.54mm double row +0 +20 +20 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Horizontal +Through hole angled pin header, 2x11, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Vertical +Through hole straight pin header, 2x11, 2.54mm pitch, double rows +Through hole pin header THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x11_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x11, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x11 2.54mm double row +0 +22 +22 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Horizontal +Through hole angled pin header, 2x12, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Vertical +Through hole straight pin header, 2x12, 2.54mm pitch, double rows +Through hole pin header THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x12_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x12, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x12 2.54mm double row +0 +24 +24 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Horizontal +Through hole angled pin header, 2x13, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Vertical +Through hole straight pin header, 2x13, 2.54mm pitch, double rows +Through hole pin header THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x13_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x13, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x13 2.54mm double row +0 +26 +26 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Horizontal +Through hole angled pin header, 2x14, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Vertical +Through hole straight pin header, 2x14, 2.54mm pitch, double rows +Through hole pin header THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x14_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x14, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x14 2.54mm double row +0 +28 +28 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Horizontal +Through hole angled pin header, 2x15, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Vertical +Through hole straight pin header, 2x15, 2.54mm pitch, double rows +Through hole pin header THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x15_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x15, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x15 2.54mm double row +0 +30 +30 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Horizontal +Through hole angled pin header, 2x16, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Vertical +Through hole straight pin header, 2x16, 2.54mm pitch, double rows +Through hole pin header THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x16_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x16, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x16 2.54mm double row +0 +32 +32 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Horizontal +Through hole angled pin header, 2x17, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Vertical +Through hole straight pin header, 2x17, 2.54mm pitch, double rows +Through hole pin header THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x17_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x17, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x17 2.54mm double row +0 +34 +34 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Horizontal +Through hole angled pin header, 2x18, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Vertical +Through hole straight pin header, 2x18, 2.54mm pitch, double rows +Through hole pin header THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x18_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x18, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x18 2.54mm double row +0 +36 +36 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Horizontal +Through hole angled pin header, 2x19, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Vertical +Through hole straight pin header, 2x19, 2.54mm pitch, double rows +Through hole pin header THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x19_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x19, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x19 2.54mm double row +0 +38 +38 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Horizontal +Through hole angled pin header, 2x20, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Vertical +Through hole straight pin header, 2x20, 2.54mm pitch, double rows +Through hole pin header THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x20_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x20, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x20 2.54mm double row +0 +40 +40 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Horizontal +Through hole angled pin header, 2x21, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Vertical +Through hole straight pin header, 2x21, 2.54mm pitch, double rows +Through hole pin header THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x21_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x21, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x21 2.54mm double row +0 +42 +42 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Horizontal +Through hole angled pin header, 2x22, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Vertical +Through hole straight pin header, 2x22, 2.54mm pitch, double rows +Through hole pin header THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x22_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x22, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x22 2.54mm double row +0 +44 +44 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Horizontal +Through hole angled pin header, 2x23, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Vertical +Through hole straight pin header, 2x23, 2.54mm pitch, double rows +Through hole pin header THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x23_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x23, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x23 2.54mm double row +0 +46 +46 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Horizontal +Through hole angled pin header, 2x24, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Vertical +Through hole straight pin header, 2x24, 2.54mm pitch, double rows +Through hole pin header THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x24_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x24, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x24 2.54mm double row +0 +48 +48 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Horizontal +Through hole angled pin header, 2x25, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Vertical +Through hole straight pin header, 2x25, 2.54mm pitch, double rows +Through hole pin header THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x25_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x25, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x25 2.54mm double row +0 +50 +50 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Horizontal +Through hole angled pin header, 2x26, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Vertical +Through hole straight pin header, 2x26, 2.54mm pitch, double rows +Through hole pin header THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x26_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x26, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x26 2.54mm double row +0 +52 +52 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Horizontal +Through hole angled pin header, 2x27, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Vertical +Through hole straight pin header, 2x27, 2.54mm pitch, double rows +Through hole pin header THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x27_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x27, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x27 2.54mm double row +0 +54 +54 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Horizontal +Through hole angled pin header, 2x28, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Vertical +Through hole straight pin header, 2x28, 2.54mm pitch, double rows +Through hole pin header THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x28_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x28, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x28 2.54mm double row +0 +56 +56 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Horizontal +Through hole angled pin header, 2x29, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Vertical +Through hole straight pin header, 2x29, 2.54mm pitch, double rows +Through hole pin header THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x29_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x29, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x29 2.54mm double row +0 +58 +58 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Horizontal +Through hole angled pin header, 2x30, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Vertical +Through hole straight pin header, 2x30, 2.54mm pitch, double rows +Through hole pin header THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x30_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x30, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x30 2.54mm double row +0 +60 +60 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Horizontal +Through hole angled pin header, 2x31, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Vertical +Through hole straight pin header, 2x31, 2.54mm pitch, double rows +Through hole pin header THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x31_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x31, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x31 2.54mm double row +0 +62 +62 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Horizontal +Through hole angled pin header, 2x32, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Vertical +Through hole straight pin header, 2x32, 2.54mm pitch, double rows +Through hole pin header THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x32_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x32, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x32 2.54mm double row +0 +64 +64 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Horizontal +Through hole angled pin header, 2x33, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Vertical +Through hole straight pin header, 2x33, 2.54mm pitch, double rows +Through hole pin header THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x33_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x33, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x33 2.54mm double row +0 +66 +66 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Horizontal +Through hole angled pin header, 2x34, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Vertical +Through hole straight pin header, 2x34, 2.54mm pitch, double rows +Through hole pin header THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x34_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x34, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x34 2.54mm double row +0 +68 +68 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Horizontal +Through hole angled pin header, 2x35, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Vertical +Through hole straight pin header, 2x35, 2.54mm pitch, double rows +Through hole pin header THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x35_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x35, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x35 2.54mm double row +0 +70 +70 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Horizontal +Through hole angled pin header, 2x36, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Vertical +Through hole straight pin header, 2x36, 2.54mm pitch, double rows +Through hole pin header THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x36_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x36, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x36 2.54mm double row +0 +72 +72 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Horizontal +Through hole angled pin header, 2x37, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Vertical +Through hole straight pin header, 2x37, 2.54mm pitch, double rows +Through hole pin header THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x37_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x37, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x37 2.54mm double row +0 +74 +74 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Horizontal +Through hole angled pin header, 2x38, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Vertical +Through hole straight pin header, 2x38, 2.54mm pitch, double rows +Through hole pin header THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x38_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x38, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x38 2.54mm double row +0 +76 +76 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Horizontal +Through hole angled pin header, 2x39, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Vertical +Through hole straight pin header, 2x39, 2.54mm pitch, double rows +Through hole pin header THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x39_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x39, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x39 2.54mm double row +0 +78 +78 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Horizontal +Through hole angled pin header, 2x40, 2.54mm pitch, 6mm pin length, double rows +Through hole angled pin header THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Vertical +Through hole straight pin header, 2x40, 2.54mm pitch, double rows +Through hole pin header THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinHeader_2.54mm +PinHeader_2x40_P2.54mm_Vertical_SMD +surface-mounted straight pin header, 2x40, 2.54mm pitch, double rows +Surface mounted pin header SMD 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical +Through hole straight socket strip, 1x02, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x02 1.00mm single row +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x02 1.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x02_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x02 1.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical +Through hole straight socket strip, 1x03, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x03 1.00mm single row +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x03 1.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x03_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x03 1.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical +Through hole straight socket strip, 1x04, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x04 1.00mm single row +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x04 1.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x04_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x04 1.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical +Through hole straight socket strip, 1x05, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x05 1.00mm single row +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x05 1.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x05_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x05 1.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical +Through hole straight socket strip, 1x06, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x06 1.00mm single row +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x06 1.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x06_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x06 1.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical +Through hole straight socket strip, 1x07, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x07 1.00mm single row +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x07 1.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x07_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x07 1.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical +Through hole straight socket strip, 1x08, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x08 1.00mm single row +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x08 1.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x08_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x08 1.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical +Through hole straight socket strip, 1x09, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x09 1.00mm single row +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x09 1.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x09_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x09 1.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical +Through hole straight socket strip, 1x10, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x10 1.00mm single row +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x10 1.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x10_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x10 1.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical +Through hole straight socket strip, 1x11, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x11 1.00mm single row +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x11 1.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x11_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x11 1.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical +Through hole straight socket strip, 1x12, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x12 1.00mm single row +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x12 1.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x12_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x12 1.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical +Through hole straight socket strip, 1x13, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x13 1.00mm single row +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x13 1.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x13_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x13 1.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical +Through hole straight socket strip, 1x14, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x14 1.00mm single row +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x14 1.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x14_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x14 1.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical +Through hole straight socket strip, 1x15, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x15 1.00mm single row +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x15 1.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x15_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x15 1.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical +Through hole straight socket strip, 1x16, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x16 1.00mm single row +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x16 1.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x16_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x16 1.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical +Through hole straight socket strip, 1x17, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x17 1.00mm single row +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x17 1.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x17_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x17 1.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical +Through hole straight socket strip, 1x18, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x18 1.00mm single row +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x18 1.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x18_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x18 1.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical +Through hole straight socket strip, 1x19, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x19 1.00mm single row +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x19 1.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x19_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x19 1.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical +Through hole straight socket strip, 1x20, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x20 1.00mm single row +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x20 1.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x20_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x20 1.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical +Through hole straight socket strip, 1x21, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x21 1.00mm single row +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x21 1.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x21_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x21 1.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical +Through hole straight socket strip, 1x22, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x22 1.00mm single row +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x22 1.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x22_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x22 1.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical +Through hole straight socket strip, 1x23, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x23 1.00mm single row +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x23 1.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x23_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x23 1.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical +Through hole straight socket strip, 1x24, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x24 1.00mm single row +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x24 1.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x24_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x24 1.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical +Through hole straight socket strip, 1x25, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x25 1.00mm single row +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x25 1.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x25_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x25 1.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical +Through hole straight socket strip, 1x26, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x26 1.00mm single row +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x26 1.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x26_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x26 1.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical +Through hole straight socket strip, 1x27, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x27 1.00mm single row +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x27 1.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x27_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x27 1.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical +Through hole straight socket strip, 1x28, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x28 1.00mm single row +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x28 1.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x28_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x28 1.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical +Through hole straight socket strip, 1x29, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x29 1.00mm single row +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x29 1.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x29_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x29 1.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical +Through hole straight socket strip, 1x30, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x30 1.00mm single row +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x30 1.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x30_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x30 1.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical +Through hole straight socket strip, 1x31, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x31 1.00mm single row +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x31 1.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x31_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x31 1.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical +Through hole straight socket strip, 1x32, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x32 1.00mm single row +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x32 1.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x32_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x32 1.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical +Through hole straight socket strip, 1x33, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x33 1.00mm single row +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x33 1.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x33_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x33 1.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical +Through hole straight socket strip, 1x34, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x34 1.00mm single row +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x34 1.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x34_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x34 1.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical +Through hole straight socket strip, 1x35, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x35 1.00mm single row +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x35 1.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x35_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x35 1.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical +Through hole straight socket strip, 1x36, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x36 1.00mm single row +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x36 1.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x36_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x36 1.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical +Through hole straight socket strip, 1x37, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x37 1.00mm single row +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x37 1.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x37_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x37 1.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical +Through hole straight socket strip, 1x38, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x38 1.00mm single row +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x38 1.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x38_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x38 1.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical +Through hole straight socket strip, 1x39, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x39 1.00mm single row +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x39 1.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x39_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x39 1.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical +Through hole straight socket strip, 1x40, 1.00mm pitch, single row (https://gct.co/files/drawings/bc065.pdf), script generated +Through hole socket strip THT 1x40 1.00mm single row +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 1.00mm pitch, single row, style 1 (pin 1 left) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x40 1.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_1x40_P1.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 1.00mm pitch, single row, style 2 (pin 1 right) (https://gct.co/files/drawings/bc070.pdf), script generated +Surface mounted socket strip SMD 1x40 1.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_2x02_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x02 1.00mm double row +0 +4 +4 +Connector_PinSocket_1.00mm +PinSocket_2x03_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x03 1.00mm double row +0 +6 +6 +Connector_PinSocket_1.00mm +PinSocket_2x04_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x04 1.00mm double row +0 +8 +8 +Connector_PinSocket_1.00mm +PinSocket_2x05_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x05 1.00mm double row +0 +10 +10 +Connector_PinSocket_1.00mm +PinSocket_2x06_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x06 1.00mm double row +0 +12 +12 +Connector_PinSocket_1.00mm +PinSocket_2x07_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x07 1.00mm double row +0 +14 +14 +Connector_PinSocket_1.00mm +PinSocket_2x08_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x08 1.00mm double row +0 +16 +16 +Connector_PinSocket_1.00mm +PinSocket_2x09_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x09 1.00mm double row +0 +18 +18 +Connector_PinSocket_1.00mm +PinSocket_2x10_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x10 1.00mm double row +0 +20 +20 +Connector_PinSocket_1.00mm +PinSocket_2x11_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x11 1.00mm double row +0 +22 +22 +Connector_PinSocket_1.00mm +PinSocket_2x12_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x12 1.00mm double row +0 +24 +24 +Connector_PinSocket_1.00mm +PinSocket_2x13_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x13 1.00mm double row +0 +26 +26 +Connector_PinSocket_1.00mm +PinSocket_2x14_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x14 1.00mm double row +0 +28 +28 +Connector_PinSocket_1.00mm +PinSocket_2x15_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x15 1.00mm double row +0 +30 +30 +Connector_PinSocket_1.00mm +PinSocket_2x16_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x16 1.00mm double row +0 +32 +32 +Connector_PinSocket_1.00mm +PinSocket_2x17_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x17 1.00mm double row +0 +34 +34 +Connector_PinSocket_1.00mm +PinSocket_2x18_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x18 1.00mm double row +0 +36 +36 +Connector_PinSocket_1.00mm +PinSocket_2x19_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x19 1.00mm double row +0 +38 +38 +Connector_PinSocket_1.00mm +PinSocket_2x20_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x20 1.00mm double row +0 +40 +40 +Connector_PinSocket_1.00mm +PinSocket_2x21_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x21 1.00mm double row +0 +42 +42 +Connector_PinSocket_1.00mm +PinSocket_2x22_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x22 1.00mm double row +0 +44 +44 +Connector_PinSocket_1.00mm +PinSocket_2x23_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x23 1.00mm double row +0 +46 +46 +Connector_PinSocket_1.00mm +PinSocket_2x24_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x24 1.00mm double row +0 +48 +48 +Connector_PinSocket_1.00mm +PinSocket_2x25_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x25 1.00mm double row +0 +50 +50 +Connector_PinSocket_1.00mm +PinSocket_2x26_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x26 1.00mm double row +0 +52 +52 +Connector_PinSocket_1.00mm +PinSocket_2x27_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x27 1.00mm double row +0 +54 +54 +Connector_PinSocket_1.00mm +PinSocket_2x28_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x28 1.00mm double row +0 +56 +56 +Connector_PinSocket_1.00mm +PinSocket_2x29_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x29 1.00mm double row +0 +58 +58 +Connector_PinSocket_1.00mm +PinSocket_2x30_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x30 1.00mm double row +0 +60 +60 +Connector_PinSocket_1.00mm +PinSocket_2x31_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x31 1.00mm double row +0 +62 +62 +Connector_PinSocket_1.00mm +PinSocket_2x32_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x32 1.00mm double row +0 +64 +64 +Connector_PinSocket_1.00mm +PinSocket_2x33_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x33 1.00mm double row +0 +66 +66 +Connector_PinSocket_1.00mm +PinSocket_2x34_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x34 1.00mm double row +0 +68 +68 +Connector_PinSocket_1.00mm +PinSocket_2x35_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x35 1.00mm double row +0 +70 +70 +Connector_PinSocket_1.00mm +PinSocket_2x36_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x36 1.00mm double row +0 +72 +72 +Connector_PinSocket_1.00mm +PinSocket_2x37_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x37 1.00mm double row +0 +74 +74 +Connector_PinSocket_1.00mm +PinSocket_2x38_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x38 1.00mm double row +0 +76 +76 +Connector_PinSocket_1.00mm +PinSocket_2x39_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x39 1.00mm double row +0 +78 +78 +Connector_PinSocket_1.00mm +PinSocket_2x40_P1.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 1.00mm pitch, double cols (https://gct.co/files/drawings/bc085.pdf), script generated +Surface mounted socket strip SMD 2x40 1.00mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_1x01_P1.27mm_Vertical +Through hole straight socket strip, 1x01, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 1.27mm single row +0 +1 +1 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical +Through hole straight socket strip, 1x02, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 1.27mm single row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x02 1.27mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x02_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x02 1.27mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical +Through hole straight socket strip, 1x03, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 1.27mm single row +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x03 1.27mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x03_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x03 1.27mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical +Through hole straight socket strip, 1x04, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 1.27mm single row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x04 1.27mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x04_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x04 1.27mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical +Through hole straight socket strip, 1x05, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 1.27mm single row +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x05 1.27mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x05_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x05 1.27mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical +Through hole straight socket strip, 1x06, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 1.27mm single row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x06 1.27mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x06_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x06 1.27mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical +Through hole straight socket strip, 1x07, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 1.27mm single row +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x07 1.27mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x07_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x07 1.27mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical +Through hole straight socket strip, 1x08, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 1.27mm single row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x08 1.27mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x08_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x08 1.27mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical +Through hole straight socket strip, 1x09, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 1.27mm single row +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x09 1.27mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x09_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x09 1.27mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical +Through hole straight socket strip, 1x10, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 1.27mm single row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x10 1.27mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x10_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x10 1.27mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical +Through hole straight socket strip, 1x11, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 1.27mm single row +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x11 1.27mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x11_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x11 1.27mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical +Through hole straight socket strip, 1x12, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 1.27mm single row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x12 1.27mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x12_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x12 1.27mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical +Through hole straight socket strip, 1x13, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 1.27mm single row +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x13 1.27mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x13_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x13 1.27mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical +Through hole straight socket strip, 1x14, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 1.27mm single row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x14 1.27mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x14_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x14 1.27mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical +Through hole straight socket strip, 1x15, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 1.27mm single row +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x15 1.27mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x15_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x15 1.27mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical +Through hole straight socket strip, 1x16, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 1.27mm single row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x16 1.27mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x16_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x16 1.27mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical +Through hole straight socket strip, 1x17, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 1.27mm single row +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x17 1.27mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x17_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x17 1.27mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical +Through hole straight socket strip, 1x18, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 1.27mm single row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x18 1.27mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x18_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x18 1.27mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical +Through hole straight socket strip, 1x19, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 1.27mm single row +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x19 1.27mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x19_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x19 1.27mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical +Through hole straight socket strip, 1x20, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 1.27mm single row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x20 1.27mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x20_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x20 1.27mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical +Through hole straight socket strip, 1x21, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 1.27mm single row +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x21 1.27mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x21_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x21 1.27mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical +Through hole straight socket strip, 1x22, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 1.27mm single row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x22 1.27mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x22_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x22 1.27mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical +Through hole straight socket strip, 1x23, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 1.27mm single row +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x23 1.27mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x23_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x23 1.27mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical +Through hole straight socket strip, 1x24, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 1.27mm single row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x24 1.27mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x24_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x24 1.27mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical +Through hole straight socket strip, 1x25, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 1.27mm single row +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x25 1.27mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x25_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x25 1.27mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical +Through hole straight socket strip, 1x26, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 1.27mm single row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x26 1.27mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x26_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x26 1.27mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical +Through hole straight socket strip, 1x27, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 1.27mm single row +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x27 1.27mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x27_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x27 1.27mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical +Through hole straight socket strip, 1x28, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 1.27mm single row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x28 1.27mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x28_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x28 1.27mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical +Through hole straight socket strip, 1x29, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 1.27mm single row +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x29 1.27mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x29_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x29 1.27mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical +Through hole straight socket strip, 1x30, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 1.27mm single row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x30 1.27mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x30_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x30 1.27mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical +Through hole straight socket strip, 1x31, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 1.27mm single row +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x31 1.27mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x31_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x31 1.27mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical +Through hole straight socket strip, 1x32, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 1.27mm single row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x32 1.27mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x32_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x32 1.27mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical +Through hole straight socket strip, 1x33, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 1.27mm single row +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x33 1.27mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x33_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x33 1.27mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical +Through hole straight socket strip, 1x34, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 1.27mm single row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x34 1.27mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x34_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x34 1.27mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical +Through hole straight socket strip, 1x35, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 1.27mm single row +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x35 1.27mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x35_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x35 1.27mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical +Through hole straight socket strip, 1x36, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 1.27mm single row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x36 1.27mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x36_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x36 1.27mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical +Through hole straight socket strip, 1x37, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 1.27mm single row +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x37 1.27mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x37_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x37 1.27mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical +Through hole straight socket strip, 1x38, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 1.27mm single row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x38 1.27mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x38_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x38 1.27mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical +Through hole straight socket strip, 1x39, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 1.27mm single row +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x39 1.27mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x39_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x39 1.27mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical +Through hole straight socket strip, 1x40, 1.27mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 1.27mm single row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 1.27mm pitch, single row, style 1 (pin 1 left) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x40 1.27mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_1x40_P1.27mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 1.27mm pitch, single row, style 2 (pin 1 right) (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD075.pdf&t=1511594726925), script generated +Surface mounted socket strip SMD 1x40 1.27mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x01_P1.27mm_Vertical +Through hole straight socket strip, 2x01, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 1.27mm double row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_2x01_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x01 1.27mm double row +0 +2 +2 +Connector_PinSocket_1.27mm +PinSocket_2x02_P1.27mm_Vertical +Through hole straight socket strip, 2x02, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 1.27mm double row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_2x02_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x02 1.27mm double row +0 +4 +4 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Horizontal +Through hole angled socket strip, 2x03, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Vertical +Through hole straight socket strip, 2x03, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x03_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x03 1.27mm double row +0 +6 +6 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Horizontal +Through hole angled socket strip, 2x04, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Vertical +Through hole straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x04_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x04 1.27mm double row +0 +8 +8 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Horizontal +Through hole angled socket strip, 2x05, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Vertical +Through hole straight socket strip, 2x05, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x05_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x05 1.27mm double row +0 +10 +10 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Horizontal +Through hole angled socket strip, 2x06, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Vertical +Through hole straight socket strip, 2x06, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x06_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x06 1.27mm double row +0 +12 +12 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Horizontal +Through hole angled socket strip, 2x07, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Vertical +Through hole straight socket strip, 2x07, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x07_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x07 1.27mm double row +0 +14 +14 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Horizontal +Through hole angled socket strip, 2x08, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Vertical +Through hole straight socket strip, 2x08, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x08_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x08 1.27mm double row +0 +16 +16 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Horizontal +Through hole angled socket strip, 2x09, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Vertical +Through hole straight socket strip, 2x09, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x09_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x09 1.27mm double row +0 +18 +18 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Horizontal +Through hole angled socket strip, 2x10, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Vertical +Through hole straight socket strip, 2x10, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x10_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x10 1.27mm double row +0 +20 +20 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Horizontal +Through hole angled socket strip, 2x11, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Vertical +Through hole straight socket strip, 2x11, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x11_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x11 1.27mm double row +0 +22 +22 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Horizontal +Through hole angled socket strip, 2x12, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Vertical +Through hole straight socket strip, 2x12, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x12_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x12 1.27mm double row +0 +24 +24 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Horizontal +Through hole angled socket strip, 2x13, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Vertical +Through hole straight socket strip, 2x13, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x13_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x13 1.27mm double row +0 +26 +26 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Horizontal +Through hole angled socket strip, 2x14, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Vertical +Through hole straight socket strip, 2x14, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x14_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x14 1.27mm double row +0 +28 +28 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Horizontal +Through hole angled socket strip, 2x15, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Vertical +Through hole straight socket strip, 2x15, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x15_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x15 1.27mm double row +0 +30 +30 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Horizontal +Through hole angled socket strip, 2x16, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Vertical +Through hole straight socket strip, 2x16, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x16_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x16 1.27mm double row +0 +32 +32 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Horizontal +Through hole angled socket strip, 2x17, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Vertical +Through hole straight socket strip, 2x17, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x17_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x17 1.27mm double row +0 +34 +34 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Horizontal +Through hole angled socket strip, 2x18, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Vertical +Through hole straight socket strip, 2x18, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x18_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x18 1.27mm double row +0 +36 +36 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Horizontal +Through hole angled socket strip, 2x19, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Vertical +Through hole straight socket strip, 2x19, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x19_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x19 1.27mm double row +0 +38 +38 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Horizontal +Through hole angled socket strip, 2x20, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Vertical +Through hole straight socket strip, 2x20, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x20_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x20 1.27mm double row +0 +40 +40 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Horizontal +Through hole angled socket strip, 2x21, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Vertical +Through hole straight socket strip, 2x21, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x21_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x21 1.27mm double row +0 +42 +42 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Horizontal +Through hole angled socket strip, 2x22, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Vertical +Through hole straight socket strip, 2x22, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x22_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x22 1.27mm double row +0 +44 +44 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Horizontal +Through hole angled socket strip, 2x23, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Vertical +Through hole straight socket strip, 2x23, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x23_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x23 1.27mm double row +0 +46 +46 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Horizontal +Through hole angled socket strip, 2x24, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Vertical +Through hole straight socket strip, 2x24, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x24_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x24 1.27mm double row +0 +48 +48 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Horizontal +Through hole angled socket strip, 2x25, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Vertical +Through hole straight socket strip, 2x25, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x25_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x25 1.27mm double row +0 +50 +50 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Horizontal +Through hole angled socket strip, 2x26, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Vertical +Through hole straight socket strip, 2x26, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x26_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x26 1.27mm double row +0 +52 +52 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Horizontal +Through hole angled socket strip, 2x27, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Vertical +Through hole straight socket strip, 2x27, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x27_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x27 1.27mm double row +0 +54 +54 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Horizontal +Through hole angled socket strip, 2x28, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Vertical +Through hole straight socket strip, 2x28, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x28_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x28 1.27mm double row +0 +56 +56 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Horizontal +Through hole angled socket strip, 2x29, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Vertical +Through hole straight socket strip, 2x29, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x29_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x29 1.27mm double row +0 +58 +58 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Horizontal +Through hole angled socket strip, 2x30, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Vertical +Through hole straight socket strip, 2x30, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x30_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x30 1.27mm double row +0 +60 +60 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Horizontal +Through hole angled socket strip, 2x31, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Vertical +Through hole straight socket strip, 2x31, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x31_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x31 1.27mm double row +0 +62 +62 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Horizontal +Through hole angled socket strip, 2x32, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Vertical +Through hole straight socket strip, 2x32, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x32_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x32 1.27mm double row +0 +64 +64 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Horizontal +Through hole angled socket strip, 2x33, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Vertical +Through hole straight socket strip, 2x33, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x33_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x33 1.27mm double row +0 +66 +66 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Horizontal +Through hole angled socket strip, 2x34, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Vertical +Through hole straight socket strip, 2x34, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x34_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x34 1.27mm double row +0 +68 +68 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Horizontal +Through hole angled socket strip, 2x35, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Vertical +Through hole straight socket strip, 2x35, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x35_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x35 1.27mm double row +0 +70 +70 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Horizontal +Through hole angled socket strip, 2x36, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Vertical +Through hole straight socket strip, 2x36, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x36_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x36 1.27mm double row +0 +72 +72 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Horizontal +Through hole angled socket strip, 2x37, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Vertical +Through hole straight socket strip, 2x37, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x37_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x37 1.27mm double row +0 +74 +74 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Horizontal +Through hole angled socket strip, 2x38, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Vertical +Through hole straight socket strip, 2x38, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x38_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x38 1.27mm double row +0 +76 +76 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Horizontal +Through hole angled socket strip, 2x39, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Vertical +Through hole straight socket strip, 2x39, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x39_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x39 1.27mm double row +0 +78 +78 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Horizontal +Through hole angled socket strip, 2x40, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Vertical +Through hole straight socket strip, 2x40, 1.27mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x40_P1.27mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 1.27mm pitch, double cols (from Kicad 4.0.7!), script generated +Surface mounted socket strip SMD 2x40 1.27mm double row +0 +80 +80 +Connector_PinSocket_1.27mm +PinSocket_2x41_P1.27mm_Horizontal +Through hole angled socket strip, 2x41, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x41 1.27mm double row +0 +82 +82 +Connector_PinSocket_1.27mm +PinSocket_2x42_P1.27mm_Horizontal +Through hole angled socket strip, 2x42, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x42 1.27mm double row +0 +84 +84 +Connector_PinSocket_1.27mm +PinSocket_2x43_P1.27mm_Horizontal +Through hole angled socket strip, 2x43, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x43 1.27mm double row +0 +86 +86 +Connector_PinSocket_1.27mm +PinSocket_2x44_P1.27mm_Horizontal +Through hole angled socket strip, 2x44, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x44 1.27mm double row +0 +88 +88 +Connector_PinSocket_1.27mm +PinSocket_2x45_P1.27mm_Horizontal +Through hole angled socket strip, 2x45, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x45 1.27mm double row +0 +90 +90 +Connector_PinSocket_1.27mm +PinSocket_2x46_P1.27mm_Horizontal +Through hole angled socket strip, 2x46, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x46 1.27mm double row +0 +92 +92 +Connector_PinSocket_1.27mm +PinSocket_2x47_P1.27mm_Horizontal +Through hole angled socket strip, 2x47, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x47 1.27mm double row +0 +94 +94 +Connector_PinSocket_1.27mm +PinSocket_2x48_P1.27mm_Horizontal +Through hole angled socket strip, 2x48, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x48 1.27mm double row +0 +96 +96 +Connector_PinSocket_1.27mm +PinSocket_2x49_P1.27mm_Horizontal +Through hole angled socket strip, 2x49, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x49 1.27mm double row +0 +98 +98 +Connector_PinSocket_1.27mm +PinSocket_2x50_P1.27mm_Horizontal +Through hole angled socket strip, 2x50, 1.27mm pitch, 4.4mm socket length, double cols (https://gct.co/pdfjs/web/viewer.html?file=/Files/Drawings/BD091.pdf&t=1511594177220), script generated +Through hole angled socket strip THT 2x50 1.27mm double row +0 +100 +100 +Connector_PinSocket_2.00mm +PinSocket_1x01_P2.00mm_Horizontal +Through hole angled socket strip, 1x01, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinSocket_2.00mm +PinSocket_1x01_P2.00mm_Vertical +Through hole straight socket strip, 1x01, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 2.00mm single row +0 +1 +1 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Horizontal +Through hole angled socket strip, 1x02, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical +Through hole straight socket strip, 1x02, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 2.00mm single row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x02 2.00mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x02_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x02 2.00mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Horizontal +Through hole angled socket strip, 1x03, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical +Through hole straight socket strip, 1x03, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 2.00mm single row +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x03 2.00mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x03_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x03 2.00mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Horizontal +Through hole angled socket strip, 1x04, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical +Through hole straight socket strip, 1x04, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 2.00mm single row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x04 2.00mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x04_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x04 2.00mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Horizontal +Through hole angled socket strip, 1x05, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical +Through hole straight socket strip, 1x05, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 2.00mm single row +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x05 2.00mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x05_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x05 2.00mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Horizontal +Through hole angled socket strip, 1x06, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical +Through hole straight socket strip, 1x06, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 2.00mm single row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x06 2.00mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x06_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x06 2.00mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Horizontal +Through hole angled socket strip, 1x07, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical +Through hole straight socket strip, 1x07, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 2.00mm single row +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x07 2.00mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x07_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x07 2.00mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Horizontal +Through hole angled socket strip, 1x08, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical +Through hole straight socket strip, 1x08, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 2.00mm single row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x08 2.00mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x08_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x08 2.00mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Horizontal +Through hole angled socket strip, 1x09, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical +Through hole straight socket strip, 1x09, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 2.00mm single row +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x09 2.00mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x09_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x09 2.00mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Horizontal +Through hole angled socket strip, 1x10, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical +Through hole straight socket strip, 1x10, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 2.00mm single row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x10 2.00mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x10_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x10 2.00mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Horizontal +Through hole angled socket strip, 1x11, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical +Through hole straight socket strip, 1x11, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 2.00mm single row +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x11 2.00mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x11_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x11 2.00mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Horizontal +Through hole angled socket strip, 1x12, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical +Through hole straight socket strip, 1x12, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 2.00mm single row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x12 2.00mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x12_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x12 2.00mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Horizontal +Through hole angled socket strip, 1x13, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical +Through hole straight socket strip, 1x13, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 2.00mm single row +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x13 2.00mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x13_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x13 2.00mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Horizontal +Through hole angled socket strip, 1x14, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical +Through hole straight socket strip, 1x14, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 2.00mm single row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x14 2.00mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x14_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x14 2.00mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Horizontal +Through hole angled socket strip, 1x15, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical +Through hole straight socket strip, 1x15, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 2.00mm single row +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x15 2.00mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x15_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x15 2.00mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Horizontal +Through hole angled socket strip, 1x16, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical +Through hole straight socket strip, 1x16, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 2.00mm single row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x16 2.00mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x16_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x16 2.00mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Horizontal +Through hole angled socket strip, 1x17, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical +Through hole straight socket strip, 1x17, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 2.00mm single row +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x17 2.00mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x17_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x17 2.00mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Horizontal +Through hole angled socket strip, 1x18, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical +Through hole straight socket strip, 1x18, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 2.00mm single row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x18 2.00mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x18_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x18 2.00mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Horizontal +Through hole angled socket strip, 1x19, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical +Through hole straight socket strip, 1x19, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 2.00mm single row +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x19 2.00mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x19_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x19 2.00mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Horizontal +Through hole angled socket strip, 1x20, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical +Through hole straight socket strip, 1x20, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 2.00mm single row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x20 2.00mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x20_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x20 2.00mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Horizontal +Through hole angled socket strip, 1x21, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical +Through hole straight socket strip, 1x21, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 2.00mm single row +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x21 2.00mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x21_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x21 2.00mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Horizontal +Through hole angled socket strip, 1x22, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical +Through hole straight socket strip, 1x22, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 2.00mm single row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x22 2.00mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x22_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x22 2.00mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Horizontal +Through hole angled socket strip, 1x23, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical +Through hole straight socket strip, 1x23, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 2.00mm single row +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x23 2.00mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x23_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x23 2.00mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Horizontal +Through hole angled socket strip, 1x24, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical +Through hole straight socket strip, 1x24, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 2.00mm single row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x24 2.00mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x24_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x24 2.00mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Horizontal +Through hole angled socket strip, 1x25, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical +Through hole straight socket strip, 1x25, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 2.00mm single row +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x25 2.00mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x25_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x25 2.00mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Horizontal +Through hole angled socket strip, 1x26, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical +Through hole straight socket strip, 1x26, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 2.00mm single row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x26 2.00mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x26_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x26 2.00mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Horizontal +Through hole angled socket strip, 1x27, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical +Through hole straight socket strip, 1x27, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 2.00mm single row +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x27 2.00mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x27_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x27 2.00mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Horizontal +Through hole angled socket strip, 1x28, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical +Through hole straight socket strip, 1x28, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 2.00mm single row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x28 2.00mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x28_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x28 2.00mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Horizontal +Through hole angled socket strip, 1x29, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical +Through hole straight socket strip, 1x29, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 2.00mm single row +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x29 2.00mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x29_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x29 2.00mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Horizontal +Through hole angled socket strip, 1x30, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical +Through hole straight socket strip, 1x30, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 2.00mm single row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x30 2.00mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x30_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x30 2.00mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Horizontal +Through hole angled socket strip, 1x31, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical +Through hole straight socket strip, 1x31, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 2.00mm single row +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x31 2.00mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x31_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x31 2.00mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Horizontal +Through hole angled socket strip, 1x32, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical +Through hole straight socket strip, 1x32, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 2.00mm single row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x32 2.00mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x32_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x32 2.00mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Horizontal +Through hole angled socket strip, 1x33, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical +Through hole straight socket strip, 1x33, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 2.00mm single row +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x33 2.00mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x33_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x33 2.00mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Horizontal +Through hole angled socket strip, 1x34, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical +Through hole straight socket strip, 1x34, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 2.00mm single row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x34 2.00mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x34_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x34 2.00mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Horizontal +Through hole angled socket strip, 1x35, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical +Through hole straight socket strip, 1x35, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 2.00mm single row +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x35 2.00mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x35_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x35 2.00mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Horizontal +Through hole angled socket strip, 1x36, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical +Through hole straight socket strip, 1x36, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 2.00mm single row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x36 2.00mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x36_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x36 2.00mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Horizontal +Through hole angled socket strip, 1x37, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical +Through hole straight socket strip, 1x37, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 2.00mm single row +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x37 2.00mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x37_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x37 2.00mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Horizontal +Through hole angled socket strip, 1x38, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical +Through hole straight socket strip, 1x38, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 2.00mm single row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x38 2.00mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x38_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x38 2.00mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Horizontal +Through hole angled socket strip, 1x39, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical +Through hole straight socket strip, 1x39, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 2.00mm single row +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x39 2.00mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x39_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x39 2.00mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Horizontal +Through hole angled socket strip, 1x40, 2.00mm pitch, 6.35mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical +Through hole straight socket strip, 1x40, 2.00mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 2.00mm single row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 2.00mm pitch, single row, style 1 (pin 1 left) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x40 2.00mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_1x40_P2.00mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 2.00mm pitch, single row, style 2 (pin 1 right) (https://www.jayconsystems.com/fileuploader/download/download/?d=1&file=custom%2Fupload%2FFile-1375728122.pdf), script generated +Surface mounted socket strip SMD 1x40 2.00mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Horizontal +Through hole angled socket strip, 2x01, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Vertical +Through hole straight socket strip, 2x01, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x01_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x01 2.00mm double row +0 +2 +2 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Horizontal +Through hole angled socket strip, 2x02, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Vertical +Through hole straight socket strip, 2x02, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x02_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x02 2.00mm double row +0 +4 +4 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Horizontal +Through hole angled socket strip, 2x03, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Vertical +Through hole straight socket strip, 2x03, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x03_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x03 2.00mm double row +0 +6 +6 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Horizontal +Through hole angled socket strip, 2x04, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Vertical +Through hole straight socket strip, 2x04, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x04_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x04 2.00mm double row +0 +8 +8 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Horizontal +Through hole angled socket strip, 2x05, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Vertical +Through hole straight socket strip, 2x05, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x05_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x05 2.00mm double row +0 +10 +10 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Horizontal +Through hole angled socket strip, 2x06, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Vertical +Through hole straight socket strip, 2x06, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x06_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x06 2.00mm double row +0 +12 +12 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Horizontal +Through hole angled socket strip, 2x07, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Vertical +Through hole straight socket strip, 2x07, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x07_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x07 2.00mm double row +0 +14 +14 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Horizontal +Through hole angled socket strip, 2x08, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Vertical +Through hole straight socket strip, 2x08, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x08_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x08 2.00mm double row +0 +16 +16 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Horizontal +Through hole angled socket strip, 2x09, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Vertical +Through hole straight socket strip, 2x09, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x09_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x09 2.00mm double row +0 +18 +18 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Horizontal +Through hole angled socket strip, 2x10, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Vertical +Through hole straight socket strip, 2x10, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x10_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x10 2.00mm double row +0 +20 +20 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Horizontal +Through hole angled socket strip, 2x11, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Vertical +Through hole straight socket strip, 2x11, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x11_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x11 2.00mm double row +0 +22 +22 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Horizontal +Through hole angled socket strip, 2x12, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Vertical +Through hole straight socket strip, 2x12, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x12_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x12 2.00mm double row +0 +24 +24 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Horizontal +Through hole angled socket strip, 2x13, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Vertical +Through hole straight socket strip, 2x13, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x13_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x13 2.00mm double row +0 +26 +26 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Horizontal +Through hole angled socket strip, 2x14, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Vertical +Through hole straight socket strip, 2x14, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x14_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x14 2.00mm double row +0 +28 +28 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Horizontal +Through hole angled socket strip, 2x15, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Vertical +Through hole straight socket strip, 2x15, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x15_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x15 2.00mm double row +0 +30 +30 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Horizontal +Through hole angled socket strip, 2x16, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Vertical +Through hole straight socket strip, 2x16, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x16_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x16 2.00mm double row +0 +32 +32 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Horizontal +Through hole angled socket strip, 2x17, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Vertical +Through hole straight socket strip, 2x17, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x17_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x17 2.00mm double row +0 +34 +34 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Horizontal +Through hole angled socket strip, 2x18, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Vertical +Through hole straight socket strip, 2x18, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x18_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x18 2.00mm double row +0 +36 +36 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Horizontal +Through hole angled socket strip, 2x19, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Vertical +Through hole straight socket strip, 2x19, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x19_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x19 2.00mm double row +0 +38 +38 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Horizontal +Through hole angled socket strip, 2x20, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Vertical +Through hole straight socket strip, 2x20, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x20_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x20 2.00mm double row +0 +40 +40 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Horizontal +Through hole angled socket strip, 2x21, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Vertical +Through hole straight socket strip, 2x21, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x21_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x21 2.00mm double row +0 +42 +42 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Horizontal +Through hole angled socket strip, 2x22, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Vertical +Through hole straight socket strip, 2x22, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x22_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x22 2.00mm double row +0 +44 +44 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Horizontal +Through hole angled socket strip, 2x23, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Vertical +Through hole straight socket strip, 2x23, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x23_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x23 2.00mm double row +0 +46 +46 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Horizontal +Through hole angled socket strip, 2x24, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Vertical +Through hole straight socket strip, 2x24, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x24_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x24 2.00mm double row +0 +48 +48 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Horizontal +Through hole angled socket strip, 2x25, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Vertical +Through hole straight socket strip, 2x25, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x25_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x25 2.00mm double row +0 +50 +50 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Horizontal +Through hole angled socket strip, 2x26, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Vertical +Through hole straight socket strip, 2x26, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x26_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x26 2.00mm double row +0 +52 +52 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Horizontal +Through hole angled socket strip, 2x27, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Vertical +Through hole straight socket strip, 2x27, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x27_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x27 2.00mm double row +0 +54 +54 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Horizontal +Through hole angled socket strip, 2x28, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Vertical +Through hole straight socket strip, 2x28, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x28_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x28 2.00mm double row +0 +56 +56 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Horizontal +Through hole angled socket strip, 2x29, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Vertical +Through hole straight socket strip, 2x29, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x29_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x29 2.00mm double row +0 +58 +58 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Horizontal +Through hole angled socket strip, 2x30, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Vertical +Through hole straight socket strip, 2x30, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x30_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x30 2.00mm double row +0 +60 +60 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Horizontal +Through hole angled socket strip, 2x31, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Vertical +Through hole straight socket strip, 2x31, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x31_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x31 2.00mm double row +0 +62 +62 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Horizontal +Through hole angled socket strip, 2x32, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Vertical +Through hole straight socket strip, 2x32, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x32_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x32 2.00mm double row +0 +64 +64 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Horizontal +Through hole angled socket strip, 2x33, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Vertical +Through hole straight socket strip, 2x33, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x33_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x33 2.00mm double row +0 +66 +66 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Horizontal +Through hole angled socket strip, 2x34, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Vertical +Through hole straight socket strip, 2x34, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x34_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x34 2.00mm double row +0 +68 +68 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Horizontal +Through hole angled socket strip, 2x35, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Vertical +Through hole straight socket strip, 2x35, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x35_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x35 2.00mm double row +0 +70 +70 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Horizontal +Through hole angled socket strip, 2x36, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Vertical +Through hole straight socket strip, 2x36, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x36_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x36 2.00mm double row +0 +72 +72 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Horizontal +Through hole angled socket strip, 2x37, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Vertical +Through hole straight socket strip, 2x37, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x37_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x37 2.00mm double row +0 +74 +74 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Horizontal +Through hole angled socket strip, 2x38, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Vertical +Through hole straight socket strip, 2x38, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x38_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x38 2.00mm double row +0 +76 +76 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Horizontal +Through hole angled socket strip, 2x39, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Vertical +Through hole straight socket strip, 2x39, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x39_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x39 2.00mm double row +0 +78 +78 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Horizontal +Through hole angled socket strip, 2x40, 2.00mm pitch, 6.35mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Vertical +Through hole straight socket strip, 2x40, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.00mm +PinSocket_2x40_P2.00mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 2.00mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x40 2.00mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_1x01_P2.54mm_Horizontal +Through hole angled socket strip, 1x01, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinSocket_2.54mm +PinSocket_1x01_P2.54mm_Vertical +Through hole straight socket strip, 1x01, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x01 2.54mm single row +0 +1 +1 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Horizontal +Through hole angled socket strip, 1x02, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical +Through hole straight socket strip, 1x02, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x02 2.54mm single row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x02, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x02 2.54mm single row style1 pin1 left +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x02_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x02, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x02 2.54mm single row style2 pin1 right +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Horizontal +Through hole angled socket strip, 1x03, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical +Through hole straight socket strip, 1x03, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x03 2.54mm single row +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x03, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x03 2.54mm single row style1 pin1 left +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x03_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x03, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x03 2.54mm single row style2 pin1 right +0 +3 +3 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Horizontal +Through hole angled socket strip, 1x04, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical +Through hole straight socket strip, 1x04, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x04 2.54mm single row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x04, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x04 2.54mm single row style1 pin1 left +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x04_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x04, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x04 2.54mm single row style2 pin1 right +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Horizontal +Through hole angled socket strip, 1x05, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical +Through hole straight socket strip, 1x05, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x05 2.54mm single row +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x05, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x05 2.54mm single row style1 pin1 left +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x05_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x05, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x05 2.54mm single row style2 pin1 right +0 +5 +5 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Horizontal +Through hole angled socket strip, 1x06, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical +Through hole straight socket strip, 1x06, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x06 2.54mm single row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x06, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x06 2.54mm single row style1 pin1 left +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x06_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x06, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x06 2.54mm single row style2 pin1 right +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Horizontal +Through hole angled socket strip, 1x07, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical +Through hole straight socket strip, 1x07, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x07 2.54mm single row +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x07, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x07 2.54mm single row style1 pin1 left +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x07_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x07, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x07 2.54mm single row style2 pin1 right +0 +7 +7 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Horizontal +Through hole angled socket strip, 1x08, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical +Through hole straight socket strip, 1x08, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x08 2.54mm single row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x08, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x08 2.54mm single row style1 pin1 left +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x08_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x08, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x08 2.54mm single row style2 pin1 right +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Horizontal +Through hole angled socket strip, 1x09, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical +Through hole straight socket strip, 1x09, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x09 2.54mm single row +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x09, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x09 2.54mm single row style1 pin1 left +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x09_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x09, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x09 2.54mm single row style2 pin1 right +0 +9 +9 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Horizontal +Through hole angled socket strip, 1x10, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical +Through hole straight socket strip, 1x10, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x10 2.54mm single row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x10, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x10 2.54mm single row style1 pin1 left +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x10_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x10, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x10 2.54mm single row style2 pin1 right +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Horizontal +Through hole angled socket strip, 1x11, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical +Through hole straight socket strip, 1x11, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x11 2.54mm single row +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x11, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x11 2.54mm single row style1 pin1 left +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x11_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x11, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x11 2.54mm single row style2 pin1 right +0 +11 +11 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Horizontal +Through hole angled socket strip, 1x12, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical +Through hole straight socket strip, 1x12, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x12 2.54mm single row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x12, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x12 2.54mm single row style1 pin1 left +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x12_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x12, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x12 2.54mm single row style2 pin1 right +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Horizontal +Through hole angled socket strip, 1x13, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical +Through hole straight socket strip, 1x13, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x13 2.54mm single row +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x13, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x13 2.54mm single row style1 pin1 left +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x13_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x13, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x13 2.54mm single row style2 pin1 right +0 +13 +13 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Horizontal +Through hole angled socket strip, 1x14, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical +Through hole straight socket strip, 1x14, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x14 2.54mm single row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x14, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x14 2.54mm single row style1 pin1 left +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x14_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x14, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x14 2.54mm single row style2 pin1 right +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Horizontal +Through hole angled socket strip, 1x15, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical +Through hole straight socket strip, 1x15, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x15 2.54mm single row +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x15, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x15 2.54mm single row style1 pin1 left +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x15_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x15, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x15 2.54mm single row style2 pin1 right +0 +15 +15 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Horizontal +Through hole angled socket strip, 1x16, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical +Through hole straight socket strip, 1x16, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x16 2.54mm single row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x16, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x16 2.54mm single row style1 pin1 left +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x16_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x16, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x16 2.54mm single row style2 pin1 right +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Horizontal +Through hole angled socket strip, 1x17, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical +Through hole straight socket strip, 1x17, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x17 2.54mm single row +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x17, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x17 2.54mm single row style1 pin1 left +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x17_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x17, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x17 2.54mm single row style2 pin1 right +0 +17 +17 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Horizontal +Through hole angled socket strip, 1x18, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical +Through hole straight socket strip, 1x18, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x18 2.54mm single row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x18, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x18 2.54mm single row style1 pin1 left +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x18_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x18, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x18 2.54mm single row style2 pin1 right +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Horizontal +Through hole angled socket strip, 1x19, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical +Through hole straight socket strip, 1x19, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x19 2.54mm single row +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x19, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x19 2.54mm single row style1 pin1 left +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x19_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x19, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x19 2.54mm single row style2 pin1 right +0 +19 +19 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Horizontal +Through hole angled socket strip, 1x20, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical +Through hole straight socket strip, 1x20, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x20 2.54mm single row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x20, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x20 2.54mm single row style1 pin1 left +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x20_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x20, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x20 2.54mm single row style2 pin1 right +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Horizontal +Through hole angled socket strip, 1x21, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical +Through hole straight socket strip, 1x21, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x21 2.54mm single row +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x21, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x21 2.54mm single row style1 pin1 left +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x21_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x21, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x21 2.54mm single row style2 pin1 right +0 +21 +21 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Horizontal +Through hole angled socket strip, 1x22, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical +Through hole straight socket strip, 1x22, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x22 2.54mm single row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x22, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x22 2.54mm single row style1 pin1 left +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x22_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x22, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x22 2.54mm single row style2 pin1 right +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Horizontal +Through hole angled socket strip, 1x23, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical +Through hole straight socket strip, 1x23, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x23 2.54mm single row +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x23, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x23 2.54mm single row style1 pin1 left +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x23_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x23, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x23 2.54mm single row style2 pin1 right +0 +23 +23 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Horizontal +Through hole angled socket strip, 1x24, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical +Through hole straight socket strip, 1x24, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x24 2.54mm single row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x24, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x24 2.54mm single row style1 pin1 left +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x24_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x24, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x24 2.54mm single row style2 pin1 right +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Horizontal +Through hole angled socket strip, 1x25, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical +Through hole straight socket strip, 1x25, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x25 2.54mm single row +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x25, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x25 2.54mm single row style1 pin1 left +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x25_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x25, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x25 2.54mm single row style2 pin1 right +0 +25 +25 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Horizontal +Through hole angled socket strip, 1x26, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical +Through hole straight socket strip, 1x26, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x26 2.54mm single row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x26, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x26 2.54mm single row style1 pin1 left +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x26_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x26, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x26 2.54mm single row style2 pin1 right +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Horizontal +Through hole angled socket strip, 1x27, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical +Through hole straight socket strip, 1x27, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x27 2.54mm single row +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x27, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x27 2.54mm single row style1 pin1 left +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x27_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x27, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x27 2.54mm single row style2 pin1 right +0 +27 +27 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Horizontal +Through hole angled socket strip, 1x28, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical +Through hole straight socket strip, 1x28, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x28 2.54mm single row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x28, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x28 2.54mm single row style1 pin1 left +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x28_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x28, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x28 2.54mm single row style2 pin1 right +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Horizontal +Through hole angled socket strip, 1x29, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical +Through hole straight socket strip, 1x29, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x29 2.54mm single row +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x29, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x29 2.54mm single row style1 pin1 left +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x29_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x29, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x29 2.54mm single row style2 pin1 right +0 +29 +29 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Horizontal +Through hole angled socket strip, 1x30, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical +Through hole straight socket strip, 1x30, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x30 2.54mm single row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x30, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x30 2.54mm single row style1 pin1 left +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x30_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x30, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x30 2.54mm single row style2 pin1 right +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Horizontal +Through hole angled socket strip, 1x31, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical +Through hole straight socket strip, 1x31, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x31 2.54mm single row +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x31, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x31 2.54mm single row style1 pin1 left +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x31_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x31, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x31 2.54mm single row style2 pin1 right +0 +31 +31 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Horizontal +Through hole angled socket strip, 1x32, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical +Through hole straight socket strip, 1x32, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x32 2.54mm single row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x32, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x32 2.54mm single row style1 pin1 left +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x32_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x32, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x32 2.54mm single row style2 pin1 right +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Horizontal +Through hole angled socket strip, 1x33, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical +Through hole straight socket strip, 1x33, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x33 2.54mm single row +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x33, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x33 2.54mm single row style1 pin1 left +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x33_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x33, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x33 2.54mm single row style2 pin1 right +0 +33 +33 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Horizontal +Through hole angled socket strip, 1x34, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical +Through hole straight socket strip, 1x34, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x34 2.54mm single row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x34, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x34 2.54mm single row style1 pin1 left +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x34_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x34, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x34 2.54mm single row style2 pin1 right +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Horizontal +Through hole angled socket strip, 1x35, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical +Through hole straight socket strip, 1x35, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x35 2.54mm single row +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x35, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x35 2.54mm single row style1 pin1 left +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x35_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x35, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x35 2.54mm single row style2 pin1 right +0 +35 +35 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Horizontal +Through hole angled socket strip, 1x36, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical +Through hole straight socket strip, 1x36, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x36 2.54mm single row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x36, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x36 2.54mm single row style1 pin1 left +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x36_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x36, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x36 2.54mm single row style2 pin1 right +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Horizontal +Through hole angled socket strip, 1x37, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical +Through hole straight socket strip, 1x37, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x37 2.54mm single row +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x37, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x37 2.54mm single row style1 pin1 left +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x37_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x37, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x37 2.54mm single row style2 pin1 right +0 +37 +37 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Horizontal +Through hole angled socket strip, 1x38, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical +Through hole straight socket strip, 1x38, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x38 2.54mm single row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x38, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x38 2.54mm single row style1 pin1 left +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x38_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x38, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x38 2.54mm single row style2 pin1 right +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Horizontal +Through hole angled socket strip, 1x39, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical +Through hole straight socket strip, 1x39, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x39 2.54mm single row +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x39, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x39 2.54mm single row style1 pin1 left +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x39_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x39, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x39 2.54mm single row style2 pin1 right +0 +39 +39 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Horizontal +Through hole angled socket strip, 1x40, 2.54mm pitch, 8.51mm socket length, single row (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical +Through hole straight socket strip, 1x40, 2.54mm pitch, single row (from Kicad 4.0.7), script generated +Through hole socket strip THT 1x40 2.54mm single row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical_SMD_Pin1Left +surface-mounted straight socket strip, 1x40, 2.54mm pitch, single row, style 1 (pin 1 left) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x40 2.54mm single row style1 pin1 left +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_1x40_P2.54mm_Vertical_SMD_Pin1Right +surface-mounted straight socket strip, 1x40, 2.54mm pitch, single row, style 2 (pin 1 right) (https://cdn.harwin.com/pdfs/M20-786.pdf), script generated +Surface mounted socket strip SMD 1x40 2.54mm single row style2 pin1 right +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Horizontal +Through hole angled socket strip, 2x01, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Vertical +Through hole straight socket strip, 2x01, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x01_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x01, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x01 2.54mm double row +0 +2 +2 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Horizontal +Through hole angled socket strip, 2x02, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Vertical +Through hole straight socket strip, 2x02, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x02_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x02, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x02 2.54mm double row +0 +4 +4 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Horizontal +Through hole angled socket strip, 2x03, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Vertical +Through hole straight socket strip, 2x03, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x03_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x03, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x03 2.54mm double row +0 +6 +6 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Horizontal +Through hole angled socket strip, 2x04, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Vertical +Through hole straight socket strip, 2x04, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x04_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x04, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x04 2.54mm double row +0 +8 +8 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Horizontal +Through hole angled socket strip, 2x05, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Vertical +Through hole straight socket strip, 2x05, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x05_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x05, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x05 2.54mm double row +0 +10 +10 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Horizontal +Through hole angled socket strip, 2x06, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Vertical +Through hole straight socket strip, 2x06, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x06_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x06, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x06 2.54mm double row +0 +12 +12 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Horizontal +Through hole angled socket strip, 2x07, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Vertical +Through hole straight socket strip, 2x07, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x07_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x07, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x07 2.54mm double row +0 +14 +14 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Horizontal +Through hole angled socket strip, 2x08, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Vertical +Through hole straight socket strip, 2x08, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x08_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x08, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x08 2.54mm double row +0 +16 +16 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Horizontal +Through hole angled socket strip, 2x09, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Vertical +Through hole straight socket strip, 2x09, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x09_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x09, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x09 2.54mm double row +0 +18 +18 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Horizontal +Through hole angled socket strip, 2x10, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Vertical +Through hole straight socket strip, 2x10, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x10_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x10, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x10 2.54mm double row +0 +20 +20 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Horizontal +Through hole angled socket strip, 2x11, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Vertical +Through hole straight socket strip, 2x11, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x11_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x11, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x11 2.54mm double row +0 +22 +22 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Horizontal +Through hole angled socket strip, 2x12, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Vertical +Through hole straight socket strip, 2x12, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x12_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x12, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x12 2.54mm double row +0 +24 +24 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Horizontal +Through hole angled socket strip, 2x13, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Vertical +Through hole straight socket strip, 2x13, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x13_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x13, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x13 2.54mm double row +0 +26 +26 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Horizontal +Through hole angled socket strip, 2x14, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Vertical +Through hole straight socket strip, 2x14, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x14_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x14, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x14 2.54mm double row +0 +28 +28 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Horizontal +Through hole angled socket strip, 2x15, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Vertical +Through hole straight socket strip, 2x15, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x15_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x15, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x15 2.54mm double row +0 +30 +30 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Horizontal +Through hole angled socket strip, 2x16, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Vertical +Through hole straight socket strip, 2x16, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x16_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x16, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x16 2.54mm double row +0 +32 +32 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Horizontal +Through hole angled socket strip, 2x17, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Vertical +Through hole straight socket strip, 2x17, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x17_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x17, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x17 2.54mm double row +0 +34 +34 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Horizontal +Through hole angled socket strip, 2x18, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Vertical +Through hole straight socket strip, 2x18, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x18_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x18, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x18 2.54mm double row +0 +36 +36 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Horizontal +Through hole angled socket strip, 2x19, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Vertical +Through hole straight socket strip, 2x19, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x19_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x19, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x19 2.54mm double row +0 +38 +38 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Horizontal +Through hole angled socket strip, 2x20, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Vertical +Through hole straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x20_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x20, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x20 2.54mm double row +0 +40 +40 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Horizontal +Through hole angled socket strip, 2x21, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Vertical +Through hole straight socket strip, 2x21, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x21_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x21, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x21 2.54mm double row +0 +42 +42 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Horizontal +Through hole angled socket strip, 2x22, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Vertical +Through hole straight socket strip, 2x22, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x22_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x22, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x22 2.54mm double row +0 +44 +44 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Horizontal +Through hole angled socket strip, 2x23, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Vertical +Through hole straight socket strip, 2x23, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x23_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x23, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x23 2.54mm double row +0 +46 +46 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Horizontal +Through hole angled socket strip, 2x24, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Vertical +Through hole straight socket strip, 2x24, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x24_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x24, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x24 2.54mm double row +0 +48 +48 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Horizontal +Through hole angled socket strip, 2x25, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Vertical +Through hole straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x25_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x25, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x25 2.54mm double row +0 +50 +50 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Horizontal +Through hole angled socket strip, 2x26, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Vertical +Through hole straight socket strip, 2x26, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x26_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x26, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x26 2.54mm double row +0 +52 +52 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Horizontal +Through hole angled socket strip, 2x27, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Vertical +Through hole straight socket strip, 2x27, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x27_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x27, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x27 2.54mm double row +0 +54 +54 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Horizontal +Through hole angled socket strip, 2x28, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Vertical +Through hole straight socket strip, 2x28, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x28_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x28, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x28 2.54mm double row +0 +56 +56 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Horizontal +Through hole angled socket strip, 2x29, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Vertical +Through hole straight socket strip, 2x29, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x29_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x29, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x29 2.54mm double row +0 +58 +58 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Horizontal +Through hole angled socket strip, 2x30, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Vertical +Through hole straight socket strip, 2x30, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x30_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x30, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x30 2.54mm double row +0 +60 +60 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Horizontal +Through hole angled socket strip, 2x31, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Vertical +Through hole straight socket strip, 2x31, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x31_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x31, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x31 2.54mm double row +0 +62 +62 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Horizontal +Through hole angled socket strip, 2x32, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Vertical +Through hole straight socket strip, 2x32, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x32_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x32, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x32 2.54mm double row +0 +64 +64 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Horizontal +Through hole angled socket strip, 2x33, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Vertical +Through hole straight socket strip, 2x33, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x33_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x33, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x33 2.54mm double row +0 +66 +66 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Horizontal +Through hole angled socket strip, 2x34, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Vertical +Through hole straight socket strip, 2x34, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x34_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x34, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x34 2.54mm double row +0 +68 +68 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Horizontal +Through hole angled socket strip, 2x35, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Vertical +Through hole straight socket strip, 2x35, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x35_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x35, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x35 2.54mm double row +0 +70 +70 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Horizontal +Through hole angled socket strip, 2x36, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Vertical +Through hole straight socket strip, 2x36, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x36_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x36, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x36 2.54mm double row +0 +72 +72 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Horizontal +Through hole angled socket strip, 2x37, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Vertical +Through hole straight socket strip, 2x37, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x37_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x37, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x37 2.54mm double row +0 +74 +74 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Horizontal +Through hole angled socket strip, 2x38, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Vertical +Through hole straight socket strip, 2x38, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x38_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x38, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x38 2.54mm double row +0 +76 +76 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Horizontal +Through hole angled socket strip, 2x39, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Vertical +Through hole straight socket strip, 2x39, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x39_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x39, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x39 2.54mm double row +0 +78 +78 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Horizontal +Through hole angled socket strip, 2x40, 2.54mm pitch, 8.51mm socket length, double cols (from Kicad 4.0.7), script generated +Through hole angled socket strip THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Vertical +Through hole straight socket strip, 2x40, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Through hole socket strip THT 2x40 2.54mm double row +0 +80 +80 +Connector_PinSocket_2.54mm +PinSocket_2x40_P2.54mm_Vertical_SMD +surface-mounted straight socket strip, 2x40, 2.54mm pitch, double cols (from Kicad 4.0.7), script generated +Surface mounted socket strip SMD 2x40 2.54mm double row +0 +80 +80 +Connector_RJ +RJ12_Amphenol_54601 +RJ12 connector https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/c-bmj-0082.pdf +RJ12 connector +0 +6 +6 +Connector_RJ +RJ14_Connfly_DS1133-S4_Horizontal +RJ14 connector 6P4C Horizontal http://www.connfly.com/userfiles/image/UpLoadFile/File/2012/10/26/DS1133.pdf +RJ14 connector 6P4C Connfly DS1133 +0 +4 +4 +Connector_RJ +RJ25_Wayconn_MJEA-660X1_Horizontal +RJ25 6P6C Socket 90 degrees, https://wayconn.com/wp-content/themes/way/datasheet/MJEA-660X1XXX_RJ25_6P6C_PCB_RA.pdf +RJ12 RJ18 RJ25 jack connector 6P6C +0 +6 +6 +Connector_RJ +RJ45_Abracon_ARJP11A-MA_Horizontal +Shielded RJ45 ethernet connector with transformer and POE (https://abracon.com/Magnetics/lan/ARJP11A.PDF) +ethernet 8p8c transformer poe rj45 +0 +15 +14 +Connector_RJ +RJ45_Amphenol_54602-x08_Horizontal +8 Pol Shallow Latch Connector, Modjack, RJ45 (https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/c-bmj-0102.pdf) +RJ45 +0 +8 +8 +Connector_RJ +RJ45_Amphenol_RJHSE538X +Shielded, 2 LED, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X.pdf +RJ45 8p8c ethernet cat5 +0 +14 +13 +Connector_RJ +RJ45_Amphenol_RJHSE538X-02 +Shielded, 2 LED, 2 Ports, http://www.amphenolinfocom.eu/NavData/Drawings/RJHSE-538X-02-REVC.pdf +RJ45 8p8c dual ethernet cat5 +0 +26 +25 +Connector_RJ +RJ45_Amphenol_RJHSE5380 +Shielded, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X.pdf +RJ45 8p8c ethernet cat5 +0 +10 +9 +Connector_RJ +RJ45_Amphenol_RJHSE5380-08 +Shielded, https://www.amphenolcanada.com/ProductSearch/drawings/AC/RJHSE538X08.pdf +RJ45 8p8c ethernet cat5 +0 +68 +65 +Connector_RJ +RJ45_Amphenol_RJMG1BD3B8K1ANR +1 Port RJ45 Magjack Connector Through Hole 10/100 Base-T, AutoMDIX, https://www.amphenolcanada.com/ProductSearch/Drawings/AC/RJMG1BD3B8K1ANR.PDF +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_BEL_SS74301-00x_Vertical +https://belfuse.com/resources/drawings/stewartconnector/dr-stw-ss-74301-001-ss-74301-002-ss-74301-005.pdf +RJ45 Vertical Shield LED Green Yellow +0 +14 +13 +Connector_RJ +RJ45_Cetus_J1B1211CCD_Horizontal +1 Port RJ45 Magjack Connector Through Hole 10/100 Base-T, Cetus, used and distributed by WIZnet (https://wizwiki.net/wiki/lib/exe/fetch.php?media=products:wiz550web:wiz550webds_kr:j1b1211ccd.pdf) +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_Hanrun_HR911105A +http://www.kosmodrom.com.ua/pdf/HR911105A.pdf +RJ45 Magjack +0 +14 +13 +Connector_RJ +RJ45_Molex_0855135013_Vertical +1 Port, RJ45, Series 85513, vertical, SMD, https://www.molex.com/pdm_docs/sd/855135013_sd.pdf +RJ45 Vertical +0 +9 +9 +Connector_RJ +RJ45_Ninigi_GE +1 port ethernet throughhole connector, https://en.ninigi.com/product/rj45ge/pdf +RJ45 ethernet 8p8c +0 +10 +9 +Connector_RJ +RJ45_OST_PJ012-8P8CX_Vertical +RJ45 vertical connector https://www.on-shore.com/wp-content/uploads/PJ012-8P8CX.pdf +RJ45 PJ012 +0 +8 +8 +Connector_RJ +RJ45_Plug_Metz_AJP92A8813 +plug, ethernet, 8P8C, RJ45 Plug +AJP92A8813 8P8C RJ45 ethernet plug +0 +8 +8 +Connector_RJ +RJ45_Pulse_JK0654219NL_Horizontal +10/100/1000 Base-T RJ45 single port with LEDs https://media.digikey.com/pdf/Data%20Sheets/Pulse%20PDFs/JK%20Series.pdf#page=2 +RJ45 8p8c ethernet +0 +18 +17 +Connector_RJ +RJ45_Pulse_JXD6-0001NL_Horizontal +RJ45 ethernet transformer with magnetics (https://productfinder.pulseeng.com/doc_type/WEB301/doc_num/JXD6-0001NL/doc_part/JXD6-0001NL.pdf) +ethernet 8p8c transformer magjack +0 +12 +11 +Connector_RJ +RJ45_Wuerth_7499010001A_Horizontal +10/100Base-TX RJ45 ethernet magnetic transformer connector horizontal https://katalog.we-online.de/pbs/datasheet/7499010001A.pdf +RJ45 ethernet magnetic +0 +10 +9 +Connector_RJ +RJ45_Wuerth_7499010121A_Horizontal +10/100Base-TX RJ45 ethernet magnetic transformer connector horizontal with green/orange LEDs https://katalog.we-online.de/pbs/datasheet/7499010121A.pdf +RJ45 ethernet magnetic +0 +14 +13 +Connector_RJ +RJ45_Wuerth_7499111446_Horizontal +LAN-Transformer WE-RJ45LAN 10/100/1000 BaseT +ethernet lan connector +0 +16 +15 +Connector_RJ +RJ45_Wuerth_7499151120_Horizontal +Wuerth 7499151120, LAN-Transformer WE-RJ45LAN 10/100/1000 BaseT, Dual Ethernet Jack (http://katalog.we-online.de/pbs/datasheet/7499151120.pdf) +ethernet lan connector +0 +32 +29 +Connector_RJ +RJ45_Wuerth_74980111211_Horizontal +RJ45 LAN Transformer 10/100BaseT (https://katalog.we-online.de/pbs/datasheet/74980111211.pdf) +lan magnetics transformer +0 +14 +13 +Connector_SATA_SAS +SAS-mini_TEConnectivity_1888174_Vertical +36pin mini SAS connector, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1888174&DocType=Customer+Drawing&DocLang=English +SAS mini connector +0 +44 +44 +Connector_SATA_SAS +SATA_Amphenol_10029364-001LF_Horizontal +https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10029364.pdf +SATA +0 +24 +23 +Connector_Samtec +Samtec_FMC_ASP-134486-01_10x40_P1.27mm_Vertical +http://suddendocs.samtec.com/prints/asp-134486-01-mkt.pdf +FMC HPC +0 +400 +400 +Connector_Samtec +Samtec_FMC_ASP-134602-01_10x40_P1.27mm_Vertical +https://www.marutsu.co.jp/contents/shop/marutsu/ds/asp-134602-01.pdf +FMC HPC +0 +400 +400 +Connector_Samtec +Samtec_FMC_ASP-134604-01_4x40_Vertical +http://www.samtec.com/standards/vita.aspx +FMC LPC VITA +0 +162 +160 +Connector_Samtec +Samtec_LSHM-105-xx.x-x-DV-N_2x05_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-105-xx.x-x-DV-N, 5 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +10 +10 +Connector_Samtec +Samtec_LSHM-105-xx.x-x-DV-S_2x05-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-105-xx.x-x-DV-S, 5 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +12 +11 +Connector_Samtec +Samtec_LSHM-110-xx.x-x-DV-N_2x10_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-110-xx.x-x-DV-N, 10 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +20 +20 +Connector_Samtec +Samtec_LSHM-110-xx.x-x-DV-S_2x10-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-110-xx.x-x-DV-S, 10 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +22 +21 +Connector_Samtec +Samtec_LSHM-120-xx.x-x-DV-N_2x20_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-120-xx.x-x-DV-N, 20 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +40 +40 +Connector_Samtec +Samtec_LSHM-120-xx.x-x-DV-S_2x20-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-120-xx.x-x-DV-S, 20 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +42 +41 +Connector_Samtec +Samtec_LSHM-130-xx.x-x-DV-N_2x30_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-130-xx.x-x-DV-N, 30 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +60 +60 +Connector_Samtec +Samtec_LSHM-130-xx.x-x-DV-S_2x30-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-130-xx.x-x-DV-S, 30 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +62 +61 +Connector_Samtec +Samtec_LSHM-140-xx.x-x-DV-N_2x40_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-140-xx.x-x-DV-N, 40 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +80 +80 +Connector_Samtec +Samtec_LSHM-140-xx.x-x-DV-S_2x40-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-140-xx.x-x-DV-S, 40 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +82 +81 +Connector_Samtec +Samtec_LSHM-150-xx.x-x-DV-N_2x50_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-150-xx.x-x-DV-N, 50 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +100 +100 +Connector_Samtec +Samtec_LSHM-150-xx.x-x-DV-S_2x50-1SH_P0.50mm_Vertical +Molex LSHM 0.50 mm Razor Beam High-Speed Hermaphroditic Terminal/Socket Strip, LSHM-150-xx.x-x-DV-S, 50 Pins per row (http://suddendocs.samtec.com/prints/lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf), generated with kicad-footprint-generator +connector Samtec side entry +0 +102 +101 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-BE-LC_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-BE-LC, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-BE_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-BE, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV-LC_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV-LC, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-102-02-xxx-DV_2x02_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-102-02-xxx-DV, 2 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +4 +4 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-BE-LC_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-BE-LC, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-BE_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-BE, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV-LC_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV-LC, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-103-02-xxx-DV_2x03_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-103-02-xxx-DV, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +6 +6 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-A_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-A, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE-A_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE-A, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-BE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-BE, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-104-02-xxx-DV_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xxx-DV, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-A_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-A, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE-A_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE-A, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-BE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-BE, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-105-02-xxx-DV_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xxx-DV, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-A_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-A, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE-A_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE-A, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-BE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-BE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-106-02-xxx-DV_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xxx-DV, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-A_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-A, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE-A_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE-A, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-BE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-BE, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-107-02-xxx-DV_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xxx-DV, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-A_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-A, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE-A_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE-A, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-BE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-BE, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-108-02-xxx-DV_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xxx-DV, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-A_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-A, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE-A_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE-A, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-BE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-BE, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-109-02-xxx-DV_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xxx-DV, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-A_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-A, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE-A_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE-A, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-BE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-BE, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-110-02-xxx-DV_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xxx-DV, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-A_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-A, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE-A_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE-A, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-BE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-BE, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-111-02-xxx-DV_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xxx-DV, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-A_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-A, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE-A_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE-A, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-BE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-BE, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-112-02-xxx-DV_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xxx-DV, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-A_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-A, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE-A_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE-A, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-BE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-BE, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-113-02-xxx-DV_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xxx-DV, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-A_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-A, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE-A_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE-A, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-BE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-BE, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-114-02-xxx-DV_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xxx-DV, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-A_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-A, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE-A_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE-A, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-BE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-BE, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-115-02-xxx-DV_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xxx-DV, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-A_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-A, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE-A_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE-A, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-BE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-BE, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-116-02-xxx-DV_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xxx-DV, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-A_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-A, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE-A_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE-A, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-BE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-BE, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-117-02-xxx-DV_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xxx-DV, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-A_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-A, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE-A_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE-A, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-BE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-BE, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-118-02-xxx-DV_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xxx-DV, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-A_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-A, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE-A_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE-A, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-BE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-BE, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-119-02-xxx-DV_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xxx-DV, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-A_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-A, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE-A_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE-A, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-BE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-BE, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-120-02-xxx-DV_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xxx-DV, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-A_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-A, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE-A_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE-A, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-BE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-BE, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-121-02-xxx-DV_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xxx-DV, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-A_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-A, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE-A_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE-A, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-BE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-BE, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-122-02-xxx-DV_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xxx-DV, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-A_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-A, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE-A_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE-A, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-BE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-BE, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-123-02-xxx-DV_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xxx-DV, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-A_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-A, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE-A_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE-A, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-BE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-BE, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-124-02-xxx-DV_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xxx-DV, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-A_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-A, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE-A_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE-A, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-BE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-BE, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-125-02-xxx-DV_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xxx-DV, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-A_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-A, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE-A_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE-A, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-BE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-BE, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-126-02-xxx-DV_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xxx-DV, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-A_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-A, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE-A_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE-A, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-BE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-BE, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-127-02-xxx-DV_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xxx-DV, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-A_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-A, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE-A_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE-A, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-BE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-BE, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-128-02-xxx-DV_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xxx-DV, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-A_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-A, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE-A_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE-A, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-BE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-BE, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-129-02-xxx-DV_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xxx-DV, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-A_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-A, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE-A_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE-A, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-BE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-BE, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-130-02-xxx-DV_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xxx-DV, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-A_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-A, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE-A_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE-A, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-BE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-BE, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-131-02-xxx-DV_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xxx-DV, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-A_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-A, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE-A_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE-A, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-BE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-BE, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-132-02-xxx-DV_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xxx-DV, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-A_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-A, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE-A_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE-A, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-BE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-BE, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-133-02-xxx-DV_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xxx-DV, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-A_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-A, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE-A_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE-A, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-BE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-BE, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-134-02-xxx-DV_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xxx-DV, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-A_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-A, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE-A_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE-A, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-BE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-BE, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-135-02-xxx-DV_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xxx-DV, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-A_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-A, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE-A_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE-A, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-BE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-BE, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-136-02-xxx-DV_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xxx-DV, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-A_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-A, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE-A_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE-A, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-BE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-BE, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-137-02-xxx-DV_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xxx-DV, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-A_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-A, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE-A_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE-A, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-BE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-BE, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-138-02-xxx-DV_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xxx-DV, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-A_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-A, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE-A_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE-A, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-BE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-BE, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-139-02-xxx-DV_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xxx-DV, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-A_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-A, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE-A_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE-A, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-BE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-BE, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-140-02-xxx-DV_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xxx-DV, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-A_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-A, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE-A_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE-A, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-BE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-BE, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-141-02-xxx-DV_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xxx-DV, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-A_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-A, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE-A_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE-A, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-BE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-BE, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-142-02-xxx-DV_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xxx-DV, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-A_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-A, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE-A_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE-A, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-BE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-BE, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-143-02-xxx-DV_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xxx-DV, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-A_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-A, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE-A_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE-A, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-BE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-BE, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-144-02-xxx-DV_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xxx-DV, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-A_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-A, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE-A_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE-A, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-BE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-BE, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-145-02-xxx-DV_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xxx-DV, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-A_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-A, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE-A_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE-A, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-BE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-BE, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-146-02-xxx-DV_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xxx-DV, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-A_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-A, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE-A_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE-A, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-BE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-BE, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-147-02-xxx-DV_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xxx-DV, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-A_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-A, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE-A_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE-A, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-BE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-BE, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-148-02-xxx-DV_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xxx-DV, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-A_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-A, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE-A_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE-A, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-BE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-BE, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-149-02-xxx-DV_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xxx-DV, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-A_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-A, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE-A_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE-A, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-BE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-BE, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_SMD +Samtec_HLE-150-02-xxx-DV_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xxx-DV, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-PE-LC_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-PE-LC, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-PE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-PE (compatible alternatives: HLE-104-02-xx-DV-PE-BE), 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-104-02-xx-DV-TE_2x04_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-104-02-xx-DV-TE, 4 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +8 +8 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-PE-LC_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-PE-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-PE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-PE (compatible alternatives: HLE-105-02-xx-DV-PE-BE), 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-105-02-xx-DV-TE_2x05_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-105-02-xx-DV-TE, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +10 +10 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-PE-LC_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-PE-LC, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-PE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-PE (compatible alternatives: HLE-106-02-xx-DV-PE-BE), 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-106-02-xx-DV-TE_2x06_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-106-02-xx-DV-TE, 6 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +12 +12 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-PE-LC_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-PE-LC, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-PE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-PE (compatible alternatives: HLE-107-02-xx-DV-PE-BE), 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-107-02-xx-DV-TE_2x07_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-107-02-xx-DV-TE, 7 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +14 +14 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-PE-LC_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-PE-LC, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-PE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-PE (compatible alternatives: HLE-108-02-xx-DV-PE-BE), 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-108-02-xx-DV-TE_2x08_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-108-02-xx-DV-TE, 8 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +16 +16 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-PE-LC_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-PE-LC, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-PE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-PE (compatible alternatives: HLE-109-02-xx-DV-PE-BE), 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-109-02-xx-DV-TE_2x09_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-109-02-xx-DV-TE, 9 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +18 +18 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-PE-LC_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-PE-LC, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-PE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-PE (compatible alternatives: HLE-110-02-xx-DV-PE-BE), 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-110-02-xx-DV-TE_2x10_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-110-02-xx-DV-TE, 10 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +20 +20 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-PE-LC_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-PE-LC, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-PE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-PE (compatible alternatives: HLE-111-02-xx-DV-PE-BE), 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-111-02-xx-DV-TE_2x11_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-111-02-xx-DV-TE, 11 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +22 +22 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-PE-LC_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-PE-LC, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-PE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-PE (compatible alternatives: HLE-112-02-xx-DV-PE-BE), 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-112-02-xx-DV-TE_2x12_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-112-02-xx-DV-TE, 12 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +24 +24 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-PE-LC_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-PE-LC, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-PE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-PE (compatible alternatives: HLE-113-02-xx-DV-PE-BE), 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-113-02-xx-DV-TE_2x13_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-113-02-xx-DV-TE, 13 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +26 +26 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-PE-LC_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-PE-LC, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-PE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-PE (compatible alternatives: HLE-114-02-xx-DV-PE-BE), 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-114-02-xx-DV-TE_2x14_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-114-02-xx-DV-TE, 14 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +28 +28 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-PE-LC_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-PE-LC, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-PE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-PE (compatible alternatives: HLE-115-02-xx-DV-PE-BE), 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-115-02-xx-DV-TE_2x15_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-115-02-xx-DV-TE, 15 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +30 +30 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-PE-LC_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-PE-LC, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-PE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-PE (compatible alternatives: HLE-116-02-xx-DV-PE-BE), 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-116-02-xx-DV-TE_2x16_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-116-02-xx-DV-TE, 16 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +32 +32 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-PE-LC_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-PE-LC, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-PE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-PE (compatible alternatives: HLE-117-02-xx-DV-PE-BE), 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-117-02-xx-DV-TE_2x17_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-117-02-xx-DV-TE, 17 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +34 +34 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-PE-LC_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-PE-LC, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-PE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-PE (compatible alternatives: HLE-118-02-xx-DV-PE-BE), 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-118-02-xx-DV-TE_2x18_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-118-02-xx-DV-TE, 18 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +36 +36 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-PE-LC_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-PE-LC, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-PE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-PE (compatible alternatives: HLE-119-02-xx-DV-PE-BE), 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-119-02-xx-DV-TE_2x19_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-119-02-xx-DV-TE, 19 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +38 +38 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-PE-LC_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-PE-LC, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-PE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-PE (compatible alternatives: HLE-120-02-xx-DV-PE-BE), 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-120-02-xx-DV-TE_2x20_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-120-02-xx-DV-TE, 20 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +40 +40 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-PE-LC_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-PE-LC, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-PE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-PE (compatible alternatives: HLE-121-02-xx-DV-PE-BE), 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-121-02-xx-DV-TE_2x21_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-121-02-xx-DV-TE, 21 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +42 +42 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-PE-LC_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-PE-LC, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-PE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-PE (compatible alternatives: HLE-122-02-xx-DV-PE-BE), 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-122-02-xx-DV-TE_2x22_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-122-02-xx-DV-TE, 22 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +44 +44 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-PE-LC_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-PE-LC, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-PE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-PE (compatible alternatives: HLE-123-02-xx-DV-PE-BE), 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-123-02-xx-DV-TE_2x23_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-123-02-xx-DV-TE, 23 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +46 +46 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-PE-LC_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-PE-LC, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-PE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-PE (compatible alternatives: HLE-124-02-xx-DV-PE-BE), 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-124-02-xx-DV-TE_2x24_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-124-02-xx-DV-TE, 24 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +48 +48 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-PE-LC_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-PE-LC, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-PE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-PE (compatible alternatives: HLE-125-02-xx-DV-PE-BE), 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-125-02-xx-DV-TE_2x25_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-125-02-xx-DV-TE, 25 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +50 +50 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-PE-LC_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-PE-LC, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-PE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-PE (compatible alternatives: HLE-126-02-xx-DV-PE-BE), 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-126-02-xx-DV-TE_2x26_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-126-02-xx-DV-TE, 26 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +52 +52 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-PE-LC_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-PE-LC, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-PE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-PE (compatible alternatives: HLE-127-02-xx-DV-PE-BE), 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-127-02-xx-DV-TE_2x27_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-127-02-xx-DV-TE, 27 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +54 +54 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-PE-LC_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-PE-LC, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-PE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-PE (compatible alternatives: HLE-128-02-xx-DV-PE-BE), 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-128-02-xx-DV-TE_2x28_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-128-02-xx-DV-TE, 28 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +56 +56 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-PE-LC_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-PE-LC, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-PE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-PE (compatible alternatives: HLE-129-02-xx-DV-PE-BE), 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-129-02-xx-DV-TE_2x29_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-129-02-xx-DV-TE, 29 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +58 +58 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-PE-LC_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-PE-LC, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-PE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-PE (compatible alternatives: HLE-130-02-xx-DV-PE-BE), 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-130-02-xx-DV-TE_2x30_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-130-02-xx-DV-TE, 30 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +60 +60 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-PE-LC_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-PE-LC, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-PE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-PE (compatible alternatives: HLE-131-02-xx-DV-PE-BE), 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-131-02-xx-DV-TE_2x31_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-131-02-xx-DV-TE, 31 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +62 +62 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-PE-LC_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-PE-LC, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-PE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-PE (compatible alternatives: HLE-132-02-xx-DV-PE-BE), 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-132-02-xx-DV-TE_2x32_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-132-02-xx-DV-TE, 32 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +64 +64 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-PE-LC_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-PE-LC, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-PE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-PE (compatible alternatives: HLE-133-02-xx-DV-PE-BE), 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-133-02-xx-DV-TE_2x33_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-133-02-xx-DV-TE, 33 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +66 +66 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-PE-LC_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-PE-LC, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-PE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-PE (compatible alternatives: HLE-134-02-xx-DV-PE-BE), 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-134-02-xx-DV-TE_2x34_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-134-02-xx-DV-TE, 34 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +68 +68 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-PE-LC_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-PE-LC, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-PE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-PE (compatible alternatives: HLE-135-02-xx-DV-PE-BE), 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-135-02-xx-DV-TE_2x35_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-135-02-xx-DV-TE, 35 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +70 +70 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-PE-LC_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-PE-LC, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-PE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-PE (compatible alternatives: HLE-136-02-xx-DV-PE-BE), 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-136-02-xx-DV-TE_2x36_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-136-02-xx-DV-TE, 36 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +72 +72 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-PE-LC_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-PE-LC, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-PE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-PE (compatible alternatives: HLE-137-02-xx-DV-PE-BE), 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-137-02-xx-DV-TE_2x37_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-137-02-xx-DV-TE, 37 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +74 +74 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-PE-LC_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-PE-LC, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-PE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-PE (compatible alternatives: HLE-138-02-xx-DV-PE-BE), 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-138-02-xx-DV-TE_2x38_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-138-02-xx-DV-TE, 38 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +76 +76 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-PE-LC_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-PE-LC, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-PE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-PE (compatible alternatives: HLE-139-02-xx-DV-PE-BE), 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-139-02-xx-DV-TE_2x39_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-139-02-xx-DV-TE, 39 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +78 +78 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-PE-LC_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-PE-LC, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-PE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-PE (compatible alternatives: HLE-140-02-xx-DV-PE-BE), 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-140-02-xx-DV-TE_2x40_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-140-02-xx-DV-TE, 40 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +80 +80 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-PE-LC_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-PE-LC, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-PE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-PE (compatible alternatives: HLE-141-02-xx-DV-PE-BE), 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-141-02-xx-DV-TE_2x41_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-141-02-xx-DV-TE, 41 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +82 +82 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-PE-LC_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-PE-LC, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-PE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-PE (compatible alternatives: HLE-142-02-xx-DV-PE-BE), 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-142-02-xx-DV-TE_2x42_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-142-02-xx-DV-TE, 42 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +84 +84 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-PE-LC_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-PE-LC, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-PE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-PE (compatible alternatives: HLE-143-02-xx-DV-PE-BE), 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-143-02-xx-DV-TE_2x43_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-143-02-xx-DV-TE, 43 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +86 +86 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-PE-LC_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-PE-LC, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-PE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-PE (compatible alternatives: HLE-144-02-xx-DV-PE-BE), 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-144-02-xx-DV-TE_2x44_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-144-02-xx-DV-TE, 44 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +88 +88 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-PE-LC_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-PE-LC, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-PE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-PE (compatible alternatives: HLE-145-02-xx-DV-PE-BE), 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-145-02-xx-DV-TE_2x45_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-145-02-xx-DV-TE, 45 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +90 +90 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-PE-LC_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-PE-LC, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-PE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-PE (compatible alternatives: HLE-146-02-xx-DV-PE-BE), 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-146-02-xx-DV-TE_2x46_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-146-02-xx-DV-TE, 46 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +92 +92 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-PE-LC_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-PE-LC, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-PE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-PE (compatible alternatives: HLE-147-02-xx-DV-PE-BE), 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-147-02-xx-DV-TE_2x47_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-147-02-xx-DV-TE, 47 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +94 +94 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-PE-LC_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-PE-LC, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-PE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-PE (compatible alternatives: HLE-148-02-xx-DV-PE-BE), 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-148-02-xx-DV-TE_2x48_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-148-02-xx-DV-TE, 48 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +96 +96 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-PE-LC_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-PE-LC, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-PE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-PE (compatible alternatives: HLE-149-02-xx-DV-PE-BE), 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-149-02-xx-DV-TE_2x49_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-149-02-xx-DV-TE, 49 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +98 +98 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-PE-LC_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-PE-LC, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-PE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-PE (compatible alternatives: HLE-150-02-xx-DV-PE-BE), 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Samtec_HLE_THT +Samtec_HLE-150-02-xx-DV-TE_2x50_P2.54mm_Horizontal +Samtec HLE .100" Tiger Beam Cost-effective Single Beam Socket Strip, HLE-150-02-xx-DV-TE, 50 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xx-dv-xe-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-thru.pdf), generated with kicad-footprint-generator +connector Samtec HLE top entry +0 +100 +100 +Connector_Stocko +Stocko_MKS_1651-6-0-202_1x2_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +2 +2 +Connector_Stocko +Stocko_MKS_1652-6-0-202_1x2_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +2 +2 +Connector_Stocko +Stocko_MKS_1653-6-0-303_1x3_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +3 +3 +Connector_Stocko +Stocko_MKS_1654-6-0-404_1x4_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +4 +4 +Connector_Stocko +Stocko_MKS_1655-6-0-505_1x5_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +5 +5 +Connector_Stocko +Stocko_MKS_1656-6-0-606_1x6_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +6 +6 +Connector_Stocko +Stocko_MKS_1657-6-0-707_1x7_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +7 +7 +Connector_Stocko +Stocko_MKS_1658-6-0-808_1x8_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +8 +8 +Connector_Stocko +Stocko_MKS_1659-6-0-909_1x9_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +9 +9 +Connector_Stocko +Stocko_MKS_1660-6-0-1010_1x10_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +10 +10 +Connector_Stocko +Stocko_MKS_1661-6-0-1111_1x11_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +11 +11 +Connector_Stocko +Stocko_MKS_1662-6-0-1212_1x12_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +12 +12 +Connector_Stocko +Stocko_MKS_1663-6-0-1313_1x13_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +13 +13 +Connector_Stocko +Stocko_MKS_1664-6-0-1414_1x14_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +14 +14 +Connector_Stocko +Stocko_MKS_1665-6-0-1515_1x15_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +15 +15 +Connector_Stocko +Stocko_MKS_1666-6-0-1616_1x16_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +16 +16 +Connector_Stocko +Stocko_MKS_1667-6-0-1717_1x17_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +17 +17 +Connector_Stocko +Stocko_MKS_1668-6-0-1818_1x18_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +18 +18 +Connector_Stocko +Stocko_MKS_1669-6-0-1919_1x19_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +19 +19 +Connector_Stocko +Stocko_MKS_1670-6-0-2020_1x20_P2.50mm_Vertical +Stocko MKS 16xx series connector, (https://www.stocko-contact.com/downloads/steckverbindersystem-raster-2,5-mm.pdf#page=15), generated with kicad-footprint-generator +Stocko RFK MKS 16xx +0 +20 +20 +Connector_TE-Connectivity +TE_1-826576-3_1x13_P3.96mm_Vertical +TE, 1-826576-3, 13 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +13 +13 +Connector_TE-Connectivity +TE_1-826576-5_1x15_P3.96mm_Vertical +TE, 1-826576-5, 15 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +15 +15 +Connector_TE-Connectivity +TE_1-826576-6_1x16_P3.96mm_Vertical +TE, 1-826576-6, 16 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +16 +16 +Connector_TE-Connectivity +TE_1-826576-7_1x17_P3.96mm_Vertical +TE, 1-826576-7, 17 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +17 +17 +Connector_TE-Connectivity +TE_1-826576-8_1x18_P3.96mm_Vertical +TE, 1-826576-8, 18 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +18 +18 +Connector_TE-Connectivity +TE_2-826576-0_1x20_P3.96mm_Vertical +TE, 2-826576-0, 20 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +20 +20 +Connector_TE-Connectivity +TE_3-826576-6_1x36_P3.96mm_Vertical +TE, 3-826576-6, 36 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +36 +36 +Connector_TE-Connectivity +TE_826576-2_1x02_P3.96mm_Vertical +TE, 826576-2, 2 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +2 +2 +Connector_TE-Connectivity +TE_826576-3_1x03_P3.96mm_Vertical +TE, 826576-3, 3 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +3 +3 +Connector_TE-Connectivity +TE_826576-5_1x05_P3.96mm_Vertical +TE, 826576-5, 5 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +5 +5 +Connector_TE-Connectivity +TE_826576-6_1x06_P3.96mm_Vertical +TE, 826576-6, 6 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +6 +6 +Connector_TE-Connectivity +TE_826576-7_1x07_P3.96mm_Vertical +TE, 826576-7, 7 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +7 +7 +Connector_TE-Connectivity +TE_826576-8_1x08_P3.96mm_Vertical +TE, 826576-8, 8 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +8 +8 +Connector_TE-Connectivity +TE_826576-9_1x09_P3.96mm_Vertical +TE, 826576-9, 9 Pins (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=826576&DocType=Customer+Drawing&DocLang=English), generated with kicad-footprint-generator +connector TE 826576 vertical +0 +9 +9 +Connector_TE-Connectivity +TE_5767171-1_2x19_P0.635mm_Vertical +PCB Mount Receptacle, Vertical, Board-to-Board, 38 Position, 24.003mm / .64mm [.945in] Centerline, Header Only, Palladium Nickel (https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F5767171%7FB2%7Fpdf%7FEnglish%7FENG_CD_5767171_B2.pdf%7F5767171-1#page=2) +mictor38 receptacle board-to-board +0 +43 +39 +Connector_TE-Connectivity +TE_AMPSEAL_1-776087-x_3Rows_23_P0.4mm_Horizontal +Connector +TE 776087 +0 +23 +23 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770182-x_3x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770182-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +9 +9 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770186-x_3x04_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770186-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770190-x_3x05_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770190-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +15 +15 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770621-x_2x06_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770621-x, 6 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770858-x_2x05_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770858-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +10 +10 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770866-x_1x02_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770866-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +2 +2 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770870-x_1x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770870-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +3 +3 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770874-x_2x02_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770874-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +4 +4 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770875-x_2x03_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770875-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +6 +6 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770966-x_1x02_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770966-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +2 +2 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770967-x_1x03_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770967-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +3 +3 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770968-x_2x02_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770968-x, 2 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +4 +4 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770969-x_2x03_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770969-x, 3 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +6 +6 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770970-x_2x04_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770970-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +8 +8 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770971-x_2x05_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770971-x, 5 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +10 +10 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770972-x_2x06_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770972-x, 6 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +12 +12 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770973-x_2x07_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770973-x, 7 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +14 +14 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-770974-x_2x08_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-770974-x, 8 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +16 +16 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794067-x_2x07_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794067-x, 7 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +14 +14 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794068-x_2x08_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794068-x, 8 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +16 +16 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794069-x_2x09_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794069-x, 9 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +18 +18 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794070-x_2x10_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794070-x, 10 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +20 +20 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794071-x_2x11_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794071-x, 11 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +22 +22 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794072-x_2x12_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794072-x, 12 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +24 +24 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794073-x_2x04_P4.14mm_Vertical +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794073-x, 4 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK side entry +0 +8 +8 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794105-x_2x09_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794105-x, 9 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +18 +18 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794106-x_2x10_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794106-x, 10 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +20 +20 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794107-x_2x11_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794107-x, 11 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +22 +22 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794108-x_2x12_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794108-x, 12 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +24 +24 +Connector_TE-Connectivity +TE_MATE-N-LOK_1-794374-x_1x01_P4.14mm_Horizontal +Molex Mini-Universal MATE-N-LOK, old mpn/engineering number: 1-794374-x, 1 Pins per row (http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=82181_SOFTSHELL_HIGH_DENSITY&DocType=CS&DocLang=EN), generated with kicad-footprint-generator +connector TE MATE-N-LOK top entry +0 +1 +1 +Connector_TE-Connectivity +TE_MATE-N-LOK_350211-1_1x04_P5.08mm_Vertical +https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F350211%7FU5%7Fpdf%7FEnglish%7FENG_CD_350211_U5.pdf%7F350211-1 +connector TE MATE-N-LOK top entry ATA PATA IDE 5.25 inch floppy drive power +0 +4 +4 +Connector_USB +USB3_A_Molex_48393-001 +USB 3.0, type A, right angle (http://www.molex.com/pdm_docs/sd/483930003_sd.pdf) +USB 3.0 type A right angle +0 +13 +10 +Connector_USB +USB3_A_Plug_Wuerth_692112030100_Horizontal +USB3 type A Plug, Horizontal, http://katalog.we-online.de/em/datasheet/692112030100.pdf +usb A plug horizontal +0 +11 +10 +Connector_USB +USB_A_CNCTech_1001-011-01101_Horizontal +USB type A Plug, Horizontal, http://cnctech.us/pdfs/1001-011-01101.pdf +USB-A +0 +6 +5 +Connector_USB +USB_A_CONNFLY_DS1095-WNR0 +http://www.connfly.com/userfiles/image/UpLoadFile/File/2013/5/6/DS1095.pdf +USB-A receptacle horizontal through-hole +0 +6 +5 +Connector_USB +USB_A_Molex_67643_Horizontal +USB type A, Horizontal, https://www.molex.com/pdm_docs/sd/676433910_sd.pdf +USB_A Female Connector receptacle +0 +6 +5 +Connector_USB +USB_A_Molex_105057_Vertical +https://www.molex.com/pdm_docs/sd/1050570001_sd.pdf +USB A Vertical +0 +7 +5 +Connector_USB +USB_A_Stewart_SS-52100-001_Horizontal +USB A connector https://belfuse.com/resources/drawings/stewartconnector/dr-stw-ss-52100-001.pdf +USB_A Female Connector receptacle +0 +6 +5 +Connector_USB +USB_A_Wuerth_614004134726_Horizontal +USB A connector https://www.we-online.com/catalog/datasheet/614004134726.pdf +USB_A Female Connector receptacle +0 +8 +5 +Connector_USB +USB_A_Wuerth_61400826021_Horizontal_Stacked +Stacked USB A connector http://katalog.we-online.de/em/datasheet/61400826021.pdf +Wuerth stacked USB_A +0 +12 +9 +Connector_USB +USB_B_Amphenol_MUSB-D511_Vertical_Rugged +A,phenol MUSB_D511, USB B female connector, straight, rugged, https://www.amphenolcanada.com/ProductSearch/drawings/AC/MUSBD511XX.pdf +USB_B_MUSB_Straight female connector straight rugged MUSB D511 +0 +6 +5 +Connector_USB +USB_B_Lumberg_2411_02_Horizontal +USB 2.0 receptacle type B, horizontal version, through-hole, https://downloads.lumberg.com/datenblaetter/en/2411_02.pdf +USB B receptacle horizontal through-hole +0 +6 +5 +Connector_USB +USB_B_OST_USB-B1HSxx_Horizontal +USB B receptacle, Horizontal, through-hole, http://www.on-shore.com/wp-content/uploads/2015/09/usb-b1hsxx.pdf +USB-B receptacle horizontal through-hole +0 +6 +5 +Connector_USB +USB_B_TE_5787834_Vertical +http://www.mouser.com/ds/2/418/NG_CD_5787834_A4-669110.pdf +USB_B USB B vertical female connector +0 +6 +5 +Connector_USB +USB_C_Plug_JAE_DX07P024AJ1 +Universal Serial Bus (USB) Shielded I/O Plug, Type C, Right Angle, Surface Mount, https://www.jae.com/en/searchfilter/?topics_keyword=DX07P024AJ1&mainItemSelect=1 +USB Type-C Plug Edge Mount +0 +30 +25 +Connector_USB +USB_C_Plug_Molex_105444 +Universal Serial Bus (USB) Shielded I/O Plug, Type C, Right Angle, Surface Mount, http://www.molex.com/pdm_docs/sd/1054440001_sd.pdf +USB Type-C Plug Edge Mount +0 +24 +23 +Connector_USB +USB_C_Receptacle_Amphenol_12401548E4-2A +USB TYPE C, RA RCPT PCB, Hybrid, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401548E4%7e2A +USB C Type-C Receptacle Hybrid +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401548E4-2A_CircularHoles +USB TYPE C, RA RCPT PCB, Hybrid, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401548E4%7e2A +USB C Type-C Receptacle Hybrid +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401610E4-2A +USB TYPE C, RA RCPT PCB, SMT, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401610E4%7e2A +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_C_Receptacle_Amphenol_12401610E4-2A_CircularHoles +USB TYPE C, RA RCPT PCB, SMT, https://www.amphenolcanada.com/StockAvailabilityPrice.aspx?From=&PartNum=12401610E4%7e2A +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_C_Receptacle_GCT_USB4085 +USB 2.0 Type C Receptacle, https://gct.co/Files/Drawings/USB4085.pdf +USB Type-C Receptacle Through-hole Right angle +0 +20 +17 +Connector_USB +USB_C_Receptacle_HRO_TYPE-C-31-M-12 +USB Type-C receptacle for USB 2.0 and PD, http://www.krhro.com/uploads/soft/180320/1-1P320120243.pdf +usb usb-c 2.0 pd +0 +20 +17 +Connector_USB +USB_C_Receptacle_JAE_DX07S024WJ1R350 +http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ117219.pdf +USB C Type-C Receptacle SMD +0 +30 +25 +Connector_USB +USB_C_Receptacle_JAE_DX07S024WJ3R400 +USB TYPE C, VERT RCPT PCB, SMT, http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ117928.pdf +USB C Type-C Receptacle SMD +0 +28 +25 +Connector_USB +USB_C_Receptacle_Palconn_UTC16-G +http://www.palpilot.com/wp-content/uploads/2017/05/UTC027-GKN-OR-Rev-A.pdf +USB C Type-C Receptacle USB2.0 +0 +20 +17 +Connector_USB +USB_C_Receptacle_XKB_U262-16XN-4BVC11 +USB Type C, right-angle, SMT, https://datasheet.lcsc.com/szlcsc/1811141824_XKB-Enterprise-U262-161N-4BVC11_C319148.pdf +USB C Type-C Receptacle SMD +0 +20 +17 +Connector_USB +USB_Micro-AB_Molex_47590-0001 +Micro USB AB receptable, right-angle inverted (https://www.molex.com/pdm_docs/sd/475900001_sd.pdf) +Micro AB USB SMD +0 +14 +6 +Connector_USB +USB_Micro-B_Amphenol_10103594-0001LF_Horizontal +Micro USB Type B 10103594-0001LF, http://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10103594.pdf +USB USB_B USB_micro USB_OTG +0 +17 +6 +Connector_USB +USB_Micro-B_Amphenol_10104110_Horizontal +USB Micro-B, horizontal, https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10104110.pdf +USB Micro B horizontal +0 +9 +6 +Connector_USB +USB_Micro-B_Amphenol_10118194_Horizontal +USB Micro-B receptacle, horizontal, SMD, 10118194, https://cdn.amphenol-icc.com/media/wysiwyg/files/drawing/10118194.pdf +USB Micro B horizontal SMD +0 +17 +6 +Connector_USB +USB_Micro-B_GCT_USB3076-30-A +GCT Micro USB https://gct.co/files/drawings/usb3076.pdf +Micro-USB SMD Typ-B GCT +0 +11 +6 +Connector_USB +USB_Micro-B_Molex-105017-0001 +http://www.molex.com/pdm_docs/sd/1050170001_sd.pdf +Micro-USB SMD Typ-B +0 +13 +6 +Connector_USB +USB_Micro-B_Molex-105133-0001 +Molex Vertical Micro USB Typ-B (http://www.molex.com/pdm_docs/sd/1051330001_sd.pdf) +Micro-USB SMD Typ-B Vertical +0 +8 +6 +Connector_USB +USB_Micro-B_Molex-105133-0031 +Molex Vertical Micro USB Typ-B (http://www.molex.com/pdm_docs/sd/1051330031_sd.pdf) +Micro-USB SMD Typ-B Vertical +0 +8 +6 +Connector_USB +USB_Micro-B_Molex_47346-0001 +Micro USB B receptable with flange, bottom-mount, SMD, right-angle (http://www.molex.com/pdm_docs/sd/473460001_sd.pdf) +Micro B USB SMD +0 +11 +6 +Connector_USB +USB_Micro-B_Wuerth_614105150721_Vertical +USB Micro-B receptacle, through-hole, vertical, http://katalog.we-online.de/em/datasheet/614105150721.pdf +usb micro receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Wuerth_614105150721_Vertical_CircularHoles +USB Micro-B receptacle, through-hole, vertical, http://katalog.we-online.de/em/datasheet/614105150721.pdf +usb micro receptacle vertical +0 +7 +6 +Connector_USB +USB_Micro-B_Wuerth_629105150521 +USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf +usb micro receptacle +0 +9 +6 +Connector_USB +USB_Micro-B_Wuerth_629105150521_CircularHoles +USB Micro-B receptacle, http://www.mouser.com/ds/2/445/629105150521-469306.pdf +usb micro receptacle +0 +9 +6 +Connector_USB +USB_Mini-B_AdamTech_MUSB-B5-S-VT-TSMT-1_SMD_Vertical +http://www.adam-tech.com/upload/MUSB-B5-S-VT-TSMT-1.pdf +USB Mini-B +0 +7 +6 +Connector_USB +USB_Mini-B_Lumberg_2486_01_Horizontal +USB Mini-B 5-pin SMD connector, http://downloads.lumberg.com/datenblaetter/en/2486_01.pdf +USB USB_B USB_Mini connector +0 +9 +6 +Connector_USB +USB_Mini-B_Tensility_54-00023_Vertical +http://www.tensility.com/pdffiles/54-00023.pdf +usb mini receptacle vertical +0 +7 +6 +Connector_USB +USB_Mini-B_Tensility_54-00023_Vertical_CircularHoles +http://www.tensility.com/pdffiles/54-00023.pdf +usb mini receptacle vertical +0 +7 +6 +Connector_USB +USB_Mini-B_Wuerth_65100516121_Horizontal +Mini USB 2.0 Type B SMT Horizontal 5 Contacts (https://katalog.we-online.de/em/datasheet/65100516121.pdf) +Mini USB 2.0 Type B +0 +9 +6 +Connector_Wago +Wago_734-132_1x02_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-132 , 2 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +2 +2 +Connector_Wago +Wago_734-133_1x03_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-133 , 3 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +3 +3 +Connector_Wago +Wago_734-134_1x04_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-134 , 4 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +4 +4 +Connector_Wago +Wago_734-135_1x05_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-135 , 5 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +5 +5 +Connector_Wago +Wago_734-136_1x06_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-136 , 6 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +6 +6 +Connector_Wago +Wago_734-137_1x07_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-137 , 7 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +7 +7 +Connector_Wago +Wago_734-138_1x08_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-138 , 8 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +8 +8 +Connector_Wago +Wago_734-139_1x09_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-139 , 9 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +9 +9 +Connector_Wago +Wago_734-140_1x10_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-140 , 10 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +10 +10 +Connector_Wago +Wago_734-141_1x11_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-141 , 11 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +11 +11 +Connector_Wago +Wago_734-142_1x12_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-142 , 12 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +12 +12 +Connector_Wago +Wago_734-143_1x13_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-143 , 13 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +13 +13 +Connector_Wago +Wago_734-144_1x14_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-144 , 14 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +14 +14 +Connector_Wago +Wago_734-146_1x16_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-146 , 16 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +16 +16 +Connector_Wago +Wago_734-148_1x18_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-148 , 18 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +18 +18 +Connector_Wago +Wago_734-150_1x20_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-150 , 20 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +20 +20 +Connector_Wago +Wago_734-154_1x24_P3.50mm_Vertical +Molex 734 Male header (for PCBs); Straight solder pin 1 x 1 mm, 734-154 , 24 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago side entry +0 +24 +24 +Connector_Wago +Wago_734-162_1x02_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-162 , 2 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +2 +2 +Connector_Wago +Wago_734-163_1x03_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-163 , 3 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +3 +3 +Connector_Wago +Wago_734-164_1x04_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-164 , 4 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +4 +4 +Connector_Wago +Wago_734-165_1x05_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-165 , 5 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +5 +5 +Connector_Wago +Wago_734-166_1x06_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-166 , 6 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +6 +6 +Connector_Wago +Wago_734-167_1x07_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-167 , 7 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +7 +7 +Connector_Wago +Wago_734-168_1x08_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-168 , 8 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +8 +8 +Connector_Wago +Wago_734-169_1x09_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-169 , 9 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +9 +9 +Connector_Wago +Wago_734-170_1x10_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-170 , 10 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +10 +10 +Connector_Wago +Wago_734-171_1x11_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-171 , 11 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +11 +11 +Connector_Wago +Wago_734-172_1x12_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-172 , 12 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +12 +12 +Connector_Wago +Wago_734-173_1x13_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-173 , 13 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +13 +13 +Connector_Wago +Wago_734-174_1x14_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-174 , 14 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +14 +14 +Connector_Wago +Wago_734-176_1x16_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-176 , 16 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +16 +16 +Connector_Wago +Wago_734-178_1x18_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-178 , 18 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +18 +18 +Connector_Wago +Wago_734-180_1x20_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-180 , 20 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +20 +20 +Connector_Wago +Wago_734-184_1x24_P3.50mm_Horizontal +Molex 734 Male header (for PCBs); Angled solder pin 1 x 1 mm, 734-184 , 24 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator +connector Wago top entry +0 +24 +24 +Connector_Wire +SolderWire-0.1sqmm_1x01_D0.4mm_OD1mm +Soldered wire connection, for a single 0.1 mm² wire, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.1sqmm_1x01_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.1 mm² wire, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.1sqmm_1x01_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.1 mm² wire, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.1sqmm_1x02_P3.6mm_D0.4mm_OD1mm +Soldered wire connection, for 2 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.1sqmm_1x02_P3.6mm_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.1sqmm_1x02_P3.6mm_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.1sqmm_1x03_P3.6mm_D0.4mm_OD1mm +Soldered wire connection, for 3 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.1sqmm_1x03_P3.6mm_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.1sqmm_1x03_P3.6mm_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.1sqmm_1x04_P3.6mm_D0.4mm_OD1mm +Soldered wire connection, for 4 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.1sqmm_1x04_P3.6mm_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.1sqmm_1x04_P3.6mm_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.1sqmm_1x05_P3.6mm_D0.4mm_OD1mm +Soldered wire connection, for 5 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.1sqmm_1x05_P3.6mm_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.1sqmm_1x05_P3.6mm_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.1sqmm_1x06_P3.6mm_D0.4mm_OD1mm +Soldered wire connection, for 6 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.1sqmm_1x06_P3.6mm_D0.4mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.1sqmm_1x06_P3.6mm_D0.4mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.1 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1mm, size source Multi-Contact FLEXI-E 0.1 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.1sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.1mm +Soldered wire connection, for a single 0.5 mm² wire, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.5 mm² wire, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.5 mm² wire, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.3mm +Soldered wire connection, for a single 0.5 mm² wire, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.5 mm² wire, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x01_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.5 mm² wire, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.6mm_D0.9mm_OD2.1mm +Soldered wire connection, for 2 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.6mm_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.6mm_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.8mm_D0.9mm_OD2.3mm +Soldered wire connection, for 2 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.8mm_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x02_P4.8mm_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.6mm_D0.9mm_OD2.1mm +Soldered wire connection, for 3 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.6mm_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.6mm_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.8mm_D0.9mm_OD2.3mm +Soldered wire connection, for 3 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.8mm_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x03_P4.8mm_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.6mm_D0.9mm_OD2.1mm +Soldered wire connection, for 4 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.6mm_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.6mm_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.8mm_D0.9mm_OD2.3mm +Soldered wire connection, for 4 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.8mm_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x04_P4.8mm_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.6mm_D0.9mm_OD2.1mm +Soldered wire connection, for 5 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.6mm_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.6mm_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.8mm_D0.9mm_OD2.3mm +Soldered wire connection, for 5 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.8mm_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x05_P4.8mm_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.6mm_D0.9mm_OD2.1mm +Soldered wire connection, for 6 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.6mm_D0.9mm_OD2.1mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.6mm_D0.9mm_OD2.1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.5 mm² wires, basic insulation, conductor diameter 0.9mm, outer diameter 2.1mm, size source Multi-Contact FLEXI-E 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.8mm_D0.9mm_OD2.3mm +Soldered wire connection, for 6 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.8mm_D0.9mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.5sqmm_1x06_P4.8mm_D0.9mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.5 mm² wires, reinforced insulation, conductor diameter 0.9mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-xV 0.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.15sqmm_1x01_D0.5mm_OD1.5mm +Soldered wire connection, for a single 0.15 mm² wire, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.15sqmm_1x01_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.15 mm² wire, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.15sqmm_1x01_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.15 mm² wire, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.15sqmm_1x02_P4mm_D0.5mm_OD1.5mm +Soldered wire connection, for 2 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.15sqmm_1x02_P4mm_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.15sqmm_1x02_P4mm_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.15sqmm_1x03_P4mm_D0.5mm_OD1.5mm +Soldered wire connection, for 3 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.15sqmm_1x03_P4mm_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.15sqmm_1x03_P4mm_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.15sqmm_1x04_P4mm_D0.5mm_OD1.5mm +Soldered wire connection, for 4 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.15sqmm_1x04_P4mm_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.15sqmm_1x04_P4mm_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.15sqmm_1x05_P4mm_D0.5mm_OD1.5mm +Soldered wire connection, for 5 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.15sqmm_1x05_P4mm_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.15sqmm_1x05_P4mm_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.15sqmm_1x06_P4mm_D0.5mm_OD1.5mm +Soldered wire connection, for 6 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.15sqmm_1x06_P4mm_D0.5mm_OD1.5mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.15sqmm_1x06_P4mm_D0.5mm_OD1.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.15 mm² wires, basic insulation, conductor diameter 0.5mm, outer diameter 1.5mm, size source Multi-Contact FLEXI-E 0.15 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.15sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD1.7mm +Soldered wire connection, for a single 0.25 mm² wire, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.25 mm² wire, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.25 mm² wire, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD2mm +Soldered wire connection, for a single 0.25 mm² wire, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.25 mm² wire, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x01_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.25 mm² wire, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.2mm_D0.65mm_OD1.7mm +Soldered wire connection, for 2 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.2mm_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.2mm_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.5mm_D0.65mm_OD2mm +Soldered wire connection, for 2 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.5mm_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x02_P4.5mm_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.2mm_D0.65mm_OD1.7mm +Soldered wire connection, for 3 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.2mm_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.2mm_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.5mm_D0.65mm_OD2mm +Soldered wire connection, for 3 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.5mm_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x03_P4.5mm_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.2mm_D0.65mm_OD1.7mm +Soldered wire connection, for 4 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.2mm_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.2mm_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.5mm_D0.65mm_OD2mm +Soldered wire connection, for 4 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.5mm_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x04_P4.5mm_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.2mm_D0.65mm_OD1.7mm +Soldered wire connection, for 5 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.2mm_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.2mm_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.5mm_D0.65mm_OD2mm +Soldered wire connection, for 5 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.5mm_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x05_P4.5mm_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.2mm_D0.65mm_OD1.7mm +Soldered wire connection, for 6 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.2mm_D0.65mm_OD1.7mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.2mm_D0.65mm_OD1.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.25 mm² wires, basic insulation, conductor diameter 0.65mm, outer diameter 1.7mm, size source Multi-Contact FLEXI-E_0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.5mm_D0.65mm_OD2mm +Soldered wire connection, for 6 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.5mm_D0.65mm_OD2mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.25sqmm_1x06_P4.5mm_D0.65mm_OD2mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.25 mm² wires, reinforced insulation, conductor diameter 0.65mm, outer diameter 2mm, size source Multi-Contact FLEXI-2V 0.25 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.25sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm +Soldered wire connection, for a single 0.75 mm² wire, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.75 mm² wire, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.75 mm² wire, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD3.5mm +Soldered wire connection, for a single 0.75 mm² wire, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.75 mm² wire, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x01_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.75 mm² wire, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.75sqmm_1x02_P4.8mm_D1.25mm_OD2.3mm +Soldered wire connection, for 2 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x02_P4.8mm_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x02_P4.8mm_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x02_P7mm_D1.25mm_OD3.5mm +Soldered wire connection, for 2 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x02_P7mm_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x02_P7mm_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.75sqmm_1x03_P4.8mm_D1.25mm_OD2.3mm +Soldered wire connection, for 3 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x03_P4.8mm_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x03_P4.8mm_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x03_P7mm_D1.25mm_OD3.5mm +Soldered wire connection, for 3 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x03_P7mm_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x03_P7mm_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.75sqmm_1x04_P4.8mm_D1.25mm_OD2.3mm +Soldered wire connection, for 4 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x04_P4.8mm_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x04_P4.8mm_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x04_P7mm_D1.25mm_OD3.5mm +Soldered wire connection, for 4 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x04_P7mm_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x04_P7mm_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.75sqmm_1x05_P4.8mm_D1.25mm_OD2.3mm +Soldered wire connection, for 5 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x05_P4.8mm_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x05_P4.8mm_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x05_P7mm_D1.25mm_OD3.5mm +Soldered wire connection, for 5 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x05_P7mm_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x05_P7mm_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.75sqmm_1x06_P4.8mm_D1.25mm_OD2.3mm +Soldered wire connection, for 6 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x06_P4.8mm_D1.25mm_OD2.3mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x06_P4.8mm_D1.25mm_OD2.3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.75 mm² wires, basic insulation, conductor diameter 1.25mm, outer diameter 2.3mm, size source Multi-Contact FLEXI-E 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x06_P7mm_D1.25mm_OD3.5mm +Soldered wire connection, for 6 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x06_P7mm_D1.25mm_OD3.5mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.75sqmm_1x06_P7mm_D1.25mm_OD3.5mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.75 mm² wires, reinforced insulation, conductor diameter 1.25mm, outer diameter 3.5mm, size source Multi-Contact FLEXI-xV 0.75 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.75sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.127sqmm_1x01_D0.48mm_OD1mm +Soldered wire connection, for a single 0.127 mm² wire, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +1 +1 +Connector_Wire +SolderWire-0.127sqmm_1x01_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for a single 0.127 mm² wire, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.127sqmm_1x01_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 0.127 mm² wire, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-0.127sqmm_1x02_P3.7mm_D0.48mm_OD1mm +Soldered wire connection, for 2 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +2 +2 +Connector_Wire +SolderWire-0.127sqmm_1x02_P3.7mm_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.127sqmm_1x02_P3.7mm_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-0.127sqmm_1x03_P3.7mm_D0.48mm_OD1mm +Soldered wire connection, for 3 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +3 +3 +Connector_Wire +SolderWire-0.127sqmm_1x03_P3.7mm_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.127sqmm_1x03_P3.7mm_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-0.127sqmm_1x04_P3.7mm_D0.48mm_OD1mm +Soldered wire connection, for 4 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +4 +4 +Connector_Wire +SolderWire-0.127sqmm_1x04_P3.7mm_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.127sqmm_1x04_P3.7mm_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-0.127sqmm_1x05_P3.7mm_D0.48mm_OD1mm +Soldered wire connection, for 5 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +5 +5 +Connector_Wire +SolderWire-0.127sqmm_1x05_P3.7mm_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.127sqmm_1x05_P3.7mm_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-0.127sqmm_1x06_P3.7mm_D0.48mm_OD1mm +Soldered wire connection, for 6 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm +0 +6 +6 +Connector_Wire +SolderWire-0.127sqmm_1x06_P3.7mm_D0.48mm_OD1mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-0.127sqmm_1x06_P3.7mm_D0.48mm_OD1mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 0.127 mm² wires, basic insulation, conductor diameter 0.48mm, outer diameter 1mm, size source Multi-Contact FLEXI-E/HK 0.127 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 0.127sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3.9mm +Soldered wire connection, for a single 1.5 mm² wire, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for a single 1.5 mm² wire, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 1.5 mm² wire, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3mm +Soldered wire connection, for a single 1.5 mm² wire, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for a single 1.5 mm² wire, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x01_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 1.5 mm² wire, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1.5sqmm_1x02_P6mm_D1.7mm_OD3mm +Soldered wire connection, for 2 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x02_P6mm_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x02_P6mm_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x02_P7.8mm_D1.7mm_OD3.9mm +Soldered wire connection, for 2 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x02_P7.8mm_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x02_P7.8mm_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1.5sqmm_1x03_P6mm_D1.7mm_OD3mm +Soldered wire connection, for 3 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x03_P6mm_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x03_P6mm_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x03_P7.8mm_D1.7mm_OD3.9mm +Soldered wire connection, for 3 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x03_P7.8mm_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x03_P7.8mm_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1.5sqmm_1x04_P6mm_D1.7mm_OD3mm +Soldered wire connection, for 4 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x04_P6mm_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x04_P6mm_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x04_P7.8mm_D1.7mm_OD3.9mm +Soldered wire connection, for 4 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x04_P7.8mm_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x04_P7.8mm_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1.5sqmm_1x05_P6mm_D1.7mm_OD3mm +Soldered wire connection, for 5 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x05_P6mm_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x05_P6mm_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x05_P7.8mm_D1.7mm_OD3.9mm +Soldered wire connection, for 5 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x05_P7.8mm_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x05_P7.8mm_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1.5sqmm_1x06_P6mm_D1.7mm_OD3mm +Soldered wire connection, for 6 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x06_P6mm_D1.7mm_OD3mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x06_P6mm_D1.7mm_OD3mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 1.5 mm² wires, basic insulation, conductor diameter 1.7mm, outer diameter 3mm, size source Multi-Contact FLEXI-E 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x06_P7.8mm_D1.7mm_OD3.9mm +Soldered wire connection, for 6 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x06_P7.8mm_D1.7mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1.5sqmm_1x06_P7.8mm_D1.7mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD2.7mm +Soldered wire connection, for a single 1 mm² wire, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for a single 1 mm² wire, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 1 mm² wire, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD3.9mm +Soldered wire connection, for a single 1 mm² wire, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for a single 1 mm² wire, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x01_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 1 mm² wire, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-1sqmm_1x02_P5.4mm_D1.4mm_OD2.7mm +Soldered wire connection, for 2 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x02_P5.4mm_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x02_P5.4mm_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x02_P7.8mm_D1.4mm_OD3.9mm +Soldered wire connection, for 2 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x02_P7.8mm_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x02_P7.8mm_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-1sqmm_1x03_P5.4mm_D1.4mm_OD2.7mm +Soldered wire connection, for 3 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x03_P5.4mm_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x03_P5.4mm_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x03_P7.8mm_D1.4mm_OD3.9mm +Soldered wire connection, for 3 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x03_P7.8mm_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x03_P7.8mm_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-1sqmm_1x04_P5.4mm_D1.4mm_OD2.7mm +Soldered wire connection, for 4 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x04_P5.4mm_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x04_P5.4mm_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x04_P7.8mm_D1.4mm_OD3.9mm +Soldered wire connection, for 4 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x04_P7.8mm_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x04_P7.8mm_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-1sqmm_1x05_P5.4mm_D1.4mm_OD2.7mm +Soldered wire connection, for 5 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x05_P5.4mm_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x05_P5.4mm_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x05_P7.8mm_D1.4mm_OD3.9mm +Soldered wire connection, for 5 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x05_P7.8mm_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x05_P7.8mm_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-1sqmm_1x06_P5.4mm_D1.4mm_OD2.7mm +Soldered wire connection, for 6 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x06_P5.4mm_D1.4mm_OD2.7mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x06_P5.4mm_D1.4mm_OD2.7mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 1 mm² wires, basic insulation, conductor diameter 1.4mm, outer diameter 2.7mm, size source Multi-Contact FLEXI-E 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x06_P7.8mm_D1.4mm_OD3.9mm +Soldered wire connection, for 6 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x06_P7.8mm_D1.4mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-1sqmm_1x06_P7.8mm_D1.4mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 1 mm² wires, reinforced insulation, conductor diameter 1.4mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 1sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD3.6mm +Soldered wire connection, for a single 2.5 mm² wire, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for a single 2.5 mm² wire, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 2.5 mm² wire, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm +Soldered wire connection, for a single 2.5 mm² wire, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for a single 2.5 mm² wire, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x01_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 2.5 mm² wire, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2.5sqmm_1x02_P7.2mm_D2.4mm_OD3.6mm +Soldered wire connection, for 2 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x02_P7.2mm_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x02_P7.2mm_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x02_P8.8mm_D2.4mm_OD4.4mm +Soldered wire connection, for 2 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x02_P8.8mm_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x02_P8.8mm_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2.5sqmm_1x03_P7.2mm_D2.4mm_OD3.6mm +Soldered wire connection, for 3 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x03_P7.2mm_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x03_P7.2mm_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x03_P8.8mm_D2.4mm_OD4.4mm +Soldered wire connection, for 3 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x03_P8.8mm_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x03_P8.8mm_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2.5sqmm_1x04_P7.2mm_D2.4mm_OD3.6mm +Soldered wire connection, for 4 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x04_P7.2mm_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x04_P7.2mm_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x04_P8.8mm_D2.4mm_OD4.4mm +Soldered wire connection, for 4 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x04_P8.8mm_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x04_P8.8mm_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2.5sqmm_1x05_P7.2mm_D2.4mm_OD3.6mm +Soldered wire connection, for 5 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x05_P7.2mm_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x05_P7.2mm_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x05_P8.8mm_D2.4mm_OD4.4mm +Soldered wire connection, for 5 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x05_P8.8mm_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x05_P8.8mm_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2.5sqmm_1x06_P7.2mm_D2.4mm_OD3.6mm +Soldered wire connection, for 6 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x06_P7.2mm_D2.4mm_OD3.6mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x06_P7.2mm_D2.4mm_OD3.6mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 2.5 mm² wires, basic insulation, conductor diameter 2.4mm, outer diameter 3.6mm, size source Multi-Contact FLEXI-E 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x06_P8.8mm_D2.4mm_OD4.4mm +Soldered wire connection, for 6 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x06_P8.8mm_D2.4mm_OD4.4mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2.5sqmm_1x06_P8.8mm_D2.4mm_OD4.4mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 2.5 mm² wires, reinforced insulation, conductor diameter 2.4mm, outer diameter 4.4mm, size source Multi-Contact FLEXI-xV 2.5 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2.5sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2sqmm_1x01_D2mm_OD3.9mm +Soldered wire connection, for a single 2 mm² wire, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +1 +1 +Connector_Wire +SolderWire-2sqmm_1x01_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for a single 2 mm² wire, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2sqmm_1x01_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for a single 2 mm² wire, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +1 +1 +Connector_Wire +SolderWire-2sqmm_1x02_P7.8mm_D2mm_OD3.9mm +Soldered wire connection, for 2 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +2 +2 +Connector_Wire +SolderWire-2sqmm_1x02_P7.8mm_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 2 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2sqmm_1x02_P7.8mm_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 2 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +2 +2 +Connector_Wire +SolderWire-2sqmm_1x03_P7.8mm_D2mm_OD3.9mm +Soldered wire connection, for 3 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +3 +3 +Connector_Wire +SolderWire-2sqmm_1x03_P7.8mm_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 3 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2sqmm_1x03_P7.8mm_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 3 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +3 +3 +Connector_Wire +SolderWire-2sqmm_1x04_P7.8mm_D2mm_OD3.9mm +Soldered wire connection, for 4 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +4 +4 +Connector_Wire +SolderWire-2sqmm_1x04_P7.8mm_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 4 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2sqmm_1x04_P7.8mm_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 4 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +4 +4 +Connector_Wire +SolderWire-2sqmm_1x05_P7.8mm_D2mm_OD3.9mm +Soldered wire connection, for 5 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +5 +5 +Connector_Wire +SolderWire-2sqmm_1x05_P7.8mm_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 5 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2sqmm_1x05_P7.8mm_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 5 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +5 +5 +Connector_Wire +SolderWire-2sqmm_1x06_P7.8mm_D2mm_OD3.9mm +Soldered wire connection, for 6 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm +0 +6 +6 +Connector_Wire +SolderWire-2sqmm_1x06_P7.8mm_D2mm_OD3.9mm_Relief +Soldered wire connection with feed through strain relief, for 6 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm strain-relief +0 +6 +6 +Connector_Wire +SolderWire-2sqmm_1x06_P7.8mm_D2mm_OD3.9mm_Relief2x +Soldered wire connection with double feed through strain relief, for 6 times 2 mm² wires, reinforced insulation, conductor diameter 2mm, outer diameter 3.9mm, size source Multi-Contact FLEXI-xV 2.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator +connector wire 2sqmm double-strain-relief +0 +6 +6 +Connector_Wire +SolderWirePad_1x01_SMD_1x2mm +Wire Pad, Square, SMD Pad, 5mm x 10mm, +MesurementPoint Square SMDPad 5mmx10mm +0 +1 +1 +Connector_Wire +SolderWirePad_1x01_SMD_5x10mm +Wire Pad, Square, SMD Pad, 5mm x 10mm, +MesurementPoint Square SMDPad 5mmx10mm +0 +1 +1 +Connector_Wuerth +Wuerth_WR-WTB_64800211622_1x02_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800211622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +2 +2 +Connector_Wuerth +Wuerth_WR-WTB_64800311622_1x03_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800311622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +3 +3 +Connector_Wuerth +Wuerth_WR-WTB_64800411622_1x04_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800411622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +4 +4 +Connector_Wuerth +Wuerth_WR-WTB_64800511622_1x05_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800511622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +5 +5 +Connector_Wuerth +Wuerth_WR-WTB_64800611622_1x06_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800611622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +6 +6 +Connector_Wuerth +Wuerth_WR-WTB_64800711622_1x07_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800711622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +7 +7 +Connector_Wuerth +Wuerth_WR-WTB_64800811622_1x08_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800811622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +8 +8 +Connector_Wuerth +Wuerth_WR-WTB_64800911622_1x09_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64800911622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +9 +9 +Connector_Wuerth +Wuerth_WR-WTB_64801011622_1x10_P1.50mm_Vertical +Wuerth WR-WTB series connector, 64801011622 (https://katalog.we-online.com/em/datasheet/6480xx11622.pdf), generated with kicad-footprint-generator +connector Wuerth WR-WTB vertical +0 +10 +10 +Converter_ACDC +Converter_ACDC_CUI_PBO-3-Sxx_THT_Vertical +ACDC-Converter, 3W, CUI PBO-3, THT https://www.cui.com/product/resource/pbo-3.pdf +Converter AC-DC THT Vertical +0 +6 +6 +Converter_ACDC +Converter_ACDC_Hahn_HS-400xx_THT +ACDC-Converter, 3W, Hahn-HS-400xx, THT https://www.schukat.com/schukat/schukat_cms_de.nsf/index/FrameView?OpenDocument&art=HS40009&wg=M7942 +Hahn ACDC-Converter THT +0 +4 +4 +Converter_ACDC +Converter_ACDC_HiLink_HLK-PMxx +ACDC-Converter, 3W, HiLink, HLK-PMxx, THT, http://www.hlktech.net/product_detail.php?ProId=54 +ACDC-Converter 3W THT HiLink board mount module +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-02-xx_SMD +ACDC-Converter, 3W, Meanwell, IRM-02, SMD, https://www.meanwell.com/Upload/PDF/IRM-02/IRM-02-SPEC.PDF +ACDC-Converter 3W +0 +14 +14 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-02-xx_THT +ACDC-Converter, 2W, Meanwell, IRM-02, THT, https://www.meanwell.co.uk/media/productPDF/IRM-02-spec.pdf +ACDC-Converter 2W THT +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-03-xx_SMD +ACDC-Converter, 3W, Meanwell, IRM-03, SMD, http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-03 +ACDC-Converter 3W +0 +14 +14 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-03-xx_THT +ACDC-Converter, 3W, Meanwell, IRM-03, THT, https://www.meanwell.com/Upload/PDF/IRM-03/IRM-03-SPEC.PDF +ACDC-Converter 3W THT +0 +5 +5 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-05-xx_THT +http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-05 +ACDC-Converter 5W Meanwell IRM-05 +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-10-xx_THT +http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-10 +ACDC-Converter 10W Meanwell IRM-10 +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-20-xx_THT +ACDC-Converter, 20W, Meanwell, IRM-20, THT http://www.meanwell.com/webapp/product/search.aspx?prod=IRM-20 +ACDC-Converter 20W Meanwell IRM-20 +0 +4 +4 +Converter_ACDC +Converter_ACDC_MeanWell_IRM-60-xx_THT +ACDC-Converter, 50-60W, Meanwell, IRM-60, THT https://www.meanwellusa.com/productPdf.aspx?i=687 +switching power supply +0 +4 +4 +Converter_ACDC +Converter_ACDC_RECOM_RAC01-xxSGB_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC01-GB.pdf +recom power ac dc rac01xxgb rac01-05sgb rac01-12sgb +0 +4 +4 +Converter_ACDC +Converter_ACDC_RECOM_RAC04-xxSGx_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC04-GA.pdf +recom power ac dc +0 +5 +5 +Converter_ACDC +Converter_ACDC_RECOM_RAC05-xxSK_THT +https://www.recom-power.com/pdf/Powerline-AC-DC/RAC05-K.pdf +recom power ac dc +0 +5 +5 +Converter_ACDC +Converter_ACDC_TRACO_TMG-15_THT +ACDC-Converter, TRACO, TMG Series 15 https://www.tracopower.com/products/tmg.pdf +ACDC-Converter TRACO TMG Series 15 +0 +4 +4 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-04_THT +ACDC-Converter, TRACO, TMLM Series 04 https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM Series 04 +0 +7 +7 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-05_THT +ACDC-Converter, TRACO TMLM 05,https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM 05 +0 +4 +4 +Converter_ACDC +Converter_ACDC_TRACO_TMLM-10-20_THT +ACDC-Converter, TRACO TMLM 10, TRACO TMLM 20, https://www.tracopower.com/products/tmlm.pdf +ACDC-Converter TRACO TMLM 10 and TMLM 20 +0 +4 +4 +Converter_ACDC +Converter_ACDC_Vigortronix_VTX-214-010-xxx_THT +Vigortronix VTX-214-010-xxx serie of ACDC converter, http://www.vigortronix.com/10WattACDCPCBPowerModule.aspx +Vigortronix VTX-214-010-xxx serie of ACDC converter +0 +4 +4 +Converter_ACDC +Converter_ACDC_Vigortronix_VTX-214-015-1xx_THT +Vigortronix VTX-214-010-xxx serie of ACDC converter, http://www.vigortronix.com/10WattACDCPCBPowerModule.aspx +Vigortronix VTX-214-010-xxx serie of ACDC converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_Artesyn_ATA_SMD +DCDC-Converter, Artesyn, ATA Series, 3W Single and Dual Output, 1500VDC Isolation, 24.0x13.7x8.0mm https://www.artesyn.com/power/assets/ata_series_ds_01apr2015_79c25814fd.pdf https://www.artesyn.com/power/assets/trn_dc-dc_ata_3w_series_releas1430412818_techref.pdf +DCDC SMD +0 +7 +7 +Converter_DCDC +Converter_DCDC_Bothhand_CFUDxxxx_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +10 +10 +Converter_DCDC +Converter_DCDC_Bothhand_CFUSxxxxEH_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +9 +9 +Converter_DCDC +Converter_DCDC_Bothhand_CFUSxxxx_THT +DCDC-Converter, BOTHHAND, Type CFxxxx-Serie, (Very dodgy url but was the only at hand), +DCDC-Converter BOTHHAND Type CFxxxx-Serie +0 +8 +8 +Converter_DCDC +Converter_DCDC_Cincon_EC5BExx_Dual_THT +DCDC-Converter, CINCON, EC5BExx, 18-36VDC to Dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf +DCDC-Converter CINCON EC5BExx 18-36VDC to Dual output +0 +6 +6 +Converter_DCDC +Converter_DCDC_Cincon_EC5BExx_Single_THT +DCDC-Converter, CINCON, EC5BExx, 18-36VDC to dual output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/B%20CASE/SPEC-EC5BE-V24.pdf +DCDC-Converter CINCON EC5BExx 18-36VDC to dual output +0 +4 +4 +Converter_DCDC +Converter_DCDC_Cincon_EC6Cxx_Dual-Triple_THT +DCDC-Converter, CINCON, EC6Cxx, dual or tripple output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/C%20CASE/SPEC-EC6C-V12.pdf +DCDC-Converter CINCON EC6Cxx dual or tripple output +0 +7 +7 +Converter_DCDC +Converter_DCDC_Cincon_EC6Cxx_Single_THT +DCDC-Converter, CINCON, EC6Cxx, single output, http://www.cincon.com/upload/media/data%20sheets/Data%20Sheet%20(DC)/C%20CASE/SPEC-EC6C-V12.pdf +DCDC-Converter CINCON EC6Cxx single output +0 +6 +6 +Converter_DCDC +Converter_DCDC_Cyntec_MUN12AD01-SH +http://www.cyntec.com/upfile/products/download/Cyntec%20MUN12AD01-SH_Datasheet.pdf +Power Module uPOL MUN12AD01 +0 +13 +9 +Converter_DCDC +Converter_DCDC_Cyntec_MUN12AD03-SH +http://www.cyntec.com/upfile/products/download/Cyntec%20MUN12AD03-SH_Datasheet.pdf +Power Module uPOL MUN12AD03 +0 +19 +11 +Converter_DCDC +Converter_DCDC_MeanWell_NID30_THT +Meanwell DCDC non-isolated converter SIP module, http://www.meanwell.com/webapp/product/search.aspx?prod=nid30 +DCDC non-isolated converter +0 +11 +11 +Converter_DCDC +Converter_DCDC_MeanWell_NID60_THT +MeanWell NID60, http://www.meanwell.com/Upload/PDF/NID60/NID60-SPEC.PDF +MeanWell NID60 +0 +11 +11 +Converter_DCDC +Converter_DCDC_Murata_MEE1SxxxxSC_THT +https://power.murata.com/pub/data/power/ncl/kdc_mee1.pdf +murata dc-dc transformer +0 +4 +4 +Converter_DCDC +Converter_DCDC_Murata_MEE3SxxxxSC_THT +https://power.murata.com/pub/data/power/ncl/kdc_mee3.pdf +murata dc-dc transformer +0 +4 +4 +Converter_DCDC +Converter_DCDC_Murata_MGJ2DxxxxxxSC_THT +Murata MGJ2DxxxxxxSC, 19.5x9.8x12.5mm, 5.2kVDC Isolated, 2W, SIP package style, https://power.murata.com/data/power/ncl/kdc_mgj2.pdf +Murata MGJ2DxxxxxxSC +0 +5 +5 +Converter_DCDC +Converter_DCDC_Murata_MGJ3 +Murata MGJ3, 5.2kVDC Isolated 3W Gate Drive, 15V/5V/5V Configurable, 22.61x23.11x14.19mm, https://power.murata.com/datasheet?/data/power/ncl/kdc_mgj3.pdf +DCDC SMD +0 +7 +7 +Converter_DCDC +Converter_DCDC_Murata_NCS1SxxxxSC_THT +Murata NCS1SxxxxSC https://power.murata.com/data/power/ncl/kdc_ncs1.pdf (Script generated with StandardBox.py) (Murata NCS1SxxxxSC https://power.murata.com/data/power/ncl/kdc_ncs1.pdf) +Murata NCS1SxxxxSC +0 +5 +5 +Converter_DCDC +Converter_DCDC_RECOM_R-78B-2.0_THT +DCDC-Converter, RECOM, RECOM_R-78B-2.0, SIP-3, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78Bxx-2.0.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78E-0.5_THT +DCDC-Converter, RECOM, RECOM_R-78E-0.5, SIP-3, pitch 2.54mm, package size 11.6x8.5x10.4mm^3, https://www.recom-power.com/pdf/Innoline/R-78Exx-0.5.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78HB-0.5L_THT +DCDC-Converter, RECOM, RECOM_R-78HB-0.5L, SIP-3, Horizontally Mounted, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78HBxx-0.5_L.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78HB-0.5_THT +DCDC-Converter, RECOM, RECOM_R-78HB-0.5, SIP-3, pitch 2.54mm, package size 11.5x8.5x17.5mm^3, https://www.recom-power.com/pdf/Innoline/R-78HBxx-0.5_L.pdf +dc-dc recom buck sip-3 pitch 2.54mm +0 +3 +3 +Converter_DCDC +Converter_DCDC_RECOM_R-78S-0.1_THT +DCDC-Converter, RECOM, RECOM_R-78S-0.1, SIP-4, pitch 2.54mm, package size 11.6x8.5x10.4mm^3, https://www.recom-power.com/pdf/Innoline/R-78Sxx-0.1.pdf +dc-dc recom buck sip-4 pitch 2.54mm +0 +4 +4 +Converter_DCDC +Converter_DCDC_RECOM_R5xxxDA_THT +DCDC-Converter, RECOM, RECOM_R5xxxDA, SIP-12, Horizontally Mounted, pitch 2.54mm, package size 32.2x9.1x15mm^3, https://www.recom-power.com/pdf/Innoline/R-5xxxPA_DA.pdf +dc-dc recom buck sip-12 pitch 2.54mm +0 +12 +12 +Converter_DCDC +Converter_DCDC_RECOM_R5xxxPA_THT +DCDC-Converter, RECOM, RECOM_R5xxxPA, SIP-12, pitch 2.54mm, package size 32.2x9.1x15mm^3, https://www.recom-power.com/pdf/Innoline/R-5xxxPA_DA.pdf +dc-dc recom buck sip-12 pitch 2.54mm +0 +12 +12 +Converter_DCDC +Converter_DCDC_RECOM_RPA60-xxxxSFW +RPA60-FW 60W Isolated DC to DC Converters +DCDC Regulator Single +0 +6 +6 +Converter_DCDC +Converter_DCDC_RECOM_RPMx.x-x.0 +https://www.recom-power.com/pdf/Innoline/RPM-6.0.pdf +dc-dc recom buck lga-25 pitch 2.29mm +0 +25 +25 +Converter_DCDC +Converter_DCDC_TRACO_TDN_5-xxxxWISM_SMD +Traco TDN 5WISM Series, 5W, SMD (https://assets.tracopower.com/20200225170127/TDN5WISM/documents/tdn5wism-datasheet.pdf#page=3) +dcdc traco 5w smd +0 +6 +6 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_Dual_THT +DCDC-Converter, TRACO, TEN10-xxxx, single output, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx single output +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_Single_THT +DCDC-Converter, TRACO, TEN10-xxxx, single output, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx single output +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TEN10-xxxx_THT +DCDC-Converter, TRACO, TEN10-xxxx, https://assets.tracopower.com/20171102100522/TEN10/documents/ten10-datasheet.pdf +DCDC-Converter TRACO TEN10-xxxx +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TEN20-xxxx-N4_THT +DCDC-Converter TRACO TEN20 Generic, https://assets.tracopower.com/20171102100522/TEN20/documents/ten20-datasheet.pdf +DCDC-Converter TRACO TEN20 Generic +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TEN20-xxxx_THT +DCDC-Converter TRACO TEN20 Generic, https://assets.tracopower.com/20171102100522/TEN20/documents/ten20-datasheet.pdf +DCDC-Converter TRACO TEN20 Generic +0 +6 +6 +Converter_DCDC +Converter_DCDC_TRACO_THD_15-xxxxWIN_THT +Traco THD 15WIN, 15W, THT (https://www.tracopower.com/products/thd15win.pdf#page=3) +traco dcdc tht 15w +0 +9 +9 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1-xxxx_Dual_THT +DCDC-Converter, TRACO, TMR 1-xxxx, Dual output, Rev. March 21.2016 +DCDC-Converter TRACO TMR1-xxxx Dual_output +0 +5 +5 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1-xxxx_Single_THT +DCDC-Converter, TRACO, TMR 1-xxxx, Single output, Rev. March 21.2016 +DCDC-Converter TRACO TMR1-xxxx Single_output +0 +4 +4 +Converter_DCDC +Converter_DCDC_TRACO_TMR-1SM_SMD +http://assets.tracopower.com/TMR1SM/documents/tmr1sm-datasheet.pdf +DCDC SMD TRACO TMR-1SM +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TMR-2xxxxWI_THT +https://www.tracopower.com/products/tmr2wi.pdf +DCDC-Converter TRACO TMRxxxxWI Single/Dual_output +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TMR-xxxx_THT +DCDC-Converter, TRACO, TMR xxxx, Single/Dual output, http://www.datasheetlib.com/datasheet/135136/tmr-2-2410e_traco-power.html?page=3#datasheet +DCDC-Converter TRACO TMRxxxx Single/Dual_output +0 +7 +7 +Converter_DCDC +Converter_DCDC_TRACO_TSR-1_THT +DCDC-Converter, TRACO, TSR 1-xxxx +DCDC-Converter TRACO TSR-1 +0 +3 +3 +Converter_DCDC +Converter_DCDC_XP_POWER-IA48xxD_THT +XP_POWER IA48xxD, DIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IA48xxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IA48xxS_THT +XP_POWER IA48xxS, SIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IA48xxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IAxxxxD_THT +XP_POWER IAxxxxD, DIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IAxxxxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IAxxxxS_THT +XP_POWER IAxxxxS, SIP, (https://www.xppower.com/pdfs/SF_IA.pdf), generated with kicad-footprint-generator +XP_POWER IAxxxxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxDH_THT +XP_POWER IHxxxxDH, DIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxDH DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxD_THT +XP_POWER IHxxxxD, DIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxD DIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxSH_THT +XP_POWER IHxxxxSH, SIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxSH SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-IHxxxxS_THT +XP_POWER IHxxxxS, SIP, (https://www.xppower.com/pdfs/SF_IH.pdf), generated with kicad-footprint-generator +XP_POWER IHxxxxS SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-ISU02_SMD +DCDC-Converter, XP POWER, ISU02 Series, 2W Single and Dual Output, 1500VDC Isolation, 19.0x17.0x8.7mm https://www.xppower.com/Portals/0/pdfs/SF_ISU02.pdf +DCDC SMD XP POWER ISU02 +0 +7 +7 +Converter_DCDC +Converter_DCDC_XP_POWER-ITQxxxxS-H_THT +XP_POWER ITQxxxxS-H, SIP, (https://www.xppower.com/pdfs/SF_ITQ.pdf), generated with kicad-footprint-generator +XP_POWER ITQxxxxS-H SIP DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER-ITXxxxxSA_THT +XP_POWER ITXxxxxSA, SIP, (https://www.xppower.com/pdfs/SF_ITX.pdf), generated with kicad-footprint-generator +XP_POWER ITXxxxxSA SIP DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_XP_POWER-ITxxxxxS_THT +XP_POWER ITxxxxxS, SIP, (https://www.xppower.com/portals/0/pdfs/SF_ITX.pdf https://www.xppower.com/portals/0/pdfs/SF_ITQ.pdf), generated with kicad-footprint-generator +XP_POWER ITxxxxxS SIP DCDC-Converter +0 +7 +7 +Converter_DCDC +Converter_DCDC_XP_POWER_JTDxxxxxxx_THT +XP Power JTD Series DC-DC Converter +DCDC Isolated +0 +6 +6 +Converter_DCDC +Converter_DCDC_XP_POWER_JTExxxxDxx_THT +DCDC-Converter, XP POWER, Type JTE06 Series, Dual Output +DCDC-Converter XP_POWER JTE06 Dual +0 +8 +8 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxx3C_THT +Isolated 1W single output DC/DC, http://power.murata.com/data/power/ncl/kdc_cre1.pdf +Isolated 1W single output DC/DC +0 +4 +4 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxxDC_THT +Isloated DC-DC, http://power.murata.com/data/power/ncl/kdc_cre1.pdf +Isloated DC-DC +0 +4 +4 +Converter_DCDC +Converter_DCDC_muRata_CRE1xxxxxxSC_THT +http://power.murata.com/data/power/ncl/kdc_cre1.pdf +murata dc-dc transformer +0 +4 +4 +Converter_DCDC +Converter_DCDC_muRata_NMAxxxxDC_THT +Isolated 1W DCDC-Converter, http://power.murata.com/data/power/ncl/kdc_nma.pdf +Isolated 1W DCDC-Converter +0 +6 +6 +Converter_DCDC +Converter_DCDC_muRata_NMAxxxxSC_THT +muRata NMAxxxxSC footprint based on SIP7, http://power.murata.com/data/power/ncl/kdc_nma.pdf +muRata NMAxxxxSC DCDC-Converter +0 +5 +5 +Converter_DCDC +Converter_DCDC_muRata_NXExSxxxxMC_SMD +Isolated 1W or 2W Single Output SM DC/DC Converters http://power.murata.com/data/power/ncl/kdc_nxe1.pdf http://power.murata.com/data/power/ncl/kdc_nxe2.pdf +Isolated 1W or 2W Single Output SM DC/DC Converters +0 +5 +5 +Converter_DCDC +Converter_DCDC_muRata_OKI-78SR_Horizontal +https://power.murata.com/data/power/oki-78sr.pdf +78sr3.3 78sr5 78sr9 78sr12 78srXX +0 +3 +3 +Converter_DCDC +Converter_DCDC_muRata_OKI-78SR_Vertical +https://power.murata.com/data/power/oki-78sr.pdf +78sr3.3 78sr5 78sr9 78sr12 78srXX +0 +3 +3 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter http://www.cinetech.com.tw/upload/2011/04/20110401165201.pdf +['AT310'] +0 +2 +2 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal_1EP_style1 +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter http://www.cinetech.com.tw/upload/2011/04/20110401165201.pdf +['AT310'] +0 +3 +3 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Horizontal_1EP_style2 +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter http://www.cinetech.com.tw/upload/2011/04/20110401165201.pdf +['AT310'] +0 +5 +3 +Crystal +Crystal_AT310_D3.0mm_L10.0mm_Vertical +Crystal THT AT310 10.0mm-10.5mm length 3.0mm diameter http://www.cinetech.com.tw/upload/2011/04/20110401165201.pdf +['AT310'] +0 +2 +2 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +2 +2 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style1 +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +3 +3 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Horizontal_1EP_style2 +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +5 +3 +Crystal +Crystal_C26-LF_D2.1mm_L6.5mm_Vertical +Crystal THT C26-LF 6.5mm length 2.06mm diameter +['C26-LF'] +0 +2 +2 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal_1EP_style1 +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +3 +3 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Horizontal_1EP_style2 +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +5 +3 +Crystal +Crystal_C38-LF_D3.0mm_L8.0mm_Vertical +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal_1EP_style1 +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +3 +3 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Horizontal_1EP_style2 +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +5 +3 +Crystal +Crystal_DS10_D1.0mm_L4.3mm_Vertical +Crystal THT DS10 4.3mm length 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal_1EP_style1 +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +3 +3 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Horizontal_1EP_style2 +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +5 +3 +Crystal +Crystal_DS15_D1.5mm_L5.0mm_Vertical +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal_1EP_style1 +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +3 +3 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Horizontal_1EP_style2 +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +5 +3 +Crystal +Crystal_DS26_D2.0mm_L6.0mm_Vertical +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_HC18-U_Horizontal +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC18-U_Horizontal_1EP_style1 +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC18-U_Horizontal_1EP_style2 +Crystal THT HC-18/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC18-U_Vertical +Crystal THT HC-18/U, http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-18/U +0 +2 +2 +Crystal +Crystal_HC33-U_Horizontal +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC33-U_Horizontal_1EP_style1 +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC33-U_Horizontal_1EP_style2 +Crystal THT HC-33/U http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC33-U_Vertical +Crystal THT HC-33/U, http://pdi.bentech-taiwan.com/PDI/GEN20SPEV20HC3320U.pdf +THT crystalHC-33/U +0 +2 +2 +Crystal +Crystal_HC35-U +Crystal, Quarz, HC35/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/TO71xx.pdf +Crystal Quarz HC35/U +0 +3 +3 +Crystal +Crystal_HC49-4H_Vertical +Crystal THT HC-49-4H http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-49-4H +0 +2 +2 +Crystal +Crystal_HC49-U-3Pin_Vertical +Crystal THT HC-49/U, 3pin-version, http://www.raltron.com/products/pdfspecs/crystal_hc_49_45_51.pdf +THT crystalHC-49/U +0 +3 +3 +Crystal +Crystal_HC49-U_Horizontal +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC49-U_Horizontal_1EP_style1 +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC49-U_Horizontal_1EP_style2 +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC49-U_Vertical +Crystal THT HC-49/U http://5hertz.com/pdfs/04404_D.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC50_Horizontal +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC50_Horizontal_1EP_style1 +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC50_Horizontal_1EP_style2 +Crystal THT HC-50 http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC50_Vertical +Crystal THT HC-50, http://www.crovencrystals.com/croven_pdf/HC-50_Crystal_Holder_Rev_00.pdf +THT crystalHC-50 +0 +2 +2 +Crystal +Crystal_HC51-U_Vertical +Crystal THT HC-51/U, http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystalHC-51/U +0 +2 +2 +Crystal +Crystal_HC51_Horizontal +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC51_Horizontal_1EP_style1 +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC51_Horizontal_1EP_style2 +Crystal THT HC-51 http://www.crovencrystals.com/croven_pdf/HC-51_Crystal_Holder_Rev_00.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-6mm_Horizontal +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-6mm_Horizontal_1EP_style1 +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-6mm_Horizontal_1EP_style2 +Crystal THT HC-51/6mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-6mm_Vertical +Crystal THT HC-52/6mm, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC52-8mm_Horizontal +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-8mm_Horizontal_1EP_style1 +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-8mm_Horizontal_1EP_style2 +Crystal THT HC-51/8mm http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-8mm_Vertical +Crystal THT HC-52/8mm, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-49/U +0 +2 +2 +Crystal +Crystal_HC52-U-3Pin_Vertical +Crystal THT HC-52/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystalHC-52/U +0 +3 +3 +Crystal +Crystal_HC52-U_Horizontal +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +2 +2 +Crystal +Crystal_HC52-U_Horizontal_1EP_style1 +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +3 +3 +Crystal +Crystal_HC52-U_Horizontal_1EP_style2 +Crystal THT HC-51/U http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal +0 +5 +3 +Crystal +Crystal_HC52-U_Vertical +Crystal THT HC-52/U, http://www.kvg-gmbh.de/assets/uploads/files/product_pdfs/XS71xx.pdf +THT crystal HC-52/U +0 +2 +2 +Crystal +Crystal_Round_D1.0mm_Vertical +Crystal THT DS10 1.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS10'] +0 +2 +2 +Crystal +Crystal_Round_D1.5mm_Vertical +Crystal THT DS15 5.0mm length 1.5mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS15'] +0 +2 +2 +Crystal +Crystal_Round_D2.0mm_Vertical +Crystal THT DS26 6.0mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/DS-Series.pdf +['DS26'] +0 +2 +2 +Crystal +Crystal_Round_D3.0mm_Vertical +Crystal THT C38-LF 8.0mm length 3.0mm diameter +['C38-LF'] +0 +2 +2 +Crystal +Crystal_SMD_0603-2Pin_6.0x3.5mm +SMD Crystal SERIES SMD0603/2 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-2.pdf, 6.0x3.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_0603-2Pin_6.0x3.5mm_HandSoldering +SMD Crystal SERIES SMD0603/2 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-2.pdf, hand-soldering, 6.0x3.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_0603-4Pin_6.0x3.5mm +SMD Crystal SERIES SMD0603/4 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-4.pdf, 6.0x3.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_0603-4Pin_6.0x3.5mm_HandSoldering +SMD Crystal SERIES SMD0603/4 http://www.petermann-technik.de/fileadmin/petermann/pdf/SMD0603-4.pdf, hand-soldering, 6.0x3.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_2012-2Pin_2.0x1.2mm +SMD Crystal 2012/2 http://txccrystal.com/images/pdf/9ht11.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_2012-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal 2012/2 http://txccrystal.com/images/pdf/9ht11.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_2016-4Pin_2.0x1.6mm +SMD Crystal SERIES SMD2016/4 http://www.q-crystal.com/upload/5/2015552223166229.pdf, 2.0x1.6mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_2520-4Pin_2.5x2.0mm +SMD Crystal SERIES SMD2520/4 http://www.newxtal.com/UploadFiles/Images/2012-11-12-09-29-09-776.pdf, 2.5x2.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_3215-2Pin_3.2x1.5mm +SMD Crystal FC-135 https://support.epson.biz/td/api/doc_check.php?dl=brief_FC-135R_en.pdf +SMD SMT Crystal +0 +2 +2 +Crystal +Crystal_SMD_3225-4Pin_3.2x2.5mm +SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_3225-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_5032-2Pin_5.0x3.2mm +SMD Crystal SERIES SMD2520/2 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_5032-2Pin_5.0x3.2mm_HandSoldering +SMD Crystal SERIES SMD2520/2 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_5032-4Pin_5.0x3.2mm +SMD Crystal SERIES SMD2520/4 http://www.icbase.com/File/PDF/HKC/HKC00061008.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_7050-2Pin_7.0x5.0mm +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_7050-2Pin_7.0x5.0mm_HandSoldering +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_7050-4Pin_7.0x5.0mm +SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM3-2Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3 http://www.abracon.com/Resonators/abm3.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM3-2Pin_5.0x3.2mm_HandSoldering +Abracon Miniature Ceramic Smd Crystal ABM3 http://www.abracon.com/Resonators/abm3.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM3B-4Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3B http://www.abracon.com/Resonators/abm3b.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM3C-4Pin_5.0x3.2mm +Abracon Miniature Ceramic Smd Crystal ABM3C http://www.abracon.com/Resonators/abm3c.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM7-2Pin_6.0x3.5mm +SMD Crystal Abracon ABM7, https://abracon.com/Resonators/abm7.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_Abracon_ABM8G-4Pin_3.2x2.5mm +Abracon Miniature Ceramic Smd Crystal ABM8G http://www.abracon.com/Resonators/ABM8G.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABM10-4Pin_2.5x2.0mm +Abracon Miniature Ceramic Smd Crystal ABM10 http://www.abracon.com/Resonators/ABM10.pdf +SMD SMT crystal Abracon ABM10 +0 +4 +4 +Crystal +Crystal_SMD_Abracon_ABS25-4Pin_8.0x3.8mm +Abracon Miniature Ceramic SMD Crystal ABS25 https://abracon.com/Resonators/abs25.pdf, 8.0x3.8mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_ECS_CSM3X-2Pin_7.6x4.1mm +http://www.ecsxtal.com/store/pdf/CSM-3X.pdf +Crystal CSM-3X +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_EQ161-2Pin_3.2x1.5mm +SMD Crystal EuroQuartz EQ161 series http://cdn-reichelt.de/documents/datenblatt/B400/PG32768C.pdf, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_EQ161-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal EuroQuartz EQ161 series http://cdn-reichelt.de/documents/datenblatt/B400/PG32768C.pdf, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MJ-4Pin_5.0x3.2mm +SMD Crystal EuroQuartz MJ series http://cdn-reichelt.de/documents/datenblatt/B400/MJ.pdf, 5.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MJ-4Pin_5.0x3.2mm_HandSoldering +SMD Crystal EuroQuartz MJ series http://cdn-reichelt.de/documents/datenblatt/B400/MJ.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ-4Pin_7.0x5.0mm +SMD Crystal EuroQuartz MQ series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ-4Pin_7.0x5.0mm_HandSoldering +SMD Crystal EuroQuartz MQ series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MQ2-2Pin_7.0x5.0mm +SMD Crystal EuroQuartz MQ2 series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MQ2-2Pin_7.0x5.0mm_HandSoldering +SMD Crystal EuroQuartz MQ2 series http://cdn-reichelt.de/documents/datenblatt/B400/MQ.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_EuroQuartz_MT-4Pin_3.2x2.5mm +SMD Crystal EuroQuartz MT series http://cdn-reichelt.de/documents/datenblatt/B400/MT.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_MT-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal EuroQuartz MT series http://cdn-reichelt.de/documents/datenblatt/B400/MT.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_X22-4Pin_2.5x2.0mm +SMD Crystal EuroQuartz X22 series http://cdn-reichelt.de/documents/datenblatt/B400/DS_X22.pdf, 2.5x2.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_EuroQuartz_X22-4Pin_2.5x2.0mm_HandSoldering +SMD Crystal EuroQuartz X22 series http://cdn-reichelt.de/documents/datenblatt/B400/DS_X22.pdf, hand-soldering, 2.5x2.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_FOX_FE-2Pin_7.5x5.0mm +crystal Ceramic Resin Sealed SMD http://www.foxonline.com/pdfs/fe.pdf, 7.5x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_FOX_FE-2Pin_7.5x5.0mm_HandSoldering +crystal Ceramic Resin Sealed SMD http://www.foxonline.com/pdfs/fe.pdf, hand-soldering, 7.5x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-2Pin_7.0x5.0mm +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-2Pin_7.0x5.0mm_HandSoldering +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_FOX_FQ7050-4Pin_7.0x5.0mm +FOX SMD Crystal SERIES SMD7050/4 https://www.foxonline.com/pdfs/FQ7050.pdf, 7.0x5.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_FrontierElectronics_FM206 +SMD Watch Crystal FrontierElectronics FM206 6.0mm length 1.9mm diameter http://www.chinafronter.com/wp-content/uploads/2013/12/FM206.pdf +['FM206'] +0 +3 +3 +Crystal +Crystal_SMD_G8-2Pin_3.2x1.5mm +SMD Crystal G8, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_G8-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal G8, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_HC49-SD +SMD Crystal HC-49-SD http://cdn-reichelt.de/documents/datenblatt/B400/xxx-HC49-SMD.pdf, 11.4x4.7mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_HC49-SD_HandSoldering +SMD Crystal HC-49-SD http://cdn-reichelt.de/documents/datenblatt/B400/xxx-HC49-SMD.pdf, hand-soldering, 11.4x4.7mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC1V-T1A-2Pin_8.0x3.7mm +SMD Crystal MicroCrystal CC1V-T1A series https://www.microcrystal.com/fileadmin/Media/Products/32kHz/Datasheet/CC1V-T1A.pdf, 8.0x3.7mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC1V-T1A-2Pin_8.0x3.7mm_HandSoldering +SMD Crystal MicroCrystal CC1V-T1A series https://www.microcrystal.com/fileadmin/Media/Products/32kHz/Datasheet/CC1V-T1A.pdf, hand-soldering, 8.0x3.7mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC4V-T1A-2Pin_5.0x1.9mm +SMD Crystal MicroCrystal CC4V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC4V-T1A.pdf, 5.0x1.9mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC4V-T1A-2Pin_5.0x1.9mm_HandSoldering +SMD Crystal MicroCrystal CC4V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC4V-T1A.pdf, hand-soldering, 5.0x1.9mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC5V-T1A-2Pin_4.1x1.5mm +SMD Crystal MicroCrystal CC5V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC5V-T1A.pdf, 4.1x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC5V-T1A-2Pin_4.1x1.5mm_HandSoldering +SMD Crystal MicroCrystal CC5V-T1A series http://cdn-reichelt.de/documents/datenblatt/B400/CC5V-T1A.pdf, hand-soldering, 4.1x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC7V-T1A-2Pin_3.2x1.5mm +SMD Crystal MicroCrystal CC7V-T1A/CM7V-T1A series https://www.microcrystal.com/fileadmin/Media/Products/32kHz/Datasheet/CC7V-T1A.pdf, 3.2x1.5mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC7V-T1A-2Pin_3.2x1.5mm_HandSoldering +SMD Crystal MicroCrystal CC7V-T1A/CM7V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC1V-T1A.pdf, hand-soldering, 3.2x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC8V-T1A-2Pin_2.0x1.2mm +SMD Crystal MicroCrystal CC8V-T1A/CM8V-T1A series https://www.microcrystal.com/fileadmin/Media/Products/32kHz/Datasheet/CC8V-T1A.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CC8V-T1A-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal MicroCrystal CC8V-T1A/CM8V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CC8V-T1A.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CM9V-T1A-2Pin_1.6x1.0mm +SMD Crystal MicroCrystal CM9V-T1A series https://www.microcrystal.com/fileadmin/Media/Products/32kHz/Datasheet/CM9V-T1A.pdf, 1.6x1.0mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_CM9V-T1A-2Pin_1.6x1.0mm_HandSoldering +SMD Crystal MicroCrystal CM9V-T1A series http://www.microcrystal.com/images/_Product-Documentation/01_TF_ceramic_Packages/01_Datasheet/CM9V-T1A.pdf, hand-soldering, 1.6x1.0mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_MicroCrystal_MS1V-T1K +SMD Watch Crystal MicroCrystal MS1V-T1K 6.1mm length 2.0mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/MS1V-T1K.pdf +['MS1V-T1K'] +0 +3 +3 +Crystal +Crystal_SMD_MicroCrystal_MS3V-T1R +SMD Watch Crystal MicroCrystal MS3V-T1R 5.2mm length 1.4mm diameter http://www.microcrystal.com/images/_Product-Documentation/03_TF_metal_Packages/01_Datasheet/MS3V-T1R.pdf +['MS3V-T1R'] +0 +3 +3 +Crystal +Crystal_SMD_Qantek_QC5CB-2Pin_5x3.2mm +SMD Crystal Qantek QC5CB, https://www.qantek.com/tl_files/products/crystals/QC5CB.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_FA238-4Pin_3.2x2.5mm +crystal Epson Toyocom FA-238 https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom FA-238 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238V-4Pin_3.2x2.5mm +crystal Epson Toyocom FA-238 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_FA238V-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom FA-238 series http://www.mouser.com/ds/2/137/1721499-465440.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA406-4Pin_11.7x4.0mm +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 11.7x4.0mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA406-4Pin_11.7x4.0mm_HandSoldering +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 11.7x4.0mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA505-2Pin_12.7x5.1mm +SMD Crystal Seiko Epson MC-505 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 12.7x5.1mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MA505-2Pin_12.7x5.1mm_HandSoldering +SMD Crystal Seiko Epson MC-505 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 12.7x5.1mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MA506-4Pin_12.7x5.1mm +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, 12.7x5.1mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MA506-4Pin_12.7x5.1mm_HandSoldering +SMD Crystal Seiko Epson MC-506 http://media.digikey.com/pdf/Data%20Sheets/Epson%20PDFs/MA-505,506.pdf, hand-soldering, 12.7x5.1mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC146-4Pin_6.7x1.5mm +SMD Crystal Seiko Epson MC-146 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, 6.7x1.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC146-4Pin_6.7x1.5mm_HandSoldering +SMD Crystal Seiko Epson MC-146 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, hand-soldering, 6.7x1.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC156-4Pin_7.1x2.5mm +SMD Crystal Seiko Epson MC-156 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, 7.1x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC156-4Pin_7.1x2.5mm_HandSoldering +SMD Crystal Seiko Epson MC-156 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-156_en.pdf, hand-soldering, 7.1x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC306-4Pin_8.0x3.2mm +SMD Crystal Seiko Epson MC-306 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 8.0x3.2mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC306-4Pin_8.0x3.2mm_HandSoldering +SMD Crystal Seiko Epson MC-306 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 8.0x3.2mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC405-2Pin_9.6x4.1mm +SMD Crystal Seiko Epson MC-405 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 9.6x4.1mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MC405-2Pin_9.6x4.1mm_HandSoldering +SMD Crystal Seiko Epson MC-405 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 9.6x4.1mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_SeikoEpson_MC406-4Pin_9.6x4.1mm +SMD Crystal Seiko Epson MC-406 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, 9.6x4.1mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_MC406-4Pin_9.6x4.1mm_HandSoldering +SMD Crystal Seiko Epson MC-406 https://support.epson.biz/td/api/doc_check.php?dl=brief_MC-306_en.pdf, hand-soldering, 9.6x4.1mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm +crystal Epson Toyocom TSX-3225 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm_HandSoldering +crystal Epson Toyocom TSX-3225 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_TXC_7A-2Pin_5x3.2mm +SMD Crystal TXC 7A http://txccrystal.com/images/pdf/7a.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_TXC_7M-4Pin_3.2x2.5mm +SMD Crystal TXC 7M http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package +SMD SMT crystal +0 +4 +4 +Crystal +Crystal_SMD_TXC_7M-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal TXC 7M http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal hand-soldering +0 +4 +4 +Crystal +Crystal_SMD_TXC_9HT11-2Pin_2.0x1.2mm +SMD Crystal TXC 9HT11 http://txccrystal.com/images/pdf/9ht11.pdf, 2.0x1.2mm^2 package +SMD SMT crystal +0 +2 +2 +Crystal +Crystal_SMD_TXC_9HT11-2Pin_2.0x1.2mm_HandSoldering +SMD Crystal TXC 9HT11 http://txccrystal.com/images/pdf/9ht11.pdf, hand-soldering, 2.0x1.2mm^2 package +SMD SMT crystal hand-soldering +0 +2 +2 +Crystal +Crystal_SMD_TXC_AX_8045-2Pin_8.0x4.5mm +http://www.txccrystal.com/images/pdf/ax-automotive.pdf +SMD SMT crystal +0 +2 +2 +Crystal +Resonator-2Pin_W6.0mm_H3.0mm +Ceramic Resomator/Filter 6.0x3.0mm^2, length*width=6.0x3.0mm^2 package, package length=6.0mm, package width=3.0mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter 7.0x2.5mm^2, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W8.0mm_H3.5mm +Ceramic Resomator/Filter 8.0x3.5mm^2, length*width=8.0x3.5mm^2 package, package length=8.0mm, package width=3.5mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-2Pin_W10.0mm_H5.0mm +Ceramic Resomator/Filter 10.0x5.0 RedFrequency MG/MT/MX series, http://www.red-frequency.com/download/datenblatt/redfrequency-datenblatt-ir-zta.pdf, length*width=10.0x5.0mm^2 package, package length=10.0mm, package width=5.0mm, 2 pins +THT ceramic resonator filter +0 +2 +2 +Crystal +Resonator-3Pin_W6.0mm_H3.0mm +Ceramic Resomator/Filter 6.0x3.0mm^2, length*width=6.0x3.0mm^2 package, package length=6.0mm, package width=3.0mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter 7.0x2.5mm^2, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W8.0mm_H3.5mm +Ceramic Resomator/Filter 8.0x3.5mm^2, length*width=8.0x3.5mm^2 package, package length=8.0mm, package width=3.5mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator-3Pin_W10.0mm_H5.0mm +Ceramic Resomator/Filter 10.0x5.0mm^2 RedFrequency MG/MT/MX series, http://www.red-frequency.com/download/datenblatt/redfrequency-datenblatt-ir-zta.pdf, length*width=10.0x5.0mm^2 package, package length=10.0mm, package width=5.0mm, 3 pins +THT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_SMD-3Pin_7.2x3.0mm +SMD Resomator/Filter 7.2x3.0mm, Murata CSTCC8M00G53-R0; 8MHz resonator, SMD, Farnell (Element 14) #1170435, http://www.farnell.com/datasheets/19296.pdf?_ga=1.247244932.122297557.1475167906, 7.2x3.0mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD-3Pin_7.2x3.0mm_HandSoldering +SMD Resomator/Filter 7.2x3.0mm, Murata CSTCC8M00G53-R0; 8MHz resonator, SMD, Farnell (Element 14) #1170435, http://www.farnell.com/datasheets/19296.pdf?_ga=1.247244932.122297557.1475167906, hand-soldering, 7.2x3.0mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_CDSCB-2Pin_4.5x2.0mm +SMD Resomator/Filter Murata CDSCB, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 4.5x2.0mm^2 package +SMD SMT ceramic resonator filter filter +0 +2 +2 +Crystal +Resonator_SMD_muRata_CDSCB-2Pin_4.5x2.0mm_HandSoldering +SMD Resomator/Filter Murata CDSCB, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 4.5x2.0mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +2 +2 +Crystal +Resonator_SMD_muRata_CSTxExxV-3Pin_3.0x1.1mm +SMD Resomator/Filter Murata CSTCE, https://www.murata.com/en-eu/products/productdata/8801162264606/SPEC-CSTNE16M0VH3C000R0.pdf +SMD SMT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_CSTxExxV-3Pin_3.0x1.1mm_HandSoldering +SMD Resomator/Filter Murata CSTCE, https://www.murata.com/en-eu/products/productdata/8801162264606/SPEC-CSTNE16M0VH3C000R0.pdf +SMD SMT ceramic resonator filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFECV-3Pin_6.9x2.9mm +SMD Resomator/Filter Murata SFECV, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 6.9x2.9mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFECV-3Pin_6.9x2.9mm_HandSoldering +SMD Resomator/Filter Murata SFECV, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 6.9x2.9mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFSKA-3Pin_7.9x3.8mm +SMD Resomator/Filter Murata SFSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_SFSKA-3Pin_7.9x3.8mm_HandSoldering +SMD Resomator/Filter Murata SFSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_SMD_muRata_TPSKA-3Pin_7.9x3.8mm +SMD Resomator/Filter Murata TPSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter +0 +3 +3 +Crystal +Resonator_SMD_muRata_TPSKA-3Pin_7.9x3.8mm_HandSoldering +SMD Resomator/Filter Murata TPSKA, http://cdn-reichelt.de/documents/datenblatt/B400/SFECV-107.pdf, hand-soldering, 7.9x3.8mm^2 package +SMD SMT ceramic resonator filter filter hand-soldering +0 +3 +3 +Crystal +Resonator_muRata_CSTLSxxxG-3Pin_W8.0mm_H3.0mm +Ceramic Resomator/Filter Murata CSTLSxxxG, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/timingdevice/ceralock/p17e.ashx, length*width=8.0x3.0mm^2 package, package length=8.0mm, package width=3.0mm, 3 pins +THT ceramic resonator filter CSTLSxxxG +0 +3 +3 +Crystal +Resonator_muRata_CSTLSxxxX-3Pin_W5.5mm_H3.0mm +Ceramic Resomator/Filter Murata CSTLSxxxX, http://www.murata.com/~/media/webrenewal/support/library/catalog/products/timingdevice/ceralock/p17e.ashx, length*width=5.5x3.0mm^2 package, package length=5.5mm, package width=3.0mm, 3 pins +THT ceramic resonator filter CSTLSxxxX +0 +3 +3 +Crystal +Resonator_muRata_DSN6-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter Murata DSN6, http://cdn-reichelt.de/documents/datenblatt/B400/DSN6NC51H.pdf, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter DSN6 +0 +3 +3 +Crystal +Resonator_muRata_DSS6-3Pin_W7.0mm_H2.5mm +Ceramic Resomator/Filter Murata DSS6, http://cdn-reichelt.de/documents/datenblatt/B400/DSN6NC51H.pdf, length*width=7.0x2.5mm^2 package, package length=7.0mm, package width=2.5mm, 3 pins +THT ceramic resonator filter DSS6 +0 +3 +3 +Diode_SMD +D_0201_0603Metric +Diode SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +diode +0 +4 +2 +Diode_SMD +D_0201_0603Metric_Castellated +Diode SMD 0201 (0603 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +diode castellated +0 +4 +2 +Diode_SMD +D_0201_0603Metric_Pad0.64x0.40mm_HandSolder +Diode SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +diode handsolder +0 +4 +2 +Diode_SMD +D_0402_1005Metric +Diode SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0402_1005Metric_Castellated +Diode SMD 0402 (1005 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_0402_1005Metric_Pad0.77x0.64mm_HandSolder +Diode SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_0603_1608Metric +Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0603_1608Metric_Castellated +Diode SMD 0603 (1608 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Diode SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_0805_2012Metric +Diode SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_0805_2012Metric_Castellated +Diode SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Diode SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_01005_0402Metric +Diode SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +diode +0 +4 +2 +Diode_SMD +D_01005_0402Metric_Castellated +Diode SMD 01005 (0402 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +diode castellated +0 +4 +2 +Diode_SMD +D_01005_0402Metric_Pad0.57x0.30mm_HandSolder +Diode SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +diode handsolder +0 +4 +2 +Diode_SMD +D_1206_3216Metric +Diode SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1206_3216Metric_Castellated +Diode SMD 1206 (3216 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Diode SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_1210_3225Metric +Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1210_3225Metric_Castellated +Diode SMD 1210 (3225 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_1812_4532Metric +Diode SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_1812_4532Metric_Castellated +Diode SMD 1812 (4532 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Diode SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2010_5025Metric +Diode SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2010_5025Metric_Castellated +Diode SMD 2010 (5025 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Diode SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2114_3652Metric +Diode SMD 2114 (3652 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2114_3652Metric_Castellated +Diode SMD 2114 (3652 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2114_3652Metric_Pad1.85x3.75mm_HandSolder +Diode SMD 2114 (3652 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2512_6332Metric +Diode SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2512_6332Metric_Castellated +Diode SMD 2512 (6332 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Diode SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_2816_7142Metric +Diode SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_2816_7142Metric_Castellated +Diode SMD 2816 (7142 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Diode SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_3220_8050Metric +Diode SMD 3220 (8050 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode +0 +2 +2 +Diode_SMD +D_3220_8050Metric_Castellated +Diode SMD 3220 (8050 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode castellated +0 +2 +2 +Diode_SMD +D_3220_8050Metric_Pad2.65x5.15mm_HandSolder +Diode SMD 3220 (8050 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://datasheets.avx.com/schottky.pdf), generated with kicad-footprint-generator +diode handsolder +0 +2 +2 +Diode_SMD +D_MELF +Diode, MELF,, +Diode MELF +0 +2 +2 +Diode_SMD +D_MELF-RM10_Universal_Handsoldering +Diode, Universal, MELF, RM10, Handsoldering, SMD, Thruhole, +Diode Universal MELF RM10 Handsoldering SMD Thruhole +0 +2 +2 +Diode_SMD +D_MELF_Handsoldering +Diode MELF Handsoldering +Diode MELF Handsoldering +0 +2 +2 +Diode_SMD +D_MicroMELF +Diode, MicroMELF, Reflow Soldering, http://www.vishay.com/docs/85597/bzm55.pdf +MicroMELF Diode +0 +2 +2 +Diode_SMD +D_MicroMELF_Handsoldering +Diode, MicroMELF, Hand Soldering, http://www.vishay.com/docs/85597/bzm55.pdf +MicroMELF Diode +0 +2 +2 +Diode_SMD +D_MiniMELF +Diode Mini-MELF (SOD-80) +Diode Mini-MELF (SOD-80) +0 +2 +2 +Diode_SMD +D_MiniMELF_Handsoldering +Diode Mini-MELF (SOD-80) Handsoldering +Diode Mini-MELF (SOD-80) Handsoldering +0 +2 +2 +Diode_SMD +D_PowerDI-5 +PowerDI,Diode,Vishay,https://www.diodes.com/assets/Package-Files/PowerDI5.pdf +PowerDI diode vishay +0 +3 +2 +Diode_SMD +D_PowerDI-123 +http://www.diodes.com/_files/datasheets/ds30497.pdf +PowerDI diode vishay +0 +2 +2 +Diode_SMD +D_Powermite2_AK +Microsemi Powermite 2 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5341) +PowerMite2 +0 +2 +2 +Diode_SMD +D_Powermite2_KA +Microsemi Powermite 2 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5341) +PowerMite2 +0 +2 +2 +Diode_SMD +D_Powermite3 +Microsemi Powermite 3 SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5340) +PowerMite3 +0 +3 +3 +Diode_SMD +D_Powermite_AK +Microsemi Powermite SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5339, https://www.onsemi.com/pub/Collateral/457-04.PDF) +Powermite +0 +2 +2 +Diode_SMD +D_Powermite_KA +Microsemi Powermite SMD power package (https://www.microsemi.com/packaging-information/partpackage/details?pid=5339, https://www.onsemi.com/pub/Collateral/457-04.PDF) +Powermite +0 +2 +2 +Diode_SMD +D_QFN_3.3x3.3mm_P0.65mm +QFN, diode, 3.3x3.3x1mm (https://www.wolfspeed.com/media/downloads/846/C3D1P7060Q.pdf) +diode qfn 3.3 +0 +3 +2 +Diode_SMD +D_SC-80 +JEITA SC-80 +SC-80 +0 +2 +2 +Diode_SMD +D_SC-80_HandSoldering +JEITA SC-80 +SC-80 +0 +2 +2 +Diode_SMD +D_SMA +Diode SMA (DO-214AC) +Diode SMA (DO-214AC) +0 +2 +2 +Diode_SMD +D_SMA-SMB_Universal_Handsoldering +Diode, Universal, SMA (DO-214AC) or SMB (DO-214AA), Handsoldering, +Diode Universal SMA (DO-214AC) SMB (DO-214AA) Handsoldering +0 +2 +2 +Diode_SMD +D_SMA_Handsoldering +Diode SMA (DO-214AC) Handsoldering +Diode SMA (DO-214AC) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB +Diode SMB (DO-214AA) +Diode SMB (DO-214AA) +0 +2 +2 +Diode_SMD +D_SMB-SMC_Universal_Handsoldering +Diode, Universal, SMB(DO-214AA) or SMC (DO-214AB), Handsoldering, +Diode Universal SMB(DO-214AA) SMC (DO-214AB) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB_Handsoldering +Diode SMB (DO-214AA) Handsoldering +Diode SMB (DO-214AA) Handsoldering +0 +2 +2 +Diode_SMD +D_SMB_Modified +Diode SMB (DO-214AA) Modified (http://www.littelfuse.com/~/media/electronics/datasheets/sidactors/littelfuse_sidactor_battrax_positive_negative_modified_do_214_datasheet.pdf.pdf) +Diode SMB (DO-214AA) +0 +3 +3 +Diode_SMD +D_SMC +Diode SMC (DO-214AB) +Diode SMC (DO-214AB) +0 +2 +2 +Diode_SMD +D_SMC-RM10_Universal_Handsoldering +Diode, Universal, SMC (DO-214AB), RM10, Handsoldering, SMD, Thruhole +Diode Universal SMC (DO-214AB) RM10 Handsoldering SMD Thruhole +0 +2 +2 +Diode_SMD +D_SMC_Handsoldering +Diode SMC (DO-214AB) Handsoldering +Diode SMC (DO-214AB) Handsoldering +0 +2 +2 +Diode_SMD +D_SMF +Diode SMF (DO-219AB), http://www.vishay.com/docs/95572/smf_do-219ab.pdf +Diode SMF (DO-214AB) +0 +2 +2 +Diode_SMD +D_SOD-110 +SOD-110 +SOD-110 +0 +2 +2 +Diode_SMD +D_SOD-123 +SOD-123 +SOD-123 +0 +2 +2 +Diode_SMD +D_SOD-123F +D_SOD-123F +D_SOD-123F +0 +2 +2 +Diode_SMD +D_SOD-128 +D_SOD-128 (CFP5 SlimSMAW), https://assets.nexperia.com/documents/outline-drawing/SOD128.pdf +D_SOD-128 +0 +2 +2 +Diode_SMD +D_SOD-323 +SOD-323 +SOD-323 +0 +2 +2 +Diode_SMD +D_SOD-323F +SOD-323F http://www.nxp.com/documents/outline_drawing/SOD323F.pdf +SOD-323F +0 +2 +2 +Diode_SMD +D_SOD-323_HandSoldering +SOD-323 +SOD-323 +0 +2 +2 +Diode_SMD +D_SOD-523 +http://www.diodes.com/datasheets/ap02001.pdf p.144 +Diode SOD523 +0 +2 +2 +Diode_SMD +D_SOD-923 +https://www.onsemi.com/pub/Collateral/ESD9B-D.PDF#page=4 +Diode SOD923 +0 +2 +2 +Diode_SMD +D_SOT-23_ANK +SOT-23, Single Diode +SOT-23 +0 +3 +2 +Diode_SMD +D_SOT-23_NKA +SOT-23, Single Diode +SOT-23 +0 +3 +2 +Diode_SMD +D_TUMD2 +ROHM - TUMD2 +TUMD2 +0 +2 +2 +Diode_SMD +Diode_Bridge_Bourns_CD-DF4xxS +8.1x10.5mm, 4A, single phase bridge rectifier, https://www.bourns.com/docs/Product-Datasheets/CD-DF4xxSL.pdf +Surface Mount Bridge Rectifier Diode +0 +4 +4 +Diode_SMD +Diode_Bridge_Diotec_ABS +SMD diode bridge ABS (Diotec), see https://diotec.com/tl_files/diotec/files/pdf/datasheets/abs2.pdf +ABS MBLS +0 +4 +4 +Diode_SMD +Diode_Bridge_Diotec_MicroDil_3.0x3.0x1.8mm +SMD package Diotec Diotec MicroDil, body 3.0x3.0x1.8mm (e.g. diode bridge), see https://diotec.com/tl_files/diotec/files/pdf/datasheets/mys40.pdf +Diotec MicroDil diode bridge +0 +4 +4 +Diode_SMD +Diode_Bridge_Diotec_SO-DIL-Slim +SMD diode bridge Diotec SO-DIL Slim, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40fs.pdf +DFS SO-DIL Slim +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_DFS +SMD diode bridge DFS, see http://www.vishay.com/docs/88854/padlayouts.pdf +DFS +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_DFSFlat +SMD diode bridge Low Profile DFS "Flat", see http://www.vishay.com/docs/88874/dfl15005.pdf +DFS +0 +4 +4 +Diode_SMD +Diode_Bridge_Vishay_MBLS +SMD diode bridge MBLS, see http://www.vishay.com/docs/89959/mbl104s.pdf http://www.vishay.com/docs/88854/padlayouts.pdf +DFS +0 +4 +4 +Diode_SMD +Littelfuse_PolyZen-LS +http://m.littelfuse.com/~/media/electronics/datasheets/polyzen_devices/littelfuse_polyzen_standard_polyzen_catalog_datasheet.pdf.pdf +Diode Polymer Protected Zener Diode Littelfuse LS +0 +3 +3 +Diode_THT +D_5KPW_P7.62mm_Vertical_AnodeUp +Diode, 5KPW series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Vertical pin pitch 7.62mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KPW_P7.62mm_Vertical_KathodeUp +Diode, 5KPW series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Vertical pin pitch 7.62mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KPW_P12.70mm_Horizontal +Diode, 5KPW series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9*8mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KPW series Axial Horizontal pin pitch 12.7mm length 9mm diameter 8mm +0 +2 +2 +Diode_THT +D_5KP_P7.62mm_Vertical_AnodeUp +Diode, 5KP series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Vertical pin pitch 7.62mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P7.62mm_Vertical_KathodeUp +Diode, 5KP series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Vertical pin pitch 7.62mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P10.16mm_Horizontal +Diode, 5KP series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Horizontal pin pitch 10.16mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5KP_P12.70mm_Horizontal +Diode, 5KP series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7.62*9.53mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5KP series Axial Horizontal pin pitch 12.7mm length 7.62mm diameter 9.53mm +0 +2 +2 +Diode_THT +D_5W_P5.08mm_Vertical_AnodeUp +Diode, 5W series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Vertical pin pitch 5.08mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P5.08mm_Vertical_KathodeUp +Diode, 5W series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Vertical pin pitch 5.08mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P10.16mm_Horizontal +Diode, 5W series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Horizontal pin pitch 10.16mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_5W_P12.70mm_Horizontal +Diode, 5W series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=8.9*3.7mm^2, , http://www.diodes.com/_files/packages/8686949.gif +Diode 5W series Axial Horizontal pin pitch 12.7mm length 8.9mm diameter 3.7mm +0 +2 +2 +Diode_THT +D_A-405_P2.54mm_Vertical_AnodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P2.54mm_Vertical_KathodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P5.08mm_Vertical_AnodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P5.08mm_Vertical_KathodeUp +Diode, A-405 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P7.62mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 7.62mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P10.16mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 10.16mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_A-405_P12.70mm_Horizontal +Diode, A-405 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/A-405.pdf +Diode A-405 series Axial Horizontal pin pitch 12.7mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-15_P2.54mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 2.54mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P2.54mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 2.54mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P3.81mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 3.81mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P3.81mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 3.81mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P5.08mm_Vertical_AnodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 5.08mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P5.08mm_Vertical_KathodeUp +Diode, DO-15 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Vertical pin pitch 5.08mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P10.16mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 10.16mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P12.70mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 12.7mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-15_P15.24mm_Horizontal +Diode, DO-15 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=7.6*3.6mm^2, , http://www.diodes.com/_files/packages/DO-15.pdf +Diode DO-15 series Axial Horizontal pin pitch 15.24mm length 7.6mm diameter 3.6mm +0 +2 +2 +Diode_THT +D_DO-27_P5.08mm_Vertical_AnodeUp +Diode, DO-27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Vertical pin pitch 5.08mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P5.08mm_Vertical_KathodeUp +Diode, DO-27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Vertical pin pitch 5.08mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P12.70mm_Horizontal +Diode, DO-27 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Horizontal pin pitch 12.7mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-27_P15.24mm_Horizontal +Diode, DO-27 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.52*5.33mm^2, , http://www.slottechforum.com/slotinfo/Techstuff/CD2%20Diodes%20and%20Transistors/Cases/Diode%20DO-27.jpg +Diode DO-27 series Axial Horizontal pin pitch 15.24mm length 9.52mm diameter 5.33mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P2.54mm_Vertical_AnodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 2.54mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P2.54mm_Vertical_KathodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 2.54mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P5.08mm_Vertical_AnodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 5.08mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P5.08mm_Vertical_KathodeUp +Diode, DO-34_SOD68 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Vertical pin pitch 5.08mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P7.62mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 7.62mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P10.16mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 10.16mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-34_SOD68_P12.70mm_Horizontal +Diode, DO-34_SOD68 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=3.04*1.6mm^2, , https://www.nxp.com/docs/en/data-sheet/KTY83_SER.pdf +Diode DO-34_SOD68 series Axial Horizontal pin pitch 12.7mm length 3.04mm diameter 1.6mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P2.54mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 2.54mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P2.54mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 2.54mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P3.81mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 3.81mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P3.81mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 3.81mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P5.08mm_Vertical_AnodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 5.08mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P5.08mm_Vertical_KathodeUp +Diode, DO-35_SOD27 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Vertical pin pitch 5.08mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P7.62mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 7.62mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P10.16mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 10.16mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-35_SOD27_P12.70mm_Horizontal +Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf +Diode DO-35_SOD27 series Axial Horizontal pin pitch 12.7mm length 4mm diameter 2mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P2.54mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P2.54mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 2.54mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P3.81mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=5.2*2.7mm^2, , https://www.diodes.com/assets/Package-Files/DO-41-Plastic.pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 3.81mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P3.81mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=5.2*2.7mm^2, , https://www.diodes.com/assets/Package-Files/DO-41-Plastic.pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 3.81mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P5.08mm_Vertical_AnodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P5.08mm_Vertical_KathodeUp +Diode, DO-41_SOD81 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Vertical pin pitch 5.08mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P7.62mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 7.62mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P10.16mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 10.16mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-41_SOD81_P12.70mm_Horizontal +Diode, DO-41_SOD81 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=5.2*2.7mm^2, , http://www.diodes.com/_files/packages/DO-41%20(Plastic).pdf +Diode DO-41_SOD81 series Axial Horizontal pin pitch 12.7mm length 5.2mm diameter 2.7mm +0 +2 +2 +Diode_THT +D_DO-201AD_P3.81mm_Vertical_AnodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 3.81mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P3.81mm_Vertical_KathodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 3.81mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P5.08mm_Vertical_AnodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P5.08mm_Vertical_KathodeUp +Diode, DO-201AD series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P12.70mm_Horizontal +Diode, DO-201AD series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Horizontal pin pitch 12.7mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AD_P15.24mm_Horizontal +Diode, DO-201AD series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.5*5.2mm^2, , http://www.diodes.com/_files/packages/DO-201AD.pdf +Diode DO-201AD series Axial Horizontal pin pitch 15.24mm length 9.5mm diameter 5.2mm +0 +2 +2 +Diode_THT +D_DO-201AE_P3.81mm_Vertical_AnodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 3.81mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P3.81mm_Vertical_KathodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 3.81mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P5.08mm_Vertical_AnodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 5.08mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P5.08mm_Vertical_KathodeUp +Diode, DO-201AE series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Vertical pin pitch 5.08mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P12.70mm_Horizontal +Diode, DO-201AE series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Horizontal pin pitch 12.7mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201AE_P15.24mm_Horizontal +Diode, DO-201AE series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9*5.3mm^2, , http://www.farnell.com/datasheets/529758.pdf +Diode DO-201AE series Axial Horizontal pin pitch 15.24mm length 9mm diameter 5.3mm +0 +2 +2 +Diode_THT +D_DO-201_P3.81mm_Vertical_AnodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 3.81mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P3.81mm_Vertical_KathodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=3.81mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 3.81mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P5.08mm_Vertical_AnodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 5.08mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P5.08mm_Vertical_KathodeUp +Diode, DO-201 series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Vertical pin pitch 5.08mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P12.70mm_Horizontal +Diode, DO-201 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Horizontal pin pitch 12.7mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-201_P15.24mm_Horizontal +Diode, DO-201 series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.53*5.21mm^2, , http://www.diodes.com/_files/packages/DO-201.pdf +Diode DO-201 series Axial Horizontal pin pitch 15.24mm length 9.53mm diameter 5.21mm +0 +2 +2 +Diode_THT +D_DO-247_Horizontal_TabDown +Diode, DO-247 series, Horizontal, TabDown, P 10.9mm +diode rectifier +0 +2 +2 +Diode_THT +D_DO-247_Horizontal_TabUp +Diode, DO-247 series, Horizontal, TabUp, P 10.9mm +diode rectifier +0 +2 +2 +Diode_THT +D_DO-247_Vertical +Diode, DO-247 series, Vertical, P 10.9mm +diode rectifier +0 +2 +2 +Diode_THT +D_P600_R-6_P7.62mm_Vertical_AnodeUp +Diode, P600_R-6 series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Vertical pin pitch 7.62mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P7.62mm_Vertical_KathodeUp +Diode, P600_R-6 series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Vertical pin pitch 7.62mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P12.70mm_Horizontal +Diode, P600_R-6 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Horizontal pin pitch 12.7mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_P600_R-6_P20.00mm_Horizontal +Diode, P600_R-6 series, Axial, Horizontal, pin pitch=20mm, , length*diameter=9.1*9.1mm^2, , http://www.vishay.com/docs/88692/p600a.pdf, http://www.diodes.com/_files/packages/R-6.pdf +Diode P600_R-6 series Axial Horizontal pin pitch 20mm length 9.1mm diameter 9.1mm +0 +2 +2 +Diode_THT +D_T-1_P2.54mm_Vertical_AnodeUp +Diode, T-1 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Vertical pin pitch 2.54mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P2.54mm_Vertical_KathodeUp +Diode, T-1 series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Vertical pin pitch 2.54mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P5.08mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=5.08mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 5.08mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P10.16mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 10.16mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +D_T-1_P12.70mm_Horizontal +Diode, T-1 series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=3.2*2.6mm^2, , http://www.diodes.com/_files/packages/T-1.pdf +Diode T-1 series Axial Horizontal pin pitch 12.7mm length 3.2mm diameter 2.6mm +0 +2 +2 +Diode_THT +Diode_Bridge_15.1x15.1x6.3mm_P10.9mm +Single phase bridge rectifier case 15.1x15.1mm, pitch 10.9mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/pb1000.pdf +Diode Bridge PB10xxS +0 +4 +4 +Diode_THT +Diode_Bridge_15.2x15.2x6.3mm_P10.9mm +Single phase bridge rectifier case 15.2x15.2mm, pitch 10.9mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/kbpc600.pdf +Diode Bridge KBPC6xx +0 +4 +4 +Diode_THT +Diode_Bridge_15.7x15.7x6.3mm_P10.8mm +Single phase bridge rectifier case 15.7x15.7 +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_16.7x16.7x6.3mm_P10.8mm +Single phase bridge rectifier case 16.7x16.7 +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_19.0x3.5x10.0mm_P5.0mm +Vishay GBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88606/g3sba20.pdf +Vishay GBU rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_19.0x19.0x6.8mm_P12.7mm +Single phase bridge rectifier case 19x19mm, pitch 12.7mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/pb1000.pdf +Diode Bridge PB10xx +0 +4 +4 +Diode_THT +Diode_Bridge_28.6x28.6x7.3mm_P18.0mm_P11.6mm +Single phase bridge rectifier case 28.6x28.6mm, pitch 18.0mm & 11.6mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/kbpc1500fw.pdf +Diode Bridge KBPCxxxxWP +0 +4 +4 +Diode_THT +Diode_Bridge_32.0x5.6x17.0mm_P10.0mm_P7.5mm +Diotec 32x5.6x17mm rectifier package, 7.5mm/10mm pitch, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40c3700.pdf +Diotec rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_DIP-4_W5.08mm_P2.54mm +4-lead dip package for diode bridges, row spacing 5.08mm, pin-spacing 2.54mm, see http://www.vishay.com/docs/88898/b2m.pdf +DIL DIP PDIP 5.08mm 2.54 +0 +4 +4 +Diode_THT +Diode_Bridge_DIP-4_W7.62mm_P5.08mm +4-lead dip package for diode bridges, row spacing 7.62 mm (300 mils), see http://cdn-reichelt.de/documents/datenblatt/A400/HDBL101G_20SERIES-TSC.pdf +DIL DIP PDIP 5.08mm 7.62mm 300mil +0 +4 +4 +Diode_THT +Diode_Bridge_IXYS_GUFP +Three phase, Bridge, Rectifier +diode module +0 +5 +5 +Diode_THT +Diode_Bridge_Round_D8.9mm +4-lead round diode bridge package, diameter 8.9mm, pin pitch 5.08mm, see http://cdn-reichelt.de/documents/datenblatt/A400/W005M-W10M_SEP.PDF +diode bridge 8.9mm 8.85mm WOB pitch 5.08mm +0 +4 +4 +Diode_THT +Diode_Bridge_Round_D9.0mm +4-lead round diode bridge package, diameter 9.0mm, pin pitch 5.0mm, see https://diotec.com/tl_files/diotec/files/pdf/datasheets/b40r.pdf +diode bridge 9.0mm 8.85mm WOB pitch 5.0mm +0 +4 +4 +Diode_THT +Diode_Bridge_Round_D9.8mm +4-lead round diode bridge package, diameter 9.8mm, pin pitch 5.08mm, see http://www.vishay.com/docs/88769/woo5g.pdf +diode bridge 9.8mm WOG pitch 5.08mm +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_GBL +Vishay GBL rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88609/gbl005.pdf +Vishay GBL rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_GBU +Vishay GBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88606/g3sba20.pdf +Vishay GBU rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBL +Vishay KBL rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88655/kbl005.pdf +Vishay KBL rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBPC1 +Single phase bridge rectifier case KBPC1, see http://www.vishay.com/docs/93585/vs-kbpc1series.pdf +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBPC6 +Single phase bridge rectifier case KBPC6, see http://www.vishay.com/docs/93585/vs-kbpc1series.pdf +Diode Bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBPM +Vishay KBM rectifier package, 3.95mm pitch (http://www.farnell.com/datasheets/2238158.pdf, http://www.cdil.com/s/kbp2005_.pdf) +Vishay KBM rectifier diode bridge +0 +4 +4 +Diode_THT +Diode_Bridge_Vishay_KBU +Vishay KBU rectifier package, 5.08mm pitch, see http://www.vishay.com/docs/88656/kbu4.pdf +Vishay KBU rectifier diode bridge +0 +4 +4 +Display +AG12864E +STN/FSTN LCD 128x64 dot https://www.digchip.com/datasheets/parts/datasheet/1121/AG-12864E-pdf.php +AG12864E Graphics Display 128x64 Ampire +0 +24 +20 +Display +Adafruit_SSD1306 +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI https://learn.adafruit.com/monochrome-oled-breakouts/downloads +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI +0 +8 +8 +Display +Adafruit_SSD1306_No_Mounting_Holes +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI https://learn.adafruit.com/monochrome-oled-breakouts/downloads +Adafruit SSD1306 OLED 1.3 inch 128x64 I2C & SPI +0 +8 +8 +Display +CR2013-MI2120 +CR2013-MI2120 ILI9341 LCD Breakout http://pan.baidu.com/s/11Y990 +CR2013-MI2120 ILI9341 LCD Breakout +0 +18 +14 +Display +EA-eDIP128B-XXX +LCD-graphical display with LED backlight 128x64 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip128-6e.pdf +LCD-graphical display with LED backlight 128x64 RS-232 I2C or SPI +0 +32 +32 +Display +EA_DOGS104X-A +LCD 4x10 character 3.3V VDD I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/doma/dogs104e.pdf +LCD 4x10 character 3.3V VDD I2C or SPI +0 +14 +14 +Display +EA_DOGXL160-7 +Grapchical,Display,LCD,160x104 http://www.lcd-module.com/eng/pdf/grafik/dogxl160-7e.pdf +EA_DOGXL160-7 +0 +22 +22 +Display +EA_DOGXL160-7_Backlight +Grapchical,Display,LCD,160x104 http://www.lcd-module.com/eng/pdf/grafik/dogxl160-7e.pdf +EA_DOGXL160-7_Backlight +0 +22 +22 +Display +EA_T123X-I2C +http://www.lcd-module.de/pdf/doma/t123-i2c.pdf +3 Line 12 character wide alpha numeric LCD +0 +6 +6 +Display +EA_eDIP160-XXX +LCD-graphical display with LED backlight 160x104 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip160-7e.pdf +LCD-graphical display with LED backlight 160x104 RS-232 I2C or SPI +0 +40 +40 +Display +EA_eDIP240-XXX +LCD graphical display LED backlight 240x128 http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip240-7e.pdf +LCD graphical display LED backlight 240x128 +0 +40 +40 +Display +EA_eDIP320X-XXX +LCD display 320x340 RS-232 I2C or SPI http://www.lcd-module.com/fileadmin/eng/pdf/grafik/edip320-8e.pdf +LCD display 320x340 RS-232 I2C or SPI +0 +48 +48 +Display +EA_eDIPTFT32-XXX +TFT-graphic display 320x240 16 bit colour with led backlight http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft32-ae.pdf +TFT-graphic display 320x240 16 bit colour with led backlight +0 +40 +40 +Display +EA_eDIPTFT43-ATC +http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft43-ae.pdf +TFT graphical display 480x272 16-bit colour with LED backlight +0 +40 +40 +Display +EA_eDIPTFT43-XXX +TFT graphical display 480x272 16-bit colour with LED backlight http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft43-ae.pdf +TFT graphical display 480x272 16-bit colour with LED backlight +0 +40 +40 +Display +EA_eDIPTFT57-XXX +http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft57-ae.pdf +TFT-graphic display 640x480 16 bit colour +0 +48 +48 +Display +EA_eDIPTFT70-ATC +TFT-graphical display 800x480 16-bit colours with capacitive touch panel http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft70-ae.pdf +TFT-graphical display 800x480 16-bit colours with capacitive touch panel +0 +48 +48 +Display +EA_eDIPTFT70-XXX +TFT-graphical display 800x480 16-bit colours http://www.lcd-module.com/fileadmin/eng/pdf/grafik/ediptft70-ae.pdf +TFT-graphical display 800x480 16-bit colours and touch display +0 +48 +48 +Display +HDSM-441B_HDSM-443B +2 Digit 7 segemnt blue LED, right hand decimal, https://docs.broadcom.com/docs/AV02-1589EN +2 Digit 7 segment blue LED +0 +10 +10 +Display +HDSM-541B_HDSM-543B +2 digit 7 segement blue LED with right hand decimal, https://docs.broadcom.com/docs/AV02-1588EN +2 digit 7 segement blue LED with right hand decimal +0 +10 +10 +Display +HDSP-48xx +10-Element Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Bar Graph Array +0 +20 +20 +Display +HDSP-4830 +10-Element Red Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Bar Graph Array +0 +20 +20 +Display +HDSP-4832 +10-Element Red Yellow Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Yellow Green Bar Graph Array +0 +20 +20 +Display +HDSP-4836 +10-Element Red Yellow Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Yellow Green Bar Graph Array +0 +20 +20 +Display +HDSP-4840 +10-Element Yellow Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Yellow Bar Graph Array +0 +20 +20 +Display +HDSP-4850 +10-Element Green Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Green Bar Graph Array +0 +20 +20 +Display +HLCP-J100 +10-Element Red Bar Graph Array https://docs.broadcom.com/docs/AV02-1798EN +10-Element Red Bar Graph Array +0 +20 +20 +Display +HY1602E +http://www.icbank.com/data/ICBShop/board/HY1602E.pdf +LCD 16x2 Alphanumeric 16pin +0 +20 +16 +Display +LCD-016N002L +16 x 2 Character LCD, http://www.vishay.com/product?docid=37299 +LCD-016N002L 16 x 2 Character LCD +0 +24 +20 +Display +LM16255 +LCD LM16255 16x2 character http://www.datasheetlib.com/datasheet/259542/lm16255_sharp-electronics.html +LCD 12x2 +0 +14 +14 +Display +NHD-0420H1Z +NHD-0420H1Z LCD http://www.newhavendisplay.com/specs/NHD-0420H1Z-FSW-GBW-33V3.pdf +NHD-0420H1Z LCD +0 +16 +16 +Display +NHD-C0220BiZ +NHD-C0220BiZ LCD http://www.newhavendisplay.com/specs/NHD-C0220BiZ-FSW-FBW-3V3M.pdf +NHD-C0220BiZ LCD +0 +10 +10 +Display +OLED-128O064D +128x64 OLED display +display oled +0 +30 +30 +Display +RC1602A +http://www.raystar-optronics.com/down.php?ProID=18 +LCD 16x2 Alphanumeric 16pin +0 +22 +18 +Display +WC1602A +LCD 16x2 http://www.wincomlcd.com/pdf/WC1602A-SFYLYHTC06.pdf +LCD 16x2 Alphanumeric 16pin +0 +20 +16 +Display_7Segment +7SEGMENT-LED__HDSM531_HDSM533_SMD +7-Segment Display, HDSM53x, https://docs.broadcom.com/docs/AV02-0713EN +7segment LED HDSM531 HDSM533 +0 +10 +10 +Display_7Segment +7SegmentLED_LTS6760_LTS6780 +7-Segment Display, LTS67x0, http://optoelectronics.liteon.com/upload/download/DS30-2001-355/S6760jd.pdf +7Segment LED LTS6760 LTS6780 +0 +10 +10 +Display_7Segment +AD-121F2 +Single Digit 7-segment RGB LED Display, 1-inch digit height, common anode, http://usasyck.com/products/AD-121F2_cat_e.pdf +RGB LED digit +0 +22 +22 +Display_7Segment +AFF_2x7SEG-DIGIT_10mm +Afficheur 7 segments 10mm DIGIT +AFFICHEUR +0 +16 +16 +Display_7Segment +CA56-12CGKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12CGKWA(Ver.9A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12EWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-12EWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SEKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SEKWA(Ver.7A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SRWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-12SRWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SURKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SURKWA(Ver.8A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CA56-12SYKWA +4 digit 7 segment green LED, http://www.kingbright.com/attachments/file/psearch/000/00/00/CA56-12SYKWA(Ver.6A).pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CC56-12GWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CA56-11GWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +CC56-12YWA +4 digit 7 segment green LED, http://www.kingbrightusa.com/images/catalog/SPEC/CC56-12YWA.pdf +4 digit 7 segment green LED +0 +12 +12 +Display_7Segment +DA04-11CGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11CGKWA(Ver.6A).pdf +Dubble digit green 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SEKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SEKWA(Ver.9A).pdf +Dubble digit super bright orange 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SURKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SURKWA(Ver.10A).pdf +Dubble digit hyper red 7 segment LED display +0 +16 +16 +Display_7Segment +DA04-11SYKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA04-11SYKWA(Ver.6A).pdf +Dubble digit super bright yellow 7 segment LED display +0 +16 +16 +Display_7Segment +DA56-11CGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11CGKWA(Ver.16A).pdf +Double digit seven segment green LED display +0 +18 +18 +Display_7Segment +DA56-11SEKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SEKWA(Ver.9A).pdf +Double digit seven segment super bright orange LED display +0 +18 +18 +Display_7Segment +DA56-11SURKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SURKWA(Ver.11A).pdf +Double digit seven segment hyper red LED display +0 +18 +18 +Display_7Segment +DA56-11SYKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/DA56-11SYKWA(Ver.11A).pdf +Double digit seven segment super bright yellow LED display +0 +18 +18 +Display_7Segment +DE113-XX-XX +http://www.display-elektronik.de/filter/DE113-RS-20_635.pdf +3 1/5 digit LOW BAT + 7-Segment LCD +0 +40 +40 +Display_7Segment +DE114-RS-20 +http://www.display-elektronik.de/filter/DE113-RS-20_635.pdf +3 1/5 digit reflective LCD LOW-BAT + 7-Segment +0 +40 +40 +Display_7Segment +DE122-XX-XX +http://www.display-elektronik.de/filter/DE122-RS-20_635.pdf +6 digit 7 segment LCD +0 +50 +50 +Display_7Segment +DE170-XX-XX +http://www.display-elektronik.de/filter/DE170-RS-20_75.pdf +3 1/5 digit reflective arrow bat + 7 segment LCD +0 +40 +40 +Display_7Segment +ELD_426XXXX +http://www.everlight.com/file/ProductFile/D426SYGWA-S530-E2.pdf +Double digit 7 segment brilliant yellow green LED +0 +10 +10 +Display_7Segment +HDSP-7401 +One digit 7 segment yellow, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment yellow +0 +10 +10 +Display_7Segment +HDSP-7507 ++-1 overflow 7 segment high efficiency red, https://docs.broadcom.com/docs/AV02-2553EN ++-1 overflow 7 segment high efficiency red +0 +10 +10 +Display_7Segment +HDSP-7801 +One digit 7 segment green, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment green +0 +10 +10 +Display_7Segment +HDSP-7807 ++-1 overflow 7 segment green, https://docs.broadcom.com/docs/AV02-2553EN ++-1 overflow 7 segment green +0 +10 +10 +Display_7Segment +HDSP-A151 +One digit 7 segment red, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment high efficiency red +0 +10 +10 +Display_7Segment +HDSP-A401 +One digit 7 segment orange, common anode, https://docs.broadcom.com/docs/AV02-2553EN +One digit 7 segment orange common anode +0 +10 +10 +Display_7Segment +KCSC02-105 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-105(Ver.9A).pdf +Single digit 7 segement hyper red LED +0 +10 +10 +Display_7Segment +KCSC02-106 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-106(Ver.10A).pdf +Single digit 7 segement super bright orange LED +0 +10 +10 +Display_7Segment +KCSC02-107 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-107(Ver.9A).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +KCSC02-123 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-123(Ver.10A).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +KCSC02-136 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KCSC02-136(Ver.6B).pdf +Single digit 7 segement super bright yellow LED +0 +10 +10 +Display_7Segment +MAN71A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment red LED with right dot +0 +14 +14 +Display_7Segment +MAN72A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment red LED with left dot +0 +14 +14 +Display_7Segment +MAN73A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +Overflow +- 1 red LED +0 +14 +14 +Display_7Segment +MAN3410A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment green LED with dot +0 +14 +14 +Display_7Segment +MAN3420A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment green LED with left dot +0 +14 +14 +Display_7Segment +MAN3610A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment orange LED with right dot +0 +14 +14 +Display_7Segment +MAN3620A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment orange LED with left dot +0 +14 +14 +Display_7Segment +MAN3630A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +Overflow +- 1 orange LED +0 +14 +14 +Display_7Segment +MAN3810A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment yellow LED with right dot +0 +14 +14 +Display_7Segment +MAN3820A +https://www.digchip.com/datasheets/parts/datasheet/161/MAN3640A-pdf.php +One digit 7 segment yellow LED with left dot +0 +14 +14 +Display_7Segment +SA15-11xxx +http://www.kingbrightusa.com/images/catalog/SPEC/SA15-11SRWA.pdf +SA15-11xxx single digit 7 segment display 38.1mm 1.5inch +0 +10 +10 +Display_7Segment +SBC18-11SURKCGKWA +http://www.kingbright.com/attachments/file/psearch/000/00/00/SBC18-11SURKCGKWA(Ver.6A).pdf +single digit 7 segemnt red/green LED +0 +10 +10 +Display_7Segment +Sx39-1xxxxx +Single digit 7 segment LED display in red, yellow or green colour http://www.kingbrightusa.com/images/catalog/SPEC/sa39-11ewa.pdf +One digit LED 7 segment SA39-11 SC39-11 SA39-12 SC39-12 +0 +10 +10 +Ferrite_THT +LairdTech_28C0236-0JW-10 +Ferrite, vertical, LairdTech 28C0236-0JW-10, https://assets.lairdtech.com/home/brandworld/files/28C0236-0JW-10.pdf, JW Miller core https://www.bourns.com/products/magnetic-products/j.w.-miller-through-hole-ferrite-beads-emi-filters +Ferrite vertical LairdTech 28C0236-0JW-10 +0 +2 +2 +Fiducial +Fiducial_0.5mm_Mask1.5mm +Circular Fiducial, 0.5mm bare copper, 1.5mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_0.5mm_Mask1mm +Circular Fiducial, 0.5mm bare copper, 1mm soldermask opening (Level C) +fiducial +0 +1 +0 +Fiducial +Fiducial_0.75mm_Mask1.5mm +Circular Fiducial, 0.75mm bare copper, 1.5mm soldermask opening (Level B) +fiducial +0 +1 +0 +Fiducial +Fiducial_0.75mm_Mask2.25mm +Circular Fiducial, 0.75mm bare copper, 2.25mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1.5mm_Mask3mm +Circular Fiducial, 1.5mm bare copper, 3mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1.5mm_Mask4.5mm +Circular Fiducial, 1.5mm bare copper, 4.5mm soldermask opening +fiducial +0 +1 +0 +Fiducial +Fiducial_1mm_Mask2mm +Circular Fiducial, 1mm bare copper, 2mm soldermask opening (Level A) +fiducial +0 +1 +0 +Fiducial +Fiducial_1mm_Mask3mm +Circular Fiducial, 1mm bare copper, 3mm soldermask opening (recommended) +fiducial +0 +1 +0 +Filter +Filter_1109-5_1.1x0.9mm +5-pin SAW filter package - 1.1x0.9 mm Body; (see https://www.murata.com/~/media/webrenewal/support/library/catalog/products/filter/rf/p73e.ashx?la=en-gb) +Filter 5 +0 +5 +5 +Filter +Filter_1411-5_1.4x1.1mm +5-pin filter package - 1.4x1.1 mm Body; (see https://global.kyocera.com/prdct/electro/product/pdf/sf14_tdlte.pdf) +Filter 5 +0 +5 +5 +Filter +Filter_Bourns_SRF0905_6.0x9.2mm +https://www.bourns.com/docs/Product-Datasheets/SRF0905.pdf +Line Filter +0 +4 +4 +Filter +Filter_FILTERCON_1FPxx +0.5A, 250VAC, 50/60Hz line filter (https://filtercon.com.pl/wp-content/uploads/2019/07/Karta-katalogowa-FP-12-1.pdf) +EMI filter +0 +4 +4 +Filter +Filter_Mini-Circuits_FV1206 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206.pdf +Mini-Circuits Filter SMD 1206 +0 +6 +4 +Filter +Filter_Mini-Circuits_FV1206-1 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-1.pdf +Mini-Circuits Filter SMD 1206 +0 +6 +6 +Filter +Filter_Mini-Circuits_FV1206-4 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-4.pdf +Mini-Circuits Filter SMD 1206 +0 +8 +4 +Filter +Filter_Mini-Circuits_FV1206-5 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-5.pdf +Mini-Circuits Filter SMD 1206 +0 +8 +4 +Filter +Filter_Mini-Circuits_FV1206-6 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-6.pdf +Mini-Circuits Filter SMD 1206 +0 +14 +8 +Filter +Filter_Mini-Circuits_FV1206-7 +Mini-Circuits Filter SMD 1206 https://ww2.minicircuits.com/case_style/FV1206-7.pdf +Mini-Circuits Filter SMD 1206 +0 +5 +3 +Filter +Filter_Murata_BNX025 +https://www.murata.com/en-us/products/productdata/8796778004510/QNFH9101.pdf?1496719830000 +EMI Filter +0 +6 +4 +Filter +Filter_Murata_BNX025_ThermalVias +https://www.murata.com/en-us/products/productdata/8796778004510/QNFH9101.pdf?1496719830000 +EMI Filter +0 +19 +4 +Filter +Filter_Schaffner_FN405 +Compact PCB mounting EMI filter (https://www.schaffner.com/de/produkte/download/product/datasheet/fn-405-pcb-mounting-filter/) +EMI filter +0 +5 +5 +Filter +Filter_Schaffner_FN406 +Ultra Compact EMC Filter (https://www.schaffner.com/products/download/product/datasheet/fn-406-ultra-compact-emc-filter/) +emi filter +0 +5 +5 +Fuse +Fuse_0402_1005Metric +Fuse SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_0402_1005Metric_Castellated +Fuse SMD 0402 (1005 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_0402_1005Metric_Pad0.77x0.64mm_HandSolder +Fuse SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_0603_1608Metric +Fuse SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_0603_1608Metric_Castellated +Fuse SMD 0603 (1608 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Fuse SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_0805_2012Metric +Fuse SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_0805_2012Metric_Castellated +Fuse SMD 0805 (2012 Metric), castellated end terminal, IPC_7351. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Fuse SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_1206_3216Metric +Fuse SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_1206_3216Metric_Castellated +Fuse SMD 1206 (3216 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Fuse SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_1210_3225Metric +Fuse SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_1210_3225Metric_Castellated +Fuse SMD 1210 (3225 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Fuse SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_1812_4532Metric +Fuse SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_1812_4532Metric_Castellated +Fuse SMD 1812 (4532 Metric), castellated end terminal, IPC_7351. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Fuse SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_2010_5025Metric +Fuse SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_2010_5025Metric_Castellated +Fuse SMD 2010 (5025 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Fuse SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_2512_6332Metric +Fuse SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_2512_6332Metric_Castellated +Fuse SMD 2512 (6332 Metric), castellated end terminal, IPC_7351. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Fuse SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_2816_7142Metric +Fuse SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_2816_7142Metric_Castellated +Fuse SMD 2816 (7142 Metric), castellated end terminal, IPC_7351. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Fuse SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_2920_7451Metric +Fuse SMD 2920 (7451 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: http://www.megastar.com/products/fusetronic/polyswitch/PDF/smd2920.pdf), generated with kicad-footprint-generator +fuse +0 +2 +2 +Fuse +Fuse_2920_7451Metric_Castellated +Fuse SMD 2920 (7451 Metric), castellated end terminal, IPC_7351. (Body size from: http://www.megastar.com/products/fusetronic/polyswitch/PDF/smd2920.pdf), generated with kicad-footprint-generator +fuse castellated +0 +2 +2 +Fuse +Fuse_2920_7451Metric_Pad2.10x5.45mm_HandSolder +Fuse SMD 2920 (7451 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: http://www.megastar.com/products/fusetronic/polyswitch/PDF/smd2920.pdf), generated with kicad-footprint-generator +fuse handsolder +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0005FF_L8.3mm_W3.8mm +Fuse 0ZRE0005FF, BelFuse, Radial Leaded PTC, https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0008FF_L8.3mm_W3.8mm +Fuse 0ZRE0008FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0012FF_L8.3mm_W3.8mm +Fuse 0ZRE0012FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0016FF_L9.9mm_W3.8mm +Fuse 0ZRE0016FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0025FF_L9.6mm_W3.8mm +Fuse 0ZRE0025FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0033FF_L11.4mm_W3.8mm +Fuse 0ZRE0033FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0040FF_L11.5mm_W3.8mm +Fuse 0ZRE0040FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0055FF_L14.0mm_W4.1mm +Fuse 0ZRE0055FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0075FF_L11.5mm_W4.8mm +Fuse 0ZRE0075FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0100FF_L18.7mm_W5.1mm +Fuse 0ZRE0100FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0125FF_L21.2mm_W5.3mm +Fuse 0ZRE0125FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0150FF_L23.4mm_W5.3mm +Fuse 0ZRE0150FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_BelFuse_0ZRE0200FF_L24.9mm_W6.1mm +Fuse 0ZRE0200FF, BelFuse, Radial Leaded PTC,https://www.belfuse.com/resources/datasheets/circuitprotection/ds-cp-0zre-series.pdf +0ZRE BelFuse radial PTC +0 +2 +2 +Fuse +Fuse_Blade_ATO_directSolder +car blade fuse direct solder +car blade fuse +0 +2 +2 +Fuse +Fuse_Blade_Mini_directSolder +car blade fuse mini, direct solder +car blade fuse mini +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG300 +PTC Resettable Fuse, Ihold = 3.0A, Itrip=5.1A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG400 +PTC Resettable Fuse, Ihold = 4.0A, Itrip=6.8A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG500 +PTC Resettable Fuse, Ihold = 5.0A, Itrip=8.5A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG600 +PTC Resettable Fuse, Ihold = 6.0A, Itrip=10.2A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG650 +PTC Resettable Fuse, Ihold = 6.5A, Itrip=11.1A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG700 +PTC Resettable Fuse, Ihold = 7.0A, Itrip=11.9A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG800 +PTC Resettable Fuse, Ihold = 8.0A, Itrip=13.6A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG900 +PTC Resettable Fuse, Ihold = 9.0A, Itrip=15.3A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG1000 +PTC Resettable Fuse, Ihold = 10.0A, Itrip=17.0A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RG1100 +PTC Resettable Fuse, Ihold = 11.0A, Itrip=18.7A, http://www.bourns.com/docs/Product-Datasheets/mfrg.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT050 +PTC Resettable Fuse, Ihold = 0.5A, Itrip=0.92A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT070 +PTC Resettable Fuse, Ihold = 0.7A, Itrip=1.4A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT100 +PTC Resettable Fuse, Ihold = 1.0A, Itrip=1.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT200 +PTC Resettable Fuse, Ihold = 2.0A, Itrip=3.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT300 +PTC Resettable Fuse, Ihold = 3.0A, Itrip=6.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT400 +PTC Resettable Fuse, Ihold = 4.0A, Itrip=7.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT500 +PTC Resettable Fuse, Ihold = 5.0A, Itrip=9.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT550 +PTC Resettable Fuse, Ihold = 5.5A, Itrip=10.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT600 +PTC Resettable Fuse, Ihold = 6.0A, Itrip=10.8A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT650 +PTC Resettable Fuse, Ihold = 6.5A, Itrip=12.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT700 +PTC Resettable Fuse, Ihold = 7.0A, Itrip=13.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT750 +PTC Resettable Fuse, Ihold = 7.5A, Itrip=13.1A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT800 +PTC Resettable Fuse, Ihold = 8.0A, Itrip=15.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT900 +PTC Resettable Fuse, Ihold = 9.0A, Itrip=16.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1000 +PTC Resettable Fuse, Ihold = 10.0A, Itrip=18.5A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1100 +PTC Resettable Fuse, Ihold = 11.0A, Itrip=20.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-RHT1300 +PTC Resettable Fuse, Ihold = 13.0A, Itrip=24.0A, http://www.bourns.com/docs/product-datasheets/mfrht.pdf +ptc resettable fuse polyfuse THT +0 +2 +2 +Fuse +Fuse_Bourns_MF-SM_7.98x5.44mm +https://www.bourns.com/docs/Product-Datasheets/mfsm.pdf +bourns ptc resettable fuse polyfuse MF-SM MF-SMHT +0 +2 +2 +Fuse +Fuse_Bourns_MF-SM_9.5x6.71mm +https://www.bourns.com/docs/Product-Datasheets/mfsm.pdf +bourns ptc resettable fuse polyfuse MF-SM MF-SMHT +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR100 +Littelfuse, resettable fuse, PTC, polyswitch LVR100, Ih 1A http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR100 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR125 +Littelfuse, resettable fuse, PTC, polyswitch LVR125, Ih 1.25A, http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR125 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse-LVR200 +Littelfuse, resettable fuse, PTC, polyswitch LVR200, Ih 2A, http://www.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_lvr_catalog_datasheet.pdf.pdf +LVR200 PTC resettable polyswitch +0 +2 +2 +Fuse +Fuse_Littelfuse-NANO2-451_453 +Littelfuse NANO2 https://www.littelfuse.com/~/media/electronics/datasheets/fuses/littelfuse_fuse_451_453_datasheet.pdf.pdf +Fuse Nano2 +0 +2 +2 +Fuse +Fuse_Littelfuse_372_D8.50mm +Fuse, Littelfuse, 372, 8.5x8mm, https://www.littelfuse.com/~/media/electronics/datasheets/fuses/littelfuse_fuse_372_datasheet.pdf.pdf +fuse tht radial +0 +2 +2 +Fuse +Fuse_Littelfuse_395Series +Fuse, TE5, Littelfuse/Wickmann, No. 460, No560, +Fuse TE5 Littelfuse/Wickmann No. 460 No560 +0 +2 +2 +Fuse +Fuse_Schurter_UMT250 +Surface Mount Fuse, 3 x 10.1 mm, Time-Lag T, 250 VAC, 125 VDC (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_UMT_250.pdf) +Schurter fuse smd +0 +2 +2 +Fuse +Fuse_Schurter_UMZ250 +Surface Mount Fuse with Clip, 4.2 x 11.1 mm, Time-Lag T, 250 VAC, 125 VDC (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_UMZ_250.pdf) +fuse smd mount holder +0 +2 +2 +Fuse +Fuse_SunFuse-6HP +SunFuse Ceramic Slow Blow Fuse 6H_6HP.PDF +UL/CSA 6x32mm Ceramic Slow Blow Fuse +0 +2 +2 +Fuse +Fuseholder_Blade_ATO_Littelfuse_Pudenz_2_Pin +Fuseholder ATO Blade littelfuse Pudenz 2 Pin +Fuseholder ATO Blade littelfuse Pudenz 2 Pin +0 +2 +2 +Fuse +Fuseholder_Blade_Mini_Keystone_3568 +fuse holder, car blade fuse mini, http://www.keyelco.com/product-pdf.cfm?p=306 +car blade fuse mini +0 +4 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Bulgin_FX0456_Vertical_Closed +Fuseholder, 5x20, closed, vertical, Bulgin, FX0456, https://www.bulgin.com/products/pub/media/bulgin/data/Fuseholders.pdf +Fuseholder 5x20 closed vertical Bulgin FX0456 Sicherungshalter +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Bulgin_FX0457_Horizontal_Closed +Fuseholder, 5x20, closed, horizontal, Bulgin, FX0457, Sicherungshalter, +Fuseholder 5x20 closed horizontal Bulgin FX0457 Sicherungshalter +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_H15-V-1_Vertical_Closed +PCB fuse holders for 5 mm x 20 mm fuses; 250V; 10A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/bus-elx-ds-4426-h15.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_HBV_Vertical_Closed +5 mm x 20 mm fuse holders; Vertical w/ Stability Pins; 250V; 6.3-16A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/Bus_Elx_DS_2118_HB_PCB_Series.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_EATON_HBW_Vertical_Closed +5 mm x 20 mm fuse holders; Vertical w/o Stability Pins; 250V; 6.3-16A (http://www.cooperindustries.com/content/dam/public/bussmann/Electronics/Resources/product-datasheets/Bus_Elx_DS_2118_HB_PCB_Series.pdf) +fuse holder vertical 5x20mm +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_0031_8201_Horizontal_Open +Fuseholder horizontal open, 5x20mm, 500V, 16A, Schurter 0031.8201, https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_OGN.pdf +Fuseholder horizontal open 5x20 Schurter 0031.8201 +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FAB_0031-355x_Horizontal_Closed +Fuseholder 5x20mm horizontal Shurter model FAB, Suitable for order numbers 0031.3551 and 0031.3558 (https://www.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FAB.pdf) +Fuseholder 5x20mm closed horizontal +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FPG4_Vertical_Closed +Shock-Safe Fuseholder, 5 x 20 mm, Slotted Cap/Fingergrip, vertical, IEC 60335-1; 250VAC/10A VDE; 500V/16A UL/CSA (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FPG4.pdf) +fuse holder vertical 5x20mm +0 +4 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_FUP_0031.2510_Horizontal_Closed +Shock-Safe closed Fuseholder, Schurter FUP Series, 5.0 x 20mm, Slotted Cap, horizontal, 500 VAC 4W/16A (VDE), 600V 30A (UL/CSA), order numbers: 0031.2510 (0031.2500 + 0031.2323), http://www.schurter.ch/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FUP.pdf +Fuseholder 5x20mm horizontal closed +0 +3 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Schurter_OGN-SMD_Horizontal_Open +Fuseholder horizontal open, 5x20mm, 500V, 16A (https://us.schurter.com/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_OGN-SMD.pdf) +Fuseholder horizontal open 5x20 Schurter 0031.8221 +0 +2 +2 +Fuse +Fuseholder_Cylinder-5x20mm_Stelvio-Kontek_PTF78_Horizontal_Open +https://www.tme.eu/en/Document/3b48dbe2b9714a62652c97b08fcd464b/PTF78.pdf +Fuseholder horizontal open 5x20 Stelvio-Kontek PTF/78 +0 +2 +2 +Fuse +Fuseholder_Cylinder-6.3x32mm_Schurter_0031-8002_Horizontal_Open +Fuseholder, horizontal, open, 6.3x32, Schurter, 0031.8002, https://www.schurter.com/en/datasheet/typ_OG__Holder__6.3x32.pdf +Fuseholder horizontal open 6.3x32 Schurter 0031.8002 +0 +2 +2 +Fuse +Fuseholder_Cylinder-6.3x32mm_Schurter_FUP_0031.2520_Horizontal_Closed +Shock-Safe closed Fuseholder, Schurter FUP Series, 6.3 x 32 mm, Slotted Cap, horizontal, 500 VAC 4W/16A (VDE), 600V 30A (UL/CSA), order numbers: 0031.2520 (0031.2500 + 0031.2321), http://www.schurter.ch/bundles/snceschurter/epim/_ProdPool_/newDS/en/typ_FUP.pdf +Fuseholder 6.3x32mm horizontal closed +0 +3 +2 +Fuse +Fuseholder_Littelfuse_Nano2_157x +Littelfuse NANO2 holder, https://www.littelfuse.com/~/media/electronics/datasheets/fuses/littelfuse_fuse_157_datasheet.pdf.pdf +SMD Nano2 holder +0 +2 +2 +Fuse +Fuseholder_TR5_Littelfuse_No560_No460 +Fuse, Fuseholder, TR5, Littelfuse/Wickmann, No. 460, No560, https://www.littelfuse.com/~/media/electronics/datasheets/fuse_holders/littelfuse_fuse_holder_559_560_datasheet.pdf.pdf +Fuse Fuseholder TR5 Littelfuse/Wickmann No. 460 No560 +0 +2 +2 +Heatsink +Heatsink_35x26mm_1xFixation3mm_Fischer-SK486-35 +Heatsink, 35mm x 26mm, 1x Fixation 3mm, Fischer SK486-35 +heatsink +0 +1 +1 +Heatsink +Heatsink_38x38mm_SpringFixation +Heatsink, 38x38mm, Spring Fixation, diagonal, +heatsink +0 +4 +1 +Heatsink +Heatsink_62x40mm_2xFixation3mm +Heatsink, 62 x 40mm, 2x 3mm Drills, +heatsink +0 +2 +1 +Heatsink +Heatsink_125x35x50mm_3xFixationM3 +Heatsink, 125x35x50mm, 3 fixation holes 3.2mm +heatsink +0 +0 +0 +Heatsink +Heatsink_AAVID_573300D00010G_TO-263 +Heatsink, 12.70mm x 26.16mm x 10.16, SMD, 18K/W, TO-263, D2 Pak, https://www.shopaavid.com/Product/573300D00000G +Heatsink AAVID TO-263 D2 Pak +0 +2 +1 +Heatsink +Heatsink_Aavid-TV5G_TO220_Horizontal +Heatsink TV5G TO-220 Horizontal, https://www.shopaavid.com/Product/TV-5G +Heatsink TV5G TO-220 Horizontal +0 +0 +0 +Heatsink +Heatsink_Fischer_FK224xx2201_25x8.3mm +25x8.3mm Heatsink, 18K/W, TO-220, https://www.fischerelektronik.de/web_fischer/en_GB/$catalogue/fischerData/PR/FK224_220_1_/datasheet.xhtml?branch=heatsinks +heatsink TO-220 +0 +2 +1 +Heatsink +Heatsink_Fischer_FK24413D2PAK_26x13mm +26x13 mm SMD heatsink for TO-252 TO-263 TO-268, https://www.fischerelektronik.de/pim/upload/fischerData/cadpdf/base/fk_244_13_d2_pak.pdf +heatsink TO-252 TO-263 TO-268 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK104-STC-STIC_35x13mm_2xDrill2.5mm +Heatsink, 35mm x 13mm, 2x Fixation 2,5mm Drill, Soldering, Fischer SK104-STC-STIC, +Heatsink fischer TO-220 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK104-STCB_35x13mm__2xDrill3.5mm_ScrewM3 +Heatsink, 35mm x 13mm, 2x Fixation 2,5mm Drill, Soldering, Fischer SK104-STC-STIC, +Heatsink fischer TO-220 +0 +2 +1 +Heatsink +Heatsink_Fischer_SK129-STS_42x25mm_2xDrill2.5mm +Heatsink, Fischer SK129 +heatsink fischer +0 +2 +1 +Heatsink +Heatsink_SheetType_50x7mm_2Fixations +Heatsink, Sheet type, 50x7mm, 2 fixations (solder), +Heatsink sheet +0 +2 +1 +Heatsink +Heatsink_Stonecold_HS-132_32x14mm_2xFixation1.5mm +Heatsink, StoneCold HS +heatsink +0 +2 +1 +Inductor_SMD +L_6.3x6.3_H3 +Choke, SMD, 6.3x6.3mm 3mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_7.3x7.3_H3.5 +Choke, SMD, 7.3x7.3mm 3.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_7.3x7.3_H4.5 +Choke, SMD, 7.3x7.3mm 4.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_10.4x10.4_H4.8 +Choke, SMD, 10.4x10.4mm 4.8mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H4.5mm +Choke, SMD, 12x12mm 4.5mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H6mm +Choke, SMD, 12x12mm 6mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_12x12mm_H8mm +Choke, SMD, 12x12mm 8mm height +Choke SMD +0 +2 +2 +Inductor_SMD +L_0201_0603Metric +Inductor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_0201_0603Metric_Pad0.64x0.40mm_HandSolder +Inductor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +4 +2 +Inductor_SMD +L_0402_1005Metric +Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0402_1005Metric_Pad0.77x0.64mm_HandSolder +Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0603_1608Metric +Inductor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Inductor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0805_2012Metric +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0805_2012Metric_Pad1.05x1.20mm_HandSolder +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_01005_0402Metric +Inductor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_01005_0402Metric_Pad0.57x0.30mm_HandSolder +Inductor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +4 +2 +Inductor_SMD +L_1008_2520Metric +Inductor SMD 1008 (2520 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://ecsxtal.com/store/pdf/ECS-MPI2520-SMD-POWER-INDUCTOR.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1008_2520Metric_Pad1.43x2.20mm_HandSolder +Inductor SMD 1008 (2520 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://ecsxtal.com/store/pdf/ECS-MPI2520-SMD-POWER-INDUCTOR.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1206_3216Metric +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1206_3216Metric_Pad1.22x1.90mm_HandSolder +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1210_3225Metric +Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1806_4516Metric +Inductor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1806_4516Metric_Pad1.57x1.80mm_HandSolder +Capacitor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.modelithics.com/models/Vendor/MuRata/BLM41P.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1812_4532Metric +Inductor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Inductor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2010_5025Metric +Inductor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Inductor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2512_6332Metric +Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2816_7142Metric +Inductor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Inductor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_Abracon_ASPI-0630LR +smd shielded power inductor https://abracon.com/Magnetics/power/ASPI-0630LR.pdf +inductor abracon smd shielded +0 +2 +2 +Inductor_SMD +L_Abracon_ASPI-3012S +smd shielded power inductor http://www.abracon.com/Magnetics/power/ASPI-3012S.pdf +inductor abracon smd shielded +0 +2 +2 +Inductor_SMD +L_Bourns-SRN1060 +Bourns SRN1060 series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRN1060.pdf +Bourns SRN1060 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN4018 +Bourns SRN4018 series SMD inductor, https://www.bourns.com/docs/Product-Datasheets/SRN4018.pdf +Bourns SRN4018 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN6028 +Bourns SRN6028 series SMD inductor +Bourns SRN6028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN8040_8x8.15mm +Bourns SRN8040 series SMD inductor 8x8.15mm, https://www.bourns.com/docs/Product-Datasheets/SRN8040.pdf +Bourns SRN8040 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRR1005 +Bourns SRR1005 series SMD inductor +Bourns SRR1005 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU1028_10.0x10.0mm +Bourns SRU1028 series SMD inductor, https://www.bourns.com/docs/Product-Datasheets/SRU1028.pdf +Bourns SRU1028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU8028_8.0x8.0mm +Bourns SRU8028 series SMD inductor +Bourns SRU8028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU8043 +Bourns SRU8043 series SMD inductor +Bourns SRU8043 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SDR1806 +https://www.bourns.com/docs/Product-Datasheets/SDR1806.pdf +Bourns SDR1806 +0 +2 +2 +Inductor_SMD +L_Bourns_SRF1260 +Inductor, Bourns, SRF1260, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://www.bourns.com/docs/Product-Datasheets/SRF1260.pdf) +Inductor Bourns_SRF1260 +0 +4 +4 +Inductor_SMD +L_Bourns_SRN6045TA +http://www.bourns.com/docs/product-datasheets/srn6045ta.pdf +Semi-shielded Power Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRN8040TA +https://www.bourns.com/docs/product-datasheets/srn8040ta.pdf +Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP1245A +Bourns SRP1245A series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRP1245A.pdf +Bourns SRP1245A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP2313AA +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/product-datasheets/srp2313aa.pdf +Bourns SRR1260 SMD inductor +0 +4 +2 +Inductor_SMD +L_Bourns_SRP5030T +Inductor, Bourns, SRP5030T, 5.7mmx5.2mm (Script generated with StandardBox.py) (https://www.bourns.com/data/global/pdfs/SRP5030T.pdf) +Inductor Bourns_SRP5030T +0 +2 +2 +Inductor_SMD +L_Bourns_SRP7028A_7.3x6.6mm +Shielded Power Inductors (https://www.bourns.com/docs/product-datasheets/srp7028a.pdf) +Shielded Inductors Bourns SMD SRP7028A +0 +2 +2 +Inductor_SMD +L_Bourns_SRR1210A +Bourns SRR1210A series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRR1210A.pdf +Bourns SRR1210A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRR1260 +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRR1260.pdf +Bourns SRR1260 SMD inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_LPS4018 +SMD Inductor Coilcraft LPS4018 https://www.coilcraft.com/pdfs/lps4018.pdf +L Coilcraft LPS4018 +0 +2 +2 +Inductor_SMD +L_Coilcraft_LPS5030 +Shielded Power Inductor SMD, Coilcraft LPS5030, https://www.coilcraft.com/pdfs/lps5030.pdf, StepUp generated footprint +inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_XAL60xx_6.36x6.56mm +Coilcraft XAL60xx series, https://www.coilcraft.com/pdfs/xal60xx.pdf +L Coilcraft XAL60xx +0 +2 +2 +Inductor_SMD +L_Coilcraft_XAL5030 +L_Coilcraft_XAL5030 +L Coilcraft XAL5030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4020 +L_Coilcraft_XxL4020 https://www.coilcraft.com/pdfs/xfl4020.pdf +L Coilcraft XxL4020 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4030 +L_Coilcraft_XxL4030 https://www.coilcraft.com/pdfs/xfl4030.pdf +L Coilcraft XxL4030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4040 +L_Coilcraft_XxL4040 https://www.coilcraft.com/pdfs/xal4000.pdf +L Coilcraft XxL4040 +0 +2 +2 +Inductor_SMD +L_CommonModeChoke_Coilcraft_0603USB +Coilcraft 0603USB Series Common Mode Choke, https://www.coilcraft.com/pdfs/0603usb.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonModeChoke_Coilcraft_0805USB +Coilcraft 0805USB Series Common Mode Choke, https://www.coilcraft.com/pdfs/0805usb.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonModeChoke_Coilcraft_1812CAN +Coilcraft 1812CAN Series Common Mode Choke, https://www.coilcraft.com/pdfs/1812can.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonModeChoke_Wuerth_WE-SL5 +WE-SL5 SMT Common Mode Line Filter, https://www.we-online.de/katalog/en/WE-SL5/, https://www.we-online.de/katalog/datasheet/744272471.pdf +SMT Common Mode Line Filter +0 +4 +4 +Inductor_SMD +L_CommonMode_Delevan_4222 +API Delevan, Surface Mount Common Mode Bead, 4222 4222R, http://www.delevan.com/seriesPDFs/4222.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonMode_Wuerth_WE-SL2 +http://katalog.we-online.de/en/pbs/WE-SL2?sid=5fbec16187#vs_t1:c1_ct:1 +Wuerth WE-SL2 +0 +4 +4 +Inductor_SMD +L_Fastron_PISN +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISN_Handsoldering +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISR +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Fastron_PISR_Handsoldering +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Murata_DEM35xxC +https://www.murata.com/~/media/webrenewal/products/inductor/chip/tokoproducts/wirewoundferritetypeforpl/m_dem3518c.ashx +Inductor SMD DEM35xxC +0 +2 +2 +Inductor_SMD +L_Murata_LQH2MCNxxxx02_2.0x1.6mm +Inductor, Murata, LQH2MCN_02 series, 1.6x2.0x0.9mm (https://search.murata.co.jp/Ceramy/image/img/P02/JELF243A-0053.pdf) +chip coil inductor Murata LQH2MC +0 +2 +2 +Inductor_SMD +L_Murata_LQH55DN_5.7x5.0mm +Inductor, SMD, 5.7x5.0x4.7mm, https://search.murata.co.jp/Ceramy/image/img/P02/JELF243A-0045.pdf +inductor smd +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_1turn_HDM0131A +Neosid, Air-Coil, SML, 1turn, HDM0131A, +Neosid Air-Coil SML 1turn HDM0131A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HAM0231A +Neosid, Air-Coil, SML, 2turn, HAM0231A, +Neosid Air-Coil SML 2turn HAM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HDM0231A +Neosid, Air-Coil, SML, 2turn, HDM0231A, +Neosid Air-Coil SML 2turn HDM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HAM0331A +Neosid, Air-Coil, SML, 2turn, HAM0331A, +Neosid Air-Coil SML 3turn HAM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HDM0331A +Neosid, Air-Coil, SML, 3turn, HDM0331A, +Neosid Air-Coil SML 3turn HDM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HAM0431A +Neosid, Air-Coil, SML, 4turn, HAM0431A, +Neosid Air-Coil SML 4turn HAM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HDM0431A +Neosid, Air-Coil, SML, 4turn, HDM0431A, +Neosid Air-Coil SML 4turn HDM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HAM0531A +Neosid, Air-Coil, SML, 5turn, HAM0531A, +Neosid Air-Coil SML 5turn HAM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HDM0531A +Neosid, Air-Coil, SML, 5turn, HDM0531A, +Neosid Air-Coil SML 5turn HDM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HAM0631A-HAM1031A +Neosid, Air-Coil, SML, 6-10turn, HAM0631A-HAM1031A, +Neosid Air-Coil SML 6-10turn HAM0631A-HAM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HDM0431A-HDM1031A +Neosid, Air-Coil, SML, 6-10turn, HDM0431A-HDM1031A, +Neosid Air-Coil SML 6-10turn HDM0431A-HDM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6turn_HAM0631A +Neosid, Air-Coil, SML, 6turn, HAM0631A, +Neosid Air-Coil SML 6turn HAM0631A +0 +2 +2 +Inductor_SMD +L_Neosid_MicroCoil_Ms36-L +Neosid, Micro Coil, Inductor, Ms36-L, SMD, Fixed inductor, anti clockwise, https://neosid.de/en/products/inductors/rod-core-chokes/smd-rod-core-chokes/52026/ms-36/7-h?c=94 +Neosid Micro Coil Inductor Ms36-L SMD Fixed inductor anti clockwise +0 +2 +2 +Inductor_SMD +L_Neosid_Ms42 +Neosid, Inductor, SMs42, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_Ms42.pdf +Neosid Inductor SMs42 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50 +Neosid, Power Inductor, Ms50, SMD, Fixed inductor, https://neosid.de/import-data/product-pdf/neoFestind_Ms50.pdf +Neosid Power Inductor Ms50 SMD Fixed inductor +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50T +Neosid, Power Inductor, Ms50T, SMD, Fixed inductor, high temperature, https://neosid.de/import-data/product-pdf/neoFestind_Ms50T.pdf +Neosid Power Inductor Ms50T SMD Fixed inductor high temperature +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85 +Neosid, Ms85, Ms85T, SMD Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms85.pdf +Neosid Ms85 Ms85T SMD Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85T +Neosid, Ms85, Ms85T, SMD Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms85T.pdf +Neosid Ms85 Ms85T SMD Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95 +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95T +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95T.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95a +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95a.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE95H +Neosid, Inductor,SM-NE95H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE95H.pdf +Neosid Inductor SM-NE95H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127 +Neosid, Inductor, SM-NE127, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE127.pdf +Neosid Inductor SM-NE127 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127_HandSoldering +Neosid, Inductor, SM-NE127, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE127.pdf +Neosid Inductor SM-NE127 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE150 +Neosid, Inductor, SM-NE150, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE150.pdf +Neosid Inductor SM-NE150 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0512H +Neosid, Inductor, PIC0512H, Power Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0512H.pdf +Neosid Inductor PIC0512H Power Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0602H +Neosid, Power Inductor, SM-PIC0602H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0602H.pdf +Neosid Power Inductor SM-PIC0602H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0612H +Neosid, Power Inductor, SM-PIC0612H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0612H.pdf +Neosid Power Inductor SM-PIC0612H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC1004H +Neosid, Inductor, SM-PIC1004H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC1004H.pdf +Neosid Inductor SM-PIC1004H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3010 +Neosid, Inductor, SMS-ME3010, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMSME3010.pdf +Neosid Inductor SMS-ME3010 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3015 +Neosid, Power Inductor, SMS-ME3015, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMSME3015.pdf +Neosid Power Inductor SMS-ME3015 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs42 +Neosid, Inductor, SMs42, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs42.pdf +Neosid Inductor SMs42 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs50 +Neosid, Inductor, SMs50, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs50.pdf +Neosid Inductor SMs50 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs85 +Neosid, Inductor, SMs85, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs85.pdf +Neosid Inductor SMs85 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs95_SMs95p +Neosid, Inductor, SMs95, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMs95SMs95p.pdf +Neosid Inductor SMs95 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Pulse_PA4320 +Inductor SMD Pulse PA4320 http://productfinder.pulseeng.com/products/datasheets/P787.pdf +Inductor SMD Pulse PA4320 +0 +2 +2 +Inductor_SMD +L_Sagami_CER1242B +Inductor, Sagami, h=4.5mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1257B +Inductor, Sagami, h=6.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1277B +Inductor, Sagami, h=8.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CWR1242C +Sagami power inductor, CWR1242C, H=4.5mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1257C +Sagami power inductor, CWR1242C, H=6.0mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1277C +Sagami power inductor, CWR1242C, H=7.7mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_SigTra_SC3316F +http://www.signaltransformer.com/sites/all/pdf/smd/P080_SC3316F.pdf +Choke +0 +2 +2 +Inductor_SMD +L_Sumida_CDMC6D28_7.25x6.5mm +SMD Power Inductor (http://products.sumida.com/products/pdf/CDMC6D28.pdf) +Inductor Sumida SMD CDMC6D28 +0 +2 +2 +Inductor_SMD +L_Sunlord_MWSA0518_5.4x5.2mm +Inductor, Sunlord, MWSA0518, 5.4mmx5.2mm +inductor Sunlord smd +0 +2 +2 +Inductor_SMD +L_TDK_NLV25_2.5x2.0mm +TDK NLV25, 2.5x2.0x1.8mm, https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_standard_nlv25-ef_en.pdf +tdk nlv25 nlcv25 nlfv25 +0 +2 +2 +Inductor_SMD +L_TDK_NLV32_3.2x2.5mm +TDK NLV32, 3.2x2.5x2.2mm, https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_standard_nlv32-ef_en.pdf +tdk nlv32 nlcv32 nlfv32 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6025 +Inductor, TDK, SLF6025, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6025_en.pdf) +Inductor TDK_SLF6025 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6028 +Inductor, TDK, SLF6028, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6028_en.pdf) +Inductor TDK_SLF6028 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6045 +Inductor, TDK, SLF6045, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6045_en.pdf) +Inductor TDK_SLF6045 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7032 +Inductor, TDK, SLF7032, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7032_en.pdf) +Inductor TDK_SLF7032 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7045 +Inductor, TDK, SLF7045, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7045_en.pdf) +Inductor TDK_SLF7045 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7055 +Inductor, TDK, SLF7055, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7055_en.pdf) +Inductor TDK_SLF7055 +0 +2 +2 +Inductor_SMD +L_TDK_SLF10145 +Inductor, TDK, SLF10145, 10.1mmx10.1mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf10145-h_en.pdf) +Inductor TDK_SLF10145 +0 +2 +2 +Inductor_SMD +L_TDK_SLF10165 +Inductor, TDK, SLF10165, 10.1mmx10.1mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_power_slf10165_en.pdf) +Inductor TDK_SLF10165 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12555 +Inductor, TDK, SLF12555, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_power_slf12555_en.pdf) +Inductor SLF12555 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12565 +Inductor, TDK, SLF12565, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf12565-h_en.pdf) +Inductor SLF12565 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12575 +Inductor, TDK, SLF12575, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf12575-h_en.pdf) +Inductor SLF12575 +0 +2 +2 +Inductor_SMD +L_TDK_VLF10040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLF10040 +0 +2 +2 +Inductor_SMD +L_TDK_VLP8040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLP8040 +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-1616 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-1616, 1.6mmx1.6mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-2020 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-2020, 2.0mmx2.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-3030 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-3030, 3.0mmx3.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-4040 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-4040, 4.0mmx4.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-5050 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-5050, 5.0mmx5.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-10050_9.8x10.0mm +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-10050, 9.8mmx10.0mm, https://ds.yuden.co.jp/TYCOMPAS/or/specSheet?pn=NR10050T1R3N +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-10050_9.8x10.0mm_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-10050, 9.8mmx10.0mm, https://ds.yuden.co.jp/TYCOMPAS/or/specSheet?pn=NR10050T1R3N +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_TracoPower_TCK-047_5.2x5.8mm +Inductor, Traco, TCK-047, 5.2x5.8mm, https://www.tracopower.com/products/tck047.pdf +inductor smd traco +0 +2 +2 +Inductor_SMD +L_TracoPower_TCK-141 +Choke, SMD, 4.0x4.0mm 2.1mm height, https://www.tracopower.com/products/tck141.pdf +Choke SMD +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1212 +Inductor, Vishay, IHLP series, 3.0mmx3.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1616 +Inductor, Vishay, IHLP series, 4.1mmx4.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2020 +Inductor, Vishay, IHLP series, 5.1mmx5.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2525 +Inductor, Vishay, IHLP series, 6.3mmx6.3mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-4040 +Inductor, Vishay, IHLP series, 10.2mmx10.2mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-5050 +Inductor, Vishay, IHLP series, 12.7mmx12.7mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-6767 +Inductor, Vishay, IHLP series, 17.0mmx17.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-3825 +Inductor, Vishay, Vishay_IHSM-3825, http://www.vishay.com/docs/34018/ihsm3825.pdf, 11.2mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-4825 +Inductor, Vishay, Vishay_IHSM-4825, http://www.vishay.com/docs/34019/ihsm4825.pdf, 13.7mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-5832 +Inductor, Vishay, Vishay_IHSM-5832, http://www.vishay.com/docs/34020/ihsm5832.pdf, 16.3mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-7832 +Inductor, Vishay, Vishay_IHSM-7832, http://www.vishay.com/docs/34021/ihsm7832.pdf, 19.8mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1030 +Inductor, Wuerth Elektronik, Wuerth_HCI-1030, 10.6mmx10.6mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1040 +Inductor, Wuerth Elektronik, Wuerth_HCI-1040, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1050 +Inductor, Wuerth Elektronik, Wuerth_HCI-1050, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1335 +Inductor, Wuerth Elektronik, Wuerth_HCI-1335, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1350 +Inductor, Wuerth Elektronik, Wuerth_HCI-1350, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1365 +Inductor, Wuerth Elektronik, Wuerth_HCI-1365, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1890 +Inductor, Wuerth Elektronik, Wuerth_HCI-1890, 18.2mmx18.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-2212 +Inductor, Wuerth Elektronik, Wuerth_HCI-2212, 22.5mmx22.0mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-5040 +Inductor, Wuerth Elektronik, Wuerth_HCI-5040, 5.5mmx5.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7030 +Inductor, Wuerth Elektronik, Wuerth_HCI-7030, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7040 +Inductor, Wuerth Elektronik, Wuerth_HCI-7040, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7050 +Inductor, Wuerth Elektronik, Wuerth_HCI-7050, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1050 +Inductor, Wuerth Elektronik, Wuerth_HCM-1050, 10.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1052 +Inductor, Wuerth Elektronik, Wuerth_HCM-1052, 10.5mmx10.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1070 +Inductor, Wuerth Elektronik, Wuerth_HCM-1070, 10.1mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1078 +Inductor, Wuerth Elektronik, Wuerth_HCM-1078, 9.4mmx6.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1190 +Inductor, Wuerth Elektronik, Wuerth_HCM-1190, 10.5mmx11.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1240 +Inductor, Wuerth Elektronik, Wuerth_HCM-1240, 10.0mmx11.8mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1350 +Inductor, Wuerth Elektronik, Wuerth_HCM-1350, 13.5mmx13.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1390 +Inductor, Wuerth Elektronik, Wuerth_HCM-1390, 12.5mmx13.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7050 +Inductor, Wuerth Elektronik, Wuerth_HCM-7050, 7.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7070 +Inductor, Wuerth Elektronik, Wuerth_HCM-7070, 7.4mmx7.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-1610 +Inductor, Wuerth Elektronik, Wuerth_MAPI-1610, 1.6mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2010, 2.0mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2506 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2506, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2508 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2508, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2510 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2510, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2512 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2512, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3010, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3012 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3012, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3015 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3015, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3020, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4020, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4030 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4030, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-DD-Typ-L-Typ-XL-Typ-XXL +Shielded Coupled Inductor, Wuerth Elektronik, WE-DD, SMD, Typ L, Typ XL, Typ XXL, https://katalog.we-online.com/pbs/datasheet/744874001.pdf +Choke Coupled Double Inductor SMD Wuerth WE-DD TypL TypXL TypXXL +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-DD-Typ-M-Typ-S +Shielded Coupled Inductor, Wuerth Elektronik, WE-DD, SMD, Typ M, Typ S, https://katalog.we-online.com/pbs/datasheet/744878001.pdf, https://katalog.we-online.de/pbs/datasheet/744877001.pdf +Choke Coupled Double Inductor SMD Wuerth WE-DD TypM TypS +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-GF-1210 +Unshielded Inductor, Wuerth Elektronik, WE-GF, SMD, 1210, https://www.we-online.de/katalog/datasheet/74476401.pdf +Unshielded Inductor WE-GF 1210 Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-7345 +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, 7345, https://katalog.we-online.com/pbs/datasheet/744777001.pdf +Choke Shielded Power Inductor WE-PD 7345 Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, Typ LS, https://katalog.we-online.com/pbs/datasheet/7447715906.pdf +Choke Shielded Power Inductor WE-PD TypLS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, Typ LS, Handsoldering, https://katalog.we-online.com/pbs/datasheet/7447715906.pdf +Choke Shielded Power Inductor WE-PD TypLS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMT, Typ M, Typ S, https://katalog.we-online.com/pbs/datasheet/744778005.pdf +Choke Shielded Power Inductor WE-PD TypM TypS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMT, Typ M, Typ S, Handsoldering, https://katalog.we-online.com/pbs/datasheet/744778005.pdf +Choke Shielded Power Inductor WE-PD TypM TypS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-L +Power Inductor, Wuerth Elektronik, WE-PD2, SMD, Typ L, , https://katalog.we-online.com/pbs/datasheet/74477510.pdf +Choke Power Inductor WE-PD2 TypL Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-MS +Power Inductor, Wuerth Elektronik, WE-PD2, SMD, Typ MS, https://katalog.we-online.com/pbs/datasheet/744774022.pdf +Choke Power Inductor WE-PD2 TypMS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-XL +Power Inductor, Wuerth Elektronik, WE-PD2, SMT, Typ XL, https://katalog.we-online.com/pbs/datasheet/744776012.pdf +Choke Power Inductor WE-PD2 TypXL Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD4-Typ-X +Power Inductor, Wuerth Elektronik, WE-PD4, SMT, Typ X, https://katalog.we-online.de/pbs/datasheet/74458001.pdf +Choke Power Inductor WE-PD4 TypX Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF +Shielded Power Inductor, Wuerth Elektronik, WE-PDF, SMD, https://katalog.we-online.de/pbs/datasheet/7447797022.pdf +Choke Shielded Power Inductor WE-PDF Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PDF, SMD, Handsoldering, https://katalog.we-online.de/pbs/datasheet/7447797022.pdf +Choke Shielded Power Inductor WE-PDF Wuerth Handsoldering +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-TPC-3816 +L_Wuerth_WE-TPC-3816 StepUp generated footprint, http://katalog.we-online.de/pbs/datasheet/7440310047.pdf +wurth wuerth smd inductor +0 +2 +2 +Inductor_THT +Choke_EPCOS_B82722A +Current-Compensated Ring Core Double Chokes, EPCOS, B82722A, 22.3mmx22.7mm, https://en.tdk.eu/inf/30/db/ind_2008/b82722a_j.pdf +chokes epcos tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN102-04-14.0x14.0mm +Current-compensated Chokes, Schaffner, RN102-04, 14.0mmx14.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN112-04-17.7x17.1mm +Current-compensated Chokes, Schaffner, RN112-04, 17.7mmx17.1mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN114-04-22.5x21.5mm +Current-compensated Chokes, Schaffner, RN114-04, 22.5mmx21.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN116-04-22.5x21.5mm +Current-compensated Chokes, Schaffner, RN116-04, 22.5mmx21.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN122-04-28.0x27.0mm +Current-compensated Chokes, Schaffner, RN122-04, 28.0mmx27.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN142-04-33.1x32.5mm +Current-compensated Chokes, Schaffner, RN142-04, 33.1mmx32.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN143-04-33.1x32.5mm +Current-compensated Chokes, Schaffner, RN143-04, 33.1mmx32.5mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN152-04-43.0x41.8mm +Current-compensated Chokes, Schaffner, RN152-04, 43.0mmx41.8mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN202-04-8.8x18.2mm +Current-compensated Chokes, Schaffner, RN202-04, 8.8mmx18.2mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN204-04-9.0x14.0mm +Current-compensated Chokes, Schaffner, RN204-04, 9.0mmx14.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN212-04-12.5x18.0mm +Current-compensated Chokes, Schaffner, RN212-04, 12.5mmx18.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN214-04-15.5x23.0mm +Current-compensated Chokes, Schaffner, RN214-04, 15.5mmx23.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN216-04-15.5x23.0mm +Current-compensated Chokes, Schaffner, RN216-04, 15.5mmx23.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN218-04-12.5x18.0mm +Current-compensated Chokes, Schaffner, RN218-04, 12.5mmx18.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN222-04-18.0x31.0mm +Current-compensated Chokes, Schaffner, RN222-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN232-04-18.0x31.0mm +Current-compensated Chokes, Schaffner, RN232-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +Choke_Schaffner_RN242-04-18.0x31.0mm +Current-compensated Chokes, Schaffner, RN242-04, 18.0mmx31.0mm https://www.schaffner.com/products/download/product/datasheet/rn-series-common-mode-chokes-new/ +chokes schaffner tht +0 +4 +4 +Inductor_THT +L_Axial_L5.0mm_D3.6mm_P10.00mm_Horizontal_Murata_BL01RN1A2A2 +Inductor, Murata BL01RN1A2A2, Axial, Horizontal, pin pitch=10.00mm, length*diameter=5*3.6mm, https://www.murata.com/en-global/products/productdetail?partno=BL01RN1A2A2%23 +inductor axial horizontal +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P2.54mm_Vertical_Vishay_IM-1 +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P7.62mm_Horizontal_Vishay_IM-1 +Inductor, Axial series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 7.62mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L5.3mm_D2.2mm_P10.16mm_Horizontal_Vishay_IM-1 +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=5.3*2.2mm^2, Vishay, IM-1, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 5.3mm diameter 2.2mm Vishay IM-1 +0 +2 +2 +Inductor_THT +L_Axial_L6.6mm_D2.7mm_P2.54mm_Vertical_Vishay_IM-2 +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=6.6*2.7mm^2, Vishay, IM-2, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 6.6mm diameter 2.7mm Vishay IM-2 +0 +2 +2 +Inductor_THT +L_Axial_L6.6mm_D2.7mm_P10.16mm_Horizontal_Vishay_IM-2 +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=6.6*2.7mm^2, Vishay, IM-2, http://www.vishay.com/docs/34030/im.pdf +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 6.6mm diameter 2.7mm Vishay IM-2 +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P2.54mm_Vertical_Fastron_MICC +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 2.54mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P5.08mm_Vertical_Fastron_MICC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P10.16mm_Horizontal_Fastron_MICC +Inductor, Axial series, Axial, Horizontal, pin pitch=10.16mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 10.16mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L7.0mm_D3.3mm_P12.70mm_Horizontal_Fastron_MICC +Inductor, Axial series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=7*3.3mm^2, Fastron, MICC, http://www.fastrongroup.com/image-show/70/MICC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 12.7mm length 7mm diameter 3.3mm Fastron MICC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P2.54mm_Vertical_Fastron_SMCC +Inductor, Axial series, Axial, Vertical, pin pitch=2.54mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Vertical pin pitch 2.54mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P5.08mm_Vertical_Fastron_SMCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P12.70mm_Horizontal_Fastron_SMCC +Inductor, Axial series, Axial, Horizontal, pin pitch=12.7mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Horizontal pin pitch 12.7mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L9.5mm_D4.0mm_P15.24mm_Horizontal_Fastron_SMCC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=9.5*4mm^2, Fastron, SMCC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_SMCC_NEU.pdf, http://cdn-reichelt.de/documents/datenblatt/B400/LEADEDINDUCTORS.pdf +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 9.5mm diameter 4mm Fastron SMCC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P5.08mm_Vertical_Fastron_MECC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P7.62mm_Vertical_Fastron_MECC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L11.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_MECC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=11*4.5mm^2, Fastron, MECC, http://www.fastrongroup.com/image-show/21/MECC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 11mm diameter 4.5mm Fastron MECC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P5.08mm_Vertical_Fastron_MISC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P7.62mm_Vertical_Fastron_MISC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.0mm_D5.0mm_P15.24mm_Horizontal_Fastron_MISC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=12*5mm^2, Fastron, MISC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MISC.pdf +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 12mm diameter 5mm Fastron MISC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P5.08mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P7.62mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P20.32mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L12.8mm_D5.8mm_P25.40mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=12.8*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 12.8mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P5.08mm_Vertical_Fastron_HCCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P7.62mm_Vertical_Fastron_HCCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L13.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_HCCC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=13*4.5mm^2, Fastron, HCCC, http://www.fastrongroup.com/image-show/19/HCCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 13mm diameter 4.5mm Fastron HCCC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P5.08mm_Vertical_Fastron_LACC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P7.62mm_Vertical_Fastron_LACC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.0mm_D4.5mm_P15.24mm_Horizontal_Fastron_LACC +Inductor, Axial series, Axial, Horizontal, pin pitch=15.24mm, , length*diameter=14*4.5mm^2, Fastron, LACC, http://www.fastrongroup.com/image-show/20/LACC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 15.24mm length 14mm diameter 4.5mm Fastron LACC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P5.08mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P7.62mm_Vertical_Fastron_HBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P20.32mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L14.5mm_D5.8mm_P25.40mm_Horizontal_Fastron_HBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=14.5*5.8mm^2, Fastron, HBCC, http://www.fastrongroup.com/image-show/18/HBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 14.5mm diameter 5.8mm Fastron HBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P5.08mm_Vertical_Fastron_VHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P7.62mm_Vertical_Fastron_VHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P20.32mm_Horizontal_Fastron_VHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D6.3mm_P25.40mm_Horizontal_Fastron_VHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=16*6.3mm^2, Fastron, VHBCC, http://www.fastrongroup.com/image-show/25/VHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 16mm diameter 6.3mm Fastron VHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P5.08mm_Vertical_Fastron_XHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P7.62mm_Vertical_Fastron_XHBCC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Vertical pin pitch 7.62mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P20.32mm_Horizontal_Fastron_XHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D7.5mm_P25.40mm_Horizontal_Fastron_XHBCC +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=16*7.5mm^2, Fastron, XHBCC, http://www.fastrongroup.com/image-show/26/XHBCC.pdf?type=Complete-DataSheet&productType=series +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 16mm diameter 7.5mm Fastron XHBCC +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D9.5mm_P5.08mm_Vertical_Vishay_IM-10-37 +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=16*9.5mm^2, Vishay, IM-10-37, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 16mm diameter 9.5mm Vishay IM-10-37 +0 +2 +2 +Inductor_THT +L_Axial_L16.0mm_D9.5mm_P20.32mm_Horizontal_Vishay_IM-10-37 +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=16*9.5mm^2, Vishay, IM-10-37, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 16mm diameter 9.5mm Vishay IM-10-37 +0 +2 +2 +Inductor_THT +L_Axial_L17.5mm_D12.0mm_P7.62mm_Vertical_Vishay_IM-10-46 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=17.5*12mm^2, Vishay, IM-10-46, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 17.5mm diameter 12mm Vishay IM-10-46 +0 +2 +2 +Inductor_THT +L_Axial_L17.5mm_D12.0mm_P20.32mm_Horizontal_Vishay_IM-10-46 +Inductor, Axial series, Axial, Horizontal, pin pitch=20.32mm, , length*diameter=17.5*12mm^2, Vishay, IM-10-46, http://www.vishay.com/docs/34030/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 20.32mm length 17.5mm diameter 12mm Vishay IM-10-46 +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P5.08mm_Vertical +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Vertical pin pitch 5.08mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P7.62mm_Vertical +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.0mm_D8.0mm_P25.40mm_Horizontal +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=20*8mm^2 +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 20mm diameter 8mm +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.1mm_P7.62mm_Vertical_Vishay_IHA-101 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20.32*12.07mm^2, Vishay, IHA-101, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20.32mm diameter 12.07mm Vishay IHA-101 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.1mm_P28.50mm_Horizontal_Vishay_IHA-101 +Inductor, Axial series, Axial, Horizontal, pin pitch=28.5mm, , length*diameter=20.32*12.07mm^2, Vishay, IHA-101, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 28.5mm length 20.32mm diameter 12.07mm Vishay IHA-101 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.7mm_P7.62mm_Vertical_Vishay_IHA-201 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=20.32*12.7mm^2, Vishay, IHA-201, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 20.32mm diameter 12.7mm Vishay IHA-201 +0 +2 +2 +Inductor_THT +L_Axial_L20.3mm_D12.7mm_P25.40mm_Horizontal_Vishay_IHA-201 +Inductor, Axial series, Axial, Horizontal, pin pitch=25.4mm, , length*diameter=20.32*12.7mm^2, Vishay, IHA-201, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 25.4mm length 20.32mm diameter 12.7mm Vishay IHA-201 +0 +2 +2 +Inductor_THT +L_Axial_L23.4mm_D12.7mm_P7.62mm_Vertical_Vishay_IHA-203 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=23.37*12.7mm^2, Vishay, IHA-203, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 23.37mm diameter 12.7mm Vishay IHA-203 +0 +2 +2 +Inductor_THT +L_Axial_L23.4mm_D12.7mm_P32.00mm_Horizontal_Vishay_IHA-203 +Inductor, Axial series, Axial, Horizontal, pin pitch=32mm, , length*diameter=23.37*12.7mm^2, Vishay, IHA-203, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 32mm length 23.37mm diameter 12.7mm Vishay IHA-203 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.1mm_P5.08mm_Vertical_Vishay_IM-10-28 +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=24*7.1mm^2, Vishay, IM-10-28, http://www.vishay.com/docs/34035/im10.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 24mm diameter 7.1mm Vishay IM-10-28 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.1mm_P30.48mm_Horizontal_Vishay_IM-10-28 +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=24*7.1mm^2, Vishay, IM-10-28, http://www.vishay.com/docs/34035/im10.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 24mm diameter 7.1mm Vishay IM-10-28 +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P5.08mm_Vertical_Fastron_MESC +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P7.62mm_Vertical_Fastron_MESC +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L24.0mm_D7.5mm_P27.94mm_Horizontal_Fastron_MESC +Inductor, Axial series, Axial, Horizontal, pin pitch=27.94mm, , length*diameter=24*7.5mm^2, Fastron, MESC, http://cdn-reichelt.de/documents/datenblatt/B400/DS_MESC.pdf +Inductor Axial series Axial Horizontal pin pitch 27.94mm length 24mm diameter 7.5mm Fastron MESC +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D9.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*9mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 9mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D10.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*10mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 10mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.0mm_D11.0mm_P30.48mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=30.48mm, , length*diameter=26*11mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 30.48mm length 26mm diameter 11mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D12.1mm_P7.62mm_Vertical_Vishay_IHA-103 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26.67*12.07mm^2, Vishay, IHA-103, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26.67mm diameter 12.07mm Vishay IHA-103 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D12.1mm_P35.00mm_Horizontal_Vishay_IHA-103 +Inductor, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=26.67*12.07mm^2, Vishay, IHA-103, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 35mm length 26.67mm diameter 12.07mm Vishay IHA-103 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D14.0mm_P7.62mm_Vertical_Vishay_IHA-104 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=26.67*13.97mm^2, Vishay, IHA-104, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 26.67mm diameter 13.97mm Vishay IHA-104 +0 +2 +2 +Inductor_THT +L_Axial_L26.7mm_D14.0mm_P35.00mm_Horizontal_Vishay_IHA-104 +Inductor, Axial series, Axial, Horizontal, pin pitch=35mm, , length*diameter=26.67*13.97mm^2, Vishay, IHA-104, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 35mm length 26.67mm diameter 13.97mm Vishay IHA-104 +0 +2 +2 +Inductor_THT +L_Axial_L29.9mm_D14.0mm_P7.62mm_Vertical_Vishay_IHA-105 +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=29.85*13.97mm^2, Vishay, IHA-105, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 29.85mm diameter 13.97mm Vishay IHA-105 +0 +2 +2 +Inductor_THT +L_Axial_L29.9mm_D14.0mm_P38.00mm_Horizontal_Vishay_IHA-105 +Inductor, Axial series, Axial, Horizontal, pin pitch=38mm, , length*diameter=29.85*13.97mm^2, Vishay, IHA-105, http://www.vishay.com/docs/34014/iha.pdf +Inductor Axial series Axial Horizontal pin pitch 38mm length 29.85mm diameter 13.97mm Vishay IHA-105 +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P5.08mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=5.08mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 5.08mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P7.62mm_Vertical_Fastron_77A +Inductor, Axial series, Axial, Vertical, pin pitch=7.62mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Vertical pin pitch 7.62mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_Axial_L30.0mm_D8.0mm_P35.56mm_Horizontal_Fastron_77A +Inductor, Axial series, Axial, Horizontal, pin pitch=35.56mm, , length*diameter=30*8mm^2, Fastron, 77A, http://cdn-reichelt.de/documents/datenblatt/B400/DS_77A.pdf +Inductor Axial series Axial Horizontal pin pitch 35.56mm length 30mm diameter 8mm Fastron 77A +0 +2 +2 +Inductor_THT +L_CommonMode_Toroid_Vertical_L19.3mm_W10.8mm_Px6.35mm_Py15.24mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=6.35*15.24mm^2, , length*width=19.304*10.795mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 6.35*15.24mm^2 length 19.304mm width 10.795mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L21.0mm_W10.0mm_Px5.08mm_Py12.70mm_muRATA_5100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=5.08*12.70mm^2, , length*width=21*10mm^2, muRATA, 5100, http://www.murata-ps.com/data/magnetics/kmp_5100.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 5.08*12.70mm^2 length 21mm width 10mm muRATA 5100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L24.0mm_W16.3mm_Px10.16mm_Py20.32mm_muRATA_5200 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=10.16*20.32mm^2, , length*width=24*16.3mm^2, muRATA, 5200, http://www.murata-ps.com/data/magnetics/kmp_5200.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 10.16*20.32mm^2 length 24mm width 16.3mm muRATA 5200 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L30.5mm_W15.2mm_Px10.16mm_Py20.32mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=10.16*20.32mm^2, , length*width=30.479999999999997*15.239999999999998mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 10.16*20.32mm^2 length 30.479999999999997mm width 15.239999999999998mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L34.3mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=34.29*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 34.29mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L36.8mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=36.83*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 36.83mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L38.1mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=38.099999999999994*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 38.099999999999994mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L39.4mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=39.37*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 39.37mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L41.9mm_W20.3mm_Px15.24mm_Py22.86mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=15.24*22.86mm^2, , length*width=41.91*20.32mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 15.24*22.86mm^2 length 41.91mm width 20.32mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Toroid_Vertical_L43.2mm_W22.9mm_Px17.78mm_Py30.48mm_Bourns_8100 +L_CommonMode_Toroid, Vertical series, Radial, pin pitch=17.78*30.48mm^2, , length*width=43.18*22.86mm^2, Bourns, 8100, http://datasheet.octopart.com/8120-RC-Bourns-datasheet-10228452.pdf +L_CommonMode_Toroid Vertical series Radial pin pitch 17.78*30.48mm^2 length 43.18mm width 22.86mm Bourns 8100 +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-L +Wuerth, WE-CMB, Bauform L, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-M +Wuerth, WE-CMB, Bauform M, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-S +Wuerth, WE-CMB, Bauform S, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XL +Wuerth, WE-CMB, Bauform XL, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XS +Wuerth, WE-CMB, Bauform XS, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_CommonMode_Wuerth_WE-CMB-XXL +Wuerth, WE-CMB, Bauform XXL, +CommonModeChoke Gleichtaktdrossel +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM120 +Lodestone Pacific, 30.48mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM160 +Lodestone Pacific, 40.64mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM254 +Lodestone Pacific, 64.51mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM280 +Lodestone Pacific, 71.12mm diameter vertical toroid mount, 16AWG/1.27mm holes, http://www.lodestonepacific.com/CatKpdf/VTM_Series.pdf +vertical inductor toroid mount +0 +4 +4 +Inductor_THT +L_Mount_Lodestone_VTM950-6 +Lodestone Pacific, vertical toroid mount, 11x19mm, 6 pins, http://www.lodestonepacific.com/CatKpdf/VTM950-6.pdf +vertical inductor toroid mount +0 +6 +6 +Inductor_THT +L_Radial_D6.0mm_P4.00mm +Inductor, Radial series, Radial, pin pitch=4.00mm, , diameter=6.0mm, http://www.abracon.com/Magnetics/radial/AIUR-07.pdf +Inductor Radial series Radial pin pitch 4.00mm diameter 6.0mm +0 +2 +2 +Inductor_THT +L_Radial_D7.0mm_P3.00mm +Inductor, Radial series, Radial, pin pitch=3.00mm, , diameter=7mm, http://www.abracon.com/Magnetics/radial/AIUR-16.pdf +Inductor Radial series Radial pin pitch 3.00mm diameter 7mm +0 +2 +2 +Inductor_THT +L_Radial_D7.2mm_P3.00mm_MuRATA_1700 +Inductor, Radial series, Radial, pin pitch=3.00mm, , diameter=7.2mm, MuRATA, 1700, http://www.murata-ps.com/data/magnetics/kmp_1700.pdf +Inductor Radial series Radial pin pitch 3.00mm diameter 7.2mm MuRATA 1700 +0 +2 +2 +Inductor_THT +L_Radial_D7.5mm_P3.50mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=3.50mm, , diameter=7.5mm, Fastron, 07P, http://www.fastrongroup.com/image-show/39/07P.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 3.50mm diameter 7.5mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D7.5mm_P5.00mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=7.5mm, Fastron, 07P, http://www.fastrongroup.com/image-show/39/07P.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 7.5mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D7.8mm_P5.00mm_Fastron_07HCP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=7.8mm, Fastron, 07HCP, http://www.abracon.com/Magnetics/radial/AISR875.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 7.8mm Fastron 07HCP +0 +2 +2 +Inductor_THT +L_Radial_D8.7mm_P5.00mm_Fastron_07HCP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=8.7mm, Fastron, 07HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_07HCP.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 8.7mm Fastron 07HCP +0 +2 +2 +Inductor_THT +L_Radial_D9.5mm_P5.00mm_Fastron_07HVP +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=9.5mm, Fastron, 07HVP, http://www.fastrongroup.com/image-show/107/07HVP%2007HVP_T.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 9.5mm Fastron 07HVP +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Fastron_07M +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Fastron, 07M, http://www.fastrongroup.com/image-show/37/07M.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 10mm Fastron 07M +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Fastron_07P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Fastron, 07P, http://www.fastrongroup.com/image-show/37/07M.pdf?type=Complete-DataSheet&productType=series +Inductor Radial series Radial pin pitch 5.00mm diameter 10mm Fastron 07P +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Neosid_SD12_style3 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.0mm, Neosid, SD12, style3, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.0mm Neosid SD12 style3 +0 +2 +2 +Inductor_THT +L_Radial_D10.0mm_P5.00mm_Neosid_SD12k_style3 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.0mm, Neosid, SD12k, style3, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.0mm Neosid SD12k style3 +0 +2 +2 +Inductor_THT +L_Radial_D10.5mm_P4.00x5.00mm_Murata_1200RS +Inductor, Radial, Pitch=4.00x5.00mm, Diameter=10.5mm, Murata 1200RS, http://www.murata-ps.com/data/magnetics/kmp_1200rs.pdf +Inductor Radial Murata 1200RS +0 +4 +2 +Inductor_THT +L_Radial_D10.5mm_P5.00mm_Abacron_AISR-01 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=10.5mm, Abacron, AISR-01, http://www.abracon.com/Magnetics/radial/AISR-01.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 10.5mm Abacron AISR-01 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Fastron_11P +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Fastron, 11P, http://cdn-reichelt.de/documents/datenblatt/B400/DS_11P.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Fastron 11P +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Neosid_SD12_style2 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Neosid, SD12, style2, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Neosid SD12 style2 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P5.00mm_Neosid_SD12k_style2 +Inductor, Radial series, Radial, pin pitch=5.00mm, , diameter=12.0mm, Neosid, SD12k, style2, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 5.00mm diameter 12.0mm Neosid SD12k style2 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P6.00mm_MuRATA_1900R +Inductor, Radial series, Radial, pin pitch=6.00mm, , diameter=12.0mm, MuRATA, 1900R, http://www.murata-ps.com/data/magnetics/kmp_1900r.pdf +Inductor Radial series Radial pin pitch 6.00mm diameter 12.0mm MuRATA 1900R +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P10.00mm_Neosid_SD12_style1 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=12.0mm, Neosid, SD12, style1, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 12.0mm Neosid SD12 style1 +0 +2 +2 +Inductor_THT +L_Radial_D12.0mm_P10.00mm_Neosid_SD12k_style1 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=12.0mm, Neosid, SD12k, style1, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd12k.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 12.0mm Neosid SD12k style1 +0 +2 +2 +Inductor_THT +L_Radial_D12.5mm_P7.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=7.00mm, , diameter=12.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 7.00mm diameter 12.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D12.5mm_P9.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=9.00mm, , diameter=12.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 9.00mm diameter 12.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D13.5mm_P7.00mm_Fastron_09HCP +Inductor, Radial series, Radial, pin pitch=7.00mm, , diameter=13.5mm, Fastron, 09HCP, http://cdn-reichelt.de/documents/datenblatt/B400/DS_09HCP.pdf +Inductor Radial series Radial pin pitch 7.00mm diameter 13.5mm Fastron 09HCP +0 +2 +2 +Inductor_THT +L_Radial_D14.2mm_P10.00mm_Neosid_SD14 +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=14.2mm, Neosid, SD14, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd14.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 14.2mm Neosid SD14 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P11.43mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=11.43mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 11.43mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P12.07mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=12.07mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 12.07mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D16.8mm_P12.70mm_Vishay_IHB-1 +Inductor, Radial series, Radial, pin pitch=12.70mm, , diameter=16.8mm, Vishay, IHB-1, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 12.70mm diameter 16.8mm Vishay IHB-1 +0 +2 +2 +Inductor_THT +L_Radial_D18.0mm_P10.00mm +Inductor, Radial series, Radial, pin pitch=10.00mm, , diameter=18mm, http://www.abracon.com/Magnetics/radial/AIUR-15.pdf +Inductor Radial series Radial pin pitch 10.00mm diameter 18mm +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P14.61mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=14.61mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 14.61mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.00mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.00mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.00mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.24mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.24mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.24mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P15.75mm_Vishay_IHB-2 +Inductor, Radial series, Radial, pin pitch=15.75mm, , diameter=21mm, Vishay, IHB-2, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 15.75mm diameter 21mm Vishay IHB-2 +0 +2 +2 +Inductor_THT +L_Radial_D21.0mm_P19.00mm +Inductor, Radial series, Radial, pin pitch=19.00mm, , diameter=21mm, http://www.abracon.com/Magnetics/radial/AIRD02.pdf +Inductor Radial series Radial pin pitch 19.00mm diameter 21mm +0 +2 +2 +Inductor_THT +L_Radial_D24.0mm_P24.00mm +Inductor, Radial series, Radial, pin pitch=24.00mm, , diameter=24mm +Inductor Radial series Radial pin pitch 24.00mm diameter 24mm +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P22.90mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=22.90mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 22.90mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.10mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.10mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.10mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.40mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.40mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.40mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.70mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.70mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.70mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D24.4mm_P23.90mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=23.90mm, , diameter=24.4mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 23.90mm diameter 24.4mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P18.29mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=18.29mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 18.29mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P19.05mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=19.05mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 19.05mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D27.9mm_P20.07mm_Vishay_IHB-3 +Inductor, Radial series, Radial, pin pitch=20.07mm, , diameter=27.9mm, Vishay, IHB-3, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 20.07mm diameter 27.9mm Vishay IHB-3 +0 +2 +2 +Inductor_THT +L_Radial_D28.0mm_P29.20mm +Inductor, Radial series, Radial, pin pitch=29.20mm, , diameter=28mm +Inductor Radial series Radial pin pitch 29.20mm diameter 28mm +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.30mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.30mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.30mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.50mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.50mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.50mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P28.80mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=28.80mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 28.80mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P29.00mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=29.00mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 29.00mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D29.8mm_P29.30mm_muRATA_1400series +Inductor, Radial series, Radial, pin pitch=29.30mm, , diameter=29.8mm, muRATA, 1400series, http://www.murata-ps.com/data/magnetics/kmp_1400.pdf +Inductor Radial series Radial pin pitch 29.30mm diameter 29.8mm muRATA 1400series +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P26.16mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=26.16mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 26.16mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.18mm_Vishay_IHB-4 +Inductor, Radial series, Radial, pin pitch=27.18mm, , diameter=40.64mm, Vishay, IHB-4, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.18mm diameter 40.64mm Vishay IHB-4 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.94mm_Vishay_IHB-4 +Inductor, Radial series, Radial, pin pitch=27.94mm, , diameter=40.64mm, Vishay, IHB-4, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.94mm diameter 40.64mm Vishay IHB-4 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P27.94mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=27.94mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 27.94mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D40.6mm_P28.70mm_Vishay_IHB-5 +Inductor, Radial series, Radial, pin pitch=28.70mm, , diameter=40.64mm, Vishay, IHB-5, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 28.70mm diameter 40.64mm Vishay IHB-5 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P33.27mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=33.27mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 33.27mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P34.29mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=34.29mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 34.29mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P35.81mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=35.81mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 35.81mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P36.32mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=36.32mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 36.32mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_D50.8mm_P38.86mm_Vishay_IHB-6 +Inductor, Radial series, Radial, pin pitch=38.86mm, , diameter=50.8mm, Vishay, IHB-6, http://www.vishay.com/docs/34015/ihb.pdf +Inductor Radial series Radial pin pitch 38.86mm diameter 50.8mm Vishay IHB-6 +0 +2 +2 +Inductor_THT +L_Radial_L7.5mm_W4.6mm_P5.00mm_Neosid_SD75 +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=7.5*4.6mm^2, Neosid, SD75, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd75.pdf +Inductor Radial series Radial pin pitch 5.00mm length 7.5mm width 4.6mm Neosid SD75 +0 +2 +2 +Inductor_THT +L_Radial_L8.0mm_W8.0mm_P5.00mm_Neosid_NE-CPB-07E +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=8*8mm^2, Neosid, NE-CPB-07E, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB07E.pdf +Inductor Radial series Radial pin pitch 5.00mm length 8mm width 8mm Neosid NE-CPB-07E +0 +2 +2 +Inductor_THT +L_Radial_L8.0mm_W8.0mm_P5.00mm_Neosid_SD8 +Inductor, Radial series, Radial, pin pitch=5.00mm, , length*width=8*8mm^2, Neosid, SD8, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_Sd8.pdf +Inductor Radial series Radial pin pitch 5.00mm length 8mm width 8mm Neosid SD8 +0 +2 +2 +Inductor_THT +L_Radial_L9.1mm_W9.1mm_Px6.35mm_Py6.35mm_Pulse_LP-25 +Inductor, Radial series, Radial, pin pitch=6.35*6.35mm^2, , length*width=9.14*9.14mm^2, Pulse, LP-25, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 6.35*6.35mm^2 length 9.14mm width 9.14mm Pulse LP-25 +0 +2 +2 +Inductor_THT +L_Radial_L10.2mm_W10.2mm_Px7.62mm_Py7.62mm_Pulse_LP-30 +Inductor, Radial series, Radial, pin pitch=7.62*7.62mm^2, , length*width=10.16*10.16mm^2, Pulse, LP-30, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 7.62*7.62mm^2 length 10.16mm width 10.16mm Pulse LP-30 +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.3mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.3mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.3mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.5mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.5mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.5mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.7mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.7mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.7mm +0 +2 +2 +Inductor_THT +L_Radial_L11.5mm_W11.5mm_Px6.00mm_Py6.00mm_Neosid_NE-CPB-11EN_Drill1.8mm +Inductor, Radial series, Radial, pin pitch=6.00*6.00mm^2, , length*width=11.5*11.5mm^2, Neosid, NE-CPB-11EN, Drill1.8mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf +Inductor Radial series Radial pin pitch 6.00*6.00mm^2 length 11.5mm width 11.5mm Neosid NE-CPB-11EN Drill1.8mm +0 +2 +2 +Inductor_THT +L_Radial_L12.6mm_W12.6mm_Px9.52mm_Py9.52mm_Pulse_LP-37 +Inductor, Radial series, Radial, pin pitch=9.52*9.52mm^2, , length*width=12.57*12.57mm^2, Pulse, LP-37, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 9.52*9.52mm^2 length 12.57mm width 12.57mm Pulse LP-37 +0 +2 +2 +Inductor_THT +L_Radial_L16.1mm_W16.1mm_Px7.62mm_Py12.70mm_Pulse_LP-44 +Inductor, Radial series, Radial, pin pitch=7.62*12.70mm^2, , length*width=16.13*16.13mm^2, Pulse, LP-44, http://datasheet.octopart.com/PE-54044NL-Pulse-datasheet-5313493.pdf +Inductor Radial series Radial pin pitch 7.62*12.70mm^2 length 16.13mm width 16.13mm Pulse LP-44 +0 +2 +2 +Inductor_THT +L_SELF1408 +Self Ferrite 14 - 08 +SELF +0 +7 +3 +Inductor_THT +L_SELF1418 +Self Ferrite 14 - 18 +SELF +0 +10 +4 +Inductor_THT +L_Toroid_Horizontal_D3.2mm_P6.40mm_Diameter3-5mm_Amidon-T12 +L_Toroid, Horizontal series, Radial, pin pitch=6.40mm, , diameter=3.175mm, Diameter3-5mm, Amidon-T12 +L_Toroid Horizontal series Radial pin pitch 6.40mm diameter 3.175mm Diameter3-5mm Amidon-T12 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D4.1mm_P8.00mm_Diameter4-5mm_Amidon-T16 +L_Toroid, Horizontal series, Radial, pin pitch=8.00mm, , diameter=4.064mm, Diameter4-5mm, Amidon-T16 +L_Toroid Horizontal series Radial pin pitch 8.00mm diameter 4.064mm Diameter4-5mm Amidon-T16 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D5.1mm_P9.00mm_Diameter6-5mm_Amidon-T20 +L_Toroid, Horizontal series, Radial, pin pitch=9.00mm, , diameter=5.08mm, Diameter6-5mm, Amidon-T20 +L_Toroid Horizontal series Radial pin pitch 9.00mm diameter 5.08mm Diameter6-5mm Amidon-T20 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D6.5mm_P10.00mm_Diameter7-5mm_Amidon-T25 +L_Toroid, Horizontal series, Radial, pin pitch=10.00mm, , diameter=6.476999999999999mm, Diameter7-5mm, Amidon-T25 +L_Toroid Horizontal series Radial pin pitch 10.00mm diameter 6.476999999999999mm Diameter7-5mm Amidon-T25 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D7.8mm_P13.00mm_Diameter9-5mm_Amidon-T30 +L_Toroid, Horizontal series, Radial, pin pitch=13.00mm, , diameter=7.7978mm, Diameter9-5mm, Amidon-T30 +L_Toroid Horizontal series Radial pin pitch 13.00mm diameter 7.7978mm Diameter9-5mm Amidon-T30 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D9.5mm_P15.00mm_Diameter10-5mm_Amidon-T37 +L_Toroid, Horizontal series, Radial, pin pitch=15.00mm, , diameter=9.524999999999999mm, Diameter10-5mm, Amidon-T37 +L_Toroid Horizontal series Radial pin pitch 15.00mm diameter 9.524999999999999mm Diameter10-5mm Amidon-T37 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D11.2mm_P17.00mm_Diameter12-5mm_Amidon-T44 +L_Toroid, Horizontal series, Radial, pin pitch=17.00mm, , diameter=11.176mm, Diameter12-5mm, Amidon-T44 +L_Toroid Horizontal series Radial pin pitch 17.00mm diameter 11.176mm Diameter12-5mm Amidon-T44 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D12.7mm_P20.00mm_Diameter14-5mm_Amidon-T50 +L_Toroid, Horizontal series, Radial, pin pitch=20.00mm, , diameter=12.7mm, Diameter14-5mm, Amidon-T50 +L_Toroid Horizontal series Radial pin pitch 20.00mm diameter 12.7mm Diameter14-5mm Amidon-T50 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D16.8mm_P14.70mm_Vishay_TJ3 +L_Toroid, Horizontal series, Radial, pin pitch=14.70mm, , diameter=16.8mm, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 14.70mm diameter 16.8mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D16.8mm_P14.70mm_Vishay_TJ3_BigPads +L_Toroid, Horizontal series, Radial, pin pitch=14.70mm, , diameter=16.8mm, Vishay, TJ3, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 14.70mm diameter 16.8mm Vishay TJ3 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D17.3mm_P15.24mm_Bourns_2000 +L_Toroid, Horizontal series, Radial, pin pitch=15.24mm, , diameter=17.3mm, Bourns, 2000, http://www.bourns.com/docs/Product-Datasheets/2000_series.pdf?sfvrsn=5 +L_Toroid Horizontal series Radial pin pitch 15.24mm diameter 17.3mm Bourns 2000 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D21.8mm_P19.10mm_Bourns_2100 +L_Toroid, Horizontal series, Radial, pin pitch=19.10mm, , diameter=21.8mm, Bourns, 2100, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 19.10mm diameter 21.8mm Bourns 2100 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D21.8mm_P19.60mm_Bourns_2100 +L_Toroid, Horizontal series, Radial, pin pitch=19.60mm, , diameter=21.8mm, Bourns, 2100, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 19.60mm diameter 21.8mm Bourns 2100 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D22.4mm_P19.80mm_Vishay_TJ4 +L_Toroid, Horizontal series, Radial, pin pitch=19.80mm, , diameter=22.4mm, Vishay, TJ4, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 19.80mm diameter 22.4mm Vishay TJ4 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D24.1mm_P21.80mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=21.80mm, , diameter=24.1mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 21.80mm diameter 24.1mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D24.1mm_P23.10mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=23.10mm, , diameter=24.1mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 23.10mm diameter 24.1mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D25.4mm_P22.90mm_Vishay_TJ5 +L_Toroid, Horizontal series, Radial, pin pitch=22.90mm, , diameter=25.4mm, Vishay, TJ5, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 22.90mm diameter 25.4mm Vishay TJ5 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D25.4mm_P22.90mm_Vishay_TJ5_BigPads +L_Toroid, Horizontal series, Radial, pin pitch=22.90mm, , diameter=25.4mm, Vishay, TJ5, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 22.90mm diameter 25.4mm Vishay TJ5 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D26.0mm_P5.08mm +inductor 26mm diameter toroid +SELF INDUCTOR +0 +3 +2 +Inductor_THT +L_Toroid_Horizontal_D28.0mm_P25.10mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=25.10mm, , diameter=28mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 25.10mm diameter 28mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D28.0mm_P26.67mm_Bourns_2200 +L_Toroid, Horizontal series, Radial, pin pitch=26.67mm, , diameter=28mm, Bourns, 2200, http://www.bourns.com/docs/Product-Datasheets/2100_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 26.67mm diameter 28mm Bourns 2200 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D32.5mm_P28.90mm_Bourns_2300 +L_Toroid, Horizontal series, Radial, pin pitch=28.90mm, , diameter=32.5mm, Bourns, 2300, http://www.bourns.com/docs/Product-Datasheets/2300_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 28.90mm diameter 32.5mm Bourns 2300 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D32.5mm_P30.00mm_Bourns_2300 +L_Toroid, Horizontal series, Radial, pin pitch=30.00mm, , diameter=32.5mm, Bourns, 2300, http://www.bourns.com/docs/Product-Datasheets/2300_series.pdf?sfvrsn=3 +L_Toroid Horizontal series Radial pin pitch 30.00mm diameter 32.5mm Bourns 2300 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D35.1mm_P31.00mm_Vishay_TJ6 +L_Toroid, Horizontal series, Radial, pin pitch=31.00mm, , diameter=35.1mm, Vishay, TJ6, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 31.00mm diameter 35.1mm Vishay TJ6 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D40.0mm_P48.26mm +L_Toroid, Horizontal series, Radial, pin pitch=48.26mm, , diameter=40mm +L_Toroid Horizontal series Radial pin pitch 48.26mm diameter 40mm +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D41.9mm_P37.60mm_Vishay_TJ7 +L_Toroid, Horizontal series, Radial, pin pitch=37.60mm, , diameter=41.9mm, Vishay, TJ7, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 37.60mm diameter 41.9mm Vishay TJ7 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D49.3mm_P44.60mm_Vishay_TJ8 +L_Toroid, Horizontal series, Radial, pin pitch=44.60mm, , diameter=49.3mm, Vishay, TJ8, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 44.60mm diameter 49.3mm Vishay TJ8 +0 +2 +2 +Inductor_THT +L_Toroid_Horizontal_D69.1mm_P63.20mm_Vishay_TJ9 +L_Toroid, Horizontal series, Radial, pin pitch=63.20mm, , diameter=69.1mm, Vishay, TJ9, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Horizontal series Radial pin pitch 63.20mm diameter 69.1mm Vishay TJ9 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L10.0mm_W5.0mm_P5.08mm +L_Toroid, Vertical series, Radial, pin pitch=5.08mm, , length*width=10*5mm^2 +L_Toroid Vertical series Radial pin pitch 5.08mm length 10mm width 5mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L13.0mm_W6.5mm_P5.60mm +L_Toroid, Vertical series, Radial, pin pitch=5.60mm, , length*width=13*6.5mm^2 +L_Toroid Vertical series Radial pin pitch 5.60mm length 13mm width 6.5mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.0mm_W5.6mm_P5.30mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=5.30mm, , length*width=14*5.6mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 5.30mm length 14mm width 5.6mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.0mm_W6.3mm_P4.57mm_Pulse_A +L_Toroid, Vertical series, Radial, pin pitch=4.57mm, , length*width=13.97*6.35mm^2, Pulse, A, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 4.57mm length 13.97mm width 6.35mm Pulse A +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L14.7mm_W8.6mm_P5.58mm_Pulse_KM-1 +L_Toroid, Vertical series, Radial, pin pitch=5.58mm, , length*width=14.73*8.64mm^2, Pulse, KM-1, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 5.58mm length 14.73mm width 8.64mm Pulse KM-1 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.0mm_W8.0mm_P7.62mm +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=16*8mm^2 +L_Toroid Vertical series Radial pin pitch 7.62mm length 16mm width 8mm +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.3mm_W7.1mm_P7.11mm_Pulse_H +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=16.26*7.11mm^2, Pulse, H, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 16.26mm width 7.11mm Pulse H +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.4mm_W7.6mm_P6.60mm_Vishay_TJ3 +L_Toroid, Vertical series, Radial, pin pitch=6.60mm, , length*width=16.4*7.6mm^2, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 6.60mm length 16.4mm width 7.6mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.5mm_W11.4mm_P7.62mm_Pulse_KM-2 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=16.51*11.43mm^2, Pulse, KM-2, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 16.51mm width 11.43mm Pulse KM-2 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.8mm_W9.2mm_P7.10mm_Vishay_TJ3 +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=16.8*9.2mm^2, Vishay, TJ3, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 16.8mm width 9.2mm Vishay TJ3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L16.8mm_W9.2mm_P7.10mm_Vishay_TJ3_BigPads +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=16.8*9.2mm^2, Vishay, TJ3, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 16.8mm width 9.2mm Vishay TJ3 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L17.8mm_W8.1mm_P7.62mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=17.8*8.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 17.8mm width 8.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L17.8mm_W9.7mm_P7.11mm_Pulse_B +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=17.78*9.65mm^2, Pulse, B, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 17.78mm width 9.65mm Pulse B +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L19.1mm_W8.1mm_P7.10mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=7.10mm, , length*width=19.1*8.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 7.10mm length 19.1mm width 8.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W8.4mm_P8.38mm_Pulse_G +L_Toroid, Vertical series, Radial, pin pitch=8.38mm, , length*width=21.59*8.38mm^2, Pulse, G, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 8.38mm length 21.59mm width 8.38mm Pulse G +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W9.1mm_P8.40mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=8.40mm, , length*width=21.6*9.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 8.40mm length 21.6mm width 9.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W9.5mm_P7.11mm_Pulse_C +L_Toroid, Vertical series, Radial, pin pitch=7.11mm, , length*width=21.59*9.53mm^2, Pulse, C, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.11mm length 21.59mm width 9.53mm Pulse C +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L21.6mm_W11.4mm_P7.62mm_Pulse_KM-3 +L_Toroid, Vertical series, Radial, pin pitch=7.62mm, , length*width=21.59*11.43mm^2, Pulse, KM-3, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 7.62mm length 21.59mm width 11.43mm Pulse KM-3 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L22.4mm_W10.2mm_P7.90mm_Vishay_TJ4 +L_Toroid, Vertical series, Radial, pin pitch=7.90mm, , length*width=22.4*10.2mm^2, Vishay, TJ4, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 7.90mm length 22.4mm width 10.2mm Vishay TJ4 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L24.6mm_W15.5mm_P11.44mm_Pulse_KM-4 +L_Toroid, Vertical series, Radial, pin pitch=11.44mm, , length*width=24.64*15.5mm^2, Pulse, KM-4, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 11.44mm length 24.64mm width 15.5mm Pulse KM-4 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L25.4mm_W14.7mm_P12.20mm_Vishay_TJ5 +L_Toroid, Vertical series, Radial, pin pitch=12.20mm, , length*width=25.4*14.7mm^2, Vishay, TJ5, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 12.20mm length 25.4mm width 14.7mm Vishay TJ5 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L25.4mm_W14.7mm_P12.20mm_Vishay_TJ5_BigPads +L_Toroid, Vertical series, Radial, pin pitch=12.20mm, , length*width=25.4*14.7mm^2, Vishay, TJ5, BigPads, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 12.20mm length 25.4mm width 14.7mm Vishay TJ5 BigPads +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L26.7mm_W14.0mm_P10.16mm_Pulse_D +L_Toroid, Vertical series, Radial, pin pitch=10.16mm, , length*width=26.67*13.97mm^2, Pulse, D, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 10.16mm length 26.67mm width 13.97mm Pulse D +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L28.6mm_W14.3mm_P11.43mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=11.43mm, , length*width=28.6*14.3mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 11.43mm length 28.6mm width 14.3mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L31.8mm_W15.9mm_P13.50mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=13.50mm, , length*width=31.8*15.9mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 13.50mm length 31.8mm width 15.9mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L33.0mm_W17.8mm_P12.70mm_Pulse_KM-5 +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=33.02*17.78mm^2, Pulse, KM-5, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 33.02mm width 17.78mm Pulse KM-5 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L35.1mm_W21.1mm_P18.50mm_Vishay_TJ6 +L_Toroid, Vertical series, Radial, pin pitch=18.50mm, , length*width=35.1*21.1mm^2, Vishay, TJ6, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 18.50mm length 35.1mm width 21.1mm Vishay TJ6 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L35.6mm_W17.8mm_P12.70mm_Pulse_E +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=35.56*17.78mm^2, Pulse, E, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 35.56mm width 17.78mm Pulse E +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L41.9mm_W17.8mm_P12.70mm_Pulse_F +L_Toroid, Vertical series, Radial, pin pitch=12.70mm, , length*width=41.91*17.78mm^2, Pulse, F, http://datasheet.octopart.com/PE-92112KNL-Pulse-datasheet-17853305.pdf +L_Toroid Vertical series Radial pin pitch 12.70mm length 41.91mm width 17.78mm Pulse F +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L41.9mm_W19.1mm_P15.80mm_Vishay_TJ7 +L_Toroid, Vertical series, Radial, pin pitch=15.80mm, , length*width=41.9*19.1mm^2, Vishay, TJ7, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 15.80mm length 41.9mm width 19.1mm Vishay TJ7 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L46.0mm_W19.1mm_P21.80mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=21.80mm, , length*width=46*19.1mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 21.80mm length 46mm width 19.1mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L48.8mm_W25.4mm_P20.80mm_Vishay_TJ8 +L_Toroid, Vertical series, Radial, pin pitch=20.80mm, , length*width=48.8*25.4mm^2, Vishay, TJ8, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 20.80mm length 48.8mm width 25.4mm Vishay TJ8 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L54.0mm_W23.8mm_P20.10mm_Bourns_5700 +L_Toroid, Vertical series, Radial, pin pitch=20.10mm, , length*width=54*23.8mm^2, Bourns, 5700, http://www.bourns.com/docs/Product-Datasheets/5700_series.pdf +L_Toroid Vertical series Radial pin pitch 20.10mm length 54mm width 23.8mm Bourns 5700 +0 +2 +2 +Inductor_THT +L_Toroid_Vertical_L67.6mm_W36.1mm_P31.80mm_Vishay_TJ9 +L_Toroid, Vertical series, Radial, pin pitch=31.80mm, , length*width=67.6*36.1mm^2, Vishay, TJ9, http://www.vishay.com/docs/34079/tj.pdf +L_Toroid Vertical series Radial pin pitch 31.80mm length 67.6mm width 36.1mm Vishay TJ9 +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged2Bar_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, bridged with 2 copper strips +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged2Bar_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, bridged with 2 copper strips +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, bridged with 1 copper strip +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Bridged_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, bridged with 1 copper strip +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_Pad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_RoundedPad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm, rounded Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-2_P1.3mm_Open_TrianglePad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open +solder jumper open +0 +2 +2 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged2Bar12_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 Bridged2Bar with 2 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Bridged12_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, pads 1-2 bridged with 1 copper strip, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_Pad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm Pads, 0.3mm gap, open +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_Pad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_RoundedPad1.0x1.5mm +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, open +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P1.3mm_Open_RoundedPad1.0x1.5mm_NumberLabels +SMD Solder 3-pad Jumper, 1x1.5mm rounded Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +3 +3 +Jumper +SolderJumper-3_P2.0mm_Open_TrianglePad1.0x1.5mm +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open +solder jumper open +0 +5 +3 +Jumper +SolderJumper-3_P2.0mm_Open_TrianglePad1.0x1.5mm_NumberLabels +SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open, labeled with numbers +solder jumper open +0 +5 +3 +LED_SMD +LED-APA102-2020 +http://www.led-color.com/upload/201604/APA102-2020%20SMD%20LED.pdf +LED RGB SPI +0 +8 +6 +LED_SMD +LED-L1T2_LUMILEDS +http://www.lumileds.com/uploads/438/DS133-pdf +LUMILEDS LUXEON TX L1T2 LED +0 +3 +3 +LED_SMD +LED_1W_3W_R8 +https://www.gme.cz/data/attachments/dsh.518-234.1.pdf +LED 1W 3W 5W +0 +3 +3 +LED_SMD +LED_0201_0603Metric +LED SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +LED +0 +4 +2 +LED_SMD +LED_0201_0603Metric_Castellated +LED SMD 0201 (0603 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +LED castellated +0 +4 +2 +LED_SMD +LED_0201_0603Metric_Pad0.64x0.40mm_HandSolder +LED SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +LED handsolder +0 +4 +2 +LED_SMD +LED_0402_1005Metric +LED SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_0402_1005Metric_Castellated +LED SMD 0402 (1005 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_0402_1005Metric_Pad0.77x0.64mm_HandSolder +LED SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_0603_1608Metric +LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_0603_1608Metric_Castellated +LED SMD 0603 (1608 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_0603_1608Metric_Pad1.05x0.95mm_HandSolder +LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_0805_2012Metric +LED SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_0805_2012Metric_Castellated +LED SMD 0805 (2012 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder +LED SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1206_3216Metric +LED SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_1206_3216Metric_Castellated +LED SMD 1206 (3216 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1206_3216Metric_Pad1.42x1.75mm_HandSolder +LED SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1206_3216Metric_ReverseMount_Hole1.8x2.4mm +LED SMD 1206 (3216 Metric), reverse mount, square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +diode reverse +0 +2 +2 +LED_SMD +LED_1210_3225Metric +LED SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_1210_3225Metric_Castellated +LED SMD 1210 (3225 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1210_3225Metric_Pad1.42x2.65mm_HandSolder +LED SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_1812_4532Metric +LED SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_1812_4532Metric_Castellated +LED SMD 1812 (4532 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_1812_4532Metric_Pad1.30x3.40mm_HandSolder +LED SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2010_5025Metric +LED SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_2010_5025Metric_Castellated +LED SMD 2010 (5025 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2010_5025Metric_Pad1.52x2.65mm_HandSolder +LED SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2512_6332Metric +LED SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_2512_6332Metric_Castellated +LED SMD 2512 (6332 Metric), castellated end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2512_6332Metric_Pad1.52x3.35mm_HandSolder +LED SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_2816_7142Metric +LED SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +LED +0 +2 +2 +LED_SMD +LED_2816_7142Metric_Castellated +LED SMD 2816 (7142 Metric), castellated end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +LED castellated +0 +2 +2 +LED_SMD +LED_2816_7142Metric_Pad3.20x4.45mm_HandSolder +LED SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +LED handsolder +0 +2 +2 +LED_SMD +LED_ASMB-KTF0-0A306 +2220 Tricolor PLCC-4 LED, https://docs.broadcom.com/docs/ASMB-KTF0-0A306-DS100 +Tricolor LED +0 +4 +4 +LED_SMD +LED_Avago_PLCC4_3.2x2.8mm_CW +https://docs.broadcom.com/docs/AV02-4186EN +LED Avago PLCC-4 ASMB-MTB0-0A3A2 +0 +4 +4 +LED_SMD +LED_Avago_PLCC6_3x2.8mm +https://docs.broadcom.com/docs/AV02-3793EN +LED Avago PLCC-6 ASMT-YTB7-0AA02 +0 +6 +6 +LED_SMD +LED_Cree-PLCC4_2x2mm_CW +2.0mm x 2.0mm PLCC4 LED, http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/HB/Data-Sheets/CLMVBFKA.pdf +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC4_3.2x2.8mm_CCW +3.2mm x 2.8mm PLCC4 LED, http://www.cree.com/led-components/media/documents/CLV1AFKB(874).pdf +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC4_5x5mm_CW +5.0mm x 5.0mm PLCC4 LED +LED Cree PLCC-4 +0 +4 +4 +LED_SMD +LED_Cree-PLCC6_4.7x1.5mm +4.7mm x 1.5mm PLCC6 LED, http://www.cree.com/led-components/media/documents/1381-QLS6AFKW.pdf +LED Cree PLCC-6 +0 +6 +6 +LED_SMD +LED_Cree-XB +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/XLampXBD.pdf +LED Cree XB +0 +5 +3 +LED_SMD +LED_Cree-XH +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XHB.pdf +LED Cree XH +0 +8 +2 +LED_SMD +LED_Cree-XHP35 +http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds--XHP35.pdf +LED Cree XHP35 +0 +6 +3 +LED_SMD +LED_Cree-XHP50_6V +Cree XHP50, 6V footprint, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP50.pdf +LED Cree XHP50 +0 +15 +3 +LED_SMD +LED_Cree-XHP50_12V +Cree XHP50, 12V footprint, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP50.pdf +LED XHP50 Cree +0 +15 +3 +LED_SMD +LED_Cree-XHP70_6V +Cree XHP70 LED, 6V version, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP70.pdf +LED Cree XHP70 +0 +15 +3 +LED_SMD +LED_Cree-XHP70_12V +Cree XHP70 LED, 12V version, http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/ds%20XHP70.pdf +LED Cree XHP70 +0 +15 +3 +LED_SMD +LED_Cree-XP +LED Cree-XP http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/XLampXPE2.pdf +LED Cree XP +0 +6 +3 +LED_SMD +LED_Cree-XP-G +LED Cree-XP-G http://www.cree.com/~/media/Files/Cree/LED%20Components%20and%20Modules/XLamp/Data%20and%20Binning/XLampXPG.pdf +LED Cree XP-G +0 +6 +3 +LED_SMD +LED_Cree-XQ +LED Cree-XQ http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XQB.pdf +LED Cree XQ +0 +2 +2 +LED_SMD +LED_Cree-XQ_HandSoldering +LED Cree-XQ handsoldering pads http://www.cree.com/~/media/Files/Cree/LED-Components-and-Modules/XLamp/Data-and-Binning/ds-XQB.pdf +LED Cree XQ +0 +2 +2 +LED_SMD +LED_Dialight_591 +LED SMD 3mm Right Angle series (http://www.dialightsignalsandcomponents.com/Assets/Drawings/2D_Drawings_DrawingDetailedSpec/C17354.pdf) +LED Dialight 591 +0 +2 +2 +LED_SMD +LED_Inolux_IN-PI554FCH_PLCC4_5.0x5.0mm_P3.2mm +http://www.inolux-corp.com/datasheet/SMDLED/Addressable%20LED/IN-PI554FCH.pdf +RGB LED NeoPixel addressable +0 +4 +4 +LED_SMD +LED_Kingbright_AAA3528ESGCT +Kingbright, dual LED, 3.5 x 2.8 mm Surface Mount LED Lamp (http://www.kingbrightusa.com/images/catalog/SPEC/AAA3528ESGCT.pdf) +dual led smd +0 +4 +4 +LED_SMD +LED_Kingbright_APFA3010_3x1.5mm_Horizontal +LED RGB, APFA3010, http://www.kingbrightusa.com/images/catalog/SPEC/APFA3010LSEEZGKQBKC.pdf +LED RGB APFA3010 KINGBRIGHT 3x1.5mm +0 +4 +4 +LED_SMD +LED_LiteOn_LTST-C19HE1WT +LiteOn RGB LED; https://optoelectronics.liteon.com/upload/download/DS22-2008-0044/LTST-C19HE1WT.pdf +LED RGB Chip SMD +0 +4 +4 +LED_SMD +LED_LiteOn_LTST-S326 +http://optoelectronics.liteon.com/upload/download/DS22-2000-287/LTST-S326KGJRKT.PDF +LED SMD right angle CCA +0 +3 +3 +LED_SMD +LED_Lumex_SML-LX0303SIUPGUSB +Lumex RGB LED, clear, SMD, https://www.lumex.com/spec/SML-LX0303SIUPGUSB.pdf +LED RGB +0 +4 +4 +LED_SMD +LED_Osram_Lx_P47F_D2mm_ReverseMount +OSRAM, reverse-mount LED, SMD, 2mm diameter, http://www.farnell.com/datasheets/2711587.pdf +LED ReverseMount Reverse +0 +4 +2 +LED_SMD +LED_PLCC-2 +LED PLCC-2 SMD package +LED PLCC-2 SMD +0 +2 +2 +LED_SMD +LED_PLCC_2835 +https://www.luckylight.cn/media/component/data-sheet/R2835BC-B2M-M10.pdf +LED +0 +2 +2 +LED_SMD +LED_PLCC_2835_Handsoldering +https://www.luckylight.cn/media/component/data-sheet/R2835BC-B2M-M10.pdf +LED +0 +2 +2 +LED_SMD +LED_RGB_1210 +RGB LED 3.2x2.7mm http://www.avagotech.com/docs/AV02-0610EN +LED 3227 +0 +4 +4 +LED_SMD +LED_RGB_5050-6 +http://cdn.sparkfun.com/datasheets/Components/LED/5060BRG4.pdf +RGB LED 5050-6 +0 +6 +6 +LED_SMD +LED_RGB_Cree-PLCC-6_6x5mm_P2.1mm +http://www.farnell.com/datasheets/2003905.pdf +LED RGB PLCC-6 CLP6C-FBK +0 +6 +6 +LED_SMD +LED_RGB_Getian_GT-P6PRGB4303 +https://www.gme.sk/img/cache/doc/518/177/vykonova-led-getian-gt-p6prgb4303-datasheet-1.pdf +LED RGB +0 +7 +7 +LED_SMD +LED_RGB_PLCC-6 +RGB LED PLCC-6 +RGB LED PLCC-6 +0 +6 +6 +LED_SMD +LED_ROHM_SMLVN6 +https://www.rohm.com/datasheet/SMLVN6RGB1U +LED ROHM SMLVN6 +0 +6 +6 +LED_SMD +LED_SK6805_PLCC4_2.4x2.7mm_P1.3mm +https://cdn-shop.adafruit.com/product-files/3484/3484_Datasheet.pdf +LED RGB NeoPixel Nano +0 +4 +4 +LED_SMD +LED_SK6812MINI_PLCC4_3.5x3.5mm_P1.75mm +https://cdn-shop.adafruit.com/product-files/2686/SK6812MINI_REV.01-1-2.pdf +LED RGB NeoPixel Mini +0 +4 +4 +LED_SMD +LED_SK6812_EC15_1.5x1.5mm +http://www.newstar-ledstrip.com/product/20181119172602110.pdf +LED RGB NeoPixel +0 +4 +4 +LED_SMD +LED_SK6812_PLCC4_5.0x5.0mm_P3.2mm +https://cdn-shop.adafruit.com/product-files/1138/SK6812+LED+datasheet+.pdf +LED RGB NeoPixel +0 +4 +4 +LED_SMD +LED_WS2812B_PLCC4_5.0x5.0mm_P3.2mm +https://cdn-shop.adafruit.com/datasheets/WS2812B.pdf +LED RGB NeoPixel +0 +4 +4 +LED_SMD +LED_WS2812_PLCC6_5.0x5.0mm_P1.6mm +https://cdn-shop.adafruit.com/datasheets/WS2812.pdf +LED RGB NeoPixel +0 +6 +6 +LED_SMD +LED_Yuji_5730 +LED,Yuji,5730,https://cdn.shopify.com/s/files/1/0344/6401/files/YJWJ014-1.1_YJ-BC-5730L-G02.pdf +LED Yuji 5730 +0 +3 +2 +LED_SMD +LED_miniPLCC_2315 +https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DAV02-2205EN_DS_ASMT-TxBM_2014-05-09.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430858274704&ssbinary=true +LED +0 +2 +2 +LED_SMD +LED_miniPLCC_2315_Handsoldering +https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DAV02-2205EN_DS_ASMT-TxBM_2014-05-09.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430858274704&ssbinary=true +LED +0 +2 +2 +LED_THT +LED_BL-FL7680RGB +'Piranha' RGB LED, through hole, common anode, 7.62x7.62mm, BGRA pin order, https://cdn-shop.adafruit.com/datasheets/BL-FL7680RGB.pdf +RGB LED Piranha Super-Flux BetLux +0 +4 +4 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O1.27mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O3.81mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z1.6mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z4.9mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W1.8mm_H2.4mm_Horizontal_O6.35mm_Z8.2mm +LED, , diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins, diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm, 2 pins +LED diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 1.6mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 4.9mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins diameter 1.8mm size 1.8x2.4mm^2 z-position of LED center 8.2mm 2 pins +0 +2 +2 +LED_THT +LED_D1.8mm_W3.3mm_H2.4mm +LED, Round, Rectangular size 3.3x2.4mm^2 diameter 1.8mm, 2 pins +LED Round Rectangular size 3.3x2.4mm^2 diameter 1.8mm 2 pins +0 +2 +2 +LED_THT +LED_D2.0mm_W4.0mm_H2.8mm_FlatTop +LED, Round, FlatTop, Rectangular size 4.0x2.8mm^2 diameter 2.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-1034IDT(Ver.9A).pdf +LED Round FlatTop Rectangular size 4.0x2.8mm^2 diameter 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D2.0mm_W4.8mm_H2.5mm_FlatTop +LED, Round, FlatTop, Rectangular size 4.8x2.5mm^2 diameter 2.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-13GD(Ver.11B).pdf +LED Round FlatTop Rectangular size 4.8x2.5mm^2 diameter 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm +LED, diameter 3.0mm, 2 pins +LED diameter 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm-3 +LED, diameter 3.0mm, 2 pins, diameter 3.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-3VSURKCGKC(Ver.8A).pdf +LED diameter 3.0mm 2 pins diameter 3.0mm 3 pins +0 +3 +3 +LED_THT +LED_D3.0mm_Clear +IR-LED, diameter 3.0mm, 2 pins, color: clear +IR infrared LED diameter 3.0mm 2 pins clear +0 +2 +2 +LED_THT +LED_D3.0mm_FlatTop +LED, Round, FlatTop, diameter 3.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-47XEC(Ver.9A).pdf +LED Round FlatTop diameter 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_Clear +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_IRBlack +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z2.0mm_IRGrey +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O1.27mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O3.81mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z2.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z6.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_Horizontal_O6.35mm_Z10.0mm +LED, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 2.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 6.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins, diameter 3.0mm z-position of LED center 10.0mm, 2 pins +LED diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 2.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 6.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins diameter 3.0mm z-position of LED center 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D3.0mm_IRBlack +IR-ED, diameter 3.0mm, 2 pins, color: black +IR infrared LED diameter 3.0mm 2 pins black +0 +2 +2 +LED_THT +LED_D3.0mm_IRGrey +IR-LED, diameter 3.0mm, 2 pins, color: grey +IR infrared LED diameter 3.0mm 2 pins grey +0 +2 +2 +LED_THT +LED_D4.0mm +LED, diameter 4.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-43GD(Ver.12B).pdf +LED diameter 4.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm-3 +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-59EGC(Ver.17A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins +0 +3 +3 +LED_THT +LED_D5.0mm-3_Horizontal_O3.81mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 3 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 3 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +3 +3 +LED_THT +LED_D5.0mm-4_RGB +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, diameter 5.0mm, 4 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins diameter 5.0mm 4 pins RGB RGBLED +0 +4 +4 +LED_THT +LED_D5.0mm-4_RGB_Staggered_Pins +LED, diameter 5.0mm, 4 pins, WP154A4, http://webtest4.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +rgb led +0 +4 +4 +LED_THT +LED_D5.0mm-4_RGB_Wide_Pins +LED, diameter 5.0mm, 2 pins, diameter 5.0mm, 3 pins, diameter 5.0mm, 4 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-154A4SUREQBFZGEW(Ver.9A).pdf +LED diameter 5.0mm 2 pins diameter 5.0mm 3 pins diameter 5.0mm 4 pins RGB RGBLED +0 +4 +4 +LED_THT +LED_D5.0mm_Clear +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_FlatTop +LED, Round, FlatTop, diameter 5.0mm, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-483GDT(Ver.15B).pdf +LED Round FlatTop diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_Clear +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_IRBlack +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z3.0mm_IRGrey +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O1.27mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O3.81mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z3.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z9.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_Horizontal_O6.35mm_Z15.0mm +LED, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 3.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 9.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins, diameter 5.0mm z-position of LED center 15.0mm, 2 pins +LED diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 3.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 9.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins diameter 5.0mm z-position of LED center 15.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_IRBlack +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D5.0mm_IRGrey +LED, diameter 5.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LL-504BC2E-009.pdf +LED diameter 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_D8.0mm +LED, diameter 8.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED8MMGE_LED8MMGN_LED8MMRT%23KIN.pdf +LED diameter 8.0mm 2 pins +0 +2 +2 +LED_THT +LED_D8.0mm-3 +LED, diameter 8.0mm, 2 pins, diameter 8.0mm, 3 pins +LED diameter 8.0mm 2 pins diameter 8.0mm 3 pins +0 +3 +3 +LED_THT +LED_D10.0mm +LED, diameter 10.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED10-4500RT%23KIN.pdf +LED diameter 10.0mm 2 pins +0 +2 +2 +LED_THT +LED_D10.0mm-3 +LED, diameter 10.0mm, 2 pins, diameter 10.0mm, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-819EGW(Ver.14A).pdf +LED diameter 10.0mm 2 pins diameter 10.0mm 3 pins +0 +3 +3 +LED_THT +LED_D20.0mm +LED, diameter 20.0mm, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/DLC2-6GD%28V6%29.pdf +LED diameter 20.0mm 2 pins +0 +2 +2 +LED_THT +LED_Oval_W5.2mm_H3.8mm +LED_Oval, Oval, Oval size 5.2x3.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-5603QBC-D(Ver.12B).pdf +LED_Oval Oval Oval size 5.2x3.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.0mm_H2.0mm +LED_Rectangular, Rectangular, Rectangular size 3.0x2.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 3.0x2.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.8mm +LED_Rectangular, Rectangular, Rectangular size 3.9x1.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-2774GD(Ver.7B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.8mm_FlatTop +LED_Rectangular, Rectangular, Rectangular size 3.9x1.8mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-2774GD(Ver.7B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.8mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W3.9mm_H1.9mm +LED_Rectangular, Rectangular, Rectangular size 3.9x1.9mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-144GDT(Ver.14B).pdf +LED_Rectangular Rectangular Rectangular size 3.9x1.9mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm-3Pins +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2, 3 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 3 pins +0 +3 +3 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O1.27mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O3.81mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z1.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z3.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H2.0mm_Horizontal_O6.35mm_Z5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins, Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm, 2 pins +LED_Rectangular Rectangular Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 1.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 3.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins Rectangular size 5.0x2.0mm^2 z-position of LED center 5.0mm 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W5.0mm_H5.0mm +LED_Rectangular, Rectangular, Rectangular size 5.0x5.0mm^2, 2 pins, http://www.kingbright.com/attachments/file/psearch/000/00/00/L-169XCGDK(Ver.9B).pdf +LED_Rectangular Rectangular Rectangular size 5.0x5.0mm^2 2 pins +0 +2 +2 +LED_THT +LED_Rectangular_W7.62mm_H4.55mm_P5.08mm_R3 +Datasheet can be found at https://www.gme.cz/data/attachments/dsh.511-795.1.pdf +LED automotive super flux 7.62mm +0 +4 +2 +LED_THT +LED_SideEmitter_Rectangular_W4.5mm_H1.6mm +LED_SideEmitter_Rectangular, Rectangular, SideEmitter, Rectangular size 4.5x1.6mm^2, 2 pins, http://cdn-reichelt.de/documents/datenblatt/A500/LED15MMGE_LED15MMGN%23KIN.pdf +LED_SideEmitter_Rectangular Rectangular SideEmitter Rectangular size 4.5x1.6mm^2 2 pins +0 +2 +2 +LED_THT +LED_VCCLite_5381H1_6.35x6.35mm +Red 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Red 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H3_6.35x6.35mm +Amber 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Amber 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H5_6.35x6.35mm +Green 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Green 5381 Series LED +0 +2 +2 +LED_THT +LED_VCCLite_5381H7_6.35x6.35mm +Yellow 5381 Series LED VCCLite https://vcclite.com/wp-content/uploads/wpallimport/files/files/5381Series.pdf http://static.vcclite.com/pdf/Mounting%20Hole%20Pattern%202.pdf +Yellow 5381 Series LED +0 +2 +2 +Module +A20_OLINUXINO_LIME2 +A20 Olinuxino LIME2, 1.2GHz, 512-1024MB RAM, Micro-SD, NAND or eMMC, 1000Mbit Ethernet +A20 Olimex Olinuxino LIME2 development board +0 +180 +180 +Module +Adafruit_HUZZAH_ESP8266_breakout +32-bit microcontroller module with WiFi, https://www.adafruit.com/product/2471 +ESP8266 WiFi microcontroller +0 +20 +20 +Module +Adafruit_HUZZAH_ESP8266_breakout_WithMountingHoles +32-bit microcontroller module with WiFi, https://www.adafruit.com/product/2471 +ESP8266 WiFi microcontroller +0 +20 +20 +Module +Arduino_Nano +Arduino Nano, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino Nano +0 +30 +30 +Module +Arduino_Nano_WithMountingHoles +Arduino Nano, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino Nano +0 +30 +30 +Module +Arduino_UNO_R2 +Arduino UNO R2, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R2 +0 +30 +30 +Module +Arduino_UNO_R2_WithMountingHoles +Arduino UNO R2, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R2 +0 +30 +30 +Module +Arduino_UNO_R3 +Arduino UNO R3, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R3 +0 +32 +32 +Module +Arduino_UNO_R3_WithMountingHoles +Arduino UNO R3, http://www.mouser.com/pdfdocs/Gravitech_Arduino_Nano3_0.pdf +Arduino UNO R3 +0 +32 +32 +Module +BeagleBoard_PocketBeagle +PocketBeagle, https://github.com/beagleboard/pocketbeagle/wiki/System-Reference-Manual#71_Expansion_Header_Connectors +PocketBeagle +0 +72 +72 +Module +Maple_Mini +Maple Mini, http://docs.leaflabs.com/static.leaflabs.com/pub/leaflabs/maple-docs/0.0.12/hardware/maple-mini.html +Maple Mini +0 +40 +40 +Module +Onion_Omega2+ +https://onion.io/omega2/ +Omega Onion module +0 +32 +32 +Module +Onion_Omega2S +https://github.com/OnionIoT/Omega2/raw/master/Documents/Omega2S%20Datasheet.pdf +onion omega module +0 +89 +64 +Module +Pololu_Breakout-16_15.2x20.3mm +Pololu Breakout 16-pin 15.2x20.3mm 0.6x0.8\ +Pololu Breakout +0 +16 +16 +Module +Raspberry_Pi_Zero_Socketed_THT_FaceDown_MountingHoles +Raspberry Pi Zero using through hole straight pin socket, 2x20, 2.54mm pitch, https://www.raspberrypi.org/documentation/hardware/raspberrypi/mechanical/rpi_MECH_Zero_1p2.pdf +raspberry pi zero through hole +0 +40 +40 +Module +ST_Morpho_Connector_144_STLink +ST Morpho Connector 144 With STLink +ST Morpho Connector 144 STLink +0 +148 +148 +Module +ST_Morpho_Connector_144_STLink_MountingHoles +ST Morpho Connector 144 With STLink +ST Morpho Connector 144 STLink +0 +148 +148 +Module +Texas_EUK_R-PDSS-T7_THT +Texas Instruments EUK 7 Pin Double Sided Module +module pcb +0 +7 +7 +Module +Texas_EUS_R-PDSS-T5_THT +Texas Instruments EUS 5 Pin Double Sided Module +module pcb +0 +5 +5 +Module +Texas_EUW_R-PDSS-T7_THT +Texas Instruments EUW 7 Pin Double Sided Module +module pcb +0 +7 +7 +Module +WEMOS_D1_mini_light +16-pin module, column spacing 22.86 mm (900 mils), https://wiki.wemos.cc/products:d1:d1_mini, https://c1.staticflickr.com/1/734/31400410271_f278b087db_z.jpg +ESP8266 WiFi microcontroller +0 +16 +16 +MountingEquipment +DINRailAdapter_3xM3_PhoenixContact_1201578 +https://www.phoenixcontact.com/online/portal/us?uri=pxc-oc-itemdetail:pid=1201578&library=usen&tab=1 +DIN rail adapter universal three M3 clearance holes +0 +0 +0 +MountingHole +MountingHole_2.1mm +Mounting Hole 2.1mm, no annular +mounting hole 2.1mm no annular +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2 +Mounting Hole 2.2mm, no annular, M2 +mounting hole 2.2mm no annular m2 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_DIN965 +Mounting Hole 2.2mm, no annular, M2, DIN965 +mounting hole 2.2mm no annular m2 din965 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_DIN965_Pad +Mounting Hole 2.2mm, M2, DIN965 +mounting hole 2.2mm m2 din965 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_DIN965_Pad_TopBottom +Mounting Hole 2.2mm, M2, DIN965 +mounting hole 2.2mm m2 din965 +0 +3 +1 +MountingHole +MountingHole_2.2mm_M2_DIN965_Pad_TopOnly +Mounting Hole 2.2mm, M2, DIN965 +mounting hole 2.2mm m2 din965 +0 +2 +1 +MountingHole +MountingHole_2.2mm_M2_ISO7380 +Mounting Hole 2.2mm, no annular, M2, ISO7380 +mounting hole 2.2mm no annular m2 iso7380 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_ISO7380_Pad +Mounting Hole 2.2mm, M2, ISO7380 +mounting hole 2.2mm m2 iso7380 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_ISO7380_Pad_TopBottom +Mounting Hole 2.2mm, M2, ISO7380 +mounting hole 2.2mm m2 iso7380 +0 +3 +1 +MountingHole +MountingHole_2.2mm_M2_ISO7380_Pad_TopOnly +Mounting Hole 2.2mm, M2, ISO7380 +mounting hole 2.2mm m2 iso7380 +0 +2 +1 +MountingHole +MountingHole_2.2mm_M2_ISO14580 +Mounting Hole 2.2mm, no annular, M2, ISO14580 +mounting hole 2.2mm no annular m2 iso14580 +0 +0 +0 +MountingHole +MountingHole_2.2mm_M2_ISO14580_Pad +Mounting Hole 2.2mm, M2, ISO14580 +mounting hole 2.2mm m2 iso14580 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_ISO14580_Pad_TopBottom +Mounting Hole 2.2mm, M2, ISO14580 +mounting hole 2.2mm m2 iso14580 +0 +3 +1 +MountingHole +MountingHole_2.2mm_M2_ISO14580_Pad_TopOnly +Mounting Hole 2.2mm, M2, ISO14580 +mounting hole 2.2mm m2 iso14580 +0 +2 +1 +MountingHole +MountingHole_2.2mm_M2_Pad +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +1 +1 +MountingHole +MountingHole_2.2mm_M2_Pad_TopBottom +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +3 +1 +MountingHole +MountingHole_2.2mm_M2_Pad_TopOnly +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +2 +1 +MountingHole +MountingHole_2.2mm_M2_Pad_Via +Mounting Hole 2.2mm, M2 +mounting hole 2.2mm m2 +0 +9 +1 +MountingHole +MountingHole_2.5mm +Mounting Hole 2.5mm, no annular +mounting hole 2.5mm no annular +0 +0 +0 +MountingHole +MountingHole_2.5mm_Pad +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +1 +1 +MountingHole +MountingHole_2.5mm_Pad_TopBottom +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +3 +1 +MountingHole +MountingHole_2.5mm_Pad_TopOnly +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +2 +1 +MountingHole +MountingHole_2.5mm_Pad_Via +Mounting Hole 2.5mm +mounting hole 2.5mm +0 +9 +1 +MountingHole +MountingHole_2.7mm +Mounting Hole 2.7mm, no annular +mounting hole 2.7mm no annular +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5 +Mounting Hole 2.7mm, no annular, M2.5 +mounting hole 2.7mm no annular m2.5 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_DIN965 +Mounting Hole 2.7mm, no annular, M2.5, DIN965 +mounting hole 2.7mm no annular m2.5 din965 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_DIN965_Pad +Mounting Hole 2.7mm, M2.5, DIN965 +mounting hole 2.7mm m2.5 din965 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_DIN965_Pad_TopBottom +Mounting Hole 2.7mm, M2.5, DIN965 +mounting hole 2.7mm m2.5 din965 +0 +3 +1 +MountingHole +MountingHole_2.7mm_M2.5_DIN965_Pad_TopOnly +Mounting Hole 2.7mm, M2.5, DIN965 +mounting hole 2.7mm m2.5 din965 +0 +2 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380 +Mounting Hole 2.7mm, no annular, M2.5, ISO7380 +mounting hole 2.7mm no annular m2.5 iso7380 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380_Pad +Mounting Hole 2.7mm, M2.5, ISO7380 +mounting hole 2.7mm m2.5 iso7380 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380_Pad_TopBottom +Mounting Hole 2.7mm, M2.5, ISO7380 +mounting hole 2.7mm m2.5 iso7380 +0 +3 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO7380_Pad_TopOnly +Mounting Hole 2.7mm, M2.5, ISO7380 +mounting hole 2.7mm m2.5 iso7380 +0 +2 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580 +Mounting Hole 2.7mm, no annular, M2.5, ISO14580 +mounting hole 2.7mm no annular m2.5 iso14580 +0 +0 +0 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580_Pad +Mounting Hole 2.7mm, M2.5, ISO14580 +mounting hole 2.7mm m2.5 iso14580 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580_Pad_TopBottom +Mounting Hole 2.7mm, M2.5, ISO14580 +mounting hole 2.7mm m2.5 iso14580 +0 +3 +1 +MountingHole +MountingHole_2.7mm_M2.5_ISO14580_Pad_TopOnly +Mounting Hole 2.7mm, M2.5, ISO14580 +mounting hole 2.7mm m2.5 iso14580 +0 +2 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad +Mounting Hole 2.7mm, M2.5 +mounting hole 2.7mm m2.5 +0 +1 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad_TopBottom +Mounting Hole 2.7mm, M2.5 +mounting hole 2.7mm m2.5 +0 +3 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad_TopOnly +Mounting Hole 2.7mm, M2.5 +mounting hole 2.7mm m2.5 +0 +2 +1 +MountingHole +MountingHole_2.7mm_M2.5_Pad_Via +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +9 +1 +MountingHole +MountingHole_2.7mm_Pad +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +1 +1 +MountingHole +MountingHole_2.7mm_Pad_TopBottom +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +3 +1 +MountingHole +MountingHole_2.7mm_Pad_TopOnly +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +2 +1 +MountingHole +MountingHole_2.7mm_Pad_Via +Mounting Hole 2.7mm +mounting hole 2.7mm +0 +9 +1 +MountingHole +MountingHole_2mm +Mounting Hole 2mm, no annular +mounting hole 2mm no annular +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3 +Mounting Hole 3.2mm, no annular, M3 +mounting hole 3.2mm no annular m3 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_DIN965 +Mounting Hole 3.2mm, no annular, M3, DIN965 +mounting hole 3.2mm no annular m3 din965 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_DIN965_Pad +Mounting Hole 3.2mm, M3, DIN965 +mounting hole 3.2mm m3 din965 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_DIN965_Pad_TopBottom +Mounting Hole 3.2mm, M3, DIN965 +mounting hole 3.2mm m3 din965 +0 +3 +1 +MountingHole +MountingHole_3.2mm_M3_DIN965_Pad_TopOnly +Mounting Hole 3.2mm, M3, DIN965 +mounting hole 3.2mm m3 din965 +0 +2 +1 +MountingHole +MountingHole_3.2mm_M3_ISO7380 +Mounting Hole 3.2mm, no annular, M3, ISO7380 +mounting hole 3.2mm no annular m3 iso7380 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_ISO7380_Pad +Mounting Hole 3.2mm, M3, ISO7380 +mounting hole 3.2mm m3 iso7380 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_ISO7380_Pad_TopBottom +Mounting Hole 3.2mm, M3, ISO7380 +mounting hole 3.2mm m3 iso7380 +0 +3 +1 +MountingHole +MountingHole_3.2mm_M3_ISO7380_Pad_TopOnly +Mounting Hole 3.2mm, M3, ISO7380 +mounting hole 3.2mm m3 iso7380 +0 +2 +1 +MountingHole +MountingHole_3.2mm_M3_ISO14580 +Mounting Hole 3.2mm, no annular, M3, ISO14580 +mounting hole 3.2mm no annular m3 iso14580 +0 +0 +0 +MountingHole +MountingHole_3.2mm_M3_ISO14580_Pad +Mounting Hole 3.2mm, M3, ISO14580 +mounting hole 3.2mm m3 iso14580 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_ISO14580_Pad_TopBottom +Mounting Hole 3.2mm, M3, ISO14580 +mounting hole 3.2mm m3 iso14580 +0 +3 +1 +MountingHole +MountingHole_3.2mm_M3_ISO14580_Pad_TopOnly +Mounting Hole 3.2mm, M3, ISO14580 +mounting hole 3.2mm m3 iso14580 +0 +2 +1 +MountingHole +MountingHole_3.2mm_M3_Pad +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +1 +1 +MountingHole +MountingHole_3.2mm_M3_Pad_TopBottom +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +3 +1 +MountingHole +MountingHole_3.2mm_M3_Pad_TopOnly +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +2 +1 +MountingHole +MountingHole_3.2mm_M3_Pad_Via +Mounting Hole 3.2mm, M3 +mounting hole 3.2mm m3 +0 +9 +1 +MountingHole +MountingHole_3.5mm +Mounting Hole 3.5mm, no annular +mounting hole 3.5mm no annular +0 +0 +0 +MountingHole +MountingHole_3.5mm_Pad +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +1 +1 +MountingHole +MountingHole_3.5mm_Pad_TopBottom +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +3 +1 +MountingHole +MountingHole_3.5mm_Pad_TopOnly +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +2 +1 +MountingHole +MountingHole_3.5mm_Pad_Via +Mounting Hole 3.5mm +mounting hole 3.5mm +0 +9 +1 +MountingHole +MountingHole_3.7mm +Mounting Hole 3.7mm, no annular +mounting hole 3.7mm no annular +0 +0 +0 +MountingHole +MountingHole_3.7mm_Pad +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +1 +1 +MountingHole +MountingHole_3.7mm_Pad_TopBottom +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +3 +1 +MountingHole +MountingHole_3.7mm_Pad_TopOnly +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +2 +1 +MountingHole +MountingHole_3.7mm_Pad_Via +Mounting Hole 3.7mm +mounting hole 3.7mm +0 +9 +1 +MountingHole +MountingHole_3mm +Mounting Hole 3mm, no annular +mounting hole 3mm no annular +0 +0 +0 +MountingHole +MountingHole_3mm_Pad +Mounting Hole 3mm +mounting hole 3mm +0 +1 +1 +MountingHole +MountingHole_3mm_Pad_TopBottom +Mounting Hole 3mm +mounting hole 3mm +0 +3 +1 +MountingHole +MountingHole_3mm_Pad_TopOnly +Mounting Hole 3mm +mounting hole 3mm +0 +2 +1 +MountingHole +MountingHole_3mm_Pad_Via +Mounting Hole 3mm +mounting hole 3mm +0 +9 +1 +MountingHole +MountingHole_4.3mm_M4 +Mounting Hole 4.3mm, no annular, M4 +mounting hole 4.3mm no annular m4 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_DIN965 +Mounting Hole 4.3mm, no annular, M4, DIN965 +mounting hole 4.3mm no annular m4 din965 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_DIN965_Pad +Mounting Hole 4.3mm, M4, DIN965 +mounting hole 4.3mm m4 din965 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_DIN965_Pad_TopBottom +Mounting Hole 4.3mm, M4, DIN965 +mounting hole 4.3mm m4 din965 +0 +3 +1 +MountingHole +MountingHole_4.3mm_M4_DIN965_Pad_TopOnly +Mounting Hole 4.3mm, M4, DIN965 +mounting hole 4.3mm m4 din965 +0 +2 +1 +MountingHole +MountingHole_4.3mm_M4_ISO7380 +Mounting Hole 4.3mm, no annular, M4, ISO7380 +mounting hole 4.3mm no annular m4 iso7380 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_ISO7380_Pad +Mounting Hole 4.3mm, M4, ISO7380 +mounting hole 4.3mm m4 iso7380 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_ISO7380_Pad_TopBottom +Mounting Hole 4.3mm, M4, ISO7380 +mounting hole 4.3mm m4 iso7380 +0 +3 +1 +MountingHole +MountingHole_4.3mm_M4_ISO7380_Pad_TopOnly +Mounting Hole 4.3mm, M4, ISO7380 +mounting hole 4.3mm m4 iso7380 +0 +2 +1 +MountingHole +MountingHole_4.3mm_M4_ISO14580 +Mounting Hole 4.3mm, no annular, M4, ISO14580 +mounting hole 4.3mm no annular m4 iso14580 +0 +0 +0 +MountingHole +MountingHole_4.3mm_M4_ISO14580_Pad +Mounting Hole 4.3mm, M4, ISO14580 +mounting hole 4.3mm m4 iso14580 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_ISO14580_Pad_TopBottom +Mounting Hole 4.3mm, M4, ISO14580 +mounting hole 4.3mm m4 iso14580 +0 +3 +1 +MountingHole +MountingHole_4.3mm_M4_ISO14580_Pad_TopOnly +Mounting Hole 4.3mm, M4, ISO14580 +mounting hole 4.3mm m4 iso14580 +0 +2 +1 +MountingHole +MountingHole_4.3mm_M4_Pad +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +1 +1 +MountingHole +MountingHole_4.3mm_M4_Pad_TopBottom +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +3 +1 +MountingHole +MountingHole_4.3mm_M4_Pad_TopOnly +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +2 +1 +MountingHole +MountingHole_4.3mm_M4_Pad_Via +Mounting Hole 4.3mm, M4 +mounting hole 4.3mm m4 +0 +9 +1 +MountingHole +MountingHole_4.3x6.2mm_M4_Pad +Mounting Hole 4.3x6.2mm, M4 +mounting hole 4.3x6.2mm m4 +0 +1 +1 +MountingHole +MountingHole_4.3x6.2mm_M4_Pad_Via +Mounting Hole 4.3x6.2mm, M4 +mounting hole 4.3x6.2mm m4 +0 +17 +1 +MountingHole +MountingHole_4.5mm +Mounting Hole 4.5mm, no annular +mounting hole 4.5mm no annular +0 +0 +0 +MountingHole +MountingHole_4.5mm_Pad +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +1 +1 +MountingHole +MountingHole_4.5mm_Pad_TopBottom +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +3 +1 +MountingHole +MountingHole_4.5mm_Pad_TopOnly +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +2 +1 +MountingHole +MountingHole_4.5mm_Pad_Via +Mounting Hole 4.5mm +mounting hole 4.5mm +0 +9 +1 +MountingHole +MountingHole_4mm +Mounting Hole 4mm, no annular +mounting hole 4mm no annular +0 +0 +0 +MountingHole +MountingHole_4mm_Pad +Mounting Hole 4mm +mounting hole 4mm +0 +1 +1 +MountingHole +MountingHole_4mm_Pad_TopBottom +Mounting Hole 4mm +mounting hole 4mm +0 +3 +1 +MountingHole +MountingHole_4mm_Pad_TopOnly +Mounting Hole 4mm +mounting hole 4mm +0 +2 +1 +MountingHole +MountingHole_4mm_Pad_Via +Mounting Hole 4mm +mounting hole 4mm +0 +9 +1 +MountingHole +MountingHole_5.3mm_M5 +Mounting Hole 5.3mm, no annular, M5 +mounting hole 5.3mm no annular m5 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_DIN965 +Mounting Hole 5.3mm, no annular, M5, DIN965 +mounting hole 5.3mm no annular m5 din965 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_DIN965_Pad +Mounting Hole 5.3mm, M5, DIN965 +mounting hole 5.3mm m5 din965 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_DIN965_Pad_TopBottom +Mounting Hole 5.3mm, M5, DIN965 +mounting hole 5.3mm m5 din965 +0 +3 +1 +MountingHole +MountingHole_5.3mm_M5_DIN965_Pad_TopOnly +Mounting Hole 5.3mm, M5, DIN965 +mounting hole 5.3mm m5 din965 +0 +2 +1 +MountingHole +MountingHole_5.3mm_M5_ISO7380 +Mounting Hole 5.3mm, no annular, M5, ISO7380 +mounting hole 5.3mm no annular m5 iso7380 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_ISO7380_Pad +Mounting Hole 5.3mm, M5, ISO7380 +mounting hole 5.3mm m5 iso7380 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_ISO7380_Pad_TopBottom +Mounting Hole 5.3mm, M5, ISO7380 +mounting hole 5.3mm m5 iso7380 +0 +3 +1 +MountingHole +MountingHole_5.3mm_M5_ISO7380_Pad_TopOnly +Mounting Hole 5.3mm, M5, ISO7380 +mounting hole 5.3mm m5 iso7380 +0 +2 +1 +MountingHole +MountingHole_5.3mm_M5_ISO14580 +Mounting Hole 5.3mm, no annular, M5, ISO14580 +mounting hole 5.3mm no annular m5 iso14580 +0 +0 +0 +MountingHole +MountingHole_5.3mm_M5_ISO14580_Pad +Mounting Hole 5.3mm, M5, ISO14580 +mounting hole 5.3mm m5 iso14580 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_ISO14580_Pad_TopBottom +Mounting Hole 5.3mm, M5, ISO14580 +mounting hole 5.3mm m5 iso14580 +0 +3 +1 +MountingHole +MountingHole_5.3mm_M5_ISO14580_Pad_TopOnly +Mounting Hole 5.3mm, M5, ISO14580 +mounting hole 5.3mm m5 iso14580 +0 +2 +1 +MountingHole +MountingHole_5.3mm_M5_Pad +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +1 +1 +MountingHole +MountingHole_5.3mm_M5_Pad_TopBottom +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +3 +1 +MountingHole +MountingHole_5.3mm_M5_Pad_TopOnly +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +2 +1 +MountingHole +MountingHole_5.3mm_M5_Pad_Via +Mounting Hole 5.3mm, M5 +mounting hole 5.3mm m5 +0 +9 +1 +MountingHole +MountingHole_5.5mm +Mounting Hole 5.5mm, no annular +mounting hole 5.5mm no annular +0 +0 +0 +MountingHole +MountingHole_5.5mm_Pad +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +1 +1 +MountingHole +MountingHole_5.5mm_Pad_TopBottom +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +3 +1 +MountingHole +MountingHole_5.5mm_Pad_TopOnly +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +2 +1 +MountingHole +MountingHole_5.5mm_Pad_Via +Mounting Hole 5.5mm +mounting hole 5.5mm +0 +9 +1 +MountingHole +MountingHole_5mm +Mounting Hole 5mm, no annular +mounting hole 5mm no annular +0 +0 +0 +MountingHole +MountingHole_5mm_Pad +Mounting Hole 5mm +mounting hole 5mm +0 +1 +1 +MountingHole +MountingHole_5mm_Pad_TopBottom +Mounting Hole 5mm +mounting hole 5mm +0 +3 +1 +MountingHole +MountingHole_5mm_Pad_TopOnly +Mounting Hole 5mm +mounting hole 5mm +0 +2 +1 +MountingHole +MountingHole_5mm_Pad_Via +Mounting Hole 5mm +mounting hole 5mm +0 +9 +1 +MountingHole +MountingHole_6.4mm_M6 +Mounting Hole 6.4mm, no annular, M6 +mounting hole 6.4mm no annular m6 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_DIN965 +Mounting Hole 6.4mm, no annular, M6, DIN965 +mounting hole 6.4mm no annular m6 din965 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_DIN965_Pad +Mounting Hole 6.4mm, M6, DIN965 +mounting hole 6.4mm m6 din965 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_DIN965_Pad_TopBottom +Mounting Hole 6.4mm, M6, DIN965 +mounting hole 6.4mm m6 din965 +0 +3 +1 +MountingHole +MountingHole_6.4mm_M6_DIN965_Pad_TopOnly +Mounting Hole 6.4mm, M6, DIN965 +mounting hole 6.4mm m6 din965 +0 +2 +1 +MountingHole +MountingHole_6.4mm_M6_ISO7380 +Mounting Hole 6.4mm, no annular, M6, ISO7380 +mounting hole 6.4mm no annular m6 iso7380 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_ISO7380_Pad +Mounting Hole 6.4mm, M6, ISO7380 +mounting hole 6.4mm m6 iso7380 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_ISO7380_Pad_TopBottom +Mounting Hole 6.4mm, M6, ISO7380 +mounting hole 6.4mm m6 iso7380 +0 +3 +1 +MountingHole +MountingHole_6.4mm_M6_ISO7380_Pad_TopOnly +Mounting Hole 6.4mm, M6, ISO7380 +mounting hole 6.4mm m6 iso7380 +0 +2 +1 +MountingHole +MountingHole_6.4mm_M6_ISO14580 +Mounting Hole 6.4mm, no annular, M6, ISO14580 +mounting hole 6.4mm no annular m6 iso14580 +0 +0 +0 +MountingHole +MountingHole_6.4mm_M6_ISO14580_Pad +Mounting Hole 6.4mm, M6, ISO14580 +mounting hole 6.4mm m6 iso14580 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_ISO14580_Pad_TopBottom +Mounting Hole 6.4mm, M6, ISO14580 +mounting hole 6.4mm m6 iso14580 +0 +3 +1 +MountingHole +MountingHole_6.4mm_M6_ISO14580_Pad_TopOnly +Mounting Hole 6.4mm, M6, ISO14580 +mounting hole 6.4mm m6 iso14580 +0 +2 +1 +MountingHole +MountingHole_6.4mm_M6_Pad +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +1 +1 +MountingHole +MountingHole_6.4mm_M6_Pad_TopBottom +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +3 +1 +MountingHole +MountingHole_6.4mm_M6_Pad_TopOnly +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +2 +1 +MountingHole +MountingHole_6.4mm_M6_Pad_Via +Mounting Hole 6.4mm, M6 +mounting hole 6.4mm m6 +0 +9 +1 +MountingHole +MountingHole_6.5mm +Mounting Hole 6.5mm, no annular +mounting hole 6.5mm no annular +0 +0 +0 +MountingHole +MountingHole_6.5mm_Pad +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +1 +1 +MountingHole +MountingHole_6.5mm_Pad_TopBottom +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +3 +1 +MountingHole +MountingHole_6.5mm_Pad_TopOnly +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +2 +1 +MountingHole +MountingHole_6.5mm_Pad_Via +Mounting Hole 6.5mm +mounting hole 6.5mm +0 +9 +1 +MountingHole +MountingHole_6mm +Mounting Hole 6mm, no annular +mounting hole 6mm no annular +0 +0 +0 +MountingHole +MountingHole_6mm_Pad +Mounting Hole 6mm +mounting hole 6mm +0 +1 +1 +MountingHole +MountingHole_6mm_Pad_TopBottom +Mounting Hole 6mm +mounting hole 6mm +0 +3 +1 +MountingHole +MountingHole_6mm_Pad_TopOnly +Mounting Hole 6mm +mounting hole 6mm +0 +2 +1 +MountingHole +MountingHole_6mm_Pad_Via +Mounting Hole 6mm +mounting hole 6mm +0 +9 +1 +MountingHole +MountingHole_8.4mm_M8 +Mounting Hole 8.4mm, no annular, M8 +mounting hole 8.4mm no annular m8 +0 +0 +0 +MountingHole +MountingHole_8.4mm_M8_Pad +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +1 +1 +MountingHole +MountingHole_8.4mm_M8_Pad_TopBottom +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +3 +1 +MountingHole +MountingHole_8.4mm_M8_Pad_TopOnly +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +2 +1 +MountingHole +MountingHole_8.4mm_M8_Pad_Via +Mounting Hole 8.4mm, M8 +mounting hole 8.4mm m8 +0 +9 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H5mm_9771050360 +Mounting Hardware, external M3, height 5, Wuerth electronics 9771050360 (https://katalog.we-online.com/em/datasheet/9771050360.pdf), generated with kicad-footprint-generator +Mounting M3 9771050360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H6mm_9771060360 +Mounting Hardware, external M3, height 6, Wuerth electronics 9771060360 (https://katalog.we-online.com/em/datasheet/9771060360.pdf), generated with kicad-footprint-generator +Mounting M3 9771060360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H7mm_9771070360 +Mounting Hardware, external M3, height 7, Wuerth electronics 9771070360 (https://katalog.we-online.com/em/datasheet/9771070360.pdf), generated with kicad-footprint-generator +Mounting M3 9771070360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H8mm_9771080360 +Mounting Hardware, external M3, height 8, Wuerth electronics 9771080360 (https://katalog.we-online.com/em/datasheet/9771080360.pdf), generated with kicad-footprint-generator +Mounting M3 9771080360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H9mm_9771090360 +Mounting Hardware, external M3, height 9, Wuerth electronics 9771090360 (https://katalog.we-online.com/em/datasheet/9771090360.pdf), generated with kicad-footprint-generator +Mounting M3 9771090360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H10mm_9771100360 +Mounting Hardware, external M3, height 10, Wuerth electronics 9771100360 (https://katalog.we-online.com/em/datasheet/9771100360.pdf), generated with kicad-footprint-generator +Mounting M3 9771100360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H11mm_9771110360 +Mounting Hardware, external M3, height 11, Wuerth electronics 9771110360 (https://katalog.we-online.com/em/datasheet/9771110360.pdf), generated with kicad-footprint-generator +Mounting M3 9771110360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H12mm_9771120360 +Mounting Hardware, external M3, height 12, Wuerth electronics 9771120360 (https://katalog.we-online.com/em/datasheet/9771120360.pdf), generated with kicad-footprint-generator +Mounting M3 9771120360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H13mm_9771130360 +Mounting Hardware, external M3, height 13, Wuerth electronics 9771130360 (https://katalog.we-online.com/em/datasheet/9771130360.pdf), generated with kicad-footprint-generator +Mounting M3 9771130360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H14mm_9771140360 +Mounting Hardware, external M3, height 14, Wuerth electronics 9771140360 (https://katalog.we-online.com/em/datasheet/9771140360.pdf), generated with kicad-footprint-generator +Mounting M3 9771140360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSE-ExternalM3_H15mm_9771150360 +Mounting Hardware, external M3, height 15, Wuerth electronics 9771150360 (https://katalog.we-online.com/em/datasheet/9771150360.pdf), generated with kicad-footprint-generator +Mounting M3 9771150360 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H1mm_9774010482 +Mounting Hardware, inside through hole 4.5mm, height 1, Wuerth electronics 9774010482 (https://katalog.we-online.de/em/datasheet/9774010482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774010482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H2mm_9774020482 +Mounting Hardware, inside through hole 4.5mm, height 2, Wuerth electronics 9774020482 (https://katalog.we-online.de/em/datasheet/9774020482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774020482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H3mm_9774030482 +Mounting Hardware, inside through hole 4.5mm, height 3, Wuerth electronics 9774030482 (https://katalog.we-online.de/em/datasheet/9774030482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774030482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H4mm_9774040482 +Mounting Hardware, inside through hole 4.5mm, height 4, Wuerth electronics 9774040482 (https://katalog.we-online.de/em/datasheet/9774040482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774040482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H5mm_9774050482 +Mounting Hardware, inside through hole 4.5mm, height 5, Wuerth electronics 9774050482 (https://katalog.we-online.de/em/datasheet/9774050482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774050482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H6mm_9774060482 +Mounting Hardware, inside through hole 4.5mm, height 6, Wuerth electronics 9774060482 (https://katalog.we-online.de/em/datasheet/9774060482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774060482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H7mm_9774070482 +Mounting Hardware, inside through hole 4.5mm, height 7, Wuerth electronics 9774070482 (https://katalog.we-online.de/em/datasheet/9774070482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774070482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H8mm_9774080482 +Mounting Hardware, inside through hole 4.5mm, height 8, Wuerth electronics 9774080482 (https://katalog.we-online.de/em/datasheet/9774080482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774080482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H9mm_9774090482 +Mounting Hardware, inside through hole 4.5mm, height 9, Wuerth electronics 9774090482 (https://katalog.we-online.de/em/datasheet/9774090482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774090482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-4.5mm_H10mm_9774100482 +Mounting Hardware, inside through hole 4.5mm, height 10, Wuerth electronics 9774100482 (https://katalog.we-online.de/em/datasheet/9774100482.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774100482 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H1.5mm_9774015633 +Mounting Hardware, inside through hole M1.6, height 1.5, Wuerth electronics 9774015633 (https://katalog.we-online.com/em/datasheet/9774015633.pdf), generated with kicad-footprint-generator +Mounting M1.6 9774015633 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H1mm_9774010633 +Mounting Hardware, inside through hole M1.6, height 1, Wuerth electronics 9774010633 (https://katalog.we-online.com/em/datasheet/9774010633.pdf), generated with kicad-footprint-generator +Mounting M1.6 9774010633 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H2.5mm_9774025633 +Mounting Hardware, inside through hole M1.6, height 2.5, Wuerth electronics 9774025633 (https://katalog.we-online.com/em/datasheet/9774025633.pdf), generated with kicad-footprint-generator +Mounting M1.6 9774025633 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H2.5mm_ThreadDepth1.5mm_97730256332 +Mounting Hardware, inside blind hole M1.6, height 2.5, Wuerth electronics 97730256332 (https://katalog.we-online.com/em/datasheet/97730256332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730256332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H2.5mm_ThreadDepth1.5mm_NoNPTH_97730256330 +Mounting Hardware, inside blind hole M1.6, height 2.5, Wuerth electronics 97730256330 (https://katalog.we-online.com/em/datasheet/97730256330R.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730256330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H2mm_9774020633 +Mounting Hardware, inside through hole M1.6, height 2, Wuerth electronics 9774020633 (https://katalog.we-online.com/em/datasheet/9774020633.pdf), generated with kicad-footprint-generator +Mounting M1.6 9774020633 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3.5mm_ThreadDepth2mm_97730356332 +Mounting Hardware, inside blind hole M1.6, height 3.5, Wuerth electronics 97730356332 (https://katalog.we-online.com/em/datasheet/97730356332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730356332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3.5mm_ThreadDepth2mm_97730356334 +Mounting Hardware, inside blind hole M1.6, height 3.5, Wuerth electronics 97730356334 (https://katalog.we-online.com/em/datasheet/97730356334.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730356334 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3.5mm_ThreadDepth2mm_NoNPTH_97730356330 +Mounting Hardware, inside blind hole M1.6, height 3.5, Wuerth electronics 97730356330 (https://katalog.we-online.com/em/datasheet/97730356330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730356330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3mm_9774030633 +Mounting Hardware, inside through hole M1.6, height 3, Wuerth electronics 9774030633 (https://katalog.we-online.com/em/datasheet/9774030633.pdf), generated with kicad-footprint-generator +Mounting M1.6 9774030633 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3mm_ThreadDepth1.8mm_97730306332 +Mounting Hardware, inside blind hole M1.6, height 3, Wuerth electronics 97730306332 (https://katalog.we-online.com/em/datasheet/97730306332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730306332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H3mm_ThreadDepth1.8mm_NoNPTH_97730306330 +Mounting Hardware, inside blind hole M1.6, height 3, Wuerth electronics 97730306330 (https://katalog.we-online.com/em/datasheet/97730306330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730306330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4.5mm_ThreadDepth2mm_97730456332 +Mounting Hardware, inside blind hole M1.6, height 4.5, Wuerth electronics 97730456332 (https://katalog.we-online.com/em/datasheet/97730456332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730456332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4.5mm_ThreadDepth2mm_97730456334 +Mounting Hardware, inside blind hole M1.6, height 4.5, Wuerth electronics 97730456334 (https://katalog.we-online.com/em/datasheet/97730456334.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730456334 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4.5mm_ThreadDepth2mm_NoNPTH_97730456330 +Mounting Hardware, inside blind hole M1.6, height 4.5, Wuerth electronics 97730456330 (https://katalog.we-online.com/em/datasheet/97730456330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730456330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4mm_ThreadDepth2mm_97730406332 +Mounting Hardware, inside blind hole M1.6, height 4, Wuerth electronics 97730406332 (https://katalog.we-online.com/em/datasheet/97730406332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730406332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4mm_ThreadDepth2mm_97730406334 +Mounting Hardware, inside blind hole M1.6, height 4, Wuerth electronics 97730406334 (https://katalog.we-online.com/em/datasheet/97730406334.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730406334 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H4mm_ThreadDepth2mm_NoNPTH_97730406330 +Mounting Hardware, inside blind hole M1.6, height 4, Wuerth electronics 97730406330 (https://katalog.we-online.com/em/datasheet/97730406330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730406330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H5mm_ThreadDepth2mm_97730506332 +Mounting Hardware, inside blind hole M1.6, height 5, Wuerth electronics 97730506332 (https://katalog.we-online.com/em/datasheet/97730506332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730506332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H5mm_ThreadDepth2mm_97730506334 +Mounting Hardware, inside blind hole M1.6, height 5, Wuerth electronics 97730506334 (https://katalog.we-online.com/em/datasheet/97730506334.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730506334 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H5mm_ThreadDepth2mm_NoNPTH_97730506330 +Mounting Hardware, inside blind hole M1.6, height 5, Wuerth electronics 97730506330 (https://katalog.we-online.com/em/datasheet/97730506330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730506330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H6mm_ThreadDepth2mm_97730606332 +Mounting Hardware, inside blind hole M1.6, height 6, Wuerth electronics 97730606332 (https://katalog.we-online.com/em/datasheet/97730606332.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730606332 +0 +6 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H6mm_ThreadDepth2mm_97730606334 +Mounting Hardware, inside blind hole M1.6, height 6, Wuerth electronics 97730606334 (https://katalog.we-online.com/em/datasheet/97730606334.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730606334 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M1.6_H6mm_ThreadDepth2mm_NoNPTH_97730606330 +Mounting Hardware, inside blind hole M1.6, height 6, Wuerth electronics 97730606330 (https://katalog.we-online.com/em/datasheet/97730606330.pdf), generated with kicad-footprint-generator +Mounting M1.6 97730606330 +0 +5 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H1.5mm_9774015243 +Mounting Hardware, inside through hole M2, height 1.5, Wuerth electronics 9774015243 (https://katalog.we-online.de/em/datasheet/9774015243.pdf), generated with kicad-footprint-generator +Mounting M2 9774015243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H1mm_9774010243 +Mounting Hardware, inside through hole M2, height 1, Wuerth electronics 9774010243 (https://katalog.we-online.de/em/datasheet/9774010243.pdf), generated with kicad-footprint-generator +Mounting M2 9774010243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H2.5mm_9774025243 +Mounting Hardware, inside through hole M2, height 2.5, Wuerth electronics 9774025243 (https://katalog.we-online.de/em/datasheet/9774025243.pdf), generated with kicad-footprint-generator +Mounting M2 9774025243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H2mm_9774020243 +Mounting Hardware, inside through hole M2, height 2, Wuerth electronics 9774020243 (https://katalog.we-online.de/em/datasheet/9774020243.pdf), generated with kicad-footprint-generator +Mounting M2 9774020243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H3.5mm_9774035243 +Mounting Hardware, inside through hole M2, height 3.5, Wuerth electronics 9774035243 (https://katalog.we-online.de/em/datasheet/9774035243.pdf), generated with kicad-footprint-generator +Mounting M2 9774035243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H3mm_9774030243 +Mounting Hardware, inside through hole M2, height 3, Wuerth electronics 9774030243 (https://katalog.we-online.de/em/datasheet/9774030243.pdf), generated with kicad-footprint-generator +Mounting M2 9774030243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H4.5mm_9774045243 +Mounting Hardware, inside through hole M2, height 4.5, Wuerth electronics 9774045243 (https://katalog.we-online.de/em/datasheet/9774045243.pdf), generated with kicad-footprint-generator +Mounting M2 9774045243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H4mm_9774040243 +Mounting Hardware, inside through hole M2, height 4, Wuerth electronics 9774040243 (https://katalog.we-online.de/em/datasheet/9774040243.pdf), generated with kicad-footprint-generator +Mounting M2 9774040243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H5mm_9774050243 +Mounting Hardware, inside through hole M2, height 5, Wuerth electronics 9774050243 (https://katalog.we-online.de/em/datasheet/9774050243.pdf), generated with kicad-footprint-generator +Mounting M2 9774050243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H6mm_9774060243 +Mounting Hardware, inside through hole M2, height 6, Wuerth electronics 9774060243 (https://katalog.we-online.de/em/datasheet/9774060243.pdf), generated with kicad-footprint-generator +Mounting M2 9774060243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H7mm_9774070243 +Mounting Hardware, inside through hole M2, height 7, Wuerth electronics 9774070243 (https://katalog.we-online.de/em/datasheet/9774070243.pdf), generated with kicad-footprint-generator +Mounting M2 9774070243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M2_H8mm_9774080243 +Mounting Hardware, inside through hole M2, height 8, Wuerth electronics 9774080243 (https://katalog.we-online.de/em/datasheet/9774080243.pdf), generated with kicad-footprint-generator +Mounting M2 9774080243 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H1.5mm_9774015360 +Mounting Hardware, inside through hole M3, height 1.5, Wuerth electronics 9774015360 (https://katalog.we-online.de/em/datasheet/9774015360.pdf), generated with kicad-footprint-generator +Mounting M3 9774015360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H1mm_9774010360 +Mounting Hardware, inside through hole M3, height 1, Wuerth electronics 9774010360 (https://katalog.we-online.de/em/datasheet/9774010360.pdf), generated with kicad-footprint-generator +Mounting M3 9774010360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H2.5mm_9774025360 +Mounting Hardware, inside through hole M3, height 2.5, Wuerth electronics 9774025360 (https://katalog.we-online.de/em/datasheet/9774025360.pdf), generated with kicad-footprint-generator +Mounting M3 9774025360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H2mm_9774020360 +Mounting Hardware, inside through hole M3, height 2, Wuerth electronics 9774020360 (https://katalog.we-online.de/em/datasheet/9774020360.pdf), generated with kicad-footprint-generator +Mounting M3 9774020360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H3mm_9774030360 +Mounting Hardware, inside through hole M3, height 3, Wuerth electronics 9774030360 (https://katalog.we-online.de/em/datasheet/9774030360R.pdf), generated with kicad-footprint-generator +Mounting M3 9774030360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H4mm_9774040360 +Mounting Hardware, inside through hole M3, height 4, Wuerth electronics 9774040360 (https://katalog.we-online.de/em/datasheet/9774040360.pdf), generated with kicad-footprint-generator +Mounting M3 9774040360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H5mm_9774050360 +Mounting Hardware, inside through hole M3, height 5, Wuerth electronics 9774050360 (https://katalog.we-online.de/em/datasheet/9774050360.pdf), generated with kicad-footprint-generator +Mounting M3 9774050360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H6mm_9774060360 +Mounting Hardware, inside through hole M3, height 6, Wuerth electronics 9774060360 (https://katalog.we-online.de/em/datasheet/9774060360.pdf), generated with kicad-footprint-generator +Mounting M3 9774060360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H7mm_9774070360 +Mounting Hardware, inside through hole M3, height 7, Wuerth electronics 9774070360 (https://katalog.we-online.de/em/datasheet/9774070360.pdf), generated with kicad-footprint-generator +Mounting M3 9774070360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H8mm_9774080360 +Mounting Hardware, inside through hole M3, height 8, Wuerth electronics 9774080360 (https://katalog.we-online.de/em/datasheet/9774080360.pdf), generated with kicad-footprint-generator +Mounting M3 9774080360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H9mm_9774090360 +Mounting Hardware, inside through hole M3, height 9, Wuerth electronics 9774090360 (https://katalog.we-online.de/em/datasheet/9774090360.pdf), generated with kicad-footprint-generator +Mounting M3 9774090360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H10mm_9774100360 +Mounting Hardware, inside through hole M3, height 10, Wuerth electronics 9774100360 (https://katalog.we-online.de/em/datasheet/9774100360.pdf), generated with kicad-footprint-generator +Mounting M3 9774100360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H11mm_9774110360 +Mounting Hardware, inside through hole M3, height 11, Wuerth electronics 9774110360 (https://katalog.we-online.de/em/datasheet/9774110360.pdf), generated with kicad-footprint-generator +Mounting M3 9774110360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H12mm_9774120360 +Mounting Hardware, inside through hole M3, height 12, Wuerth electronics 9774120360 (https://katalog.we-online.de/em/datasheet/9774120360.pdf), generated with kicad-footprint-generator +Mounting M3 9774120360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H13mm_9774130360 +Mounting Hardware, inside through hole M3, height 13, Wuerth electronics 9774130360 (https://katalog.we-online.de/em/datasheet/9774130360.pdf), generated with kicad-footprint-generator +Mounting M3 9774130360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H14mm_9774140360 +Mounting Hardware, inside through hole M3, height 14, Wuerth electronics 9774140360 (https://katalog.we-online.de/em/datasheet/9774140360.pdf), generated with kicad-footprint-generator +Mounting M3 9774140360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSI-M3_H15mm_9774150360 +Mounting Hardware, inside through hole M3, height 15, Wuerth electronics 9774150360 (https://katalog.we-online.de/em/datasheet/9774150360.pdf), generated with kicad-footprint-generator +Mounting M3 9774150360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H2.6mm_ReverseMount_9775026960 +Mounting Hardware, inside through hole 3.2mm, height 2.6, Wuerth electronics 9775026960 (https://katalog.we-online.com/em/datasheet/9775026960R.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775026960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H3.1mm_ReverseMount_9775031960 +Mounting Hardware, inside through hole 3.2mm, height 3.1, Wuerth electronics 9775031960 (https://katalog.we-online.com/em/datasheet/9775031960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775031960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H3.6mm_ReverseMount_9775036960 +Mounting Hardware, inside through hole 3.2mm, height 3.6, Wuerth electronics 9775036960 (https://katalog.we-online.com/em/datasheet/9775036960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775036960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H4.1mm_ReverseMount_9775041960 +Mounting Hardware, inside through hole 3.2mm, height 4.1, Wuerth electronics 9775041960 (https://katalog.we-online.com/em/datasheet/9775041960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775041960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H4.6mm_ReverseMount_9775046960 +Mounting Hardware, inside through hole 3.2mm, height 4.6, Wuerth electronics 9775046960 (https://katalog.we-online.com/em/datasheet/9775046960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775046960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H5.1mm_ReverseMount_9775051960 +Mounting Hardware, inside through hole 3.2mm, height 5.1, Wuerth electronics 9775051960 (https://katalog.we-online.com/em/datasheet/9775051960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775051960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H5.6mm_ReverseMount_9775056960 +Mounting Hardware, inside through hole 3.2mm, height 5.6, Wuerth electronics 9775056960 (https://katalog.we-online.com/em/datasheet/9775056960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775056960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H6.6mm_ReverseMount_9775066960 +Mounting Hardware, inside through hole 3.2mm, height 6.6, Wuerth electronics 9775066960 (https://katalog.we-online.com/em/datasheet/9775066960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775066960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H7.6mm_ReverseMount_9775076960 +Mounting Hardware, inside through hole 3.2mm, height 7.6, Wuerth electronics 9775076960 (https://katalog.we-online.com/em/datasheet/9775076960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775076960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H8.6mm_ReverseMount_9775086960 +Mounting Hardware, inside through hole 3.2mm, height 8.6, Wuerth electronics 9775086960 (https://katalog.we-online.com/em/datasheet/9775086960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775086960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H9.6mm_ReverseMount_9775096960 +Mounting Hardware, inside through hole 3.2mm, height 9.6, Wuerth electronics 9775096960 (https://katalog.we-online.com/em/datasheet/9775096960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775096960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H10.6mm_ReverseMount_9775106960 +Mounting Hardware, inside through hole 3.2mm, height 10.6, Wuerth electronics 9775106960 (https://katalog.we-online.com/em/datasheet/9775106960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775106960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-3.2mm_H11.6mm_ReverseMount_9775116960 +Mounting Hardware, inside through hole 3.2mm, height 11.6, Wuerth electronics 9775116960 (https://katalog.we-online.com/em/datasheet/9775116960.pdf), generated with kicad-footprint-generator +Mounting 3.2mm 9775116960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H2.6mm_ReverseMount_9775026360 +Mounting Hardware, inside through hole M3, height 2.6, Wuerth electronics 9775026360 (https://katalog.we-online.com/em/datasheet/9775026360.pdf), generated with kicad-footprint-generator +Mounting M3 9775026360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H3.1mm_ReverseMount_9775031360 +Mounting Hardware, inside through hole M3, height 3.1, Wuerth electronics 9775031360 (https://katalog.we-online.com/em/datasheet/9775031360.pdf), generated with kicad-footprint-generator +Mounting M3 9775031360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H3.6mm_ReverseMount_9775036360 +Mounting Hardware, inside through hole M3, height 3.6, Wuerth electronics 9775036360 (https://katalog.we-online.com/em/datasheet/9775036360.pdf), generated with kicad-footprint-generator +Mounting M3 9775036360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H4.1mm_ReverseMount_9775041360 +Mounting Hardware, inside through hole M3, height 4.1, Wuerth electronics 9775041360 (https://katalog.we-online.com/em/datasheet/9775041360.pdf), generated with kicad-footprint-generator +Mounting M3 9775041360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H4.6mm_ReverseMount_9775046360 +Mounting Hardware, inside through hole M3, height 4.6, Wuerth electronics 9775046360 (https://katalog.we-online.com/em/datasheet/9775046360.pdf), generated with kicad-footprint-generator +Mounting M3 9775046360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H5.1mm_ReverseMount_9775051360 +Mounting Hardware, inside through hole M3, height 5.1, Wuerth electronics 9775051360 (https://katalog.we-online.com/em/datasheet/9775051360.pdf), generated with kicad-footprint-generator +Mounting M3 9775051360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H5.6mm_ReverseMount_9775056360 +Mounting Hardware, inside through hole M3, height 5.6, Wuerth electronics 9775056360 (https://katalog.we-online.com/em/datasheet/9775056360.pdf), generated with kicad-footprint-generator +Mounting M3 9775056360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H6.6mm_ReverseMount_9775066360 +Mounting Hardware, inside through hole M3, height 6.6, Wuerth electronics 9775066360 (https://katalog.we-online.com/em/datasheet/9775066360.pdf), generated with kicad-footprint-generator +Mounting M3 9775066360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H7.6mm_ReverseMount_9775076360 +Mounting Hardware, inside through hole M3, height 7.6, Wuerth electronics 9775076360 (https://katalog.we-online.com/em/datasheet/9775076360.pdf), generated with kicad-footprint-generator +Mounting M3 9775076360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H8.6mm_ReverseMount_9775086360 +Mounting Hardware, inside through hole M3, height 8.6, Wuerth electronics 9775086360 (https://katalog.we-online.com/em/datasheet/9775086360.pdf), generated with kicad-footprint-generator +Mounting M3 9775086360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H9.6mm_ReverseMount_9775096360 +Mounting Hardware, inside through hole M3, height 9.6, Wuerth electronics 9775096360 (https://katalog.we-online.com/em/datasheet/9775096360.pdf), generated with kicad-footprint-generator +Mounting M3 9775096360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H10.6mm_ReverseMount_9775106360 +Mounting Hardware, inside through hole M3, height 10.6, Wuerth electronics 9775106360 (https://katalog.we-online.com/em/datasheet/9775106360.pdf), generated with kicad-footprint-generator +Mounting M3 9775106360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSR-M3_H11.6mm_ReverseMount_9775116360 +Mounting Hardware, inside through hole M3, height 11.6, Wuerth electronics 9775116360 (https://katalog.we-online.com/em/datasheet/9775116360.pdf), generated with kicad-footprint-generator +Mounting M3 9775116360 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H2.5mm_SnapRivet_9776025960 +Mounting Hardware, inside through hole 3.3mm, height 2.5, Wuerth electronics 9776025960 (https://katalog.we-online.com/em/datasheet/9776025960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776025960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H2mm_SnapRivet_9776020960 +Mounting Hardware, inside through hole 3.3mm, height 2, Wuerth electronics 9776020960 (https://katalog.we-online.com/em/datasheet/9776020960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776020960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H3mm_SnapRivet_9776030960 +Mounting Hardware, inside through hole 3.3mm, height 3, Wuerth electronics 9776030960 (https://katalog.we-online.com/em/datasheet/9776030960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776030960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H4mm_SnapRivet_9776040960 +Mounting Hardware, inside through hole 3.3mm, height 4, Wuerth electronics 9776040960 (https://katalog.we-online.com/em/datasheet/9776040960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776040960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H5mm_SnapRivet_9776050960 +Mounting Hardware, inside through hole 3.3mm, height 5, Wuerth electronics 9776050960 (https://katalog.we-online.com/em/datasheet/9776050960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776050960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H6mm_SnapRivet_9776060960 +Mounting Hardware, inside through hole 3.3mm, height 6, Wuerth electronics 9776060960 (https://katalog.we-online.com/em/datasheet/9776060960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776060960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H7mm_SnapRivet_9776070960 +Mounting Hardware, inside through hole 3.3mm, height 7, Wuerth electronics 9776070960 (https://katalog.we-online.com/em/datasheet/9776070960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776070960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H8mm_SnapRivet_9776080960 +Mounting Hardware, inside through hole 3.3mm, height 8, Wuerth electronics 9776080960 (https://katalog.we-online.com/em/datasheet/9776080960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776080960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H9mm_SnapRivet_9776090960 +Mounting Hardware, inside through hole 3.3mm, height 9, Wuerth electronics 9776090960 (https://katalog.we-online.com/em/datasheet/9776090960.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776090960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMSSR-3.3mm_H10mm_SnapRivet_9776100960 +Mounting Hardware, inside through hole 3.3mm, height 10, Wuerth electronics 9776100960 (https://katalog.we-online.com/em/datasheet/9776100960R.pdf), generated with kicad-footprint-generator +Mounting 3.3mm 9776100960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H1.5mm_9774015951 +Mounting Hardware, inside through hole 2.7mm, height 1.5, Wuerth electronics 9774015951 (https://katalog.we-online.de/em/datasheet/9774015951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774015951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H1mm_9774010951 +Mounting Hardware, inside through hole 2.7mm, height 1, Wuerth electronics 9774010951 (https://katalog.we-online.de/em/datasheet/9774010951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774010951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H2.5mm_9774025951 +Mounting Hardware, inside through hole 2.7mm, height 2.5, Wuerth electronics 9774025951 (https://katalog.we-online.de/em/datasheet/9774025951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774025951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H2mm_9774020951 +Mounting Hardware, inside through hole 2.7mm, height 2, Wuerth electronics 9774020951 (https://katalog.we-online.de/em/datasheet/9774020951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774020951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H3mm_9774030951 +Mounting Hardware, inside through hole 2.7mm, height 3, Wuerth electronics 9774030951 (https://katalog.we-online.de/em/datasheet/9774030951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774030951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H4mm_9774040951 +Mounting Hardware, inside through hole 2.7mm, height 4, Wuerth electronics 9774040951 (https://katalog.we-online.de/em/datasheet/9774040951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774040951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H5.5mm_9774055951 +Mounting Hardware, inside through hole 2.7mm, height 5.5, Wuerth electronics 9774055951 (https://katalog.we-online.de/em/datasheet/9774055951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774055951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H5mm_9774050951 +Mounting Hardware, inside through hole 2.7mm, height 5, Wuerth electronics 9774050951 (https://katalog.we-online.de/em/datasheet/9774050951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774050951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H6.5mm_9774065951 +Mounting Hardware, inside through hole 2.7mm, height 6.5, Wuerth electronics 9774065951 (https://katalog.we-online.de/em/datasheet/9774065951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774065951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H6mm_9774060951 +Mounting Hardware, inside through hole 2.7mm, height 6, Wuerth electronics 9774060951 (https://katalog.we-online.de/em/datasheet/9774060951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774060951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H7mm_9774070951 +Mounting Hardware, inside through hole 2.7mm, height 7, Wuerth electronics 9774070951 (https://katalog.we-online.de/em/datasheet/9774070951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774070951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H8mm_9774080951 +Mounting Hardware, inside through hole 2.7mm, height 8, Wuerth electronics 9774080951 (https://katalog.we-online.de/em/datasheet/9774080951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774080951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H9mm_9774090951 +Mounting Hardware, inside through hole 2.7mm, height 9, Wuerth electronics 9774090951 (https://katalog.we-online.de/em/datasheet/9774090951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774090951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.7mm_H10mm_9774100951 +Mounting Hardware, inside through hole 2.7mm, height 10, Wuerth electronics 9774100951 (https://katalog.we-online.de/em/datasheet/9774100951.pdf), generated with kicad-footprint-generator +Mounting 2.7mm 9774100951 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H1.5mm_9774015943 +Mounting Hardware, inside through hole 2.25mm, height 1.5, Wuerth electronics 9774015943 (https://katalog.we-online.de/em/datasheet/9774015943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774015943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H1mm_9774010943 +Mounting Hardware, inside through hole 2.25mm, height 1, Wuerth electronics 9774010943 (https://katalog.we-online.de/em/datasheet/9774010943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774010943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H2.5mm_9774025943 +Mounting Hardware, inside through hole 2.25mm, height 2.5, Wuerth electronics 9774025943 (https://katalog.we-online.de/em/datasheet/9774025943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774025943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H2mm_9774020943 +Mounting Hardware, inside through hole 2.25mm, height 2, Wuerth electronics 9774020943 (https://katalog.we-online.de/em/datasheet/9774020943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774020943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H3.5mm_9774035943 +Mounting Hardware, inside through hole 2.25mm, height 3.5, Wuerth electronics 9774035943 (https://katalog.we-online.de/em/datasheet/9774035943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774035943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H3mm_9774030943 +Mounting Hardware, inside through hole 2.25mm, height 3, Wuerth electronics 9774030943 (https://katalog.we-online.de/em/datasheet/9774030943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774030943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H4.5mm_9774045943 +Mounting Hardware, inside through hole 2.25mm, height 4.5, Wuerth electronics 9774045943 (https://katalog.we-online.de/em/datasheet/9774045943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774045943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H4mm_9774040943 +Mounting Hardware, inside through hole 2.25mm, height 4, Wuerth electronics 9774040943 (https://katalog.we-online.de/em/datasheet/9774040943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774040943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H5mm_9774050943 +Mounting Hardware, inside through hole 2.25mm, height 5, Wuerth electronics 9774050943 (https://katalog.we-online.de/em/datasheet/9774050943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774050943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H6mm_9774060943 +Mounting Hardware, inside through hole 2.25mm, height 6, Wuerth electronics 9774060943 (https://katalog.we-online.de/em/datasheet/9774060943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774060943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H7mm_9774070943 +Mounting Hardware, inside through hole 2.25mm, height 7, Wuerth electronics 9774070943 (https://katalog.we-online.de/em/datasheet/9774070943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774070943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-2.25mm_H8mm_9774080943 +Mounting Hardware, inside through hole 2.25mm, height 8, Wuerth electronics 9774080943 (https://katalog.we-online.de/em/datasheet/9774080943.pdf), generated with kicad-footprint-generator +Mounting 2.25mm 9774080943 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H1.5mm_9774015960 +Mounting Hardware, inside through hole 3.3mm, height 1.5, Wuerth electronics 9774015960 (https://katalog.we-online.de/em/datasheet/9774015960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774015960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H1mm_9774010960 +Mounting Hardware, inside through hole 3.3mm, height 1, Wuerth electronics 9774010960 (https://katalog.we-online.de/em/datasheet/9774010960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774010960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H2.5mm_9774025960 +Mounting Hardware, inside through hole 3.3mm, height 2.5, Wuerth electronics 9774025960 (https://katalog.we-online.de/em/datasheet/9774025960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774025960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H2mm_9774020960 +Mounting Hardware, inside through hole 3.3mm, height 2, Wuerth electronics 9774020960 (https://katalog.we-online.de/em/datasheet/9774020960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774020960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H3mm_9774030960 +Mounting Hardware, inside through hole 3.3mm, height 3, Wuerth electronics 9774030960 (https://katalog.we-online.de/em/datasheet/9774030960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774030960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H4mm_9774040960 +Mounting Hardware, inside through hole 3.3mm, height 4, Wuerth electronics 9774040960 (https://katalog.we-online.de/em/datasheet/9774040960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774040960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H5mm_9774050960 +Mounting Hardware, inside through hole 3.3mm, height 5, Wuerth electronics 9774050960 (https://katalog.we-online.de/em/datasheet/9774050960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774050960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H6mm_9774060960 +Mounting Hardware, inside through hole 3.3mm, height 6, Wuerth electronics 9774060960 (https://katalog.we-online.de/em/datasheet/9774060960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774060960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H7mm_9774070960 +Mounting Hardware, inside through hole 3.3mm, height 7, Wuerth electronics 9774070960 (https://katalog.we-online.de/em/datasheet/9774070960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774070960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H8mm_9774080960 +Mounting Hardware, inside through hole 3.3mm, height 8, Wuerth electronics 9774080960 (https://katalog.we-online.de/em/datasheet/9774080960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774080960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H9mm_9774090960 +Mounting Hardware, inside through hole 3.3mm, height 9, Wuerth electronics 9774090960 (https://katalog.we-online.de/em/datasheet/9774090960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774090960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H10mm_9774100960 +Mounting Hardware, inside through hole 3.3mm, height 10, Wuerth electronics 9774100960 (https://katalog.we-online.de/em/datasheet/9774100960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774100960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H11mm_9774110960 +Mounting Hardware, inside through hole 3.3mm, height 11, Wuerth electronics 9774110960 (https://katalog.we-online.de/em/datasheet/9774110960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774110960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H12mm_9774120960 +Mounting Hardware, inside through hole 3.3mm, height 12, Wuerth electronics 9774120960 (https://katalog.we-online.de/em/datasheet/9774120960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774120960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H13mm_9774130960 +Mounting Hardware, inside through hole 3.3mm, height 13, Wuerth electronics 9774130960 (https://katalog.we-online.de/em/datasheet/9774130960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774130960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H14mm_9774140960 +Mounting Hardware, inside through hole 3.3mm, height 14, Wuerth electronics 9774140960 (https://katalog.we-online.de/em/datasheet/9774140960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774140960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-3.3mm_H15mm_9774150960 +Mounting Hardware, inside through hole 3.3mm, height 15, Wuerth electronics 9774150960 (https://katalog.we-online.de/em/datasheet/9774150960.pdf,), generated with kicad-footprint-generator +Mounting 3.3mm 9774150960 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H1mm_9774010982 +Mounting Hardware, inside through hole 4.5mm, height 1, Wuerth electronics 9774010982 (https://katalog.we-online.de/em/datasheet/9774010982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774010982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H2mm_9774020982 +Mounting Hardware, inside through hole 4.5mm, height 2, Wuerth electronics 9774020982 (https://katalog.we-online.de/em/datasheet/9774020982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774020982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H3mm_9774030982 +Mounting Hardware, inside through hole 4.5mm, height 3, Wuerth electronics 9774030982 (https://katalog.we-online.de/em/datasheet/9774030982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774030982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H4mm_9774040982 +Mounting Hardware, inside through hole 4.5mm, height 4, Wuerth electronics 9774040982 (https://katalog.we-online.de/em/datasheet/9774040982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774040982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H5mm_9774050982 +Mounting Hardware, inside through hole 4.5mm, height 5, Wuerth electronics 9774050982 (https://katalog.we-online.de/em/datasheet/9774050982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774050982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H6mm_9774060982 +Mounting Hardware, inside through hole 4.5mm, height 6, Wuerth electronics 9774060982 (https://katalog.we-online.de/em/datasheet/9774060982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774060982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H7mm_9774070982 +Mounting Hardware, inside through hole 4.5mm, height 7, Wuerth electronics 9774070982 (https://katalog.we-online.de/em/datasheet/9774070982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774070982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H8mm_9774080982 +Mounting Hardware, inside through hole 4.5mm, height 8, Wuerth electronics 9774080982 (https://katalog.we-online.de/em/datasheet/9774080982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774080982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H9mm_9774090982 +Mounting Hardware, inside through hole 4.5mm, height 9, Wuerth electronics 9774090982 (https://katalog.we-online.de/em/datasheet/9774090982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774090982 +0 +8 +1 +Mounting_Wuerth +Mounting_Wuerth_WA-SMST-4.5mm_H10mm_9774100982 +Mounting Hardware, inside through hole 4.5mm, height 10, Wuerth electronics 9774100982 (https://katalog.we-online.de/em/datasheet/9774100982.pdf), generated with kicad-footprint-generator +Mounting 4.5mm 9774100982 +0 +8 +1 +NetTie +NetTie-2_SMD_Pad0.5mm +Net tie, 2 pin, 0.5mm square SMD pads +net tie +0 +2 +2 +NetTie +NetTie-2_SMD_Pad2.0mm +Net tie, 2 pin, 2.0mm square SMD pads +net tie +0 +2 +2 +NetTie +NetTie-2_THT_Pad0.3mm +Net tie, 2 pin, 0.3mm round THT pads +net tie +0 +2 +2 +NetTie +NetTie-2_THT_Pad1.0mm +Net tie, 2 pin, 1.0mm round THT pads +net tie +0 +2 +2 +NetTie +NetTie-3_SMD_Pad0.5mm +Net tie, 3 pin, 0.5mm square SMD pads +net tie +0 +3 +3 +NetTie +NetTie-3_SMD_Pad2.0mm +Net tie, 3 pin, 2.0mm square SMD pads +net tie +0 +3 +3 +NetTie +NetTie-3_THT_Pad0.3mm +Net tie, 3 pin, 0.3mm round THT pads +net tie +0 +3 +3 +NetTie +NetTie-3_THT_Pad1.0mm +Net tie, 3 pin, 1.0mm round THT pads +net tie +0 +3 +3 +NetTie +NetTie-4_SMD_Pad0.5mm +Net tie, 4 pin, 0.5mm square SMD pads +net tie +0 +4 +4 +NetTie +NetTie-4_SMD_Pad2.0mm +Net tie, 4 pin, 2.0mm square SMD pads +net tie +0 +4 +4 +NetTie +NetTie-4_THT_Pad0.3mm +Net tie, 4 pin, 0.3mm round THT pads +net tie +0 +4 +4 +NetTie +NetTie-4_THT_Pad1.0mm +Net tie, 4 pin, 1.0mm round THT pads +net tie +0 +4 +4 +OptoDevice +ADNS-9800 +Laser Gaming Sensor ADNS-9800 +MOUSE MOUSE_SENSOR LASER_GAMING_SENSOR +0 +16 +16 +OptoDevice +AGILENT_HFBR-152x +Fiberoptic Transmitter TX, HFBR series (https://docs.broadcom.com/docs/AV02-3283EN) +Fiberoptic Transmitter +0 +6 +6 +OptoDevice +AGILENT_HFBR-252x +Fiberoptic Receiver RX, HFBR series (https://docs.broadcom.com/docs/AV02-3283EN) +Fiberoptic Transmitter +0 +6 +6 +OptoDevice +AMS_TSL2550_SMD +http://ams.com/eng/content/download/250130/975613/142977 +TSL2550 ambient light sensor +0 +4 +4 +OptoDevice +Broadcom_AFBR-16xxZ_Horizontal +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_AFBR-16xxZ_Tilted +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_AFBR-16xxZ_Vertical +Fiber Optic Transmitter and Receiver, https://docs.broadcom.com/docs/AV02-4369EN +Fiber Optic Transmitter and Receiver +0 +6 +6 +OptoDevice +Broadcom_APDS-9301 +ambient light sensor, i2c interface, 6-pin chipled package, https://docs.broadcom.com/docs/AV02-2315EN +ambient light sensor chipled +0 +6 +6 +OptoDevice +Broadcom_DFN-6_2x2mm_P0.65mm +Broadcom DFN, 6 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator ipc_noLead_generator.py +Broadcom DFN NoLead +0 +6 +6 +OptoDevice +Broadcom_LGA-8_2x2mm_P0.53mm +Broadcom LGA, 8 Pin (https://docs.broadcom.com/docs/AV02-4755EN), generated with kicad-footprint-generator ipc_noLead_generator.py +Broadcom LGA NoLead +0 +8 +8 +OptoDevice +Everlight_ITR1201SR10AR +package for Everlight ITR1201SR10AR, light-direction upwards, see https://www.everlight.com/file/ProductFile/ITR1201SR10AR-TR.pdf +reflective opto couple photo coupler +0 +4 +4 +OptoDevice +Everlight_ITR8307 +package for Everlight ITR8307 with PCB cutout, light-direction upwards, see http://www.everlight.com/file/ProductFile/ITR8307.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Everlight_ITR8307F43 +package for Everlight ITR8307/F43, see https://everlighteurope.com/index.php?controller=attachment&id_attachment=5385 +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Everlight_ITR8307_Reverse +package for Everlight ITR8307 with PCB cutout, light-direction downwards, see http://www.everlight.com/file/ProductFile/ITR8307.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Finder_34.81 +Relay SPST, Finder Type 34.81 (opto relays/coupler), vertical/standing form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPST Finder +0 +4 +4 +OptoDevice +Hamamatsu_C12880 +Hamamatsu spectrometer, see http://www.hamamatsu.com/resources/pdf/ssd/c12880ma_kacc1226e.pdf +opto spectrometer Hamamatsu +0 +10 +10 +OptoDevice +Hamamatsu_S13360-30CS +SiPM, 2pin +Hamamatsu SiPM +0 +2 +2 +OptoDevice +Kingbright_KPS-5130 +http://www.kingbright.com/attachments/file/psearch/000/00/00/KPS-5130PD7C(Ver.14).pdf +KPS-5130 photodiode RGB sensor +0 +4 +4 +OptoDevice +Kingbright_KRC011_Horizontal +Subminiature Reflective Optical Sensor, http://www.kingbright.com/attachments/file/psearch/000/00/00/KRC011(Ver.15).pdf +Subminiature Reflective Optical Sensor +0 +4 +4 +OptoDevice +Kingbright_KRC011_Vertical +Subminiature Reflective Optical Sensor, http://www.kingbright.com/attachments/file/psearch/000/00/00/KRC011(Ver.15).pdf +Subminiature Reflective Optical Sensor +0 +4 +4 +OptoDevice +Kodenshi_LG206D +http://kodenshi.co.jp/products/pdf/sensor/photointerrupter_ic/LG206D.pdf +Photointerrupter infrared LED with photo IC +0 +5 +5 +OptoDevice +Kodenshi_LG206L +http://kodenshi.co.jp/products/pdf/sensor/photointerrupter_ic/LG205L.pdf +Photointerrupter infrared LED with photo IC +0 +5 +5 +OptoDevice +Kodenshi_SG105 +package for Kodenshi SG-105 with PCB cutout, light-direction upwards, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Kodenshi_SG105F +package for Kodenshi SG-105F, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105F.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Kodenshi_SG105_Reverse +package for Kodenshi SG-105 with PCB cutout, light-direction downwards, see http://www.kodenshi.co.jp/products/pdf/sensor/photointerrupter_ref/SG-105.pdf +refective opto couple photo coupler +0 +4 +4 +OptoDevice +LaserDiode_TO3.3-D3.3-3 +Laser Diode, TO-3.3mm, 3pin +Laser Diode TO3.3 +0 +3 +3 +OptoDevice +LaserDiode_TO5-D9-3 +Laser Diode, TO5-like (D=9mm), 3pin +Laser Diode TO5-like +0 +3 +3 +OptoDevice +LaserDiode_TO18-D5.6-3 +Laser Diode, TO18-like (D=5.6mm), 3pin +Laser Diode TO18-like +0 +3 +3 +OptoDevice +LaserDiode_TO38ICut-3 +Laser Diode, TO-38-ICut, 3pin +Laser Diode TO38-ICut +0 +3 +3 +OptoDevice +LaserDiode_TO56-3 +Laser Diode, TO-56, 3pin +Laser Diode TO56 +0 +3 +3 +OptoDevice +Lightpipe_LPF-C012303S +https://www.lumex.com/spec/LPF-C012303S.pdf +lightpipe dual tower right angle 3mm +0 +0 +0 +OptoDevice +Lightpipe_Mentor_1275.x00x +https://www.mentor-bauelemente.de/katalog/ll/MENTOR-LL.pdf +spherical light pipe 4 way 3mm PLCC-2 PLCC-4 +0 +0 +0 +OptoDevice +Lightpipe_Mentor_1276.1004 +https://www.mentor-bauelemente.de/katalog/ll/MENTOR-LL.pdf +spherical light pipe 4 way 3mm PLCC-2 PLCC-4 +0 +0 +0 +OptoDevice +Lightpipe_Mentor_1276.2004 +https://www.mentor-bauelemente.de/katalog/ll/MENTOR-LL.pdf +planar light pipe 4 way 3mm PLCC-2 PLCC-4 +0 +0 +0 +OptoDevice +Lite-On_LTR-303ALS-01 +ambient light sensor, i2c interface, 6-pin chipled package, http://optoelectronics.liteon.com/upload/download/DS86-2013-0004/LTR-303ALS-01_DS_V1.pdf +ambient light sensor chipled +0 +6 +6 +OptoDevice +Luna_NSL-32 +Optoisolator with LED and photoresistor +optoisolator +0 +4 +4 +OptoDevice +Maxim_OLGA-14_3.3x5.6mm_P0.8mm +https://pdfserv.maximintegrated.com/land_patterns/90-0602.PDF +OLGA-14 OESIP-14 +0 +14 +14 +OptoDevice +ONSemi_QSE15x +3 Lead Plastic Package +ONSemi QSE158 QSE159 +0 +3 +3 +OptoDevice +OnSemi_CASE100AQ +OnSemi CASE 100AQ for QRE1113, see https://www.onsemi.com/pub/Collateral/QRE1113-D.PDF +reflective opto couple photo coupler +0 +4 +4 +OptoDevice +OnSemi_CASE100CY +OnSemi CASE 100CY, light-direction upwards, see http://www.onsemi.com/pub/Collateral/QRE1113-D.PDF +refective opto couple photo coupler +0 +4 +4 +OptoDevice +Osram_BPW82 +PhotoDiode, BPW82, RM2.54 +PhotoDiode BPW82 RM2.54 +0 +2 +2 +OptoDevice +Osram_DIL2_4.3x4.65mm_P5.08mm +PhotoDiode, plastic DIL, 4.3x4.65mm², RM5.08 +PhotoDiode plastic DIL RM5.08 +0 +2 +2 +OptoDevice +Osram_LPT80A +PhotoTransistor, sidelooker package, RM2.54 +PhotoTransistor sidelooker package RM2.54 +0 +2 +2 +OptoDevice +Osram_SFH9x0x +package for Osram SFH9x0x series of reflective photo interrupters/couplers, see http://www.osram-os.com/Graphics/XPic6/00200860_0.pdf +reflective photo interrupter SMD +0 +6 +6 +OptoDevice +Osram_SFH205 +PhotoDiode, SFH205, RM2.54 +PhotoDiode SFH205 RM2.54 +0 +2 +2 +OptoDevice +Osram_SFH225 +PhotoDiode, SFH225, RM2.54 +PhotoDiode SFH225 RM2.54 +0 +2 +2 +OptoDevice +Osram_SMD-DIL2_4.5x4.0mm +PhotoDiode, plastic SMD DIL, 4.5x4mm² +PhotoDiode plastic SMD DIL +0 +2 +2 +OptoDevice +Osram_SMD-SmartDIL +PhotoDiode, plastic SMD SmatDIL +PhotoDiode plastic SMD SmatDIL +0 +3 +3 +OptoDevice +Panasonic_APV-AQY_SSOP-4_4.45x2.65mm_P1.27mm +https://www.panasonic-electric-works.com/cps/rde/xbcr/pew_eu_en/technical_information_photomos_en.pdf +SSOP4 APV21 AQY22 +0 +4 +4 +OptoDevice +PerkinElmer_VTL5C +Axial Vactrol (http://www.qsl.net/wa1ion/vactrol/vactrol.pdf) +vactrol +0 +4 +4 +OptoDevice +PerkinElmer_VTL5Cx2 +Axial Vactrol (http://www.qsl.net/wa1ion/vactrol/vactrol.pdf) +vactrol +0 +5 +5 +OptoDevice +R_LDR_4.9x4.2mm_P2.54mm_Vertical +Resistor, LDR 4.9x4.2mm +Resistor LDR4.9x4.2 +0 +2 +2 +OptoDevice +R_LDR_5.0x4.1mm_P3mm_Vertical +Resistor, LDR 5x4.1mm, see http://cdn-reichelt.de/documents/datenblatt/A500/A90xxxx%23PE.pdf +Resistor LDR5x4.1mm +0 +2 +2 +OptoDevice +R_LDR_5.1x4.3mm_P3.4mm_Vertical +Resistor, LDR 5.1x3.4mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR5.1x3.4mm +0 +2 +2 +OptoDevice +R_LDR_5.2x5.2mm_P3.5mm_Horizontal +Resistor, LDR 5.2x5.2, upright, see http://cdn-reichelt.de/documents/datenblatt/A500/M996011A.pdf +Resistor LDR5.2x5.2 +0 +2 +2 +OptoDevice +R_LDR_7x6mm_P5.1mm_Vertical +Resistor, LDR 7x6mm +Resistor LDR7x6mm +0 +2 +2 +OptoDevice +R_LDR_10x8.5mm_P7.6mm_Vertical +Resistor, LDR 10x8.5mm +Resistor LDR10.8.5mm +0 +2 +2 +OptoDevice +R_LDR_11x9.4mm_P8.2mm_Vertical +Resistor, LDR 11x9.4mm +Resistor LDR11x9.4mm +0 +2 +2 +OptoDevice +R_LDR_12x10.8mm_P9.0mm_Vertical +Resistor, LDR 12x10.8mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR12x10.8mm +0 +2 +2 +OptoDevice +R_LDR_D6.4mm_P3.4mm_Vertical +Resistor, LDR D=6.4mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDRD=6.4mm +0 +2 +2 +OptoDevice +R_LDR_D13.8mm_P9.0mm_Vertical +Resistor, diameter 13.8mm pitch 9mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR +0 +2 +2 +OptoDevice +R_LDR_D20mm_P17.5mm_Vertical +Resistor, LDR 20mm diameter, pin pitch 17.5mm, see http://yourduino.com/docs/Photoresistor-5516-datasheet.pdf +Resistor LDR +0 +2 +2 +OptoDevice +ST_VL53L0X +https://www.st.com/resource/en/datasheet/vl53l1x.pdf +laser-ranging sensor +0 +12 +12 +OptoDevice +ST_VL53L1X +https://www.st.com/resource/en/datasheet/vl53l1x.pdf +laser-ranging sensor +0 +12 +12 +OptoDevice +Sharp_GP2Y0A41SK0F +http://www.sharp-world.com/products/device/lineup/data/pdf/datasheet/gp2y0a41sk_e.pdf +Distance Sensor Sharp +0 +2 +2 +OptoDevice +Sharp_IS471F +Sharp OPIC IS471F, see http://pdf.datasheetcatalog.com/datasheet/Sharp/mXvrzty.pdf +Sharp OPIC IS471F +0 +4 +4 +OptoDevice +Sharp_IS485 +Sharp OPIC, IS485, IS486, see http://microrato.ua.pt/main/Actividades/Estagios/Docs/IS485_6.pdf +Sharp OPIC IS485 IS486 +0 +3 +3 +OptoDevice +Siemens_SFH900 +package for Siemens SFH900 reflex photo interrupter/coupler/object detector, see https://www.batronix.com/pdf/sfh900.pdf +Siemens SFH900 reflex photo interrupter coupler object detector +0 +3 +3 +OptoDevice +Toshiba_TORX170_TORX173_TORX193_TORX194 +Fiberoptic Reciver, RX, Toshiba, Toslink, TORX170, TORX173, TORX193, TORX194 +Fiberoptic Reciver RX Toshiba Toslink TORX170 TORX173 TORX193 TORX194 +0 +6 +6 +OptoDevice +Toshiba_TOTX170_TOTX173_TOTX193_TOTX194 +Fiberoptic Reciver, RX, Toshiba, Toslink, TORX170, TORX173, TORX193, TORX194 +Fiberoptic Reciver RX Toshiba Toslink TORX170 TORX173 TORX193 TORX194 +0 +6 +6 +OptoDevice +Vishay_CAST-3Pin +IR Receiver Vishay TSOP-xxxx, CAST package, see https://www.vishay.com/docs/82493/tsop311.pdf +IRReceiverVishayTSOP-xxxx CAST +0 +3 +3 +OptoDevice +Vishay_CNY70 +package for Vishay CNY70 refective photo coupler/interrupter +Vishay CNY70 refective photo coupler +0 +4 +4 +OptoDevice +Vishay_MINICAST-3Pin +IR Receiver Vishay TSOP-xxxx, MINICAST package, see https://www.vishay.com/docs/82669/tsop32s40f.pdf +IR Receiver Vishay TSOP-xxxx MINICAST +0 +3 +3 +OptoDevice +Vishay_MINIMOLD-3Pin +IR Receiver Vishay TSOP-xxxx, MINIMOLD package, see https://www.vishay.com/docs/82742/tsop331.pdf +IR Receiver Vishay TSOP-xxxx MINIMOLD +0 +3 +3 +OptoDevice +Vishay_MOLD-3Pin +IR Receiver Vishay TSOP-xxxx, MOLD package, see https://www.vishay.com/docs/82669/tsop32s40f.pdf +IR Receiver Vishay TSOP-xxxx MOLD +0 +3 +3 +Oscillator +Oscillator_DIP-8 +Oscillator, DIP8,http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-8_LargePads +Oscillator, DIP8, Large Pads, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-14 +Oscillator, DIP14, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_DIP-14_LargePads +Oscillator, DIP14, Large Pads, http://cdn-reichelt.de/documents/datenblatt/B400/OSZI.pdf +oscillator +0 +4 +4 +Oscillator +Oscillator_OCXO_Morion_MV267 +http://www.morion.com.ru/catalog_pdf/MV267.pdf +OCXO +0 +5 +5 +Oscillator +Oscillator_OCXO_Morion_MV317 +https://www.morion-us.com/catalog_pdf/mv317.pdf +OCXO +0 +5 +5 +Oscillator +Oscillator_SMD_Abracon_ABLNO +https://abracon.com/Precisiontiming/ABLNO.pdf +VCXO XO +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASCO-4Pin_1.6x1.2mm +Miniature Crystal Clock Oscillator Abracon ASCO series, https://abracon.com/Oscillators/ASCO.pdf, 1.6x1.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASDMB-4Pin_2.5x2.0mm +Miniature Crystal Clock Oscillator Abracon ASDMB series, 2.5x2.0mm package, http://www.abracon.com/Oscillators/ASDMB.pdf +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm +Miniature Crystal Clock Oscillator Abracon ASE series, http://www.abracon.com/Oscillators/ASEseries.pdf, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASE-4Pin_3.2x2.5mm_HandSoldering +Miniature Crystal Clock Oscillator Abracon ASE series, http://www.abracon.com/Oscillators/ASEseries.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASV-4Pin_7.0x5.1mm +Miniature Crystal Clock Oscillator Abracon ASV series, http://www.abracon.com/Oscillators/ASV.pdf, 7.0x5.1mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Abracon_ASV-4Pin_7.0x5.1mm_HandSoldering +Miniature Crystal Clock Oscillator Abracon ASV series, http://www.abracon.com/Oscillators/ASV.pdf, hand-soldering, 7.0x5.1mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Diodes_FN-4Pin_7.0x5.0mm +FN Series Crystal Clock Oscillator (XO) (https://www.diodes.com/assets/Datasheets/FN_3-3V.pdf) +Oscillator Crystal SMD SMT +0 +4 +4 +Oscillator +Oscillator_SMD_ECS_2520MV-xxx-xx-4Pin_2.5x2.0mm +Miniature Crystal Clock Oscillator ECS 2520MV series, https://www.ecsxtal.com/store/pdf/ECS-2520MV.pdf +Miniature Crystal Clock Oscillator ECS 2520MV series SMD SMT HCMOS +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO32-4Pin_3.2x2.5mm +Miniature Crystal Clock Oscillator EuroQuartz XO32 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO32.pdf, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO32-4Pin_3.2x2.5mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO32 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO32.pdf, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO53-4Pin_5.0x3.2mm +Miniature Crystal Clock Oscillator EuroQuartz XO53 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO53.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO53-4Pin_5.0x3.2mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO53 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO53.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO91-4Pin_7.0x5.0mm +Miniature Crystal Clock Oscillator EuroQuartz XO91 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO91.pdf, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_EuroQuartz_XO91-4Pin_7.0x5.0mm_HandSoldering +Miniature Crystal Clock Oscillator EuroQuartz XO91 series, http://cdn-reichelt.de/documents/datenblatt/B400/XO91.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS1-6Pin_14.8x9.1mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S1-KHZ/LHZ, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 14.8x9.1mm^2 package +SMD SMT crystal oscillator +0 +6 +6 +Oscillator +Oscillator_SMD_Fordahl_DFAS2-4Pin_7.3x5.1mm +Mminiature Crystal Clock Oscillator TXCO Fordahl DFA S2-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.3x5.1mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS2-4Pin_7.3x5.1mm_HandSoldering +Mminiature Crystal Clock Oscillator TXCO Fordahl DFA S2-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.3x5.1mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS3-4Pin_9.1x7.2mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S3-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 9.1x7.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS3-4Pin_9.1x7.2mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S3-KS/LS/US, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 9.1x7.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS7-4Pin_19.9x12.9mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S7-K/L, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 19.9x12.9mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS7-4Pin_19.9x12.9mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S7-K/L, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 19.9x12.9mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS11-4Pin_7.0x5.0mm +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S11-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS11-4Pin_7.0x5.0mm_HandSoldering +Miniature Crystal Clock Oscillator TXCO Fordahl DFA S11-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS15-4Pin_5.0x3.2mm +Ultraminiature Crystal Clock Oscillator TXCO Fordahl DFA S15-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_Fordahl_DFAS15-4Pin_5.0x3.2mm_HandSoldering +Ultraminiature Crystal Clock Oscillator TXCO Fordahl DFA S15-OV/UOV, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_IDT_JS6-6_5.0x3.2mm_P1.27mm +SMD Crystal Oscillator IDT https://www.idt.com/document/dst/xu-family-datasheet#page=15, 5.0x3.2mm +SMD SMT crystal oscillator +0 +6 +6 +Oscillator +Oscillator_SMD_IDT_JU6-6_7.0x5.0mm_P2.54mm +SMD Crystal Oscillator IDT https://www.idt.com/document/dst/xu-family-datasheet#page=17, 7.0x5.0mm +SMD SMT crystal oscillator +0 +6 +6 +Oscillator +Oscillator_SMD_IQD_IQXO70-4Pin_7.5x5.0mm +IQD Crystal Clock Oscillator IQXO-70, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, 7.5x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_IQD_IQXO70-4Pin_7.5x5.0mm_HandSoldering +IQD Crystal Clock Oscillator IQXO-70, http://www.iqdfrequencyproducts.com/products/details/iqxo-70-11-30.pdf, hand-soldering, 7.5x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Kyocera_2520-6Pin_2.5x2.0mm +https://global.kyocera.com/prdct/electro/product/pdf/kt2520_e.pdf +2.5mm 2mm SMD +0 +6 +6 +Oscillator +Oscillator_SMD_Kyocera_KC2520Z-4Pin_2.5x2.0mm +https://global.kyocera.com/prdct/electro/product/pdf/clock_z_xz_e.pdf +2.5mm 2mm SMD +0 +4 +4 +Oscillator +Oscillator_SMD_OCXO_ConnorWinfield_OH300 +http://www.conwin.com/datasheets/cx/cx282.pdf +OCXO +0 +7 +7 +Oscillator +Oscillator_SMD_SI570_SI571_HandSoldering +SI570, SI571, Programmable oscillator, Standard +SI570 SI571 Programmable oscillator Standard +0 +8 +8 +Oscillator +Oscillator_SMD_SI570_SI571_Standard +SI570, SI571, Programmable oscillator, Standard +SI570 SI571 Programmable oscillator Standard +0 +8 +8 +Oscillator +Oscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mm +SMD Crystal Oscillator Seiko Epson SG-210 https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210SED, 2.5x2.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-210 https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-210SED, hand-soldering, 2.5x2.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG3030CM +SMD Crystal Oscillator Seiko Epson SG-3030CM package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CA-4Pin_7.0x5.0mm +SMD Crystal Oscillator Seiko Epson SG-8002CA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 7.0x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CA-4Pin_7.0x5.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002CA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 7.0x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CE-4Pin_3.2x2.5mm +SMD Crystal Oscillator Seiko Epson SG-8002CE https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 3.2x2.5mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002CE-4Pin_3.2x2.5mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002CE https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 3.2x2.5mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JA-4Pin_14.0x8.7mm +SMD Crystal Oscillator Seiko Epson SG-8002JA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 14.0x8.7mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JA-4Pin_14.0x8.7mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002JA https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 14.0x8.7mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JC-4Pin_10.5x5.0mm +SMD Crystal Oscillator Seiko Epson SG-8002JC https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 10.5x5.0mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002JC-4Pin_10.5x5.0mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002JC https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 10.5x5.0mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mm +SMD Crystal Oscillator Seiko Epson SG-8002LB https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mm_HandSoldering +SMD Crystal Oscillator Seiko Epson SG-8002LB https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SMD_Silicon_Labs_LGA-6_2.5x3.2mm_P1.25mm +Silicon_Labs LGA, 6 Pin (https://www.silabs.com/documents/public/data-sheets/si512-13.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +Silicon_Labs LGA NoLead +0 +6 +6 +Oscillator +Oscillator_SMD_TCXO_G158 +TCXO +TCXO +0 +4 +4 +Oscillator +Oscillator_SMD_TXC_7C-4Pin_5.0x3.2mm +Miniature Crystal Clock Oscillator TXC 7C series, http://www.txccorp.com/download/products/osc/7C_o.pdf, 5.0x3.2mm^2 package +SMD SMT crystal oscillator +0 +4 +4 +Oscillator +Oscillator_SMD_TXC_7C-4Pin_5.0x3.2mm_HandSoldering +Miniature Crystal Clock Oscillator TXC 7C series, http://www.txccorp.com/download/products/osc/7C_o.pdf, hand-soldering, 5.0x3.2mm^2 package +SMD SMT crystal oscillator hand-soldering +0 +4 +4 +Oscillator +Oscillator_SeikoEpson_SG-8002DB +14-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Oscillator +Oscillator_SeikoEpson_SG-8002DC +8-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Package_BGA +Analog_BGA-28_4.0x6.25mm_Layout4x7_P0.8mm_Ball0.45mm_Pad0.4 +Analog BGA-28 4.0mm x 6.25mm package, pitch 0.4mm pad, based on https://www.analog.com/media/en/technical-documentation/data-sheets/8063fa.pdf +BGA 28 0.8 +0 +28 +28 +Package_BGA +BGA-9_1.6x1.6mm_Layout3x3_P0.5mm +BGA-9, http://www.ti.com/lit/ds/symlink/bq27421-g1.pdf +BGA-9 +0 +9 +9 +Package_BGA +BGA-16_1.92x1.92mm_Layout4x4_P0.5mm +BGA-16, http://www.st.com/content/ccc/resource/technical/document/datasheet/group2/bc/cd/62/9e/8f/30/47/69/CD00151267/files/CD00151267.pdf/jcr:content/translations/en.CD00151267.pdf +BGA-16 +0 +16 +16 +Package_BGA +BGA-25_6.35x6.35mm_Layout5x5_P1.27mm +BGA-25, http://cds.linear.com/docs/en/datasheet/4624fc.pdf +BGA-25 uModule +0 +25 +25 +Package_BGA +BGA-36_3.396x3.466mm_Layout6x6_P0.4mm_Ball0.25mm_Pad0.2mm_NSMD +Altera V36, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00486-00.pdf +Altera BGA-36 V36 VBGA +0 +36 +36 +Package_BGA +BGA-48_8.0x9.0mm_Layout6x8_P0.8mm +BGA-48 - pitch 0.8 mm +BGA-48 +0 +48 +48 +Package_BGA +BGA-64_9.0x9.0mm_Layout10x10_P0.8mm +BGA-64, 10x10 raster, 9x9mm package, pitch 0.8mm +BGA-64 +0 +64 +64 +Package_BGA +BGA-68_5.0x5.0mm_Layout9x9_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-68, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00344-01.pdf +Altera BGA-68 M68 MBGA +0 +68 +68 +Package_BGA +BGA-81_4.496x4.377mm_Layout9x9_P0.4mm_Ball0.25mm_Pad0.2mm_NSMD +Altera V81, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00478-01.pdf +Altera VBGA V81 BGA-81 +0 +81 +81 +Package_BGA +BGA-90_8.0x13.0mm_Layout2x3x15_P0.8mm +BGA-90, http://www.issi.com/WW/pdf/42-45S32800J.pdf +BGA-90 +0 +90 +90 +Package_BGA +BGA-96_9.0x13.0mm_Layout2x3x16_P0.8mm +BGA-96, http://www.mouser.com/ds/2/198/43-46TR16640B-81280BL-706483.pdf +BGA-96 +0 +96 +96 +Package_BGA +BGA-100_6.0x6.0mm_Layout11x11_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-100, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00345-01.pdf +Altera BGA-100 M100 MBGA +0 +100 +100 +Package_BGA +BGA-100_11.0x11.0mm_Layout10x10_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-100, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00223-02.pdf +BGA-100 +0 +100 +100 +Package_BGA +BGA-121_9.0x9.0mm_Layout11x11_P0.8mm_Ball0.4mm_Pad0.35mm_NSMD +121-ball, 0.8mm BGA (based on http://www.latticesemi.com/view_document?document_id=213) +BGA 0.8mm 9mm 121 +0 +121 +121 +Package_BGA +BGA-121_12.0x12.0mm_Layout11x11_P1.0mm +BGA-121, http://cds.linear.com/docs/en/packaging/05081891_A_bga121.pdf +BGA-121 +0 +121 +121 +Package_BGA +BGA-132_12x18mm_Layout11x17_P0.5mm +BGA-132 11x17 12x18mm 0.5pitch +BGA-132 +0 +132 +132 +Package_BGA +BGA-144_7.0x7.0mm_Layout13x13_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-144, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00346-00.pdf +Altera BGA-144 M144 MBGA +0 +144 +144 +Package_BGA +BGA-144_13.0x13.0mm_Layout12x12_P1.0mm +BGA-144, http://www.topline.tv/drawings/pdf/BGA%201,0mm%20pitch/LBGA144T1.0-DC128.pdf +BGA-144 +0 +144 +144 +Package_BGA +BGA-152_14x18mm_Layout13x17_P0.5mm +BGA-152_14x18mm_Layout13x17_P0.5mm +VBGA-152 +0 +152 +152 +Package_BGA +BGA-153_8.0x8.0mm_Layout15x15_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-153, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00471-00.pdf +Altera BGA-153 M153 MBGA +0 +153 +153 +Package_BGA +BGA-169_11.0x11.0mm_Layout13x13_P0.8mm_Ball0.5mm_Pad0.4mm_NSMD +Altera U169, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00470-01.pdf +Altera UBGA U169 BGA-169 +0 +169 +169 +Package_BGA +BGA-256_11.0x11.0mm_Layout20x20_P0.5mm_Ball0.3mm_Pad0.25mm_NSMD +Altera MBGA-256, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00348-01.pdf +Altera BGA-256 M256 MBGA +0 +256 +256 +Package_BGA +BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD +BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +BGA-256 +0 +256 +256 +Package_BGA +BGA-256_17.0x17.0mm_Layout16x16_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +BGA-256 +0 +256 +256 +Package_BGA +BGA-324_15.0x15.0mm_Layout18x18_P0.8mm_Ball0.5mm_Pad0.4mm_NSMD +Altera U324, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00474-02.pdf +Altera UBGA U324 BGA-324 +0 +324 +324 +Package_BGA +BGA-324_19.0x19.0mm_Layout18x18_P1.0mm_Ball0.5mm_Pad0.4mm_NSMD +BGA-324, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00233-03.pdf +BGA-324 +0 +324 +324 +Package_BGA +BGA-352_35.0x35.0mm_Layout26x26_P1.27mm +BGA-352, https://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/b352p05.pdf +BGA-352 +0 +352 +352 +Package_BGA +BGA-400_21.0x21.0mm_Layout20x20_P1.0mm +BGA-400, https://www.xilinx.com/support/documentation/package_specs/fg400.pdf +BGA-400 +0 +400 +400 +Package_BGA +BGA-484_23.0x23.0mm_Layout22x22_P1.0mm +BGA-484, https://www.xilinx.com/support/documentation/package_specs/fg484.pdf +BGA-484 +0 +484 +484 +Package_BGA +BGA-624_21.0x21.0mm_Layout25x25_P0.8mm +BGA-624, 25x25 grid, 21x21mm package, pitch 0.8mm; https://www.nxp.com/docs/en/package-information/SOT1529-1.pdf +BGA 624 0.8 +0 +624 +624 +Package_BGA +BGA-625_21.0x21.0mm_Layout25x25_P0.8mm +BGA-625 +BGA-625 +0 +625 +625 +Package_BGA +BGA-672_27.0x27.0mm_Layout26x26_P1.0mm_Ball0.6mm_Pad0.5mm_NSMD +Altera BGA-672, https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/packaging/04r00472-00.pdf +Altera BGA-672 F672 FBGA +0 +672 +672 +Package_BGA +BGA-676_27.0x27.0mm_Layout26x26_P1.0mm_Ball0.6mm_Pad0.5mm_NSMD +XILINX BGA-676, https://www.xilinx.com/support/documentation/package_specs/fg676.pdf +XILINX BGA-676 FG676/FGG676 +0 +676 +676 +Package_BGA +BGA-1023_33.0x33.0mm_Layout32x32_P1.0mm +BGA-1023 +BGA-1023 +0 +1023 +1023 +Package_BGA +BGA-1156_35.0x35.0mm_Layout34x34_P1.0mm +BGA-1156 +BGA-1156 +0 +1156 +1156 +Package_BGA +BGA-1295_37.5x37.5mm_Layout36x36_P1.0mm +BGA-1295 +BGA-1295 +0 +1295 +1295 +Package_BGA +FB-BGA-484_23.0x23.0mm_Layout22x22_P1.0mm +Xilinx FB-484, https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf +FB-BGA-484 +0 +484 +484 +Package_BGA +FBGA-78_7.5x11mm_Layout2x3x13_P0.8mm +FBGA-78, https://www.skhynix.com/product/filedata/fileDownload.do?seq=7687 +FBGA-78 +0 +78 +78 +Package_BGA +Fujitsu_WLP-15_2.28x3.092mm_Layout3x5_P0.4mm +WLP-15, 3x5 raster, 2.28x3.092mm package, pitch 0.4mm; http://www.fujitsu.com/global/documents/products/devices/semiconductor/fram/lineup/MB85RS1MT-DS501-00022-7v0-E.pdf +BGA 8 0.4 +0 +8 +8 +Package_BGA +LFBGA-100_10x10mm_Layout10x10_P0.8mm +LFBGA-100, 10x10 raster, 10x10mm package, pitch 0.8mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf +BGA 100 0.8 +0 +100 +100 +Package_BGA +LFBGA-144_10x10mm_Layout12x12_P0.8mm +LFBGA-144, 12x12 raster, 10x10mm package, pitch 0.8mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf +BGA 144 0.8 +0 +144 +144 +Package_BGA +LFBGA-169_16x12mm_Layout28x14_P0.5mm_Ball0.3_Pad0.3mm_NSMD +https://4donline.ihs.com/images/VipMasterIC/IC/SGST/SGSTS20279/SGSTS20279-1.pdf?hkey=EF798316E3902B6ED9A73243A3159BB0 +eMMC Flash LFBGA169 +0 +169 +169 +Package_BGA +Lattice_caBGA-381_17.0x17.0mm_Layout20x20_P0.8mm_Ball0.4mm_Pad0.4mm_NSMD +Lattice caBGA-381 footprint for ECP5 FPGAs, based on http://www.latticesemi.com/view_document?document_id=213 +BGA 381 0.8 +0 +381 +381 +Package_BGA +Lattice_caBGA-381_17.0x17.0mm_Layout20x20_P0.8mm_Ball0.4mm_Pad0.6mm_SMD +Lattice caBGA-381 footprint for ECP5 FPGAs, based on http://www.latticesemi.com/view_document?document_id=213 +BGA 381 0.8 +0 +381 +381 +Package_BGA +Linear_BGA-133_15.0x15.0mm_Layout12x12_P1.27mm +Analog Devices (Linear Tech), 133-pin BGA uModule, 15.0x15.0x4.92mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf +133 pin bga +0 +134 +134 +Package_BGA +Maxim_WLP-9_1.595x1.415_Layout3x3_P0.4mm_Ball0.27mm_Pad0.25mm_NSMD +Maxim_WLP-9 W91C1+1 https://pdfserv.maximintegrated.com/package_dwgs/21-0459.PDF +Maxim_WLP-9 +0 +9 +9 +Package_BGA +Maxim_WLP-12 +Maxim_WLP-12 W121B2+1 http://pdfserv.maximintegrated.com/package_dwgs/21-0009.PDF +Maxim_WLP-12 +0 +12 +12 +Package_BGA +Microchip_TFBGA-196_11x11mm_Layout14x14_P0.75mm_SMD +TFBGA-196, 11.0x11.0mm, 196 Ball, 14x14 Layout, 0.75mm Pitch, http://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-Sheet-DS60001476C.pdf#page=2956 +BGA 196 0.75 +0 +196 +196 +Package_BGA +ST_uTFBGA-36_3.6x3.6mm_Layout6x6_P0.5mm +ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stulpi01a.pdf +BGA 36 0.5 +0 +36 +36 +Package_BGA +TFBGA-64_5x5mm_Layout8x8_P0.5mm +TFBGA-64, 8x8 raster, 5x5mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f100v8.pdf +BGA 64 0.5 +0 +64 +64 +Package_BGA +TFBGA-100_8x8mm_Layout10x10_P0.8mm +TFBGA-100, 10x10 raster, 8x8mm package, pitch 0.8mm; see section 6.2 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 100 0.8 +0 +100 +100 +Package_BGA +TFBGA-100_9.0x9.0mm_Layout10x10_P0.8mm +TFBGA-100, 10x10, 9x9mm package, pitch 0.8mm +TFBGA-100 +0 +100 +100 +Package_BGA +TFBGA-121_10x10mm_Layout11x11_P0.8mm +TFBGA-121, 11x11 raster, 10x10mm package, pitch 0.8mm; http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#p495 +BGA 121 0.8 +0 +121 +121 +Package_BGA +TFBGA-216_13x13mm_Layout15x15_P0.8mm +TFBGA-216, 15x15 raster, 13x13mm package, pitch 0.8mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 216 0.8 +0 +216 +216 +Package_BGA +TFBGA-265_14x14mm_Layout17x17_P0.8mm +TFBGA-265, 17x17 raster, 14x14mm package, pitch 0.8mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf +BGA 265 0.8 +0 +265 +265 +Package_BGA +Texas_DSBGA-5_0.822x1.116mm_Layout2x1x2_P0.4mm +Texas Instruments, DSBGA, 0.822x1.116mm, 5 bump 2x1x2 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/opa330.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YFF S-XBGA-N5 +0 +10 +5 +Package_BGA +Texas_DSBGA-6_0.9x1.4mm_Layout2x3_P0.5mm +Texas Instruments, DSBGA, 0.9x1.4mm, 6 bump 2x3 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/ts5a3159a.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N6 +0 +12 +6 +Package_BGA +Texas_DSBGA-8_0.9x1.9mm_Layout2x4_P0.5mm +Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0102.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N8 +0 +16 +8 +Package_BGA +Texas_DSBGA-8_1.43x1.41mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.43x1.41mm, 8 bump 3x3 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lmc555.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZP R-XBGA-N8 +0 +16 +8 +Package_BGA +Texas_DSBGA-8_1.5195x1.5195mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YZR pad definition (http://www.ti.com/lit/ml/mxbg270/mxbg270.pdf) +BGA 8 0.5 +0 +8 +8 +Package_BGA +Texas_DSBGA-9_1.4715x1.4715mm_Layout3x3_P0.5mm +Texas Instruments, DSBGA, 1.4715x1.4715mm, 9 bump 3x3 array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lm4990.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA YZR0009 +0 +18 +9 +Package_BGA +Texas_DSBGA-10_1.36x1.86mm_Layout3x4_P0.5mm +Texas Instruments, DSBGA, 1.36x1.86mm, 10 bump 3x4 (perimeter) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA +0 +20 +10 +Package_BGA +Texas_DSBGA-12_1.36x1.86mm_Layout3x4_P0.5mm +Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 3x4 (area) array, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +Texas Instruments DSBGA BGA +0 +24 +12 +Package_BGA +Texas_DSBGA-28_1.9x3.0mm_Layout4x7_P0.4mm +Texas Instruments, DSBGA, 3.0x1.9x0.625mm, 28 ball 7x4 area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/bq51050b.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +BGA 28 0.4 +0 +28 +28 +Package_BGA +Texas_DSBGA-49_3.33x3.488mm_Layout7x7_P0.4mm +Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/msp430f2234.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +texas dsbga 49 +0 +49 +49 +Package_BGA +Texas_DSBGA-64_3.415x3.535mm_Layout8x8_P0.4mm +Texas Instruments, DSBGA, 3.415x3.535x0.625mm, 64 ball 8x8 area grid, NSMD pad definition (http://www.ti.com/lit/ds/slas718g/slas718g.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf) +texas dsbga 64 +0 +64 +64 +Package_BGA +Texas_MicroStar_Junior_BGA-12_2.0x2.5mm_Layout4x3_P0.5mm +Texas Instruments, BGA Microstar Junior, 2x2.5mm, 12 bump 4x3 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-12 +0 +12 +12 +Package_BGA +Texas_MicroStar_Junior_BGA-80_5.0x5.0mm_Layout9x9_P0.5mm +Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-80 +0 +80 +80 +Package_BGA +Texas_MicroStar_Junior_BGA-113_7.0x7.0mm_Layout12x12_P0.5mm +Texas Instruments, BGA Microstar Junior, 7x7mm, 113 ball 12x12 grid, NSMD pad definition (http://www.ti.com/lit/ml/mpbg674/mpbg674.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf) +Texas_Junior_BGA-113 +0 +113 +113 +Package_BGA +UCBGA-36_2.5x2.5mm_Layout6x6_P0.4mm +UCBGA-36, 6x6 raster, 2.5x2.5mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 36 0.4 +0 +36 +36 +Package_BGA +UCBGA-49_3x3mm_Layout7x7_P0.4mm +UCBGA-49, 7x7 raster, 3x3mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 49 0.4 +0 +49 +49 +Package_BGA +UCBGA-81_4x4mm_Layout9x9_P0.4mm +UCBGA-81, 9x9 raster, 4x4mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 +BGA 81 0.4 +0 +81 +81 +Package_BGA +UFBGA-15_3.0x3.0mm_Layout4x4_P0.65mm +UFBGA-15, 4x4, 3x3mm package, pitch 0.65mm +UFBGA-15 +0 +15 +15 +Package_BGA +UFBGA-32_4.0x4.0mm_Layout6x6_P0.5mm +UFBGA-32, 6x6, 4x4mm package, pitch 0.5mm +UFBGA-32 +0 +32 +32 +Package_BGA +UFBGA-64_5x5mm_Layout8x8_P0.5mm +UFBGA-64, 8x8 raster, 5x5mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf +BGA 64 0.5 +0 +64 +64 +Package_BGA +UFBGA-100_7x7mm_Layout12x12_P0.5mm +UFBGA-100, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf +BGA 100 0.5 +0 +100 +100 +Package_BGA +UFBGA-132_7x7mm_Layout12x12_P0.5mm +UFBGA-132, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf +BGA 132 0.5 +0 +132 +132 +Package_BGA +UFBGA-132_7x7mm_P0.5mm +UFBGA 132 Pins, 0.5mm Pitch, 0.3mm Ball, http://www.st.com/resource/en/datasheet/stm32l486qg.pdf +ufbga bga small-pitch +0 +132 +132 +Package_BGA +UFBGA-144_7x7mm_Layout12x12_P0.5mm +UFBGA-144, 12x12 raster, 7x7mm package, pitch 0.5mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 144 0.5 +0 +144 +144 +Package_BGA +UFBGA-144_10x10mm_Layout12x12_P0.8mm +UFBGA-144, 12x12 raster, 10x10mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 144 0.8 +0 +144 +144 +Package_BGA +UFBGA-169_7x7mm_Layout13x13_P0.5mm +UFBGA-169, 13x13 raster, 7x7mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf +BGA 169 0.5 +0 +169 +169 +Package_BGA +UFBGA-201_10x10mm_Layout15x15_P0.65mm +UFBGA-201, 15x15 raster, 10x10mm package, pitch 0.65mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf +BGA 201 0.65 +0 +201 +201 +Package_BGA +VFBGA-49_5.0x5.0mm_Layout7x7_P0.65mm +VFBGA-49, 7x7, 5x5mm package, pitch 0.65mm +VFBGA-49 +0 +49 +49 +Package_BGA +VFBGA-100_7.0x7.0mm_Layout10x10_P0.65mm +VFBGA-100, 10x10, 7x7mm package, pitch 0.65mm +VFBGA-100 +0 +100 +100 +Package_BGA +WLP-4_0.73x0.73mm_Layout2x2_P0.35mm_Ball0.22mm_Pad0.2mm_NSMD +WLP-4, 2x2 raster, 0.73x0.73mm package, pitch 0.35mm; https://datasheets.maximintegrated.com/en/ds/MAX40200.pdf +BGA 4 0.35 +0 +4 +4 +Package_BGA +WLP-4_0.83x0.83mm_P0.4mm +WLP-4_0.83x0.83mm_P0.4mm https://pdfserv.maximintegrated.com/package_dwgs/21-100107.PDF, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1891 +WLP-4 +0 +4 +4 +Package_BGA +WLP-4_0.86x0.86mm_P0.4mm +WLP-4_0.86x0.86mm_P0.4mm https://pdfserv.maximintegrated.com/package_dwgs/21-0612.PDF, https://www.maximintegrated.com/en/app-notes/index.mvp/id/1891 +WLP-4 +0 +4 +4 +Package_BGA +WLP-9_1.448x1.468mm_Layout3x3_P0.4mm_Ball0.27mm_Pad0.25mm +WLP-9, 1.448x1.468mm, 9 Ball, 3x3 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100168.PDF +BGA 9 0.4 +0 +9 +9 +Package_BGA +XBGA-121_10x10mm_Layout11x11_P0.8mm +XBGA-121, 11x11 raster, 10x10mm package, pitch 0.6mm; http://ww1.microchip.com/downloads/en/DeviceDoc/39969b.pdf +BGA 121 0.8 +0 +121 +121 +Package_BGA +XFBGA-36_3.5x3.5mm_Layout6x6_P0.5mm +XFBGA-36, https://www.nxp.com/docs/en/package-information/SOT1555-1.pdf +XFBGA-36 +0 +36 +36 +Package_BGA +XFBGA-64_5.0x5.0mm_Layout8x8_P0.5mm +XFBGA-64, https://www.nxp.com/docs/en/package-information/SOT1555-1.pdf +XFBGA-64 +0 +64 +64 +Package_BGA +XFBGA-121_8x8mm_Layout11x11_P0.65mm +XFBGA-121, https://www.nxp.com/docs/en/package-information/SOT1533-1.pdf +XFBGA-121 +0 +121 +121 +Package_BGA +Xilinx_CLG225 +Zynq-7000 BGA, 15x15 grid, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=77, NSMD pad definition Appendix A +BGA 225 0.8 CLG225 +0 +225 +225 +Package_BGA +Xilinx_CLG400 +Zynq-7000 BGA, 20x20 grid, 17x17mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=78, NSMD pad definition Appendix A +BGA 400 0.8 CLG400 CL400 +0 +400 +400 +Package_BGA +Xilinx_CLG484_CLG485 +Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=79, NSMD pad definition Appendix A +BGA 484 0.8 CLG484 CL484 CLG485 CL485 +0 +484 +484 +Package_BGA +Xilinx_CPG236 +Artix-7 BGA, 19x19 grid, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=266, NSMD pad definition Appendix A +BGA 238 0.5 CP236 CPG236 +0 +238 +238 +Package_BGA +Xilinx_CPG238 +Artix-7 BGA, 19x19 grid, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=267, NSMD pad definition Appendix A +BGA 238 0.5 CPG238 +0 +238 +238 +Package_BGA +Xilinx_CPGA196 +Spartan-7 BGA, 14x14 grid, 8x8mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=260, NSMD pad definition Appendix A +BGA 196 0.5 CPGA196 +0 +196 +196 +Package_BGA +Xilinx_CSG324 +Artix-7 BGA, 18x18 grid, 15x15mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=268, NSMD pad definition Appendix A +BGA 324 0.8 CS324 CSG324 +0 +324 +324 +Package_BGA +Xilinx_CSG325 +Artix-7 BGA, 18x18 grid, 15x15mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=268, NSMD pad definition Appendix A +BGA 324 0.8 CS325 CSG235 +0 +324 +324 +Package_BGA +Xilinx_CSGA225 +Spartan-7 BGA, 15x15 grid, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=262, NSMD pad definition Appendix A +BGA 225 0.8 CSGA225 +0 +225 +225 +Package_BGA +Xilinx_CSGA324 +Spartan-7 BGA, 18x18 grid, 15x15mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=263, NSMD pad definition Appendix A +BGA 324 0.8 CSGA324 +0 +324 +324 +Package_BGA +Xilinx_FBG484 +Artix-7, Kintex-7 and Zynq-7000 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=271, ttps://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=281, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=82, NSMD pad definition Appendix A +BGA 484 1 FB484 FBG484 FBV484 +0 +484 +484 +Package_BGA +Xilinx_FBG676 +Artix-7, Kintex-7 and Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=273, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=284, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=84, NSMD pad definition Appendix A +BGA 676 1 FB676 FBG676 FBV676 +0 +676 +676 +Package_BGA +Xilinx_FBG900 +Kintex-7 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=289, NSMD pad definition Appendix A +BGA 900 1 FB900 FBG900 FBV900 +0 +900 +900 +Package_BGA +Xilinx_FFG676 +Kintex-7 and Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=292, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=88, NSMD pad definition Appendix A +BGA 676 1 FF676 FFG676 FFV676 +0 +676 +676 +Package_BGA +Xilinx_FFG900_FFG901 +Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=294, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=90, NSMD pad definition Appendix A +BGA 900 1 FF900 FFG900 FFV900 FF901 FFG901 FFV901 +0 +900 +900 +Package_BGA +Xilinx_FFG1156 +Artix-7, Kintex-7 and Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=277, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=296, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=91, NSMD pad definition Appendix A +BGA 1156 1 FF1156 FFG1156 FFV1156 +0 +1156 +1156 +Package_BGA +Xilinx_FFG1157_FFG1158 +Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=299, NSMD pad definition Appendix A +BGA 1156 1 FF1157 FFG1157 FFV1157 FF1158 FFG1158 FFV1158 +0 +1156 +1156 +Package_BGA +Xilinx_FFG1761 +Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=300, NSMD pad definition Appendix A +BGA 1760 1 FF1761 FFG1761 +0 +1760 +1760 +Package_BGA +Xilinx_FFG1926_FFG1927_FFG1928_FFG1930 +Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=303, NSMD pad definition Appendix A +BGA 1924 1 FF1926 FFG1926 FF1927 FFG1927 FFV1927 FF1928 FFG1928 FF1930 FFG1930 +0 +1924 +1924 +Package_BGA +Xilinx_FFV1761 +Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=301, NSMD pad definition Appendix A +BGA 1760 1 FFV1761 +0 +1760 +1760 +Package_BGA +Xilinx_FGG484 +Artix-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=275, NSMD pad definition Appendix A +BGA 484 1 FG484 FGG484 +0 +484 +484 +Package_BGA +Xilinx_FGG676 +Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=276, NSMD pad definition Appendix A +BGA 676 1 FG676 FGG676 +0 +676 +676 +Package_BGA +Xilinx_FGGA484 +Spartan-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=264, NSMD pad definition Appendix A +BGA 484 1 FGGA484 +0 +484 +484 +Package_BGA +Xilinx_FGGA676 +Spartan-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=265, NSMD pad definition Appendix A +BGA 676 1 FGGA676 +0 +676 +676 +Package_BGA +Xilinx_FHG1761 +Virtex-7 BGA, 42x42 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=302, NSMD pad definition Appendix A +BGA 1760 1 FH1761 FHG1761 +0 +1760 +1760 +Package_BGA +Xilinx_FLG1925_FLG1926_FLG1928_FLG1930 +Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=304, NSMD pad definition Appendix A +BGA 1924 1 FL1925 FLG1925 FL1926 FLG1926 FL1928 FLG1928 FL1930 FLG1930 +0 +1924 +1924 +Package_BGA +Xilinx_FTG256 +Artix-7 BGA, 16x16 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=269, NSMD pad definition Appendix A +BGA 256 1 FT256 FTG256 +0 +256 +256 +Package_BGA +Xilinx_FTGB196 +Spartan-7 BGA, 14x14 grid, 15x15mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=261, NSMD pad definition Appendix A +BGA 196 1 FTGB196 +0 +196 +196 +Package_BGA +Xilinx_RB484 +Artix-7 and Zynq-7000 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=278, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=92, NSMD pad definition Appendix A +BGA 484 1 RB484 +0 +484 +484 +Package_BGA +Xilinx_RB676 +Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=280, NSMD pad definition Appendix A +BGA 676 1 RB676 +0 +676 +676 +Package_BGA +Xilinx_RF676 +Kintex-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=297, NSMD pad definition Appendix A +BGA 676 1 RF676 +0 +676 +676 +Package_BGA +Xilinx_RF900 +Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=298, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=94, NSMD pad definition Appendix A +BGA 900 1 RF900 +0 +900 +900 +Package_BGA +Xilinx_RF1156 +Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=95, NSMD pad definition Appendix A +BGA 1156 1 RF1156 +0 +1156 +1156 +Package_BGA +Xilinx_RF1157_RF1158 +Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=305, NSMD pad definition Appendix A +BGA 1156 1 RF1157 RF1158 +0 +1156 +1156 +Package_BGA +Xilinx_RF1761 +Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition Appendix A +BGA 1760 1 RF1761 +0 +1760 +1760 +Package_BGA +Xilinx_RF1930 +Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=307, NSMD pad definition Appendix A +BGA 1924 1 RF1930 +0 +1924 +1924 +Package_BGA +Xilinx_RFG676 +Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=93, NSMD pad definition Appendix A +BGA 676 1 RF676 RFG676 +0 +676 +676 +Package_BGA +Xilinx_RS484 +Artix-7 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=279, NSMD pad definition Appendix A +BGA 484 0.8 RS484 +0 +484 +484 +Package_BGA +Xilinx_SBG484 +Artix-7 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=270, NSMD pad definition Appendix A +BGA 484 0.8 SB484 SBG484 SBV484 +0 +484 +484 +Package_BGA +Xilinx_SBG485 +Zynq-7000 BGA, 22x22 grid, 19x19mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=80, NSMD pad definition Appendix A +BGA 484 0.8 SBG485 SBV485 +0 +484 +484 +Package_CSP +Analog_LFCSP-8-1EP_3x3mm_P0.5mm_EP1.53x1.85mm +LFCSP, exposed pad, Analog Devices (http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5542.pdf) +LFCSP 8 0.5 +0 +12 +5 +Package_CSP +LFCSP-8-1EP_3x2mm_P0.5mm_EP1.6x1.65mm +LFCSP 8pin Pitch 0.5mm, http://www.analog.com/media/en/package-pcb-resources/package/57080735642908cp_8_4.pdf +LFCSP 8pin thermal pad 3x2mm Pitch 0.5mm +0 +9 +9 +Package_CSP +LFCSP-8-1EP_3x3mm_P0.5mm_EP1.45x1.74mm +LFCSP, 8 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-8/CP_8_13.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +13 +9 +Package_CSP +LFCSP-8_2x2mm_P0.5mm +LFCSP 8pin Pitch 0.5mm, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_8_6.pdf +LFCSP 8pin 2x2mm Pitch 0.5mm +0 +8 +8 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.3x1.3mm +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_21.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +21 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.3x1.3mm_ThermalVias +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_21.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +26 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_22.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +21 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm_ThermalVias +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_22.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +26 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm +LFCSP, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/HMC7992.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +21 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm_ThermalVias +LFCSP, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/HMC7992.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +26 +17 +Package_CSP +LFCSP-16-1EP_3x3mm_P0.5mm_EP1.854x1.854mm +16-Lead Lead Frame Chip Scale Package, 3x3mm, 0.5mm pitch, 1.854mm thermal pad (CP-16-22, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_16_22.pdf) +LFCSP 16 0.5 +0 +21 +17 +Package_CSP +LFCSP-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm +LFCSP, 16 pin, 4x4mm, 2.1mm sq pad (http://www.analog.com/media/en/technical-documentation/data-sheets/ADG633.pdf) +LFCSP 16 0.65 +0 +21 +17 +Package_CSP +LFCSP-16-1EP_4x4mm_P0.65mm_EP2.4x2.4mm +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/cp-16-40.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +21 +17 +Package_CSP +LFCSP-16-1EP_4x4mm_P0.65mm_EP2.4x2.4mm_ThermalVias +LFCSP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/cp-16-40.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +31 +17 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.1x2.1mm +20-Lead Frame Chip Scale Package - 4x4x0.9 mm Body [LFCSP], (see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_20_6.pdf) +LFCSP 0.5 +0 +25 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +LFCSP, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +25 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +LFCSP, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +LFCSP DFN_QFN +0 +35 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +LFCSP, 20 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-20/CP_20_8.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +25 +21 +Package_CSP +LFCSP-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +LFCSP, 20 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-20/CP_20_8.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +35 +21 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.3x2.3mm +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_14.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +29 +25 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.3x2.3mm_ThermalVias +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_14.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +39 +25 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_7.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +29 +25 +Package_CSP +LFCSP-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +LFCSP, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_24_7.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +39 +25 +Package_CSP +LFCSP-28-1EP_5x5mm_P0.5mm_EP3.14x3.14mm +LFCSP, 28 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-28/CP_28_10.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +33 +29 +Package_CSP +LFCSP-28-1EP_5x5mm_P0.5mm_EP3.14x3.14mm_ThermalVias +LFCSP, 28 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-28/CP_28_10.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +43 +29 +Package_CSP +LFCSP-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +LFCSP, 32 Pin (https://www.analog.com/media/en/package-pcb-resources/package/414143737956480539664569cp_32_2.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +42 +33 +Package_CSP +LFCSP-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm_ThermalVias +LFCSP, 32 Pin (https://www.analog.com/media/en/package-pcb-resources/package/414143737956480539664569cp_32_2.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +59 +33 +Package_CSP +LFCSP-32-1EP_5x5mm_P0.5mm_EP3.25x3.25mm +32-Lead Frame Chip Scale Package LFCSP (5mm x 5mm); (see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-32/CP_32_27.pdf +LFCSP 0.5 +0 +37 +33 +Package_CSP +LFCSP-48-1EP_7x7mm_P0.5mm_EP4.1x4.1mm +LFCSP, 48 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_48_5.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +58 +49 +Package_CSP +LFCSP-48-1EP_7x7mm_P0.5mm_EP4.1x4.1mm_ThermalVias +LFCSP, 48 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_48_5.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +75 +49 +Package_CSP +LFCSP-64-1EP_9x9mm_P0.5mm_EP5.21x5.21mm +LFCSP, 64 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_64_7.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +69 +65 +Package_CSP +LFCSP-64-1EP_9x9mm_P0.5mm_EP5.21x5.21mm_ThermalVias +LFCSP, 64 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_64_7.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +86 +65 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP5.3x5.3mm +LFCSP, 72 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +82 +73 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP5.3x5.3mm_ThermalVias +LFCSP, 72 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1452_1451_1450.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP NoLead +0 +99 +73 +Package_CSP +LFCSP-72-1EP_10x10mm_P0.5mm_EP6.15x6.15mm +72-Lead Frame Chip Scale Package - 10x10x0.9 mm Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf) +LFCSP 0.5 +0 +77 +73 +Package_CSP +LFCSP-VQ-24-1EP_4x4mm_P0.5mm_EP2.642x2.642mm +LFCSP VQ, 24 pin, exposed pad, 4x4mm body, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf) +LFCSP 0.5 +0 +29 +25 +Package_CSP +LFCSP-VQ-48-1EP_7x7mm_P0.5mm +LFCSP VQ, 48 pin, exposed pad, 7x7mm body (http://www.analog.com/media/en/technical-documentation/data-sheets/AD7951.pdf, http://www.analog.com/en/design-center/packaging-quality-symbols-footprints/symbols-and-footprints/AD7951.html) +LFCSP 48 +0 +49 +49 +Package_CSP +LFCSP-WD-8-1EP_3x3mm_P0.65mm_EP1.6x2.44mm +LFCSP-WD, 8 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/CP_8_19.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP-WD NoLead +0 +15 +9 +Package_CSP +LFCSP-WD-8-1EP_3x3mm_P0.65mm_EP1.6x2.44mm_ThermalVias +LFCSP-WD, 8 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/CP_8_19.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP-WD NoLead +0 +22 +9 +Package_CSP +LFCSP-WD-10-1EP_3x3mm_P0.5mm_EP1.64x2.38mm +LFCSP-WD, 10 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-10/CP_10_9.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP-WD NoLead +0 +17 +11 +Package_CSP +LFCSP-WD-10-1EP_3x3mm_P0.5mm_EP1.64x2.38mm_ThermalVias +LFCSP-WD, 10 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-10/CP_10_9.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LFCSP-WD NoLead +0 +24 +11 +Package_CSP +ST_WLCSP-25_Die425 +WLCSP-25, 5x5 raster, 2.097x2.493mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l031f6.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-25_Die444 +WLCSP-25, 5x5 raster, 2.423x2.325mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f031k6.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-25_Die457 +WLCSP-25, 5x5 raster, 2.133x2.070mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf +BGA 25 0.4 +0 +25 +25 +Package_CSP +ST_WLCSP-36_Die417 +WLCSP-36, 6x6 raster, 2.61x2.88mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l052t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die440 +WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die445 +WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-36_Die458 +WLCSP-36, 6x6 raster, 2.553x2.579mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f410t8.pdf +BGA 36 0.4 +0 +36 +36 +Package_CSP +ST_WLCSP-49_Die423 +WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f401vc.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die431 +WLCSP-49, 7x7 raster, 2.999x3.185mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f411vc.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die433 +WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; see section 7.1.1 of http://www.st.com/resource/en/datasheet/stm32f401ce.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die435 +WLCSP-49, 7x7 raster, 3.141x3.127mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die438 +WLCSP-49, 7x7 raster, 3.89x3.74mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf +BGA 49 0.5 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die439 +WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f301r8.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die447 +WLCSP-49, 7x7 raster, 3.294x3.258mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l072kz.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-49_Die448 +WLCSP-49, 7x7 raster, 3.277x3.109mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f071v8.pdf +BGA 49 0.4 +0 +49 +49 +Package_CSP +ST_WLCSP-63_Die427 +WLCSP-63, 7x9 raster, 3.228x4.164mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf +BGA 63 0.4 +0 +63 +63 +Package_CSP +ST_WLCSP-64_Die414 +WLCSP-64, 8x8 raster, 4.466x4.395mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf +BGA 64 0.5 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die427 +WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die435 +WLCSP-64, 8x8 raster, 3.141x3.127mm package, pitch 0.35mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00257211.pdf +BGA 64 0.35 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die436 +WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zd.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die441 +WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00213872.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die442 +WLCSP-64, 8x8 raster, 3.347x3.585mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f091vb.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-64_Die462 +WLCSP-64, 8x8 raster, 3.357x3.657mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf +BGA 64 0.4 +0 +64 +64 +Package_CSP +ST_WLCSP-66_Die411 +WLCSP-66, 9x9 raster, 3.639x3.971mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf +BGA 66 0.4 +0 +66 +66 +Package_CSP +ST_WLCSP-66_Die432 +WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f378vc.pdf +BGA 66 0.4 +0 +66 +66 +Package_CSP +ST_WLCSP-72_Die415 +WLCSP-72, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf +BGA 72 0.4 +0 +72 +72 +Package_CSP +ST_WLCSP-81_Die415 +WLCSP-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-81_Die421 +WLCSP-81, 9x9 raster, 3.693x3.815mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-81_Die463 +WLCSP-81, 9x9 raster, 4.039x3.951mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf +BGA 81 0.4 +0 +81 +81 +Package_CSP +ST_WLCSP-90_Die413 +WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.4mm; see section 6.1 of http://www.st.com/resource/en/datasheet/stm32f405og.pdf +BGA 90 0.4 +0 +90 +90 +Package_CSP +ST_WLCSP-100_Die422 +WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f302vc.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die446 +WLCSP-100, 10x10 raster, 4.775x5.041mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303zd.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die452 +WLCSP-100, 10x10 raster, 4.201x4.663mm package, pitch 0.4mm; see section 7.7 of http://www.st.com/resource/en/datasheet/DM00330506.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-100_Die461 +WLCSP-100, 10x10 raster, 4.618x4.142mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00284211.pdf +BGA 100 0.4 +0 +100 +100 +Package_CSP +ST_WLCSP-104_Die437 +WLCSP-104, 9x12 raster, 4.095x5.094mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf +BGA 104 0.4 +0 +104 +104 +Package_CSP +ST_WLCSP-143_Die419 +WLCSP-143, 11x13 raster, 4.521x5.547mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf +BGA 143 0.4 +0 +143 +143 +Package_CSP +ST_WLCSP-143_Die449 +WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf +BGA 143 0.4 +0 +143 +143 +Package_CSP +ST_WLCSP-144_Die470 +WLCSP-144, 12x12 raster, 5.24x5.24mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf +BGA 144 0.4 +0 +144 +144 +Package_CSP +ST_WLCSP-168_Die434 +WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf +BGA 168 0.4 +0 +168 +168 +Package_CSP +ST_WLCSP-180_Die451 +WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.4mm; see section 6.6 of http://www.st.com/resource/en/datasheet/DM00273119.pdf +BGA 180 0.4 +0 +180 +180 +Package_CSP +WLCSP-6_1.4x1.0mm_P0.4mm +6pin Pitch 0.4mm +6pin Pitch 0.4mm WLCSP +0 +6 +6 +Package_CSP +WLCSP-8_1.58x1.63x0.35mm_Layout3x5_P0.35x0.4mm_Ball0.25mm_Pad0.25mm_NSMD +WLCSP/XFBGA 8-pin package, staggered pins, http://www.adestotech.com/wp-content/uploads/DS-AT25DF041B_040.pdf +WLCSP WLCSP-8 XFBGA XFBGA-8 CSP BGA Chip-Scale Glass-Top +0 +8 +8 +Package_CSP +WLCSP-12_1.56x1.56mm_P0.4mm +WLCSP 12 1.56x1.56 https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMM150-DS001-01.pdf +BMM150 WLCSP +0 +12 +12 +Package_CSP +WLCSP-12_1.403x1.555mm_P0.4mm_Stagger +WLCSP-12, 6x4 raster staggered array, 1.403x1.555mm package, pitch 0.4mm; http://ww1.microchip.com/downloads/en/devicedoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=208 +CSP 12 0.2x0.346333 +0 +12 +12 +Package_CSP +WLCSP-16_4x4_B2.17x2.32mm_P0.5mm +WLCSP-16, http://www.nxp.com/documents/data_sheet/LPC1102_1104.pdf, http://www.nxp.com/assets/documents/data/en/application-notes/AN3846.pdf +WLCSP-16 NXP +0 +16 +16 +Package_CSP +WLCSP-20_1.934x2.434mm_Layout4x5_P0.4mm +WLCSP-20, 4x5 raster, 1.934x2.434mm package, pitch 0.4mm; see section 36.2.3 of http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42363-SAM-D11_Datasheet.pdf +BGA 20 0.4 +0 +20 +20 +Package_CSP +WLCSP-20_1.994x1.94mm_Layout4x5_P0.4mm +WLCSP-20, https://www.nxp.com/docs/en/package-information/98ASA00539D.pdf +WLCSP-20 +0 +20 +20 +Package_CSP +WLCSP-20_1.994x1.609mm_Layout5x4_P0.4mm +WLCSP-20, https://www.nxp.com/docs/en/package-information/98ASA00676D.pdf +WLCSP-20 +0 +20 +20 +Package_CSP +WLCSP-36_2.82x2.67mm_Layout6x6_P0.4mm +WLCSP-36, https://www.nxp.com/docs/en/package-information/98ASA00949D.pdf +WLCSP-36 +0 +36 +36 +Package_CSP +WLCSP-36_2.374x2.459mm_Layout6x6_P0.35mm +WLCSP-36, https://www.nxp.com/docs/en/package-information/98ASA00604D.pdf +WLCSP-36 +0 +36 +36 +Package_CSP +WLCSP-56_3.170x3.444mm_Layout7x8_P0.4mm +WLCSP-56, 7x8 raster, 3.170x3.444mm package, pitch 0.4mm; see section 48.2.4 of http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001479B.pdf +BGA 56 0.4 +0 +56 +56 +Package_CSP +WLCSP-81_4.41x3.76mm_P0.4mm +WLCSP-81, 9x9, 0.4mm Pitch, http://www.st.com/content/ccc/resource/technical/document/technical_note/92/30/3c/a1/4c/bb/43/6f/DM00103228.pdf/files/DM00103228.pdf/jcr:content/translations/en.DM00103228.pdf +WLCSP ST +0 +81 +81 +Package_CSP +pSemi_CSP-16_1.64x2.04mm_P0.4mm +pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf) +psemi csp 16 +0 +16 +16 +Package_CSP +pSemi_CSP-16_1.64x2.04mm_P0.4mm_Pad0.18mm +pSemi CSP-16 1.64x2.04x0.285mm (http://www.psemi.com/pdf/datasheets/pe29101ds.pdf, http://www.psemi.com/pdf/app_notes/an77.pdf) +psemi csp 16 +0 +16 +16 +Package_DFN_QFN +AMS_QFN-4-1EP_2x2mm_P0.95mm_EP0.7x1.6mm +UFD Package, 4-Lead Plastic QFN (2mm x 2mm), http://ams.com/eng/content/download/950231/2267959/483138 +QFN 0.95 +0 +6 +5 +Package_DFN_QFN +Cypress_QFN-56-1EP_8x8mm_P0.5mm_EP6.22x6.22mm_ThermalVias +56-Lead Plastic Quad Flat, No Lead Package (ML) - 8x8x0.9 mm Body [QFN] (see datasheet at http://www.cypress.com/file/138911/download and app note at http://www.cypress.com/file/140006/download) +QFN 0.5 +0 +87 +57 +Package_DFN_QFN +DFN-6-1EP_1.2x1.2mm_P0.4mm_EP0.3x0.94mm_PullBack +DFN, 6 Pin (http://www.onsemi.com/pub/Collateral/NCP133-D.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_2x1.8mm_P0.5mm_EP1.2x1.6mm +DFN, 6 Pin (https://www.diodes.com/assets/Package-Files/U-DFN2018-6.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +11 +7 +Package_DFN_QFN +DFN-6-1EP_2x2mm_P0.5mm_EP0.6x1.37mm +DFN, 6 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/05081703_C_DC6.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_2x2mm_P0.5mm_EP0.61x1.42mm +DC6 Package; 6-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_6_05-08-1703.pdf) +DFN 0.5 +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm +6-Lead Plastic Dual Flat, No Lead Package (MA) - 2x2x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.65 +0 +9 +7 +Package_DFN_QFN +DFN-6-1EP_3x2mm_P0.5mm_EP1.65x1.35mm +DFN, 6 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/(DCB6)%20DFN%2005-08-1715%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +11 +7 +Package_DFN_QFN +DFN-6-1EP_3x3mm_P0.95mm_EP1.7x2.6mm +DFN6 3*3 MM, 0.95 PITCH; CASE 506AH-01 (see ON Semiconductor 506AH.PDF) +DFN 0.95 +0 +13 +7 +Package_DFN_QFN +DFN-6-1EP_3x3mm_P1mm_EP1.5x2.4mm +DFN, 6 Pin (https://www.silabs.com/documents/public/data-sheets/Si7020-A20.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +11 +7 +Package_DFN_QFN +DFN-6_1.3x1.2mm_P0.4mm +6-Lead Plastic DFN (1.3mm x 1.2mm) +DFN 0.4 +0 +6 +6 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm +DFN, 8 Pin (https://www.qorvo.com/products/d/da001879), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.7x1.3mm +DFN, 8 Pin (https://www.onsemi.com/pub/Collateral/NUF4401MN-D.PDF#page=6), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.3mm +DFN, 8 Pin (https://www.onsemi.com/pub/Collateral/NB3N551-D.PDF#page=7), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.5mm +DFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8127-AVR-8-bit-Microcontroller-ATtiny4-ATtiny5-ATtiny9-ATtiny10_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm +DFN, 8 Pin (https://www.st.com/resource/en/datasheet/lm2903.pdf#page=16), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +10 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm +DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF) +DFN 0.5 +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x2mm_P0.45mm_EP0.64x1.38mm +DC8 Package 8-Lead Plastic DFN (2mm x 2mm) (see Linear Technology DFN_8_05-08-1719.pdf) +DFN 0.45 +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x3mm_P0.5mm_EP0.56x2.15mm +DFN, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/2451fg.pdf#page=17), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +11 +9 +Package_DFN_QFN +DFN-8-1EP_2x3mm_P0.5mm_EP0.61x2.2mm +DDB Package; 8-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_8_05-08-1702.pdf) +DFN 0.5 +0 +12 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.5mm +8-Lead Plastic Dual Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body [UDFN] (see Atmel-8815-SEEPROM-AT24CS01-02-Datasheet.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.7x1.4mm +DFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_DFN_2x3x0_9_MC_C04-123C.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.36x1.46mm +8-Lead Plastic Dual Flat, No Lead Package (8MA2) - 2x3x0.6 mm Body (http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm +8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x2mm_P0.45mm_EP1.66x1.36mm +DCB Package 8-Lead Plastic DFN (2mm x 3mm) (see Linear Technology DFN_8_05-08-1718.pdf) +DFN 0.45 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.5mm_EP1.66x2.38mm +DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf) +DFN 0.5 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.65mm_EP1.7x2.05mm +DFN, 8 Pin (http://www.ixysic.com/home/pdfs.nsf/www/IX4426-27-28.pdf/$file/IX4426-27-28.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_3x3mm_P0.65mm_EP1.55x2.4mm +8-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.65 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_4x4mm_P0.8mm_EP2.3x3.24mm +DFN, 8 Pin (https://www.st.com/resource/en/datasheet/ld1086.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_4x4mm_P0.8mm_EP2.5x3.6mm +8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.8 +0 +15 +9 +Package_DFN_QFN +DFN-8-1EP_4x4mm_P0.8mm_EP2.39x2.21mm +8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF) +DFN 0.8 +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_6x5mm_P1.27mm_EP2x2mm +DD Package; 8-Lead Plastic DFN (6mm x 5mm) (see http://www.everspin.com/file/236/download) +dfn +0 +13 +9 +Package_DFN_QFN +DFN-8-1EP_6x5mm_P1.27mm_EP4x4mm +DD Package; 8-Lead Plastic DFN (6mm x 5mm) (see http://www.everspin.com/file/236/download) +dfn +0 +25 +9 +Package_DFN_QFN +DFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P; No exposed pad - Ref http://pdfserv.maximintegrated.com/land_patterns/90-0349.PDF +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm +DDB Package; 10-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_10_05-08-1722.pdf) +DFN 0.5 +0 +13 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.7x2.5mm +DFN, 10 Pin (https://www.monolithicpower.com/pub/media/document/MPQ2483_r1.05.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +15 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm +10-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +15 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.65x2.38mm +DFN, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3471fb.pdf#page=15), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +15 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.65x2.38mm_ThermalVias +DFN, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3471fb.pdf#page=15), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +22 +11 +Package_DFN_QFN +DFN-10-1EP_3x3mm_P0.5mm_EP1.75x2.7mm +10-Lead Plastic Dual Flat No-Lead Package, 3x3mm Body (see Atmel Appnote 8826) +DFN 0.5 +0 +15 +11 +Package_DFN_QFN +DFN-10_2x2mm_P0.4mm +10-Lead Plastic DFN (2mm x 2mm) 0.40mm pitch +DFN 10 0.4mm +0 +10 +10 +Package_DFN_QFN +DFN-12-1EP_2x3mm_P0.45mm_EP0.64x2.4mm +DDB Package; 12-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_12_05-08-1723.pdf) +DFN 0.45 +0 +15 +13 +Package_DFN_QFN +DFN-12-1EP_3x3mm_P0.5mm_EP2.05x2.86mm +10-Lead Plastic Dual Flat, No Lead Package (MF) - 3x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +17 +13 +Package_DFN_QFN +DFN-12-1EP_3x3mm_P0.45mm_EP1.66x2.38mm +DD Package; 12-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_12_05-08-1725.pdf) +DFN 0.45 +0 +17 +13 +Package_DFN_QFN +DFN-12-1EP_3x4mm_P0.5mm_EP1.7x3.3mm +DE/UE Package; 12-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_12_05-08-1695.pdf) +DFN 0.5 +0 +21 +13 +Package_DFN_QFN +DFN-12-1EP_4x4mm_P0.5mm_EP2.66x3.38mm +DF Package; 12-Lead Plastic DFN (4mm x 4mm) (see Linear Technology 05081733_A_DF12.pdf) +DFN 0.5 +0 +21 +13 +Package_DFN_QFN +DFN-12-1EP_4x4mm_P0.65mm_EP2.64x3.54mm +DFN12, 4x4, 0.65P; CASE 506CE (see ON Semiconductor 506CE.PDF) +DFN 0.65 +0 +21 +13 +Package_DFN_QFN +DFN-14-1EP_3x3mm_P0.4mm_EP1.78x2.35mm +DD Package; 14-Lead Plastic DFN (3mm x 3mm) (http://pdfserv.maximintegrated.com/land_patterns/90-0063.PDF) +DFN 0.40 +0 +19 +15 +Package_DFN_QFN +DFN-14-1EP_3x4.5mm_P0.65mm_EP1.65x4.25mm +14-lead very thin plastic quad flat, 3.0x4.5mm size, 0.65mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/14L_VDFN_4_5x3_0mm_JHA_C041198A.pdf) +VDFN DFN 0.65mm +0 +23 +15 +Package_DFN_QFN +DFN-14-1EP_3x4.5mm_P0.65mm_EP1.65x4.25mm_ThermalVias +14-lead very thin plastic quad flat, 3.0x4.5mm size, 0.65mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/14L_VDFN_4_5x3_0mm_JHA_C041198A.pdf) +VDFN DFN 0.65mm +0 +33 +15 +Package_DFN_QFN +DFN-14-1EP_3x4mm_P0.5mm_EP1.7x3.3mm +DE Package; 14-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_14_05-08-1708.pdf) +DFN 0.5 +0 +23 +15 +Package_DFN_QFN +DFN-14-1EP_4x4mm_P0.5mm_EP2.86x3.6mm +DFN14, 4x4, 0.5P; CASE 506CM (see ON Semiconductor 506CM.PDF) +DFN 0.5 +0 +23 +15 +Package_DFN_QFN +DFN-16-1EP_3x4mm_P0.45mm_EP1.7x3.3mm +DE Package; 16-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_16_05-08-1732.pdf) +DFN 0.45 +0 +25 +17 +Package_DFN_QFN +DFN-16-1EP_3x5mm_P0.5mm_EP1.66x4.4mm +DHC Package; 16-Lead Plastic DFN (5mm x 3mm) (see Linear Technology DFN_16_05-08-1706.pdf) +DFN 0.5 +0 +27 +17 +Package_DFN_QFN +DFN-16-1EP_4x5mm_P0.5mm_EP2.44x4.34mm +DHD Package; 16-Lead Plastic DFN (5mm x 4mm) (see Linear Technology 05081707_A_DHD16.pdf) +DFN 0.5 +0 +25 +17 +Package_DFN_QFN +DFN-16-1EP_5x5mm_P0.5mm_EP3.46x4mm +DH Package; 16-Lead Plastic DFN (5mm x 5mm) (see Linear Technology DFN_16_05-08-1709.pdf) +DFN 0.5 +0 +26 +17 +Package_DFN_QFN +DFN-18-1EP_3x5mm_P0.5mm_EP1.66x4.4mm +DHC Package; 18-Lead Plastic DFN (5mm x 3mm) (see Linear Technology 05081955_0_DHC18.pdf) +DFN 0.5 +0 +29 +19 +Package_DFN_QFN +DFN-18-1EP_4x5mm_P0.5mm_EP2.44x4.34mm +DHD Package; 18-Lead Plastic DFN (5mm x 4mm) (see Linear Technology DFN_18_05-08-1778.pdf) +DFN 0.5 +0 +27 +19 +Package_DFN_QFN +DFN-20-1EP_5x6mm_P0.5mm_EP3.24x4.24mm +DFN20, 6x5, 0.5P; CASE 505AB (see ON Semiconductor 505AB.PDF) +DFN 0.5 +0 +33 +21 +Package_DFN_QFN +DFN-22-1EP_5x6mm_P0.5mm_EP3.14x4.3mm +DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 506AF.PDF) +DFN 0.5 +0 +35 +23 +Package_DFN_QFN +DFN-24-1EP_4x7mm_P0.5mm_EP2.64x6.44mm +DKD Package; 24-Lead Plastic DFN (7mm x 4mm) (see Linear Technology DFN_24_05-08-1864.pdf) +DFN 0.5 +0 +35 +25 +Package_DFN_QFN +DFN-32-1EP_4x7mm_P0.4mm_EP2.64x6.44mm +DKD Package; 32-Lead Plastic DFN (7mm x 4mm) (see Linear Technology DFN_32_05-08-1734.pdf) +DFN 0.4 +0 +43 +33 +Package_DFN_QFN +DFN-44-1EP_5x8.9mm_P0.4mm_EP3.7x8.4mm +DFN44 8.9x5, 0.4P; CASE 506BU-01 (see ON Semiconductor 506BU.PDF) +DFN 0.4 +0 +63 +45 +Package_DFN_QFN +DFN-S-8-1EP_6x5mm_P1.27mm +8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 1.27 +0 +16 +9 +Package_DFN_QFN +Diodes_DFN1006-3 +DFN package size 1006 3 pins +DFN package size 1006 3 pins +0 +3 +3 +Package_DFN_QFN +Diodes_UDFN-10_1.0x2.5mm_P0.5mm +U-DFN2510-10 package used by Diodes Incorporated (https://www.diodes.com/assets/Package-Files/U-DFN2510-10-Type-CJ.pdf) +UDFN-10 U-DFN2510-10 Diodes +0 +10 +10 +Package_DFN_QFN +Diodes_UDFN2020-6_Type-F +U-DFN2020-6 (Type F) (https://www.diodes.com/assets/Package-Files/U-DFN2020-6-Type-F.pdf) +U-DFN2020-6 (Type F) +0 +8 +8 +Package_DFN_QFN +HVQFN-16-1EP_3x3mm_P0.5mm_EP1.5x1.5mm +HVQFN, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT758-1.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +HVQFN NoLead +0 +21 +17 +Package_DFN_QFN +HVQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +HVQFN, 24 Pin (https://www.nxp.com/docs/en/package-information/SOT616-3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +HVQFN NoLead +0 +29 +25 +Package_DFN_QFN +HVQFN-24-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +HVQFN, 24 Pin (https://www.nxp.com/docs/en/package-information/SOT616-3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +HVQFN NoLead +0 +39 +25 +Package_DFN_QFN +HVQFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +HVQFN, 24 Pin (https://www.nxp.com/docs/en/package-information/SOT616-3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +HVQFN NoLead +0 +34 +25 +Package_DFN_QFN +HVQFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +HVQFN, 24 Pin (https://www.nxp.com/docs/en/package-information/SOT616-3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +HVQFN NoLead +0 +39 +25 +Package_DFN_QFN +Infineon_MLPQ-16-14-1EP_4x4mm_P0.5mm +MLPQ 32 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +mlpq 32 7x7mm +0 +19 +15 +Package_DFN_QFN +Infineon_MLPQ-40-32-1EP_7x7mm_P0.5mm +MLPQ 32 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +mlpq 32 7x7mm +0 +76 +33 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_EP5.55x5.55mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2093mpbf.pdf?fileId=5546d462533600a401535675fb892793) +mlpq 32 7x7mm +0 +113 +49 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_Pad5.15x5.15mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2052mpbf.pdf?fileId=5546d462533600a401535675d3b32788) +mlpq 32 7x7mm +0 +117 +49 +Package_DFN_QFN +Infineon_MLPQ-48-1EP_7x7mm_P0.5mm_Pad5.55x5.55mm +MLPQ 48 leads, 7x7mm (https://www.infineon.com/dgdl/irs2093mpbf.pdf?fileId=5546d462533600a401535675fb892793) +mlpq 32 7x7mm +0 +117 +49 +Package_DFN_QFN +Infineon_PQFN-22-15-4EP_6x5mm_P0.65mm +PQFN 22 leads, 5x6mm, 0.127mm stencil (https://www.infineon.com/dgdl/ir4301.pdf?fileId=5546d462533600a4015355d5fc691819, https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +pqfn 22 5x6mm +0 +56 +15 +Package_DFN_QFN +Infineon_PQFN-44-31-5EP_7x7mm_P0.5mm +PQFN 44 leads, 7x7mm, 0.127mm stencil (https://www.infineon.com/dgdl/ir4302.pdf?fileId=5546d462533600a4015355d602a9181d, https://www.infineon.com/dgdl/Infineon-AN1170-AN-v05_00-EN.pdf?fileId=5546d462533600a40153559ac3e51134) +pqfn 44 7x7mm +0 +125 +27 +Package_DFN_QFN +Linear_DE14MA +14-Lead Plastic DFN, 4mm x 3mm (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-dfn/05081731_C_DE14MA.pdf) +DFN 0.5 +0 +14 +14 +Package_DFN_QFN +Linear_UGK52_QFN-46-52 +Linear UKG52(46) package, QFN-52-1EP variant (see http://cds.linear.com/docs/en/datasheet/3886fe.pdf) +QFN 0.5 +0 +62 +47 +Package_DFN_QFN +MLF-6-1EP_1.6x1.6mm_P0.5mm_EP0.5x1.26mm +MLF, 6 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5353.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +MLF NoLead +0 +9 +7 +Package_DFN_QFN +MLF-8-1EP_3x3mm_P0.65mm_EP1.55x2.3mm +8-Pin ePad 3mm x 3mm MLF - 3x3x0.85 mm Body (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf) +DFN MLF 0.65 +0 +12 +9 +Package_DFN_QFN +MLF-8-1EP_3x3mm_P0.65mm_EP1.55x2.3mm_ThermalVias +8-Pin ePad 3mm x 3mm MLF - 3x3x0.85 mm Body (see Microchip datasheet http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf) +DFN MLF 0.65 +0 +15 +9 +Package_DFN_QFN +MLF-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +MLF, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=263), generated with kicad-footprint-generator ipc_noLead_generator.py +MLF NoLead +0 +25 +21 +Package_DFN_QFN +MLF-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +MLF, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=263), generated with kicad-footprint-generator ipc_noLead_generator.py +MLF NoLead +0 +30 +21 +Package_DFN_QFN +MLPQ-16-1EP_4x4mm_P0.65mm_EP2.8x2.8mm +Micro Leadframe Package, 16 pin with exposed pad +MLPQ- 0.65 +0 +21 +17 +Package_DFN_QFN +Micrel_MLF-8-1EP_2x2mm_P0.5mm_EP0.8x1.3mm_ThermalVias +http://ww1.microchip.com/downloads/en/DeviceDoc/mic2290.pdf +mlf 8 2x2 mm +0 +14 +9 +Package_DFN_QFN +Microchip_8E-16 +16-Lead Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN Microchip 8E 16 +0 +20 +17 +Package_DFN_QFN +Microchip_DRQFN-44-1EP_5x5mm_P0.7mm_EP2.65x2.65mm +QFN, 44 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/44L_VQFN_5x5mm_Dual_Row_%5BS3B%5D_C04-21399a.pdf) +QFN dual row +0 +49 +45 +Package_DFN_QFN +Microchip_DRQFN-44-1EP_5x5mm_P0.7mm_EP2.65x2.65mm_ThermalVias +QFN, 44 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/44L_VQFN_5x5mm_Dual_Row_%5BS3B%5D_C04-21399a.pdf) +QFN dual row +0 +59 +45 +Package_DFN_QFN +Microchip_DRQFN-64-1EP_7x7mm_P0.65mm_EP4.1x4.1mm +QFN, 64 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_7x7_Dual_Row_%5BSVB%5D_C04-21420a.pdf) +QFN dual row +0 +74 +65 +Package_DFN_QFN +Microchip_DRQFN-64-1EP_7x7mm_P0.65mm_EP4.1x4.1mm_ThermalVias +QFN, 64 Pin, dual row (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_7x7_Dual_Row_%5BSVB%5D_C04-21420a.pdf) +QFN dual row +0 +91 +65 +Package_DFN_QFN +Microsemi_QFN-40-32-2EP_6x8mm_P0.5mm +40-Lead (32-Lead Populated) Plastic Quad Flat, No Lead Package - 6x8x0.9mm Body (https://www.microsemi.com/document-portal/doc_download/131677-pd70224-data-sheet) +QFN 0.5 +0 +92 +34 +Package_DFN_QFN +Mini-Circuits_DL805 +https://ww2.minicircuits.com/case_style/DL805.pdf +RF Switch +0 +11 +9 +Package_DFN_QFN +Mini-Circuits_FG873-4_3x3mm +Mini Circuits Case style FG (https://ww2.minicircuits.com/case_style/FG873.pdf) +FG873 +0 +4 +4 +Package_DFN_QFN +Nordic_AQFN-73-1EP_7x7mm_P0.5mm +http://infocenter.nordicsemi.com/index.jsp?topic=%2Fcom.nordic.infocenter.nrf52%2Fdita%2Fnrf52%2Fchips%2Fnrf52840.html +AQFN 7mm +0 +78 +74 +Package_DFN_QFN +OnSemi_DFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P (https://www.onsemi.com/pub/Collateral/511AT.PDF) +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +OnSemi_UDFN-8_1.2x1.8mm_P0.4mm +8-Lead Plastic Dual Flat, No Lead Package, 1.2x1.8x1.55 mm Body [UDFN] (See http://www.onsemi.com/pub/Collateral/NLSV2T244-D.PDF) +dfn udfn dual flat +0 +8 +8 +Package_DFN_QFN +OnSemi_VCT-28_3.5x3.5mm_P0.4mm +OnSemi VCT, 28 Pin (http://www.onsemi.com/pub/Collateral/601AE.PDF), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +OnSemi VCT DFN_QFN +0 +28 +28 +Package_DFN_QFN +Panasonic_HQFN-16-1EP_4x4mm_P0.65mm_EP2.9x2.9mm +Panasonic HQFN-16, 4x4x0.85mm (https://industrial.panasonic.com/content/data/SC/ds/ds7/c0/PKG_HQFN016-A-0404XZL_EN.pdf) +panasonic hqfn +0 +37 +17 +Package_DFN_QFN +Panasonic_HSON-8_8x8mm_P2.00mm +Panasonic HSON-8, 8x8x1.25mm (https://industrial.panasonic.com/content/data/SC/ds/ds7/c0/PKG_HSON008-A-0808XXI_EN.pdf) +panasonic hson +0 +27 +9 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.5mm_EP1.65x1.65mm +QFN, 12 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_12_%2005-08-1855.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +17 +13 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.5mm_EP1.65x1.65mm_ThermalVias +QFN, 12 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_12_%2005-08-1855.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +22 +13 +Package_DFN_QFN +QFN-12-1EP_3x3mm_P0.51mm_EP1.45x1.45mm +QFN, 12 Pin (https://ww2.minicircuits.com/case_style/DQ1225.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +17 +13 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm +QFN, 16 Pin (https://www.st.com/resource/en/datasheet/tsv521.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm_ThermalVias +QFN, 16 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +QFN DFN_QFN +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.9x1.9mm +QFN, 16 Pin (https://www.nxp.com/docs/en/package-information/98ASA00525D.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.9x1.9mm_ThermalVias +QFN, 16 Pin (https://www.nxp.com/docs/en/package-information/98ASA00525D.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +26 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm +QFN, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm_ThermalVias +QFN, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +26 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm +QFN, 16 Pin (https://www.onsemi.com/pub/Collateral/NCN4555-D.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm_ThermalVias +QFN, 16 Pin (https://www.onsemi.com/pub/Collateral/NCN4555-D.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +26 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.5mm_EP2.45x2.45mm +QFN, 16 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/isl8117.pdf#page=22), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.5mm_EP2.45x2.45mm_ThermalVias +QFN, 16 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/isl8117.pdf#page=22), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm +QFN, 16 Pin (http://www.thatcorp.com/datashts/THAT_1580_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm_ThermalVias +QFN, 16 Pin (http://www.thatcorp.com/datashts/THAT_1580_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.5x2.5mm +QFN, 16 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=266), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.5x2.5mm_ThermalVias +QFN, 16 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=266), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm +QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_PullBack +QFN, 16 Pin (https://ams.com/documents/20143/36005/AS5055A_DS000304_2-00.pdf#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_PullBack_ThermalVias +QFN, 16 Pin (https://ams.com/documents/20143/36005/AS5055A_DS000304_2-00.pdf#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.15x2.15mm +QFN, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4001f.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_4x4mm_P0.65mm_EP2.15x2.15mm_ThermalVias +QFN, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4001f.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-16-1EP_5x5mm_P0.8mm_EP2.7x2.7mm +QFN, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +QFN-16-1EP_5x5mm_P0.8mm_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm +QFN, 20 Pin (http://www.ti.com/lit/ml/mpqf239/mpqf239.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm_ThermalVias +QFN, 20 Pin (http://www.ti.com/lit/ml/mpqf239/mpqf239.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm +QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm_ThermalVias +QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.45mm_EP1.6x1.6mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=212), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x3mm_P0.45mm_EP1.6x1.6mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=212), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm_ThermalVias +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +32 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=274), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=274), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=164), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc2535.pdf#page=164), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.7x2.7mm +QFN, 20 Pin (https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_4x4mm_P0.5mm_EP2.7x2.7mm_ThermalVias +QFN, 20 Pin (https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +30 +21 +Package_DFN_QFN +QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1711.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +27 +21 +Package_DFN_QFN +QFN-20-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 20 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1711.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +40 +21 +Package_DFN_QFN +QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=276), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm_ThermalVias +QFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=276), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +21 +Package_DFN_QFN +QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm +QFN, 24 Pin (https://www.invensense.com/wp-content/uploads/2015/02/PS-MPU-9250A-01-v1.1.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm_ThermalVias +QFN, 24 Pin (https://www.invensense.com/wp-content/uploads/2015/02/PS-MPU-9250A-01-v1.1.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +34 +25 +Package_DFN_QFN +QFN-24-1EP_3x4mm_P0.4mm_EP1.65x2.65mm +QFN, 24 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +25 +Package_DFN_QFN +QFN-24-1EP_3x4mm_P0.4mm_EP1.65x2.65mm_ThermalVias +QFN, 24 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_20_05-08-1742.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +38 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +QFN, 24 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=278), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +QFN, 24 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=278), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.6mm +QFN, 24 Pin (https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.6mm_ThermalVias +QFN, 24 Pin (https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm +QFN, 24 Pin (http://www.alfarzpp.lv/eng/sc/AS3330.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm_ThermalVias +QFN, 24 Pin (http://www.alfarzpp.lv/eng/sc/AS3330.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm +QFN, 24 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/hmc431.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/hmc431.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.65x2.65mm +QFN, 24 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_4x4mm_P0.5mm_EP2.65x2.65mm_ThermalVias +QFN, 24 Pin (http://www.cypress.com/file/46236/download), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_24_05-08-1696.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +25 +Package_DFN_QFN +QFN-24-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_24_05-08-1696.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +44 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.2x3.2mm +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UH24)%20QFN%2005-08-1747%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.2x3.2mm_ThermalVias +QFN, 24 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UH24)%20QFN%2005-08-1747%20Rev%20A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +51 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.4x3.4mm +QFN, 24 Pin (http://www.thatcorp.com/datashts/THAT_5173_Datasheet.pdf#page=17), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.4x3.4mm_ThermalVias +QFN, 24 Pin (http://www.thatcorp.com/datashts/THAT_5173_Datasheet.pdf#page=17), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.6x3.6mm +QFN, 24 Pin (https://www.nxp.com/docs/en/package-information/98ASA00734D.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +34 +25 +Package_DFN_QFN +QFN-24-1EP_5x5mm_P0.65mm_EP3.6x3.6mm_ThermalVias +QFN, 24 Pin (https://www.nxp.com/docs/en/package-information/98ASA00734D.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +67 +25 +Package_DFN_QFN +QFN-28-1EP_3x6mm_P0.5mm_EP1.7x4.75mm +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081926_0_UDE28.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +37 +29 +Package_DFN_QFN +QFN-28-1EP_3x6mm_P0.5mm_EP1.7x4.75mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081926_0_UDE28.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +53 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.3x2.3mm +QFN, 28 Pin (http://www.issi.com/WW/pdf/31FL3731.pdf#page=21), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.3x2.3mm_ThermalVias +QFN, 28 Pin (http://www.issi.com/WW/pdf/31FL3731.pdf#page=21), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.4x2.4mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=280), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.4x2.4mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=280), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.6x2.6mm +QFN, 28 Pin (package code T2844-1; https://pdfserv.maximintegrated.com/package_dwgs/21-0139.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.4mm_EP2.6x2.6mm_ThermalVias +QFN, 28 Pin (package code T2844-1; https://pdfserv.maximintegrated.com/package_dwgs/21-0139.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=16), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +QFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=16), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm +QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +29 +Package_DFN_QFN +QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +48 +29 +Package_DFN_QFN +QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=283), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=283), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +55 +29 +Package_DFN_QFN +QFN-28-1EP_5x6mm_P0.5mm_EP3.65x4.65mm +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081932_0_UHE28.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +41 +29 +Package_DFN_QFN +QFN-28-1EP_5x6mm_P0.5mm_EP3.65x4.65mm_ThermalVias +QFN, 28 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081932_0_UHE28.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +62 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm +QFN, 28 Pin (https://www.semtech.com/uploads/documents/sx1272.pdf#page=125), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm_ThermalVias +QFN, 28 Pin (https://www.semtech.com/uploads/documents/sx1272.pdf#page=125), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +71 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.25x4.25mm +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=289), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +38 +29 +Package_DFN_QFN +QFN-28-1EP_6x6mm_P0.65mm_EP4.25x4.25mm_ThermalVias +QFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=289), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +71 +29 +Package_DFN_QFN +QFN-28_4x4mm_P0.5mm +QFN, 28 Pin (http://www.st.com/resource/en/datasheet/stm32f031k6.pdf#page=90), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +28 +28 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8153-8-and-16-bit-avr-microcontroller-xmega-e-atxmega8e5-atxmega16e5-atxmega32e5_datasheet.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +37 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/atmel-8153-8-and-16-bit-avr-microcontroller-xmega-e-atxmega8e5-atxmega16e5-atxmega32e5_datasheet.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.65x2.65mm +QFN, 32 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/l32.4x4a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +37 +33 +Package_DFN_QFN +QFN-32-1EP_4x4mm_P0.4mm_EP2.65x2.65mm_ThermalVias +QFN, 32 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/l32.4x4a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=20), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8008S.pdf#page=20), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf#page=68), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf#page=68), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.6x3.6mm +QFN, 32 Pin (http://infocenter.nordicsemi.com/pdf/nRF52810_PS_v1.1.pdf#page=468), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.6x3.6mm_ThermalVias +QFN, 32 Pin (http://infocenter.nordicsemi.com/pdf/nRF52810_PS_v1.1.pdf#page=468), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mm +QFN, 32 Pin (https://www.espressif.com/sites/default/files/documentation/0a-esp8285_datasheet_en.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +37 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mm_ThermalVias +QFN, 32 Pin (https://www.espressif.com/sites/default/files/documentation/0a-esp8285_datasheet_en.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.45x3.45mm +QFN, 32 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_32_05-08-1693.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.45x3.45mm_ThermalVias +QFN, 32 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_32_05-08-1693.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.65x3.65mm +QFN, 32 Pin (https://www.exar.com/ds/mxl7704.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +QFN-32-1EP_5x5mm_P0.5mm_EP3.65x3.65mm_ThermalVias +QFN, 32 Pin (https://www.exar.com/ds/mxl7704.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.7x4.7mm +QFN, 32 Pin (https://www.nxp.com/docs/en/data-sheet/LPC111X.pdf#page=108), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.7x4.7mm_ThermalVias +QFN, 32 Pin (https://www.nxp.com/docs/en/data-sheet/LPC111X.pdf#page=108), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +75 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.65x4.65mm +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8209-8-bit%20AVR%20ATmega16M1-32M1-64M1_Datasheet.pdf#page=426), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP4.65x4.65mm_ThermalVias +QFN, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8209-8-bit%20AVR%20ATmega16M1-32M1-64M1_Datasheet.pdf#page=426), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +75 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP5.4x5.4mm +QFN, 32 Pin (http://www.thatcorp.com/datashts/THAT_5171_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +49 +33 +Package_DFN_QFN +QFN-32-1EP_7x7mm_P0.65mm_EP5.4x5.4mm_ThermalVias +QFN, 32 Pin (http://www.thatcorp.com/datashts/THAT_5171_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +75 +33 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.1mm +QFN, 36 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.1mm_ThermalVias +QFN, 36 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +56 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.6mm +QFN, 36 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UHE36)%20QFN%2005-08-1876%20Rev%20%C3%98.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +49 +37 +Package_DFN_QFN +QFN-36-1EP_5x6mm_P0.5mm_EP3.6x4.6mm_ThermalVias +QFN, 36 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/(UHE36)%20QFN%2005-08-1876%20Rev%20%C3%98.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +56 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm +QFN, 36 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/36L_QFN_6x6_with_3_7x3_7_EP_Punch_Dimpled_4E_C04-0241A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm_ThermalVias +QFN, 36 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/36L_QFN_6x6_with_3_7x3_7_EP_Punch_Dimpled_4E_C04-0241A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +63 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP4.1x4.1mm +QFN, 36 Pin (www.st.com/resource/en/datasheet/stm32f101t6.pdf#page=72), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +46 +37 +Package_DFN_QFN +QFN-36-1EP_6x6mm_P0.5mm_EP4.1x4.1mm_ThermalVias +QFN, 36 Pin (www.st.com/resource/en/datasheet/stm32f101t6.pdf#page=72), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +63 +37 +Package_DFN_QFN +QFN-38-1EP_4x6mm_P0.4mm_EP2.65x4.65mm +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1750.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +39 +Package_DFN_QFN +QFN-38-1EP_4x6mm_P0.4mm_EP2.65x4.65mm_ThermalVias +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1750.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +56 +39 +Package_DFN_QFN +QFN-38-1EP_5x7mm_P0.5mm_EP3.15x5.15mm +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1701.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +54 +39 +Package_DFN_QFN +QFN-38-1EP_5x7mm_P0.5mm_EP3.15x5.15mm_ThermalVias +QFN, 38 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_38_05-08-1701.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +63 +39 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=297), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm_ThermalVias +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=297), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +67 +41 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm +QFN, 40 Pin (http://www.issi.com/WW/pdf/31FL3736.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +QFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm_ThermalVias +QFN, 40 Pin (http://www.issi.com/WW/pdf/31FL3736.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +67 +41 +Package_DFN_QFN +QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=295), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +57 +41 +Package_DFN_QFN +QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm_ThermalVias +QFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=295), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +83 +41 +Package_DFN_QFN +QFN-42-1EP_5x6mm_P0.4mm_EP3.7x4.7mm +QFN, 42 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081875_0_UHE42.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +55 +43 +Package_DFN_QFN +QFN-42-1EP_5x6mm_P0.4mm_EP3.7x4.7mm_ThermalVias +QFN, 42 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/05081875_0_UHE42.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +76 +43 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.2x5.2mm +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/2512S.pdf#page=17), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +61 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.2x5.2mm_ThermalVias +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/2512S.pdf#page=17), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +87 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm +QFN, 44 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_44_05-08-1763.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +61 +45 +Package_DFN_QFN +QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalVias +QFN, 44 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_44_05-08-1763.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +87 +45 +Package_DFN_QFN +QFN-44-1EP_8x8mm_P0.65mm_EP6.45x6.45mm +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf#page=152), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +70 +45 +Package_DFN_QFN +QFN-44-1EP_8x8mm_P0.65mm_EP6.45x6.45mm_ThermalVias +QFN, 44 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf#page=152), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +107 +45 +Package_DFN_QFN +QFN-44-1EP_9x9mm_P0.65mm_EP7.5x7.5mm +44-Lead Plastic Quad Flat, No Lead Package - 9x9 mm Body [QFN]; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf +QFN 0.65 +0 +49 +45 +Package_DFN_QFN +QFN-44-1EP_9x9mm_P0.65mm_EP7.5x7.5mm_ThermalVias +44-Lead Plastic Quad Flat, No Lead Package - 9x9 mm Body [QFN] with thermal vias; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf +QFN 0.65 +0 +55 +45 +Package_DFN_QFN +QFN-48-1EP_5x5mm_P0.35mm_EP3.7x3.7mm +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_5x5mm_P0.35mm_EP3.7x3.7mm_ThermalVias +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +75 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm +QFN, 48 Pin (https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf#page=20), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm_ThermalVias +QFN, 48 Pin (https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf#page=20), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3mm +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.3x4.3mm_ThermalVias +QFN, 48 Pin (https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf#page=38), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +75 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm +QFN, 48 Pin (http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.3.pdf#page=67), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.6x4.6mm_ThermalVias +QFN, 48 Pin (http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.3.pdf#page=67), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.66x4.66mm +QFN, 48 Pin (https://www.onsemi.com/pub/Collateral/485BA.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +58 +49 +Package_DFN_QFN +QFN-48-1EP_6x6mm_P0.4mm_EP4.66x4.66mm_ThermalVias +QFN, 48 Pin (https://www.onsemi.com/pub/Collateral/485BA.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm +QFN, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2041_datasheet.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mm_ThermalVias +QFN, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2041_datasheet.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm +QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm_ThermalVias +QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm +QFN, 48 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_48_05-08-1704.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalVias +QFN, 48 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_48_05-08-1704.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.45x5.45mm +QFN, 48 Pin (http://www.thatcorp.com/datashts/THAT_626x_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +QFN-48-1EP_7x7mm_P0.5mm_EP5.45x5.45mm_ThermalVias +QFN, 48 Pin (http://www.thatcorp.com/datashts/THAT_626x_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +49 +Package_DFN_QFN +QFN-48-1EP_8x8mm_P0.5mm_EP6.2x6.2mm +QFN, 48 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232H.pdf#page=49), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +74 +49 +Package_DFN_QFN +QFN-48-1EP_8x8mm_P0.5mm_EP6.2x6.2mm_ThermalVias +QFN, 48 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT232H.pdf#page=49), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +111 +49 +Package_DFN_QFN +QFN-52-1EP_7x8mm_P0.5mm_EP5.41x6.45mm +QFN, 52 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_52_05-08-1729.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +53 +Package_DFN_QFN +QFN-52-1EP_7x8mm_P0.5mm_EP5.41x6.45mm_ThermalVias +QFN, 52 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-qfn/QFN_52_05-08-1729.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +104 +53 +Package_DFN_QFN +QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm +QFN, 56 Pin (http://www.cypress.com/file/416486/download#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm_ThermalVias +QFN, 56 Pin (http://www.cypress.com/file/416486/download#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.3x4.3mm +QFN, 56 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002142A.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.3x4.3mm_ThermalVias +QFN, 56 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002142A.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm +QFN, 56 Pin (http://www.ti.com/lit/an/scea032/scea032.pdf#page=4), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm_ThermalVias +QFN, 56 Pin (http://www.ti.com/lit/an/scea032/scea032.pdf#page=4), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm_ThermalVias_TopTented +QFN, 56 Pin top tented version (manually modified). For information see: http://www.cypress.com/file/138911/download +QFN DFN_QFN +0 +115 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.6x5.6mm +QFN, 56 Pin (http://www.ti.com/lit/ds/symlink/tlc5957.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.6x5.6mm_ThermalVias +QFN, 56 Pin (http://www.ti.com/lit/ds/symlink/tlc5957.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +99 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.9x5.9mm +QFN, 56 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001734B.pdf#page=50), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +73 +57 +Package_DFN_QFN +QFN-56-1EP_8x8mm_P0.5mm_EP5.9x5.9mm_ThermalVias +QFN, 56 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001734B.pdf#page=50), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +99 +57 +Package_DFN_QFN +QFN-64-1EP_8x8mm_P0.4mm_EP6.5x6.5mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_8x8_with%206_5x6_5%20EP_JXX_C04-0437A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_8x8mm_P0.4mm_EP6.5x6.5mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/64L_VQFN_8x8_with%206_5x6_5%20EP_JXX_C04-0437A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP3.8x3.8mm +QFN, 64 Pin (https://datasheet.lcsc.com/szlcsc/Realtek-Semicon-RTL8211EG-VB-CG_C69264.pdf#page=77), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +74 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP3.8x3.8mm_ThermalVias +QFN, 64 Pin (https://datasheet.lcsc.com/szlcsc/Realtek-Semicon-RTL8211EG-VB-CG_C69264.pdf#page=77), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +79 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.7x4.7mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/60001477A.pdf (page 1083)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +74 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.7x4.7mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/60001477A.pdf (page 1083)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.35x4.35mm +QFN, 64 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf#page=57), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +74 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP4.35x4.35mm_ThermalVias +QFN, 64 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT2232H.pdf#page=57), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +91 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.4x5.4mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/70593d.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +81 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.4x5.4mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/70593d.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +107 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.45x5.45mm +QFN, 64 Pin (https://www.infineon.com/dgdl/Infineon-MA12040-DS-v01_00-EN.pdf?fileId=5546d46264a8de7e0164b7467a3d617c#page=81), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +81 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP5.45x5.45mm_ThermalVias +QFN, 64 Pin (https://www.infineon.com/dgdl/Infineon-MA12040-DS-v01_00-EN.pdf?fileId=5546d46264a8de7e0164b7467a3d617c#page=81), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +107 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/tusb8041.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +81 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm_ThermalVias +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/tusb8041.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +107 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002304A.pdf (page 43)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.3x7.3mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00002304A.pdf (page 43)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.5x7.5mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc7593.pdf (page 432)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +101 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.5x7.5mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc7593.pdf (page 432)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +151 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.15x7.15mm +QFN, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/229321fa.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.15x7.15mm_ThermalVias +QFN, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/229321fa.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.25x7.25mm +64-Lead Plastic Quad Flat No-Lead Package, 9x9mm Body (see Atmel Appnote 8826) +QFN 0.5 +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.35x7.35mm +64-Lead Plastic Quad Flat, No Lead Package (MR) - 9x9x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +90 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.65x7.65mm +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2549-8-bit-AVR-Microcontroller-ATmega640-1280-1281-2560-2561_datasheet.pdf (page 415)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +101 +65 +Package_DFN_QFN +QFN-64-1EP_9x9mm_P0.5mm_EP7.65x7.65mm_ThermalVias +QFN, 64 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2549-8-bit-AVR-Microcontroller-ATmega640-1280-1281-2560-2561_datasheet.pdf (page 415)), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +151 +65 +Package_DFN_QFN +QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm +QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +85 +69 +Package_DFN_QFN +QFN-68-1EP_8x8mm_P0.4mm_EP5.2x5.2mm_ThermalVias +QFN, 68 Pin (https://cdn.microsemi.com/documents/1bf6886f-5919-4508-a50b-b1dbf3fdf0f4/download/#page=98), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +111 +69 +Package_DFN_QFN +QFN-72-1EP_10x10mm_P0.5mm_EP6x6mm +QFN, 72 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001682C.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +82 +73 +Package_DFN_QFN +QFN-72-1EP_10x10mm_P0.5mm_EP6x6mm_ThermalVias +QFN, 72 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001682C.pdf#page=70), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +135 +73 +Package_DFN_QFN +QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm +QFN, 76 Pin (https://www.marvell.com/documents/bqcwxsoiqfjkcjdjhkvc/#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +86 +77 +Package_DFN_QFN +QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm_ThermalVias +QFN, 76 Pin (https://www.marvell.com/documents/bqcwxsoiqfjkcjdjhkvc/#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +103 +77 +Package_DFN_QFN +Qorvo_DFN-8-1EP_2x2mm_P0.5mm +DFN 8 2x2mm, 0.5mm http://www.qorvo.com/products/d/da000896 +DFN 0.5 Qorvo 2x2mm +0 +9 +9 +Package_DFN_QFN +ROHM_DFN0604-3 +DFN package size 0604 3 pins +DFN package size 0604 3 pins +0 +3 +3 +Package_DFN_QFN +ST_UFQFPN-20_3x3mm_P0.5mm +UFQFPN 20-lead, 3 x 3 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package (http://www.st.com/resource/en/datasheet/stm8s003f3.pdf) +UFQFPN 0.5 +0 +20 +20 +Package_DFN_QFN +ST_UQFN-6L_1.5x1.7mm_Pitch0.5mm +ST UQFN 6 pin 0.5mm Pitch http://www.st.com/resource/en/datasheet/ecmf02-2amx6.pdf +UQFN DFN 0.5 ST +0 +6 +6 +Package_DFN_QFN +SiliconLabs_QFN-20-1EP_3x3mm_P0.5mm_EP1.8x1.8mm +20-Lead Plastic Quad Flat, No Lead Package - 3x3 mm Body [QFN] with corner pads; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf +QFN 0.5 +0 +25 +21 +Package_DFN_QFN +SiliconLabs_QFN-20-1EP_3x3mm_P0.5mm_EP1.8x1.8mm_ThermalVias +20-Lead Plastic Quad Flat, No Lead Package - 3x3 mm Body [QFN] with corner pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf +QFN 0.5 +0 +31 +21 +Package_DFN_QFN +TDFN-6-1EP_2.5x2.5mm_P0.65mm_EP1.3x2mm +TDFN, 6 Pin (http://www.nve.com/Downloads/ab3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +11 +7 +Package_DFN_QFN +TDFN-6-1EP_2.5x2.5mm_P0.65mm_EP1.3x2mm_ThermalVias +TDFN, 6 Pin (http://www.nve.com/Downloads/ab3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +18 +7 +Package_DFN_QFN +TDFN-8-1EP_2x2mm_P0.5mm_EP0.8x1.2mm +TDFN, 8 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0168.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +13 +9 +Package_DFN_QFN +TDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm +TDFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/MCP6V66-Family-Data-Sheet-DS20006266A.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +13 +9 +Package_DFN_QFN +TDFN-8-1EP_3x2mm_P0.5mm_EP1.80x1.65mm +8-lead plastic dual flat, 2x3x0.75mm size, 0.5mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MN_C04-0129E-MN.pdf) +TDFN DFN 0.5mm +0 +12 +9 +Package_DFN_QFN +TDFN-8-1EP_3x2mm_P0.5mm_EP1.80x1.65mm_ThermalVias +8-lead plastic dual flat, 2x3x0.75mm size, 0.5mm pitch (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MN_C04-0129E-MN.pdf) +TDFN DFN 0.5mm +0 +17 +9 +Package_DFN_QFN +TDFN-10-1EP_2x3mm_P0.5mm_EP0.9x2mm +TDFN, 10 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0429.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +13 +11 +Package_DFN_QFN +TDFN-10-1EP_2x3mm_P0.5mm_EP0.9x2mm_ThermalVias +TDFN, 10 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0429.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +16 +11 +Package_DFN_QFN +TDFN-12_2x3mm_P0.5mm +TDFN, 12 Pads, No exposed, http://www.st.com/resource/en/datasheet/stm6600.pdf +DFN +0 +12 +12 +Package_DFN_QFN +TDFN-14-1EP_3x3mm_P0.4mm_EP1.78x2.35mm +TDFN, 14 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0137.PDF (T1433-2C)), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +19 +15 +Package_DFN_QFN +TDFN-14-1EP_3x3mm_P0.4mm_EP1.78x2.35mm_ThermalVias +TDFN, 14 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0137.PDF (T1433-2C)), generated with kicad-footprint-generator ipc_noLead_generator.py +TDFN NoLead +0 +26 +15 +Package_DFN_QFN +TQFN-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm +TQFN, 16 Pin (https://www.diodes.com/assets/Datasheets/PI6C5946002.pdf#page=12), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +21 +17 +Package_DFN_QFN +TQFN-16-1EP_3x3mm_P0.5mm_EP1.23x1.23mm +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0136.PDF (T1633-5), https://pdfserv.maximintegrated.com/land_patterns/90-0032.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +21 +17 +Package_DFN_QFN +TQFN-16-1EP_3x3mm_P0.5mm_EP1.23x1.23mm_ThermalVias +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0136.PDF (T1633-5), https://pdfserv.maximintegrated.com/land_patterns/90-0032.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +26 +17 +Package_DFN_QFN +TQFN-16-1EP_5x5mm_P0.8mm_EP2.29x2.29mm +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T1655-4)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +21 +17 +Package_DFN_QFN +TQFN-16-1EP_5x5mm_P0.8mm_EP2.29x2.29mm_ThermalVias +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T1655-4)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +26 +17 +Package_DFN_QFN +TQFN-16-1EP_5x5mm_P0.8mm_EP3.1x3.1mm +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T1655-2)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +21 +17 +Package_DFN_QFN +TQFN-16-1EP_5x5mm_P0.8mm_EP3.1x3.1mm_ThermalVias +TQFN, 16 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T1655-2)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +31 +17 +Package_DFN_QFN +TQFN-20-1EP_5x5mm_P0.65mm_EP3.1x3.1mm +TQFN, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2055-3)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +25 +21 +Package_DFN_QFN +TQFN-20-1EP_5x5mm_P0.65mm_EP3.1x3.1mm_ThermalVias +TQFN, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2055-3)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +35 +21 +Package_DFN_QFN +TQFN-20-1EP_5x5mm_P0.65mm_EP3.25x3.25mm +TQFN, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2055-5)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +25 +21 +Package_DFN_QFN +TQFN-20-1EP_5x5mm_P0.65mm_EP3.25x3.25mm_ThermalVias +TQFN, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2055-5)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +35 +21 +Package_DFN_QFN +TQFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_PullBack +TQFN, 24 Pin (https://ams.com/documents/20143/36005/AS1115_DS000206_1-00.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +29 +25 +Package_DFN_QFN +TQFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_PullBack_ThermalVias +TQFN, 24 Pin (https://ams.com/documents/20143/36005/AS1115_DS000206_1-00.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +39 +25 +Package_DFN_QFN +TQFN-28-1EP_5x5mm_P0.5mm_EP2.7x2.7mm +TQFN, 28 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2855-4)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +33 +29 +Package_DFN_QFN +TQFN-28-1EP_5x5mm_P0.5mm_EP2.7x2.7mm_ThermalVias +TQFN, 28 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2855-4)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +38 +29 +Package_DFN_QFN +TQFN-28-1EP_5x5mm_P0.5mm_EP3.25x3.25mm +TQFN, 28 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0140.PDF (T2855-3)), generated with kicad-footprint-generator ipc_noLead_generator.py +TQFN NoLead +0 +33 +29 +Package_DFN_QFN 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Pin (http://www.ti.com/lit/ml/mpqf506/mpqf506.pdf) +QFN DFN_QFN +0 +65 +41 +Package_DFN_QFN +Texas_R-PUQFN-N10 +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=MPQF186&fileType=pdf +Texas_R-PUQFN-N10 +0 +10 +10 +Package_DFN_QFN +Texas_R-PWQFN-N28_EP2.1x3.1mm +QFN, 28 Pin (http://www.ti.com/lit/ds/symlink/tps51363.pdf#page=29), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +33 +29 +Package_DFN_QFN +Texas_R-PWQFN-N28_EP2.1x3.1mm_ThermalVias +QFN, 28 Pin (http://www.ti.com/lit/ds/symlink/tps51363.pdf#page=29), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +43 +29 +Package_DFN_QFN +Texas_RGE0024C_EP2.1x2.1mm +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/pca9548a.pdf#page=37), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_RGE0024C_EP2.1x2.1mm_ThermalVias +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/pca9548a.pdf#page=37), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_RGE0024H_EP2.7x2.7mm +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_RGE0024H_EP2.7x2.7mm_ThermalVias +Texas QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_RGV_S-PVQFN-N16_EP2.1x2.1mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ina3221.pdf#page=44), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +Texas_RGV_S-PVQFN-N16_EP2.1x2.1mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ina3221.pdf#page=44), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_RGY_R-PVQFN-N24_EP2.05x3.1mm +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq24133.pdf#page=40) +QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_RGY_R-PVQFN-N24_EP2.05x3.1mm_ThermalVias +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq24133.pdf#page=40) +QFN NoLead +0 +36 +25 +Package_DFN_QFN +Texas_RNN0018A +Texas Instruments, VQFN-HR RNN0018A (http://www.ti.com/lit/ds/symlink/tps568215.pdf) +ti vqfn-hr rnn0018a +0 +26 +18 +Package_DFN_QFN +Texas_RUM0016A_EP2.6x2.6mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +Texas_RUM0016A_EP2.6x2.6mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/lmh0074.pdf#page=13), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_RWH0032A +Texas Instruments, RWH0032A, 8x8x0.9mm (http://www.ti.com/lit/ds/snosd10c/snosd10c.pdf) +ti rwh0032a +0 +71 +33 +Package_DFN_QFN +Texas_RWH0032A_ThermalVias +Texas Instruments, RWH0032A, 8x8x0.9mm (http://www.ti.com/lit/ds/snosd10c/snosd10c.pdf) +ti rwh0032a +0 +94 +33 +Package_DFN_QFN +Texas_R_PUQFN-N12 +Texas_R_PUQFN-N12 http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_R_PUQFN-N12 +0 +13 +12 +Package_DFN_QFN +Texas_S-PDSO-N10_EP1.2x2mm +DFN, 10 Pin (http://www.ti.com/lit/ds/symlink/tps7a91.pdf#page=30), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +15 +11 +Package_DFN_QFN +Texas_S-PDSO-N10_EP1.2x2mm_ThermalVias +DFN, 10 Pin (http://www.ti.com/lit/ds/symlink/tps7a91.pdf#page=30), generated with kicad-footprint-generator ipc_noLead_generator.py +DFN NoLead +0 +22 +11 +Package_DFN_QFN +Texas_S-PVQFN-N14 +Texas_S-PVQFN-N14 http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_S-PVQFN-N14_4.3x4.3_Pitch0.5mm_ThermalPad +0 +19 +15 +Package_DFN_QFN +Texas_S-PVQFN-N14_ThermalVias +Texas_S-PVQFN-N14_ThermalVias http://www.ti.com/lit/ds/symlink/txb0104.pdf +Texas_S-PVQFN-N14_ThermalVias +0 +24 +15 +Package_DFN_QFN +Texas_S-PVQFN-N16_EP2.7x2.7mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/msp430g2001.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +26 +17 +Package_DFN_QFN +Texas_S-PVQFN-N16_EP2.7x2.7mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/msp430g2001.pdf#page=43), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.4x2.4mm +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/cc1101.pdf#page=101), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.4x2.4mm_ThermalVias +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/cc1101.pdf#page=101), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.7x2.7mm +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/drv8662.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP2.7x2.7mm_ThermalVias +QFN, 20 Pin (http://www.ti.com/lit/ds/symlink/drv8662.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +35 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP3.15x3.15mm +QFN, 20 Pin (www.ti.com/lit/ds/symlink/tps7a7200.pdf#page=36), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +25 +21 +Package_DFN_QFN +Texas_S-PVQFN-N20_EP3.15x3.15mm_ThermalVias +QFN, 20 Pin (www.ti.com/lit/ds/symlink/tps7a7200.pdf#page=36), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +21 +Package_DFN_QFN +Texas_S-PVQFN-N24_EP2.1x2.1mm +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5720.pdf#page=108), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_S-PVQFN-N24_EP2.1x2.1mm_ThermalVias +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5720.pdf#page=108), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_S-PVQFN-N32_EP3.45x3.45mm +QFN, 32 Pin (http://www.ti.com/lit/ds/symlink/msp430f1122.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +42 +33 +Package_DFN_QFN +Texas_S-PVQFN-N32_EP3.45x3.45mm_ThermalVias +QFN, 32 Pin (http://www.ti.com/lit/ds/symlink/msp430f1122.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +59 +33 +Package_DFN_QFN +Texas_S-PVQFN-N36_EP4.4x4.4mm +QFN, 36 Pin (http://www.ti.com/lit/ds/slvsba5d/slvsba5d.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +46 +37 +Package_DFN_QFN +Texas_S-PVQFN-N36_EP4.4x4.4mm_ThermalVias +QFN, 36 Pin (http://www.ti.com/lit/ds/slvsba5d/slvsba5d.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +79 +37 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP2.9x2.9mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5731.pdf#page=111 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +45 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP2.9x2.9mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430fr5731.pdf#page=111 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +55 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP3.52x2.62mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP3.52x2.62mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/drv8308.pdf#page=56 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +60 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.6x4.6mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/dac7750.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.6x4.6mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/dac7750.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +83 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.15x4.15mm +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430g2755.pdf#page=70 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +50 +41 +Package_DFN_QFN +Texas_S-PVQFN-N40_EP4.15x4.15mm_ThermalVias +QFN, 40 Pin (http://www.ti.com/lit/ds/symlink/msp430g2755.pdf#page=70 JEDEC MO-220 variation VJJD-2), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +83 +41 +Package_DFN_QFN +Texas_S-PVQFN-N48_EP5.15x5.15mm +QFN, 48 Pin (http://www.ti.com/lit/ds/symlink/msp430f5232.pdf#page=111), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +65 +49 +Package_DFN_QFN +Texas_S-PVQFN-N48_EP5.15x5.15mm_ThermalVias +QFN, 48 Pin (http://www.ti.com/lit/ds/symlink/msp430f5232.pdf#page=111), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +111 +49 +Package_DFN_QFN +Texas_S-PVQFN-N64_EP4.25x4.25mm +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/msp430f5217.pdf#page=120), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +69 +65 +Package_DFN_QFN +Texas_S-PVQFN-N64_EP4.25x4.25mm_ThermalVias +QFN, 64 Pin (http://www.ti.com/lit/ds/symlink/msp430f5217.pdf#page=120), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +127 +65 +Package_DFN_QFN +Texas_S-PWQFN-N16_EP2.1x2.1mm +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31 MO-220 variation VGGC), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +21 +17 +Package_DFN_QFN +Texas_S-PWQFN-N16_EP2.1x2.1mm_ThermalVias +QFN, 16 Pin (http://www.ti.com/lit/ds/symlink/drv8801.pdf#page=31 MO-220 variation VGGC), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +31 +17 +Package_DFN_QFN +Texas_S-PWQFN-N20 +20-Pin Plastic Quad Flatpack No-Lead Package, Body 3.0x3.0x0.8mm, Texas Instruments (http://www.ti.com/lit/ds/symlink/tps22993.pdf) +QFN 0.4 +0 +24 +20 +Package_DFN_QFN +Texas_S-PWQFN-N24_EP2.7x2.7mm +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq25601.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +29 +25 +Package_DFN_QFN +Texas_S-PWQFN-N24_EP2.7x2.7mm_ThermalVias +QFN, 24 Pin (http://www.ti.com/lit/ds/symlink/bq25601.pdf#page=54), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +39 +25 +Package_DFN_QFN +Texas_S-PWQFN-N32_EP2.8x2.8mm +QFN, 32 Pin (https://www.ti.com/lit/ds/symlink/bq25703a.pdf#page=90), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +37 +33 +Package_DFN_QFN +Texas_S-PWQFN-N32_EP2.8x2.8mm_ThermalVias +QFN, 32 Pin (https://www.ti.com/lit/ds/symlink/bq25703a.pdf#page=90), generated with kicad-footprint-generator ipc_noLead_generator.py +QFN NoLead +0 +47 +33 +Package_DFN_QFN +Texas_S-PWQFN-N100_EP5.5x5.5mm +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/lit/ds/sllse76m/sllse76m.pdf +MultiRow QFN +0 +114 +105 +Package_DFN_QFN +Texas_S-PWQFN-N100_EP5.5x5.5mm_ThermalVias +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/lit/ds/sllse76m/sllse76m.pdf +MultiRow QFN +0 +131 +105 +Package_DFN_QFN +Texas_S-PX2QFN-14 +Texas QFN, 14 Pin (http://www.ti.com/lit/ds/symlink/tlv9004.pdf#page=64), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas QFN NoLead +0 +14 +14 +Package_DFN_QFN +Texas_VQFN-RHL-20 +http://www.ti.com/lit/ds/symlink/bq51050b.pdf +RHL0020A +0 +33 +21 +Package_DFN_QFN +Texas_VQFN-RHL-20_ThermalVias +http://www.ti.com/lit/ds/symlink/bq51050b.pdf +RHL0020A +0 +41 +21 +Package_DFN_QFN +Texas_VSON-HR-8_1.5x2mm_P0.5mm +Texas VSON-HR, 8 Pin (http://www.ti.com/lit/ds/symlink/tps62823.pdf#page=29), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas VSON-HR NoLead +0 +8 +8 +Package_DFN_QFN +Texas_WQFN-MR-100_3x3-DapStencil +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=mpqf258&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=LPPD235&fileType=pdf +MultiRow QFN +0 +113 +105 +Package_DFN_QFN +Texas_WQFN-MR-100_ThermalVias_3x3-DapStencil +http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=szza059&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=mpqf258&fileType=pdf,http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=LPPD235&fileType=pdf +MultiRow QFN +0 +126 +105 +Package_DFN_QFN +Texas_X2QFN-12_1.6x1.6mm_P0.4mm +Texas X2QFN, 12 Pin (http://www.ti.com/lit/ml/mpqf391c/mpqf391c.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas X2QFN NoLead +0 +12 +12 +Package_DFN_QFN +UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm +UDFN-4_1x1mm_P0.65mm, http://ww1.microchip.com/downloads/en/DeviceDoc/MIC550x-300mA-Single-Output-LDO-in-Small-Packages-DS20006006A.pdf +UDFN-4_1x1mm_P0.65mm +0 +5 +5 +Package_DFN_QFN +UDFN-9_1.0x3.8mm_P0.5mm +9-pin UDFN package, 1.0x3.8mm, (Ref: https://katalog.we-online.de/pbs/datasheet/824014881.pdf) +UDFN SMD +0 +9 +9 +Package_DFN_QFN +UDFN-10_1.35x2.6mm_P0.5mm +http://www.st.com/content/ccc/resource/technical/document/datasheet/f2/11/8a/ed/40/31/40/56/DM00088292.pdf/files/DM00088292.pdf/jcr:content/translations/en.DM00088292.pdf +UDFN 0.5 uQFN +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.3x1.8mm_P0.4mm +UQFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 9)), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.4x1.8mm_P0.4mm +UQFN 10pin, https://www.onsemi.com/pub/Collateral/488AT.PDF +UQFN-10_1.4x1.8mm_P0.4mm +0 +10 +10 +Package_DFN_QFN +UQFN-10_1.6x2.1mm_P0.5mm +UQFN, 10 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/00001725D.pdf (Page 12)), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +10 +10 +Package_DFN_QFN +UQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm +16-Lead Ultra Thin Quad Flat, No Lead Package (UC) - 3x3x0.5 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +21 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.6x2.6mm +UQFN, 16 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/16L_UQFN_4x4x0_5mm_JQ_C04257A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +21 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.6x2.6mm_ThermalVias +UQFN, 16 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/16L_UQFN_4x4x0_5mm_JQ_C04257A.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +31 +17 +Package_DFN_QFN +UQFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm +16-Lead Ultra Thin Plastic Quad Flat, No Lead Package (JQ) - 4x4x0.5 mm Body [UQFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.65 +0 +21 +17 +Package_DFN_QFN +UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=332), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +25 +21 +Package_DFN_QFN +UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm_ThermalVias +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=332), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +30 +21 +Package_DFN_QFN +UQFN-20-1EP_4x4mm_P0.5mm_EP2.8x2.8mm +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/40001839B.pdf#page=464), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +25 +21 +Package_DFN_QFN +UQFN-20-1EP_4x4mm_P0.5mm_EP2.8x2.8mm_ThermalVias +UQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/40001839B.pdf#page=464), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +35 +21 +Package_DFN_QFN +UQFN-28-1EP_4x4mm_P0.4mm_EP2.35x2.35mm +UQFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=338), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +33 +29 +Package_DFN_QFN +UQFN-28-1EP_4x4mm_P0.4mm_EP2.35x2.35mm_ThermalVias +UQFN, 28 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=338), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +43 +29 +Package_DFN_QFN +UQFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm +UQFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=345), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +50 +41 +Package_DFN_QFN +UQFN-40-1EP_5x5mm_P0.4mm_EP3.8x3.8mm_ThermalVias +UQFN, 40 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=345), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +67 +41 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.45x4.45mm +UQFN, 48 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=347), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +58 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.45x4.45mm_ThermalVias +UQFN, 48 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=347), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +75 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.62x4.62mm +UQFN, 48 Pin (https://github.com/KiCad/kicad-symbols/pull/1189#issuecomment-449506354), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +53 +49 +Package_DFN_QFN +UQFN-48-1EP_6x6mm_P0.4mm_EP4.62x4.62mm_ThermalVias +UQFN, 48 Pin (https://github.com/KiCad/kicad-symbols/pull/1189#issuecomment-449506354), generated with kicad-footprint-generator ipc_noLead_generator.py +UQFN NoLead +0 +75 +49 +Package_DFN_QFN +VDFN-8-1EP_2x2mm_P0.5mm_EP0.9x1.7mm +8-Lead Very Thin Dual Flatpack No-Lead (LZ) - 2x3x0.9 mm Body [VDFN] (see Microchip Packaging Specification 00000049BS.pdf) +DFN 0.5 +0 +11 +9 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/cdclvp1102.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm_ThermalVias +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/cdclvp1102.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +26 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.8x1.8mm +VQFN, 16 Pin (https://www.st.com/resource/en/datasheet/stspin220.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.8x1.8mm_ThermalVias +VQFN, 16 Pin (https://www.st.com/resource/en/datasheet/stspin220.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +26 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm +VQFN, 16 Pin (http://www.ti.com/lit/ds/sbos354a/sbos354a.pdf, JEDEC MO-220 variant VEED-6), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.45x1.45mm_ThermalVias +VQFN, 16 Pin (http://www.ti.com/lit/ds/sbos354a/sbos354a.pdf, JEDEC MO-220 variant VEED-6), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +26 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/tlv62095.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +21 +17 +Package_DFN_QFN +VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm_ThermalVias +VQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/tlv62095.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +26 +17 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20%20Lead%20VQFN%203x3x0_9mm_1_7EP%20U2B%20C04-21496a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +25 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm_ThermalVias +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20%20Lead%20VQFN%203x3x0_9mm_1_7EP%20U2B%20C04-21496a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +30 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.45mm_EP1.55x1.55mm +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=264), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +25 +21 +Package_DFN_QFN +VQFN-20-1EP_3x3mm_P0.45mm_EP1.55x1.55mm_ThermalVias +VQFN, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf#page=264), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +30 +21 +Package_DFN_QFN +VQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm +VQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430f1101a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +34 +25 +Package_DFN_QFN +VQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm_ThermalVias +VQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/msp430f1101a.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +39 +25 +Package_DFN_QFN +VQFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm +VQFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-9505-AT42-QTouch-BSW-AT42QT1060_Datasheet.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +33 +29 +Package_DFN_QFN +VQFN-28-1EP_4x4mm_P0.45mm_EP2.4x2.4mm_ThermalVias +VQFN, 28 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-9505-AT42-QTouch-BSW-AT42QT1060_Datasheet.pdf#page=28), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +43 +29 +Package_DFN_QFN +VQFN-28-1EP_4x5mm_P0.5mm_EP2.55x3.55mm +VQFN, 28 Pin (http://www.ti.com/lit/ds/symlink/lm5175.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +35 +29 +Package_DFN_QFN +VQFN-28-1EP_4x5mm_P0.5mm_EP2.55x3.55mm_ThermalVias +VQFN, 28 Pin (http://www.ti.com/lit/ds/symlink/lm5175.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +48 +29 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +VQFN, 32 Pin (http://ww1.microchip.com/downloads/en/devicedoc/atmel-9520-at42-qtouch-bsw-at42qt1110_datasheet.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +37 +33 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm_ThermalVias +VQFN, 32 Pin (http://ww1.microchip.com/downloads/en/devicedoc/atmel-9520-at42-qtouch-bsw-at42qt1110_datasheet.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +47 +33 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm +VQFN, 32 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT4222H.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +37 +33 +Package_DFN_QFN +VQFN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm_ThermalVias +VQFN, 32 Pin (https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT4222H.pdf#page=40), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +47 +33 +Package_DFN_QFN +VQFN-46-1EP_5x6mm_P0.4mm_EP2.8x3.8mm +VQFN, 46 Pin (http://www.ti.com/lit/ds/symlink/lp5036.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +53 +47 +Package_DFN_QFN +VQFN-46-1EP_5x6mm_P0.4mm_EP2.8x3.8mm_ThermalVias +VQFN, 46 Pin (http://www.ti.com/lit/ds/symlink/lp5036.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +66 +47 +Package_DFN_QFN +VQFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm +VQFN, 48 Pin (http://www.ti.com/lit/ds/symlink/cc1312r.pdf#page=48), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +53 +49 +Package_DFN_QFN +VQFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalVias +VQFN, 48 Pin (http://www.ti.com/lit/ds/symlink/cc1312r.pdf#page=48), generated with kicad-footprint-generator ipc_noLead_generator.py +VQFN NoLead +0 +79 +49 +Package_DFN_QFN +WDFN-8-1EP_2x2.2mm_P0.5mm_EP0.80x0.54 +https://www.onsemi.com/pub/Collateral/511BN.PDF +WDFN-8 1EP 2.2X2.0 0.5P +0 +9 +9 +Package_DFN_QFN +WDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm +WDFN, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/8L_TDFN_2x3_MNY_C04-0129E-MNY.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +WDFN NoLead +0 +13 +9 +Package_DFN_QFN +WDFN-8-1EP_4x3mm_P0.65mm_EP2.4x1.8mm +WDFN, 8 Pin (https://www.onsemi.com/pub/Collateral/509AF.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +WDFN NoLead +0 +13 +9 +Package_DFN_QFN +WDFN-8-1EP_4x3mm_P0.65mm_EP2.4x1.8mm_ThermalVias +WDFN, 8 Pin (https://www.onsemi.com/pub/Collateral/509AF.PDF), generated with kicad-footprint-generator ipc_noLead_generator.py +WDFN NoLead +0 +20 +9 +Package_DFN_QFN +WDFN-8_2x2mm_P0.5mm +DFN8 2x2, 0.5P; No exposed pad (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF) +DFN 0.5 +0 +8 +8 +Package_DFN_QFN +WDFN-12-1EP_3x3mm_P0.45mm_EP1.7x2.5mm +WDFN, 12 Pin (https://www.diodes.com/assets/Datasheets/PAM2306.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +WDFN NoLead +0 +17 +13 +Package_DFN_QFN +WQFN-14-1EP_2.5x2.5mm_P0.5mm_EP1.45x1.45mm +WQFN, 14 Pin (https://www.onsemi.com/pub/Collateral/FUSB302B-D.PDF#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +19 +15 +Package_DFN_QFN +WQFN-14-1EP_2.5x2.5mm_P0.5mm_EP1.45x1.45mm_ThermalVias +WQFN, 14 Pin (https://www.onsemi.com/pub/Collateral/FUSB302B-D.PDF#page=32), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +24 +15 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm +WQFN, 16 Pin (https://www.ti.com/lit/ds/symlink/tpa6132a2.pdf#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +21 +17 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.6x1.6mm_ThermalVias +WQFN, 16 Pin (https://www.ti.com/lit/ds/symlink/tpa6132a2.pdf#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +26 +17 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm +WQFN, 16 Pin (https://www.onsemi.com/pub/Collateral/FUSB307B-D.PDF#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +21 +17 +Package_DFN_QFN +WQFN-16-1EP_3x3mm_P0.5mm_EP1.75x1.75mm_ThermalVias +WQFN, 16 Pin (https://www.onsemi.com/pub/Collateral/FUSB307B-D.PDF#page=56), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +26 +17 +Package_DFN_QFN +WQFN-16-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +WQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +21 +17 +Package_DFN_QFN +WQFN-16-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +WQFN, 16 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=59), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +31 +17 +Package_DFN_QFN +WQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x2.9mm +http://www.onsemi.com/pub/Collateral/510CD.PDF +WQFN-20 4.5mm 2.5mm 0.5mm +0 +24 +21 +Package_DFN_QFN +WQFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm +WQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/lm26480.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +29 +25 +Package_DFN_QFN +WQFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm_ThermalVias +WQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/lm26480.pdf#page=39), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +39 +25 +Package_DFN_QFN +WQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm +WQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/ts3a27518e.pdf#page=33), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +29 +25 +Package_DFN_QFN +WQFN-24-1EP_4x4mm_P0.5mm_EP2.45x2.45mm_ThermalVias +WQFN, 24 Pin (http://www.ti.com/lit/ds/symlink/ts3a27518e.pdf#page=33), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +39 +25 +Package_DFN_QFN +WQFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm +QFN, 32-Leads, Body 5x5x0.8mm, Pitch 0.5mm, Thermal Pad 3.1x3.1mm; (see Texas Instruments LM25119 http://www.ti.com/lit/ds/symlink/lm25119.pdf) +WQFN 0.5 +0 +37 +33 +Package_DFN_QFN +WQFN-42-1EP_3.5x9mm_P0.5mm_EP2.05x7.55mm +WQFN, 42 Pin (http://www.ti.com/lit/ds/symlink/ts3l501e.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +57 +43 +Package_DFN_QFN +WQFN-42-1EP_3.5x9mm_P0.5mm_EP2.05x7.55mm_ThermalVias +WQFN, 42 Pin (http://www.ti.com/lit/ds/symlink/ts3l501e.pdf#page=23), generated with kicad-footprint-generator ipc_noLead_generator.py +WQFN NoLead +0 +82 +43 +Package_DIP +DIP-4_W7.62mm +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_LongPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_SMDSocket_SmallPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_Socket +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +4 +4 +Package_DIP +DIP-4_W7.62mm_Socket_LongPads +4-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +4 +4 +Package_DIP +DIP-4_W8.89mm_SMDSocket_LongPads +4-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +4 +4 +Package_DIP +DIP-4_W10.16mm +4-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +4 +4 +Package_DIP +DIP-4_W10.16mm_LongPads +4-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +4 +4 +Package_DIP +DIP-5-6_W7.62mm +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_LongPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_SMDSocket_SmallPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_Socket +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +5 +5 +Package_DIP +DIP-5-6_W7.62mm_Socket_LongPads +5-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W8.89mm_SMDSocket_LongPads +5-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +5 +5 +Package_DIP +DIP-5-6_W10.16mm +5-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +5 +5 +Package_DIP +DIP-5-6_W10.16mm_LongPads +5-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +5 +5 +Package_DIP +DIP-6_W7.62mm +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_LongPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_SMDSocket_SmallPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_Socket +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +6 +6 +Package_DIP +DIP-6_W7.62mm_Socket_LongPads +6-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +6 +6 +Package_DIP +DIP-6_W8.89mm_SMDSocket_LongPads +6-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +6 +6 +Package_DIP +DIP-6_W10.16mm +6-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +6 +6 +Package_DIP +DIP-6_W10.16mm_LongPads +6-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +6 +6 +Package_DIP +DIP-8-16_W7.62mm +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +DIP-8-16_W7.62mm_Socket +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +8 +8 +Package_DIP +DIP-8-16_W7.62mm_Socket_LongPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +8 +8 +Package_DIP +DIP-8-N6_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), missing pin 6 +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +DIP-8-N7_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), missing pin 7 +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +DIP-8_W7.62mm +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_LongPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_SMDSocket_SmallPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_Socket +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +8 +8 +Package_DIP +DIP-8_W7.62mm_Socket_LongPads +8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +8 +8 +Package_DIP +DIP-8_W8.89mm_SMDSocket_LongPads +8-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +8 +8 +Package_DIP +DIP-8_W10.16mm +8-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +8 +8 +Package_DIP +DIP-8_W10.16mm_LongPads +8-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +8 +8 +Package_DIP +DIP-10_W7.62mm +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_LongPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_SMDSocket_SmallPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_Socket +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +10 +10 +Package_DIP +DIP-10_W7.62mm_Socket_LongPads +10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +10 +10 +Package_DIP +DIP-10_W8.89mm_SMDSocket_LongPads +10-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +10 +10 +Package_DIP +DIP-10_W10.16mm +10-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +10 +10 +Package_DIP +DIP-10_W10.16mm_LongPads +10-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +10 +10 +Package_DIP +DIP-12_W7.62mm +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_LongPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_SMDSocket_SmallPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_Socket +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +12 +12 +Package_DIP +DIP-12_W7.62mm_Socket_LongPads +12-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +12 +12 +Package_DIP +DIP-12_W8.89mm_SMDSocket_LongPads +12-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +12 +12 +Package_DIP +DIP-12_W10.16mm +12-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +12 +12 +Package_DIP +DIP-12_W10.16mm_LongPads +12-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +12 +12 +Package_DIP +DIP-14_W7.62mm +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_LongPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_SMDSocket_SmallPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_Socket +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +14 +14 +Package_DIP +DIP-14_W7.62mm_Socket_LongPads +14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +14 +14 +Package_DIP +DIP-14_W8.89mm_SMDSocket_LongPads +14-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +14 +14 +Package_DIP +DIP-14_W10.16mm +14-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +14 +14 +Package_DIP +DIP-14_W10.16mm_LongPads +14-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +14 +14 +Package_DIP +DIP-16_W7.62mm +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_LongPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_SMDSocket_SmallPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_Socket +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +16 +16 +Package_DIP +DIP-16_W7.62mm_Socket_LongPads +16-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +16 +16 +Package_DIP +DIP-16_W8.89mm_SMDSocket_LongPads +16-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +16 +16 +Package_DIP +DIP-16_W10.16mm +16-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +16 +16 +Package_DIP +DIP-16_W10.16mm_LongPads +16-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +16 +16 +Package_DIP +DIP-18_W7.62mm +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_LongPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_SMDSocket_SmallPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_Socket +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +18 +18 +Package_DIP +DIP-18_W7.62mm_Socket_LongPads +18-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +18 +18 +Package_DIP +DIP-18_W8.89mm_SMDSocket_LongPads +18-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +18 +18 +Package_DIP +DIP-20_W7.62mm +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_LongPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_SMDSocket_SmallPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_Socket +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +20 +20 +Package_DIP +DIP-20_W7.62mm_Socket_LongPads +20-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +20 +20 +Package_DIP +DIP-20_W8.89mm_SMDSocket_LongPads +20-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +20 +20 +Package_DIP +DIP-22_W7.62mm +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_LongPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_SMDSocket_SmallPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_Socket +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +22 +22 +Package_DIP +DIP-22_W7.62mm_Socket_LongPads +22-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +22 +22 +Package_DIP +DIP-22_W8.89mm_SMDSocket_LongPads +22-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_LongPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_SMDSocket_SmallPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil SMDSocket SmallPads +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_Socket +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket +0 +22 +22 +Package_DIP +DIP-22_W10.16mm_Socket_LongPads +22-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket LongPads +0 +22 +22 +Package_DIP +DIP-22_W11.43mm_SMDSocket_LongPads +22-lead though-hole mounted DIP package, row spacing 11.43 mm (450 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 11.43mm 450mil SMDSocket LongPads +0 +22 +22 +Package_DIP +DIP-24_W7.62mm +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_LongPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_Socket +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +24 +24 +Package_DIP +DIP-24_W7.62mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W8.89mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils) +THT DIP DIL PDIP 2.54mm 10.16mm 400mil +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_LongPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_Socket +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket +0 +24 +24 +Package_DIP +DIP-24_W10.16mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 10.16 mm (400 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 10.16mm 400mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W11.43mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 11.43 mm (450 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 11.43mm 450mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_LongPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_SMDSocket_SmallPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_Socket +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +24 +24 +Package_DIP +DIP-24_W15.24mm_Socket_LongPads +24-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +24 +24 +Package_DIP +DIP-24_W16.51mm_SMDSocket_LongPads +24-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +24 +24 +Package_DIP +DIP-28_W7.62mm +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils) +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_LongPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_SMDSocket_SmallPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil SMDSocket SmallPads +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_Socket +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket +0 +28 +28 +Package_DIP +DIP-28_W7.62mm_Socket_LongPads +28-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Socket LongPads +0 +28 +28 +Package_DIP +DIP-28_W8.89mm_SMDSocket_LongPads +28-lead though-hole mounted DIP package, row spacing 8.89 mm (350 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 8.89mm 350mil SMDSocket LongPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_LongPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_SMDSocket_SmallPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_Socket +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +28 +28 +Package_DIP +DIP-28_W15.24mm_Socket_LongPads +28-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +28 +28 +Package_DIP +DIP-28_W16.51mm_SMDSocket_LongPads +28-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +28 +28 +Package_DIP +DIP-32_W7.62mm +32-lead dip package, row spacing 7.62 mm (300 mils) +DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +32 +32 +Package_DIP +DIP-32_W15.24mm +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_LongPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_SMDSocket_SmallPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_Socket +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +32 +32 +Package_DIP +DIP-32_W15.24mm_Socket_LongPads +32-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +32 +32 +Package_DIP +DIP-32_W16.51mm_SMDSocket_LongPads +32-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +32 +32 +Package_DIP +DIP-40_W15.24mm +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_LongPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_SMDSocket_SmallPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_Socket +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +40 +40 +Package_DIP +DIP-40_W15.24mm_Socket_LongPads +40-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +40 +40 +Package_DIP +DIP-40_W16.51mm_SMDSocket_LongPads +40-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils) +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_LongPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil LongPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_SMDSocket_SmallPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil SMDSocket SmallPads +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_Socket +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket +0 +40 +40 +Package_DIP +DIP-40_W25.4mm_Socket_LongPads +40-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket LongPads +0 +40 +40 +Package_DIP +DIP-40_W26.67mm_SMDSocket_LongPads +40-lead though-hole mounted DIP package, row spacing 26.67 mm (1050 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 26.669999999999998mm 1050mil SMDSocket LongPads +0 +40 +40 +Package_DIP +DIP-42_W15.24mm +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_LongPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_SMDSocket_SmallPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_Socket +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +42 +42 +Package_DIP +DIP-42_W15.24mm_Socket_LongPads +42-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +42 +42 +Package_DIP +DIP-42_W16.51mm_SMDSocket_LongPads +42-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +42 +42 +Package_DIP +DIP-48_W15.24mm +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_LongPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_SMDSocket_SmallPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_Socket +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +48 +48 +Package_DIP +DIP-48_W15.24mm_Socket_LongPads +48-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +48 +48 +Package_DIP +DIP-48_W16.51mm_SMDSocket_LongPads +48-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +48 +48 +Package_DIP +DIP-64_W15.24mm +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils) +THT DIP DIL PDIP 2.54mm 15.24mm 600mil +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_LongPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_Socket +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket +0 +64 +64 +Package_DIP +DIP-64_W15.24mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 15.24mm 600mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W16.51mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 16.51mm 650mil SMDSocket LongPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils) +THT DIP DIL PDIP 2.54mm 22.86mm 900mil +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_LongPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), LongPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_Socket +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), Socket +THT DIP DIL PDIP 2.54mm 22.86mm 900mil Socket +0 +64 +64 +Package_DIP +DIP-64_W22.86mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 22.86 mm (900 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 22.86mm 900mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W24.13mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 24.13 mm (950 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 24.13mm 950mil SMDSocket LongPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils) +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_LongPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil LongPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_SMDSocket_SmallPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), SMDSocket, SmallPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil SMDSocket SmallPads +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_Socket +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket +0 +64 +64 +Package_DIP +DIP-64_W25.4mm_Socket_LongPads +64-lead though-hole mounted DIP package, row spacing 25.4 mm (1000 mils), Socket, LongPads +THT DIP DIL PDIP 2.54mm 25.4mm 1000mil Socket LongPads +0 +64 +64 +Package_DIP +DIP-64_W26.67mm_SMDSocket_LongPads +64-lead though-hole mounted DIP package, row spacing 26.67 mm (1050 mils), SMDSocket, LongPads +THT DIP DIL PDIP 2.54mm 26.669999999999998mm 1050mil SMDSocket LongPads +0 +64 +64 +Package_DIP +Fairchild_LSOP-8 +8-Lead, 300\" Wide, Surface Mount Package (https://www.fairchildsemi.com/package-drawings/ML/MLSOP08A.pdf) +LSOP 2.54mm 300mil +0 +8 +8 +Package_DIP +PowerIntegrations_PDIP-8B +Power Integrations variant of 8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +7 +7 +Package_DIP +PowerIntegrations_PDIP-8C +Power Integrations variant of 8-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://ac-dc.power.com/sites/default/files/product-docs/tinyswitch-iii_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +7 +7 +Package_DIP +PowerIntegrations_SDIP-10C +PowerIntegrations variant of 10-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), LongPads, see https://www.power.com/sites/default/files/product-docs/tophx_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil LongPads +0 +9 +9 +Package_DIP +PowerIntegrations_SMD-8 +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +PowerIntegrations_SMD-8B +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://www.power.com/sites/default/files/product-docs/lnk520.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +PowerIntegrations_SMD-8C +PowerIntegrations variant of 8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils), see https://ac-dc.power.com/sites/default/files/product-docs/tinyswitch-iii_family_datasheet.pdf +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +7 +7 +Package_DIP +PowerIntegrations_eDIP-12B +Power Integrations eDIP-12B, see https://www.power.com/sites/default/files/product-docs/linkswitch-pl_family_datasheet.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil +0 +11 +11 +Package_DIP +SMDIP-4_W7.62mm +4-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +4 +4 +Package_DIP +SMDIP-4_W9.53mm +4-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +4 +4 +Package_DIP +SMDIP-4_W9.53mm_Clearance8mm +4-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +4 +4 +Package_DIP +SMDIP-4_W11.48mm +4-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +4 +4 +Package_DIP +SMDIP-6_W7.62mm +6-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +6 +6 +Package_DIP +SMDIP-6_W9.53mm +6-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +6 +6 +Package_DIP +SMDIP-6_W9.53mm_Clearance8mm +6-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +6 +6 +Package_DIP +SMDIP-6_W11.48mm +6-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +6 +6 +Package_DIP +SMDIP-8_W7.62mm +8-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +8 +8 +Package_DIP +SMDIP-8_W9.53mm +8-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +8 +8 +Package_DIP +SMDIP-8_W9.53mm_Clearance8mm +8-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +8 +8 +Package_DIP +SMDIP-8_W11.48mm +8-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +8 +8 +Package_DIP +SMDIP-10_W7.62mm +10-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +10 +10 +Package_DIP +SMDIP-10_W9.53mm +10-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +10 +10 +Package_DIP +SMDIP-10_W9.53mm_Clearance8mm +10-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +10 +10 +Package_DIP +SMDIP-10_W11.48mm +10-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +10 +10 +Package_DIP +SMDIP-12_W7.62mm +12-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +12 +12 +Package_DIP +SMDIP-12_W9.53mm +12-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +12 +12 +Package_DIP +SMDIP-12_W9.53mm_Clearance8mm +12-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +12 +12 +Package_DIP +SMDIP-12_W11.48mm +12-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +12 +12 +Package_DIP +SMDIP-14_W7.62mm +14-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +14 +14 +Package_DIP +SMDIP-14_W9.53mm +14-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +14 +14 +Package_DIP +SMDIP-14_W9.53mm_Clearance8mm +14-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +14 +14 +Package_DIP +SMDIP-14_W11.48mm +14-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +14 +14 +Package_DIP +SMDIP-16_W7.62mm +16-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +16 +16 +Package_DIP +SMDIP-16_W9.53mm +16-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +16 +16 +Package_DIP +SMDIP-16_W9.53mm_Clearance8mm +16-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +16 +16 +Package_DIP +SMDIP-16_W11.48mm +16-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +16 +16 +Package_DIP +SMDIP-18_W7.62mm +18-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +18 +18 +Package_DIP +SMDIP-18_W9.53mm +18-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +18 +18 +Package_DIP +SMDIP-18_W9.53mm_Clearance8mm +18-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +18 +18 +Package_DIP +SMDIP-18_W11.48mm +18-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +18 +18 +Package_DIP +SMDIP-20_W7.62mm +20-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +20 +20 +Package_DIP +SMDIP-20_W9.53mm +20-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +20 +20 +Package_DIP +SMDIP-20_W9.53mm_Clearance8mm +20-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +20 +20 +Package_DIP +SMDIP-20_W11.48mm +20-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +20 +20 +Package_DIP +SMDIP-22_W7.62mm +22-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +22 +22 +Package_DIP +SMDIP-22_W9.53mm +22-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +22 +22 +Package_DIP +SMDIP-22_W9.53mm_Clearance8mm +22-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils), Clearance8mm +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil Clearance8mm +0 +22 +22 +Package_DIP +SMDIP-22_W11.48mm +22-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +22 +22 +Package_DIP +SMDIP-24_W7.62mm +24-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +24 +24 +Package_DIP +SMDIP-24_W9.53mm +24-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +24 +24 +Package_DIP +SMDIP-24_W11.48mm +24-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +24 +24 +Package_DIP +SMDIP-24_W15.24mm +24-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +24 +24 +Package_DIP +SMDIP-28_W15.24mm +28-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +28 +28 +Package_DIP +SMDIP-32_W7.62mm +32-lead surface-mounted (SMD) DIP package, row spacing 7.62 mm (300 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 7.62mm 300mil +0 +32 +32 +Package_DIP +SMDIP-32_W9.53mm +32-lead surface-mounted (SMD) DIP package, row spacing 9.53 mm (375 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 9.53mm 375mil +0 +32 +32 +Package_DIP +SMDIP-32_W11.48mm +32-lead surface-mounted (SMD) DIP package, row spacing 11.48 mm (451 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 11.48mm 451mil +0 +32 +32 +Package_DIP +SMDIP-32_W15.24mm +32-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +32 +32 +Package_DIP +SMDIP-40_W15.24mm +40-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +40 +40 +Package_DIP +SMDIP-40_W25.24mm +40-lead surface-mounted (SMD) DIP package, row spacing 25.24 mm (993 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 25.24mm 993mil +0 +40 +40 +Package_DIP +SMDIP-42_W15.24mm +42-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +42 +42 +Package_DIP +SMDIP-48_W15.24mm +48-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +48 +48 +Package_DIP +SMDIP-64_W15.24mm +64-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils) +SMD DIP DIL PDIP SMDIP 2.54mm 15.24mm 600mil +0 +64 +64 +Package_DIP +Toshiba_11-7A9 +Toshiba 11-7A9 package, like 6-lead dip package with missing pin 5, row spacing 7.62 mm (300 mils), https://toshiba.semicon-storage.com/info/docget.jsp?did=1421&prodName=TLP3021(S) +Toshiba 11-7A9 DIL DIP PDIP 2.54mm 7.62mm 300mil +0 +5 +5 +Package_DIP +Vishay_HVM-DIP-3_W7.62mm +3-lead though-hole mounted high-volatge DIP package (based on standard DIP-4), row spacing 7.62 mm (300 mils), see https://www.vishay.com/docs/91361/hexdip.pdf +THT DIP DIL PDIP 2.54mm 7.62mm 300mil Vishay HVMDIP HEXDIP +0 +4 +3 +Package_DirectFET +DirectFET_L4 +DirectFET L4 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=41 +DirectFET L4 MOSFET Infineon +0 +11 +3 +Package_DirectFET +DirectFET_L6 +DirectFET L6 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=42 +DirectFET L6 MOSFET Infineon +0 +13 +3 +Package_DirectFET +DirectFET_L8 +DirectFET L8 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=43 +DirectFET L8 MOSFET Infineon +0 +15 +3 +Package_DirectFET +DirectFET_LA +DirectFET LA https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=44 +DirectFET LA MOSFET Infineon +0 +15 +3 +Package_DirectFET +DirectFET_M2 +DirectFET M2 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=33 +DirectFET M2 MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_M4 +DirectFET M4 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=34 +DirectFET M4 MOSFET Infineon +0 +9 +3 +Package_DirectFET +DirectFET_MA +DirectFET MA https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=35 +DirectFET MA MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_MB +DirectFET MB https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=36 +DirectFET MB MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_MC +DirectFET MC https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=37 +DirectFET MC MOSFET Infineon +0 +10 +3 +Package_DirectFET +DirectFET_MD +DirectFET MD https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=38 +DirectFET MD MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_ME +DirectFET ME https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=39 +DirectFET ME MOSFET Infineon +0 +10 +3 +Package_DirectFET +DirectFET_MF +DirectFET MF https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=40 +DirectFET MF MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_MN +DirectFET MN https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=30 +DirectFET MN MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MP +DirectFET MP https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=28 +DirectFET MP MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MQ +DirectFET MQ https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=29 +DirectFET MQ MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MT +DirectFET MT https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=26 +DirectFET MT MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MU +DirectFET MU https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=32 +DirectFET MU MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MX +DirectFET MX https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=27 +DirectFET MX MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_MZ +DirectFET MZ https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=31 +DirectFET MZ MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_S1 +DirectFET S1 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=20 +DirectFET S1 MOSFET Infineon +0 +6 +3 +Package_DirectFET +DirectFET_S2 +DirectFET S2 https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=21 +DirectFET S2 MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_S3C +DirectFET S3C https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=25 +DirectFET S3C MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_SA +DirectFET SA https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=22 +DirectFET SA MOSFET Infineon +0 +8 +3 +Package_DirectFET +DirectFET_SB +DirectFET SB https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=23 +DirectFET SB MOSFET Infineon +0 +6 +3 +Package_DirectFET +DirectFET_SC +DirectFET SC https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=24 +DirectFET SC MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_SH +DirectFET SH https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=19 +DirectFET SH MOSFET Infineon +0 +6 +3 +Package_DirectFET +DirectFET_SJ +DirectFET SJ https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=18 +DirectFET SJ MOSFET Infineon +0 +7 +3 +Package_DirectFET +DirectFET_SQ +DirectFET SQ https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=17 +DirectFET SQ MOSFET Infineon +0 +6 +3 +Package_DirectFET +DirectFET_ST +DirectFET ST https://www.infineon.com/dgdl/Infineon-AN-1035-ApplicationNotes-v29_01-EN.pdf?fileId=5546d462533600a40153559159020f76#page=16 +DirectFET ST MOSFET Infineon +0 +7 +3 +Package_LCC +PLCC-20 +PLCC, 20 pins, surface mount +plcc smt +0 +20 +20 +Package_LCC +PLCC-20_SMD-Socket +PLCC, 20 pins, surface mount +plcc smt +0 +20 +20 +Package_LCC +PLCC-20_THT-Socket +PLCC, 20 pins, through hole +plcc leaded +0 +20 +20 +Package_LCC +PLCC-28 +PLCC, 28 pins, surface mount +plcc smt +0 +28 +28 +Package_LCC +PLCC-28_SMD-Socket +PLCC, 28 pins, surface mount +plcc smt +0 +28 +28 +Package_LCC +PLCC-28_THT-Socket +PLCC, 28 pins, through hole +plcc leaded +0 +28 +28 +Package_LCC +PLCC-32_11.4x14.0mm_P1.27mm +PLCC, 32 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/doc0015.pdf), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +32 +32 +Package_LCC +PLCC-32_THT-Socket +PLCC, 32 pins, through hole, http://www.assmann-wsw.com/fileadmin/datasheets/ASS_0981_CO.pdf +plcc leaded +0 +32 +32 +Package_LCC +PLCC-44 +PLCC, 44 pins, surface mount +plcc smt +0 +44 +44 +Package_LCC +PLCC-44_16.6x16.6mm_P1.27mm +PLCC, 44 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +44 +44 +Package_LCC +PLCC-44_SMD-Socket +PLCC, 44 pins, surface mount +plcc smt +0 +44 +44 +Package_LCC +PLCC-44_THT-Socket +PLCC, 44 pins, through hole +plcc leaded +0 +44 +44 +Package_LCC +PLCC-52 +PLCC, 52 pins, surface mount +plcc smt +0 +52 +52 +Package_LCC +PLCC-52_SMD-Socket +PLCC, 52 pins, surface mount +plcc smt +0 +52 +52 +Package_LCC +PLCC-52_THT-Socket +PLCC, 52 pins, through hole +plcc leaded +0 +52 +52 +Package_LCC +PLCC-68 +PLCC, 68 pins, surface mount +plcc smt +0 +68 +68 +Package_LCC +PLCC-68_24.2x24.2mm_P1.27mm +PLCC, 68 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +68 +68 +Package_LCC +PLCC-68_SMD-Socket +PLCC, 68 pins, surface mount +plcc smt +0 +68 +68 +Package_LCC +PLCC-68_THT-Socket +PLCC, 68 pins, through hole +plcc leaded +0 +68 +68 +Package_LCC +PLCC-84 +PLCC, 84 pins, surface mount +plcc smt +0 +84 +84 +Package_LCC +PLCC-84_29.3x29.3mm_P1.27mm +PLCC, 84 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_plcc_jLead_generator.py +PLCC LCC +0 +84 +84 +Package_LCC +PLCC-84_SMD-Socket +PLCC, 84 pins, surface mount +plcc smt +0 +84 +84 +Package_LCC +PLCC-84_THT-Socket +PLCC, 84 pins, through hole +plcc leaded +0 +84 +84 +Package_LGA +AMS_LGA-10-1EP_2.7x4mm_P0.6mm +LGA-10, http://ams.com/eng/content/download/951091/2269479/471718 +lga land grid array +0 +13 +11 +Package_LGA +AMS_LGA-20_4.7x4.5mm_P0.65mm +http://ams.com/eng/content/download/1008631/2361759/498838 +AMS LGA +0 +20 +20 +Package_LGA +Bosch_LGA-8_2.5x2.5mm_P0.65mm_ClockwisePinNumbering +LGA-8 +lga land grid array +0 +8 +8 +Package_LGA +Bosch_LGA-8_2x2.5mm_P0.65mm_ClockwisePinNumbering +LGA-8, https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMP280-DS001-18.pdf +lga land grid array +0 +8 +8 +Package_LGA +Bosch_LGA-8_3x3mm_P0.8mm_ClockwisePinNumbering +Bosch LGA, 8 Pin (https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BME680-DS001-00.pdf#page=44), generated with kicad-footprint-generator ipc_noLead_generator.py +Bosch LGA NoLead +0 +8 +8 +Package_LGA +Bosch_LGA-14_3x2.5mm_P0.5mm +LGA-14 Bosch https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMI160-DS000-07.pdf +lga land grid array +0 +14 +14 +Package_LGA +LGA-8_3x5mm_P1.25mm +LGA-8 +lga land grid array +0 +8 +8 +Package_LGA +LGA-12_2x2mm_P0.5mm +LGA12 +lga land grid array +0 +12 +12 +Package_LGA +LGA-14_2x2mm_P0.35mm_LayoutBorder3x4y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lis2dh.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LGA NoLead +0 +14 +14 +Package_LGA +LGA-14_3x2.5mm_P0.5mm_LayoutBorder3x4y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lsm6ds3.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LGA NoLead +0 +14 +14 +Package_LGA +LGA-14_3x5mm_P0.8mm_LayoutBorder1x6y +LGA, 14 Pin (http://www.st.com/resource/en/datasheet/lsm303dlhc.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LGA NoLead +0 +14 +14 +Package_LGA +LGA-16_3x3mm_P0.5mm +http://www.memsic.com/userfiles/files/DataSheets/Magnetic-Sensors-Datasheets/MMC5883MA-RevC.pdf +lga land grid array +0 +16 +16 +Package_LGA +LGA-16_3x3mm_P0.5mm_LayoutBorder3x5y +LGA, 16 Pin (http://www.st.com/resource/en/datasheet/lis331hh.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LGA NoLead +0 +16 +16 +Package_LGA +LGA-16_4x4mm_P0.65mm_LayoutBorder4x4y +LGA, 16 Pin (http://www.st.com/resource/en/datasheet/l3gd20.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +LGA NoLead +0 +16 +16 +Package_LGA +LGA-24L_3x3.5mm_P0.43mm +LGA 24L 3x3.5mm Pitch 0.43mm +LGA 24L 3x3.5mm Pitch 0.43mm +0 +24 +24 +Package_LGA +LGA-28_5.2x3.8mm_P0.5mm +LGA 28 5.2x3.8mm Pitch 0.5mm +LGA 28 5.2x3.8mm Pitch 0.5mm +0 +28 +28 +Package_LGA +Linear_LGA-133_15.0x15.0mm_Layout12x12_P1.27mm +Analog Devices (Linear Tech), 133-pin LGA uModule, 15.0x15.0x4.32mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf +133 pin lga +0 +133 +133 +Package_LGA +NXP_LGA-8_3x5mm_P1.25mm_H1.1mm +NXP LGA, 8 Pin (https://www.nxp.com/docs/en/data-sheet/MPL3115A2.pdf#page=42), generated with kicad-footprint-generator ipc_noLead_generator.py +NXP LGA NoLead +0 +8 +8 +Package_LGA +NXP_LGA-8_3x5mm_P1.25mm_H1.2mm +NXP LGA, 8 Pin (https://www.nxp.com/docs/en/data-sheet/MPL115A1.pdf#page=15), generated with kicad-footprint-generator ipc_noLead_generator.py +NXP LGA NoLead +0 +8 +8 +Package_LGA +ST_HLGA-10_2.5x2.5mm_P0.6mm_LayoutBorder3x2y +ST HLGA, 10 Pin (https://www.st.com/resource/en/datasheet/lps25hb.pdf#page=46), generated with kicad-footprint-generator ipc_noLead_generator.py +ST HLGA NoLead +0 +10 +10 +Package_LGA +Texas_SIL0008D_MicroSiP-8-1EP_2.8x3mm_P0.65mm_EP1.1x1.9mm +Texas SIL0008D MicroSiP, 8 Pin (http://www.ti.com/lit/ds/symlink/tps82130.pdf#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +12 +9 +Package_LGA +Texas_SIL0008D_MicroSiP-8-1EP_2.8x3mm_P0.65mm_EP1.1x1.9mm_ThermalVias +Texas SIL0008D MicroSiP, 8 Pin (http://www.ti.com/lit/ds/symlink/tps82130.pdf#page=19), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +16 +9 +Package_LGA +Texas_SIL0010A_MicroSiP-10-1EP_3.8x3mm_P0.6mm_EP0.7x2.9mm +Texas SIL0010A MicroSiP, 10 Pin (http://www.ti.com/lit/ml/mpds579b/mpds579b.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +14 +11 +Package_LGA +Texas_SIL0010A_MicroSiP-10-1EP_3.8x3mm_P0.6mm_EP0.7x2.9mm_ThermalVias +Texas SIL0010A MicroSiP, 10 Pin (http://www.ti.com/lit/ml/mpds579b/mpds579b.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +Texas MicroSiP NoLead +0 +18 +11 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP4x4mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00482-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +154 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP4x4mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00482-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +171 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP5x5mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00476-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +161 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP5x5mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00476-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +187 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP6.61x5.615mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00485-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +165 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP6.61x5.615mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00485-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +196 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP7.2x6.35mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00487-01.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +175 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP7.2x6.35mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00487-01.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +218 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP8.93x8.7mm +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00479-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +194 +145 +Package_QFP +EQFP-144-1EP_20x20mm_P0.5mm_EP8.93x8.7mm_ThermalVias +EQFP, 144 Pin (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00479-02.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +EQFP QFP +0 +259 +145 +Package_QFP +HTQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad +HTQFP-64 Pitch 0.5 +0 +69 +65 +Package_QFP +HTQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask4.4x4.4mm_ThermalVias +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [HTQFP] thermal pad +HTQFP-64 Pitch 0.5 +0 +135 +65 +Package_QFP +LQFP-32_5x5mm_P0.5mm +LQFP, 32 Pin (https://www.nxp.com/docs/en/package-information/SOT401-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +32 +32 +Package_QFP +LQFP-32_7x7mm_P0.8mm +LQFP, 32 Pin (https://www.nxp.com/docs/en/package-information/SOT358-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +32 +32 +Package_QFP +LQFP-36_7x7mm_P0.65mm +LQFP, 36 Pin (https://www.onsemi.com/pub/Collateral/561AV.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +36 +36 +Package_QFP +LQFP-44_10x10mm_P0.8mm +LQFP, 44 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ASS23225W.pdf?&fsrch=1), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +44 +44 +Package_QFP +LQFP-48-1EP_7x7mm_P0.5mm_EP3.6x3.6mm +LQFP, 48 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +58 +49 +Package_QFP +LQFP-48-1EP_7x7mm_P0.5mm_EP3.6x3.6mm_ThermalVias +LQFP, 48 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +75 +49 +Package_QFP +LQFP-48_7x7mm_P0.5mm +LQFP, 48 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2358-16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +48 +48 +Package_QFP +LQFP-52-1EP_10x10mm_P0.65mm_EP4.8x4.8mm +LQFP, 52 Pin (https://www.onsemi.com/pub/Collateral/848H-01.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +62 +53 +Package_QFP +LQFP-52-1EP_10x10mm_P0.65mm_EP4.8x4.8mm_ThermalVias +LQFP, 52 Pin (https://www.onsemi.com/pub/Collateral/848H-01.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +95 +53 +Package_QFP +LQFP-52_10x10mm_P0.65mm +LQFP, 52 Pin (https://www.nxp.com/docs/en/package-information/98ARL10526D.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +52 +52 +Package_QFP +LQFP-52_14x14mm_P1mm +LQFP, 52 Pin (http://www.holtek.com/documents/10179/116711/HT1632Cv170.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +52 +52 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP5x5mm +LQFP, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/adv7611.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +90 +65 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP5x5mm_ThermalVias +LQFP, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/adv7611.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +107 +65 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm +LQFP, 64 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ARH98426A.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +90 +65 +Package_QFP +LQFP-64-1EP_10x10mm_P0.5mm_EP6.5x6.5mm_ThermalVias +LQFP, 64 Pin (https://www.nxp.com/files-static/shared/doc/package_info/98ARH98426A.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +127 +65 +Package_QFP +LQFP-64_7x7mm_P0.4mm +LQFP, 64 Pin (https://www.nxp.com/docs/en/package-information/SOT414-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-64_10x10mm_P0.5mm +LQFP, 64 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-64_14x14mm_P0.8mm +LQFP, 64 Pin (https://www.nxp.com/docs/en/package-information/SOT791-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +64 +64 +Package_QFP +LQFP-80_10x10mm_P0.4mm +LQFP, 80 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/q80.10x10.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-80_12x12mm_P0.5mm +LQFP, 80 Pin (https://www.nxp.com/docs/en/package-information/SOT315-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-80_14x14mm_P0.65mm +LQFP, 80 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +80 +80 +Package_QFP +LQFP-100_14x14mm_P0.5mm +LQFP, 100 Pin (https://www.nxp.com/docs/en/package-information/SOT407-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +100 +100 +Package_QFP +LQFP-128_14x14mm_P0.4mm +LQFP, 128 Pin (https://www.renesas.com/eu/en/package-image/pdf/outdrawing/q128.14x14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +128 +128 +Package_QFP +LQFP-128_14x20mm_P0.5mm +LQFP, 128 Pin (https://www.nxp.com/docs/en/package-information/SOT425-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +128 +128 +Package_QFP +LQFP-144_20x20mm_P0.5mm +LQFP, 144 Pin (http://ww1.microchip.com/downloads/en/PackagingSpec/00000049BQ.pdf#page=425), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +144 +144 +Package_QFP +LQFP-160_24x24mm_P0.5mm +LQFP, 160 Pin (https://www.nxp.com/docs/en/package-information/SOT435-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +160 +160 +Package_QFP +LQFP-176_20x20mm_P0.4mm +LQFP, 176 Pin (https://www.onsemi.com/pub/Collateral/566DB.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +176 +176 +Package_QFP +LQFP-176_24x24mm_P0.5mm +LQFP, 176 Pin (https://www.st.com/resource/en/datasheet/stm32f207vg.pdf#page=163), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +176 +176 +Package_QFP +LQFP-208_28x28mm_P0.5mm +LQFP, 208 Pin (https://www.nxp.com/docs/en/package-information/SOT459-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +208 +208 +Package_QFP +LQFP-216_24x24mm_P0.4mm +LQFP, 216 Pin (https://www.onsemi.com/pub/Collateral/561BE.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +LQFP QFP +0 +216 +216 +Package_QFP +MQFP-44_10x10mm_P0.8mm +MQFP, 44 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ad7722.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MQFP QFP +0 +44 +44 +Package_QFP +PQFP-44_10x10mm_P0.8mm +44-Lead Plastic Quad Flatpack - 10x10x2.5mm Body (http://www.onsemi.com/pub/Collateral/122BK.PDF) +PQFP 0.8 +0 +44 +44 +Package_QFP +PQFP-80_14x20mm_P0.8mm +PQFP80 14x20 / QIP80E CASE 122BS (see ON Semiconductor 122BS.PDF) +QFP 0.8 +0 +80 +80 +Package_QFP +PQFP-100_14x20mm_P0.65mm +PQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +PQFP QFP +0 +100 +100 +Package_QFP +PQFP-112_20x20mm_P0.65mm +PQFP, 112 pins, 20mm sq body, 0.65mm pitch (http://cache.freescale.com/files/shared/doc/package_info/98ASS23330W.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 112 +0 +112 +112 +Package_QFP +PQFP-132_24x24mm_P0.635mm +PQFP, 132 pins, 24mm sq body, 0.635mm pitch (https://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-02-databook.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 132 +0 +132 +132 +Package_QFP +PQFP-132_24x24mm_P0.635mm_i386 +PQFP, 132 pins, 24mm sq body, 0.635mm pitch, Intel 386EX (https://www.intel.com/content/dam/www/public/us/en/documents/packaging-databooks/packaging-chapter-02-databook.pdf, http://www.nxp.com/docs/en/application-note/AN4388.pdf) +PQFP 132 Intel 386EX +0 +132 +132 +Package_QFP +PQFP-144_28x28mm_P0.65mm +PQFP, 144 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +PQFP QFP +0 +144 +144 +Package_QFP +PQFP-160_28x28mm_P0.65mm +PQFP, 160 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +PQFP QFP +0 +160 +160 +Package_QFP +PQFP-208_28x28mm_P0.5mm +PQFP, 208 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +PQFP QFP +0 +208 +208 +Package_QFP +PQFP-240_32.1x32.1mm_P0.5mm +PQFP, 240 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +PQFP QFP +0 +240 +240 +Package_QFP +PQFP-256_28x28mm_P0.4mm +PQFP256 28x28 / QFP256J CASE 122BX (see ON Semiconductor 122BX.PDF) +QFP 0.4 +0 +256 +256 +Package_QFP +TQFP-32_7x7mm_P0.8mm +32-Lead Plastic Thin Quad Flatpack (PT) - 7x7x1.0 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +32 +32 +Package_QFP +TQFP-44-1EP_10x10mm_P0.8mm_EP4.5x4.5mm +44-Lead Plastic Thin Quad Flatpack (MW) - 10x10x1.0 mm Body [TQFP] With 4.5x4.5 mm Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +54 +45 +Package_QFP +TQFP-44_10x10mm_P0.8mm +44-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1.0 mm Body [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +44 +44 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP3.5x3.5mm +48-Lead Thin Quad Flatpack (PT) - 7x7x1.0 mm Body [TQFP] With Exposed Pad (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.5 +0 +53 +49 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP5x5mm +TQFP, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 45)), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +65 +49 +Package_QFP +TQFP-48-1EP_7x7mm_P0.5mm_EP5x5mm_ThermalVias +TQFP, 48 Pin (https://www.trinamic.com/fileadmin/assets/Products/ICs_Documents/TMC2100_datasheet_Rev1.08.pdf (page 45)), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +91 +49 +Package_QFP +TQFP-48_7x7mm_P0.5mm +48 LEAD TQFP 7x7mm (see MICREL TQFP7x7-48LD-PL-1.pdf) +QFP 0.5 +0 +48 +48 +Package_QFP +TQFP-52-1EP_10x10mm_P0.65mm_EP6.5x6.5mm +TQFP, 52 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_52_1.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +78 +53 +Package_QFP +TQFP-52-1EP_10x10mm_P0.65mm_EP6.5x6.5mm_ThermalVias +TQFP, 52 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_52_1.pdf), generated with kicad-footprint-generator ipc_qfp_generator.py +TQFP QFP +0 +79 +53 +Package_QFP +TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm +64-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [TQFP] thermal pad +QFP 0.5 +0 +90 +65 +Package_QFP +TQFP-64_7x7mm_P0.4mm +TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 932BH.PDF) +QFP 0.4 +0 +64 +64 +Package_QFP +TQFP-64_10x10mm_P0.5mm +TQFP, 64 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +64 +64 +Package_QFP +TQFP-64_14x14mm_P0.8mm +64-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.8 +0 +64 +64 +Package_QFP +TQFP-80-1EP_14x14mm_P0.65mm_EP9.5x9.5mm +80-Lead Plastic Thin Quad Flatpack (PF) - 14x14mm body, 9.5mm sq thermal pad (http://www.analog.com/media/en/technical-documentation/data-sheets/AD9852.pdf) +QFP 0.65 +0 +85 +81 +Package_QFP +TQFP-80_12x12mm_P0.5mm +80-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.5 +0 +80 +80 +Package_QFP +TQFP-80_14x14mm_P0.65mm +80-Lead Plastic Thin Quad Flatpack (PF) - 14x14x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.65 +0 +80 +80 +Package_QFP +TQFP-100-1EP_14x14mm_P0.5mm_EP5x5mm +TQFP, 100 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_100_4.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +117 +101 +Package_QFP +TQFP-100-1EP_14x14mm_P0.5mm_EP5x5mm_ThermalVias +TQFP, 100 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/tqfp_edsv/sv_100_4.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +143 +101 +Package_QFP +TQFP-100_12x12mm_P0.4mm +100-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.4 +0 +100 +100 +Package_QFP +TQFP-100_14x14mm_P0.5mm +TQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +100 +100 +Package_QFP +TQFP-120_14x14mm_P0.4mm +TQFP120 14x14 / TQFP120 CASE 932AZ (see ON Semiconductor 932AZ.PDF) +QFP 0.4 +0 +120 +120 +Package_QFP +TQFP-128_14x14mm_P0.4mm +TQFP128 14x14 / TQFP128 CASE 932BB (see ON Semiconductor 932BB.PDF) +QFP 0.4 +0 +128 +128 +Package_QFP +TQFP-144_16x16mm_P0.4mm +144-Lead Plastic Thin Quad Flatpack (PH) - 16x16x1 mm Body, 2.00 mm Footprint [TQFP] (see Microchip Packaging Specification 00000049BS.pdf) +QFP 0.4 +0 +144 +144 +Package_QFP +TQFP-144_20x20mm_P0.5mm +TQFP, 144 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +144 +144 +Package_QFP +TQFP-176_24x24mm_P0.5mm +TQFP, 176 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +TQFP QFP +0 +176 +176 +Package_QFP +VQFP-80_14x14mm_P0.65mm +VQFP, 80 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +VQFP QFP +0 +80 +80 +Package_QFP +VQFP-100_14x14mm_P0.5mm +VQFP, 100 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +VQFP QFP +0 +100 +100 +Package_QFP +VQFP-128_14x14mm_P0.4mm +VQFP, 128 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +VQFP QFP +0 +128 +128 +Package_QFP +VQFP-176_20x20mm_P0.4mm +VQFP, 176 Pin (http://www.microsemi.com/index.php?option=com_docman&task=doc_download&gid=131095), generated with kicad-footprint-generator ipc_gullwing_generator.py +VQFP QFP +0 +176 +176 +Package_SIP +PowerIntegrations_eSIP-7C +eSIP-7C Vertical Flat Package with Heatsink Tab, https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf +Power Integrations E Package +0 +6 +6 +Package_SIP +PowerIntegrations_eSIP-7F +eSIP-7F Flat Package with Heatsink Tab https://ac-dc.power.com/sites/default/files/product-docs/linkswitch-ph_family_datasheet.pdf +Power Integrations L Package +0 +6 +6 +Package_SIP +SIP-8_19x3mm_P2.54mm +SIP 8-pin (http://www.njr.com/semicon/PDF/package/SIP8_E.pdf) +SIP8 +0 +8 +8 +Package_SIP +SIP-9_21.54x3mm_P2.54mm +SIP 9-pin () +SIP8 +0 +9 +9 +Package_SIP +SIP-9_22.3x3mm_P2.54mm +SIP 9-pin () +SIP8 +0 +9 +9 +Package_SIP +SIP3_11.6x8.5mm +RECOM,R78EXX,https://www.recom-power.com/pdf/Innoline/R-78Exx-0.5.pdf +SIP3 Regulator Module +0 +3 +3 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Angled +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Angled_NoHole +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP4_Sharp-SSR_P7.62mm_Straight +SIP4 Footprint for SSR made by Sharp +Solid State relais SSR Sharp +0 +4 +4 +Package_SIP +SIP9_Housing +SIP9 +SIP9 +0 +9 +9 +Package_SIP +SIP9_Housing_BigPads +SIP9, large pads +SIP9 +0 +9 +9 +Package_SIP +SLA704XM +SIP SLA704XM (http://www.sumzi.com/upload/files/2007/07/2007073114282034189.PDF) +SIP +0 +18 +18 +Package_SIP +STK672-040-E +SIP-22 (http://www.onsemi.com/pub_link/Collateral/EN5227-D.PDF) +SIP-22 +0 +22 +22 +Package_SIP +STK672-080-E +SIP-15 (http://www.onsemi.com/pub_link/Collateral/EN6507-D.PDF) +SIP-15 +0 +15 +15 +Package_SIP +Sanyo_STK4xx-15_59.2x8.0mm_P2.54mm +Sanyo SIP-15, 59.2mm x 8.0mm bosy size, STK-433E STK-435E STK-436E (http://datasheet.octopart.com/STK430-Sanyo-datasheet-107060.pdf) +Sanyo SIP-15 +0 +15 +15 +Package_SIP +Sanyo_STK4xx-15_78.0x8.0mm_P2.54mm +Sanyo SIP-15, 78.0mm x 8.0mm bosy size, STK-437E STK-439E STK-441E STK-443E (http://datasheet.octopart.com/STK430-Sanyo-datasheet-107060.pdf) +Sanyo SIP-15 +0 +15 +15 +Package_SO +Diodes_PSOP-8 +8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf) +SSOP 0.50 exposed pad +0 +12 +9 +Package_SO +Diodes_SO-8EP +8-Lead Plastic SO, Exposed Die Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf) +SO exposed pad +0 +9 +9 +Package_SO +ETSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3x4.2mm +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body with Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +27 +21 +Package_SO +HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm +HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOP SO +0 +13 +9 +Package_SO +HSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.1mm_ThermalVias +HSOP, 8 Pin (https://www.st.com/resource/en/datasheet/l5973d.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOP SO +0 +20 +9 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown +HSOP 11.0x15.9mm Pitch 1.27mm Slug Down (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +23 +21 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias +HSOP 11.0x15.9mm Pitch 1.27mm Slug Down Thermal Vias (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +45 +21 +Package_SO +HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugUp +HSOP 11.0x15.9mm Pitch 1.27mm Slug Up (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 1.27mm +0 +20 +20 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown +HSOP 11.0x15.9mm Pitch 0.65mm Slug Down (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +39 +37 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugDown_ThermalVias +HSOP 11.0x15.9mm Pitch 0.65mm Slug Down Thermal Vias (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +61 +37 +Package_SO +HSOP-36-1EP_11.0x15.9mm_P0.65mm_SlugUp +HSOP 11.0x15.9mm Pitch 0.65mm Slug Up (PowerSO-36) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/vn808cm-32-e.pdf, http://www.st.com/resource/en/application_note/cd00003801.pdf) +HSOP 11.0 x 15.9mm Pitch 0.65mm +0 +36 +36 +Package_SO +HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm +HTSOP, 8 Pin (https://media.digikey.com/pdf/Data%20Sheets/Rohm%20PDFs/BD9G341EFJ.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSOP SO +0 +13 +9 +Package_SO +HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm_ThermalVias +HTSOP, 8 Pin (https://media.digikey.com/pdf/Data%20Sheets/Rohm%20PDFs/BD9G341EFJ.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSOP SO +0 +20 +9 +Package_SO +HTSSOP-14-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3.1mm +HTSSOP, 14 Pin (http://www.ti.com/lit/ds/symlink/lm5161.pdf#page=34), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +20 +15 +Package_SO +HTSSOP-14-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3.1mm_ThermalVias +HTSSOP, 14 Pin (http://www.ti.com/lit/ds/symlink/lm5161.pdf#page=34), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +36 +15 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm +16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad; (http://www.ti.com/lit/ds/symlink/drv8833.pdf) +SSOP 0.65 +0 +29 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm +HTSSOP, 16 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +20 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm_ThermalVias +HTSSOP, 16 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/LTC7810.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +27 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3mm_ThermalVias +16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf) +SSOP 0.65 +0 +46 +17 +Package_SO +HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3x3mm +HTSSOP, 16 Pin (https://www.st.com/resource/en/datasheet/stp08cp05.pdf#page=20), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +21 +17 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.85x4mm +HTSSOP, 20 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0108.PDF U20E-1), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +23 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [HTSSOP], with thermal pad with vias +HTSSOP 0.65 +0 +29 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.4x3.7mm +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/bq24006.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +24 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +26 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm_ThermalVias +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +42 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.75x3.43mm_ThermalVias_HandSolder +HTSSOP, 20 Pin (http://www.ti.com/lit/ds/symlink/tlc5971.pdf#page=37&zoom=160,-90,3), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +42 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.96x2.96mm +HTSSOP, 20 Pin (https://www.ti.com/lit/ds/symlink/tps2663.pdf#page=49), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +23 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_Mask2.96x2.96mm_ThermalVias +HTSSOP, 20 Pin (https://www.ti.com/lit/ds/symlink/tps2663.pdf#page=49), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +42 +21 +Package_SO +HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_ThermalVias +20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [HTSSOP], with thermal pad with vias +HTSSOP 0.65 +0 +45 +21 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.2x5mm +HTSSOP, 24 Pin (https://www.st.com/resource/en/datasheet/stp16cp05.pdf#page=25), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +31 +25 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x4.68mm +HTSSOP, 24 Pin (http://www.ti.com/lit/ds/symlink/tps703.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +28 +25 +Package_SO +HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x4.68mm_ThermalVias +HTSSOP, 24 Pin (http://www.ti.com/lit/ds/symlink/tps703.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +47 +25 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x5.4mm +HTSSOP, 28 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0108.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +30 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x5.4mm_ThermalVias +HTSSOP, 28 Pin (https://pdfserv.maximintegrated.com/package_dwgs/21-0108.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +41 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +39 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_Mask2.4x6.17mm +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +40 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_Mask2.4x6.17mm_ThermalVias +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +55 +29 +Package_SO +HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_ThermalVias +HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad +TSSOP HTSSOP 0.65 thermal pad +0 +58 +29 +Package_SO +HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm +HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf) +SSOP 0.65 PowerPAD +0 +43 +33 +Package_SO +HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm_ThermalVias +HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf) +SSOP 0.65 PowerPAD +0 +83 +33 +Package_SO +HTSSOP-38-1EP_6.1x12.5mm_P0.65mm_EP5.2x12.5mm_Mask3.39x6.35mm +HTSSOP, 38 Pin (http://www.ti.com/lit/ds/symlink/tlc5951.pdf#page=47&zoom=140,-67,15), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +46 +39 +Package_SO +HTSSOP-38-1EP_6.1x12.5mm_P0.65mm_EP5.2x12.5mm_Mask3.39x6.35mm_ThermalVias +HTSSOP, 38 Pin (http://www.ti.com/lit/ds/symlink/tlc5951.pdf#page=47&zoom=140,-67,15), generated with kicad-footprint-generator ipc_gullwing_generator.py +HTSSOP SO +0 +87 +39 +Package_SO +HTSSOP-56-1EP_6.1x14mm_P0.5mm_EP3.61x6.35mm +HTSSOP56: plastic thin shrink small outline package http://www.ti.com/lit/ds/symlink/drv8301.pdf +HTSSOP 0.5 +0 +72 +57 +Package_SO +Infineon_PG-DSO-8-27_3.9x4.9mm_EP2.65x3mm +Infineon PG-DSO, 8 Pin (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-8-27), generated with kicad-footprint-generator ipc_gullwing_generator.py +Infineon PG-DSO SO +0 +13 +9 +Package_SO +Infineon_PG-DSO-8-27_3.9x4.9mm_EP2.65x3mm_ThermalVias +Infineon PG-DSO, 8 Pin (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-8-27), generated with kicad-footprint-generator ipc_gullwing_generator.py +Infineon PG-DSO SO +0 +23 +9 +Package_SO +Infineon_PG-DSO-8-43 +Infineon_PG-DSO-8-43 +DSO DSO-8 SOIC SOIC-8 +0 +12 +9 +Package_SO +Infineon_PG-DSO-12-9 +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/) +PG-DSO +0 +23 +13 +Package_SO +Infineon_PG-DSO-12-9_ThermalVias +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/) +PG-DSO +0 +42 +13 +Package_SO +Infineon_PG-DSO-12-11 +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/) +PG-DSO +0 +23 +13 +Package_SO +Infineon_PG-DSO-12-11_ThermalVias +Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/) +PG-DSO +0 +42 +13 +Package_SO +Infineon_PG-DSO-20-30 +Infineon SO package 20pin, exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/) +DSO-20 +0 +31 +21 +Package_SO +Infineon_PG-DSO-20-30_ThermalVias +Infineon SO package 20pin, exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/) +DSO-20 +0 +45 +21 +Package_SO +Infineon_PG-DSO-20-32 +Infineon SO package 20pin without exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-32/) +DSO-20 +0 +20 +20 +Package_SO +Infineon_PG-DSO-20-85 +Infineon SO package 20pin with exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-85/) +DSO-20 +0 +31 +21 +Package_SO +Infineon_PG-DSO-20-85_ThermalVias +Infineon SO package 20pin with exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-85/) +DSO-20 +0 +113 +21 +Package_SO +Infineon_PG-DSO-20-87 +Infineon SO package 20pin without exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/) +DSO-20 +0 +20 +20 +Package_SO +Infineon_PG-TSDSO-14-22 +Infineon_PG-TSDSO-14-22 +Infineon TSDSO 14-22 +0 +17 +15 +Package_SO +Linear_MSOP-12-16-1EP_3x4mm_P0.5mm +12-Lead Plastic Micro Small Outline Package (MS) [MSOP], variant of MSOP-16 (see http://cds.linear.com/docs/en/datasheet/3630fd.pdf) +SSOP 0.5 +0 +15 +13 +Package_SO +Linear_MSOP-12-16_3x4mm_P0.5mm +12-Lead Plastic Micro Small Outline Package (MS) [MSOP], variant of MSOP-16 (see https://www.analog.com/media/en/technical-documentation/data-sheets/3748fb.pdf) +SSOP 0.5 +0 +12 +12 +Package_SO +MFSOP6-4_4.4x3.6mm_P1.27mm +https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.4pin%20MFSOP6.html +MFSOP 4 pin SMD +0 +4 +4 +Package_SO +MFSOP6-5_4.4x3.6mm_P1.27mm +https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.5pin%20MFSOP6.html +MFSOP 4 pin SMD +0 +5 +5 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.68x1.88mm +MSOP, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4440fb.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.68x1.88mm_ThermalVias +MSOP, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/4440fb.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +18 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.73x1.85mm +MSOP, 8 Pin (http://www.ti.com/lit/ds/symlink/lm25085.pdf#page=32), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.73x1.85mm_ThermalVias +MSOP, 8 Pin (http://www.ti.com/lit/ds/symlink/lm25085.pdf#page=32), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +18 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.95x2.15mm +MSOP, 8 Pin (http://www.st.com/resource/en/datasheet/pm8834.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +13 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP1.95x2.15mm_ThermalVias +MSOP, 8 Pin (http://www.st.com/resource/en/datasheet/pm8834.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +18 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP2.5x3mm_Mask1.73x2.36mm +MSOP, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf#page=15), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +14 +9 +Package_SO +MSOP-8-1EP_3x3mm_P0.65mm_EP2.5x3mm_Mask1.73x2.36mm_ThermalVias +MSOP, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/mic5355_6.pdf#page=15), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +19 +9 +Package_SO +MSOP-8_3x3mm_P0.65mm +MSOP, 8 Pin (https://www.jedec.org/system/files/docs/mo-187F.pdf variant AA), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +8 +8 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm +MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +15 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm_ThermalVias +MSOP, 10 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3805fg.pdf#page=18), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +20 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.73x1.98mm +MSOP, 10 Pin (www.allegromicro.com/~/media/Files/Datasheets/A4952-3-Datasheet.ashx?la=en#page=10), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +15 +11 +Package_SO +MSOP-10-1EP_3x3mm_P0.5mm_EP1.73x1.98mm_ThermalVias +MSOP, 10 Pin (www.allegromicro.com/~/media/Files/Datasheets/A4952-3-Datasheet.ashx?la=en#page=10), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +20 +11 +Package_SO +MSOP-10_3x3mm_P0.5mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +10 +10 +Package_SO +MSOP-12-1EP_3x4mm_P0.65mm_EP1.65x2.85mm +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3652fe.pdf#page=24), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +17 +13 +Package_SO +MSOP-12-1EP_3x4mm_P0.65mm_EP1.65x2.85mm_ThermalVias +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3652fe.pdf#page=24), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +24 +13 +Package_SO +MSOP-12-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +19 +13 +Package_SO +MSOP-12-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm_ThermalVias +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +25 +13 +Package_SO +MSOP-12-16_3x4mm_P0.5mm +10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.5 +0 +12 +12 +Package_SO +MSOP-12_3x4mm_P0.65mm +MSOP, 12 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/6957fb.pdf#page=36), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +12 +12 +Package_SO +MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm +MSOP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-msop/05081667_F_MSE16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +21 +17 +Package_SO +MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm_ThermalVias +MSOP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-msop/05081667_F_MSE16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +28 +17 +Package_SO +MSOP-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm +MSOP, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +21 +17 +Package_SO +MSOP-16-1EP_3x4mm_P0.5mm_EP1.65x2.85mm_ThermalVias +MSOP, 16 Pin (http://cds.linear.com/docs/en/datasheet/37551fd.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +28 +17 +Package_SO +MSOP-16_3x4.039mm_P0.5mm +MSOP, 16 Pin (http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-msop/05081669_A_MS16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +16 +16 +Package_SO +MSOP-16_3x4mm_P0.5mm +MSOP, 16 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/436412f.pdf#page=22), generated with kicad-footprint-generator ipc_gullwing_generator.py +MSOP SO +0 +16 +16 +Package_SO +ONSemi_SO-8FL_488AA +ON Semi DFN5 5x6mm 1.27P SO-8FL CASE 488A https://www.onsemi.com/pub/Collateral/488AA.PDF +ON Semi DFN5 5x6mm 1.27P SO-8FL CASE 488A +0 +5 +5 +Package_SO +OnSemi_Micro8 +ON Semiconductor Micro8 (Case846A-02): https://www.onsemi.com/pub/Collateral/846A-02.PDF +micro8 +0 +8 +8 +Package_SO +PSOP-44_16.9x27.17mm_P1.27mm +PSOP44: plastic thin shrink small outline package; 44 leads; body width 16.90 mm +PSOP 1.27 +0 +44 +44 +Package_SO +PowerIntegrations_SO-8 +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://ac-dc.power.com/sites/default/files/product-docs/senzero_family_datasheet.pdf +SOIC 1.27 +0 +8 +8 +Package_SO +PowerIntegrations_SO-8B +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf +SOIC 1.27 +0 +7 +7 +Package_SO +PowerIntegrations_SO-8C +Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf +SOIC 1.27 +0 +7 +7 +Package_SO +PowerIntegrations_eSOP-12B +eSOP-12B SMT Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf +Power Integrations K Package +0 +12 +12 +Package_SO +PowerPAK_SO-8_Dual +PowerPAK SO-8 Dual (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72600/72600.pdf) +PowerPAK SO-8 Dual +0 +10 +6 +Package_SO +PowerPAK_SO-8_Single +PowerPAK SO-8 Single (https://www.vishay.com/docs/71655/powerpak.pdf, https://www.vishay.com/docs/72599/72599.pdf) +PowerPAK SO-8 Single +0 +9 +5 +Package_SO +QSOP-16_3.9x4.9mm_P0.635mm +16-Lead Plastic Shrink Small Outline Narrow Body (QR)-.150" Body [QSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.635 +0 +16 +16 +Package_SO +QSOP-20_3.9x8.7mm_P0.635mm +20-Lead Plastic Shrink Small Outline Narrow Body (http://www.analog.com/media/en/technical-documentation/data-sheets/ADuM7640_7641_7642_7643.pdf) +QSOP 0.635 +0 +20 +20 +Package_SO +QSOP-24_3.9x8.7mm_P0.635mm +24-Lead Plastic Shrink Small Outline Narrow Body (QR)-.150" Body [QSOP] (see Microchip Packaging Specification 00000049CH.pdf) +QSOP 0.635 +0 +24 +24 +Package_SO +SC-74-6_1.5x2.9mm_P0.95mm +SC-74, 6 Pin (https://www.nxp.com/docs/en/package-information/SOT457.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SC-74 SO +0 +6 +6 +Package_SO +SO-4_4.4x2.3mm_P1.27mm +4-Lead Plastic Small Outline (SO), see http://datasheet.octopart.com/OPIA403BTRE-Optek-datasheet-5328560.pdf +SO SOIC 1.27 +0 +4 +4 +Package_SO +SO-4_4.4x3.6mm_P2.54mm +4-Lead Plastic Small Outline (SO), see https://www.elpro.org/de/index.php?controller=attachment&id_attachment=339 +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-4_4.4x3.9mm_P2.54mm +SO, 4 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=10047&prodName=TLP3123), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +4 +4 +Package_SO +SO-4_4.4x4.3mm_P2.54mm +4-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/docs/AV02-0173EN +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-4_7.6x3.6mm_P2.54mm +4-Lead Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf) +SO SOIC 2.54 +0 +4 +4 +Package_SO +SO-5_4.4x3.6mm_P1.27mm +5-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SO SOIC 1.27 +0 +5 +5 +Package_SO +SO-6L_10x3.84mm_P1.27mm +6-pin plasic small outline 7,5mm long https://toshiba.semicon-storage.com/info/docget.jsp?did=53548&prodName=TLP2770 +SO-6L +0 +6 +6 +Package_SO +SO-6_4.4x3.6mm_P1.27mm +6-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SO SOIC 1.27 +0 +6 +6 +Package_SO +SO-8_3.9x4.9mm_P1.27mm +SO, 8 Pin (https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +8 +8 +Package_SO +SO-8_5.3x6.2mm_P1.27mm +SO, 8 Pin (https://www.ti.com/lit/ml/msop001a/msop001a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +8 +8 +Package_SO +SO-14_3.9x8.65mm_P1.27mm +SO, 14 Pin (https://www.st.com/resource/en/datasheet/l6491.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +14 +14 +Package_SO +SO-14_5.3x10.2mm_P1.27mm +SO, 14 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +14 +14 +Package_SO +SO-16_3.9x9.9mm_P1.27mm +SO, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT109-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +16 +16 +Package_SO +SO-16_5.3x10.2mm_P1.27mm +SO, 16 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +16 +16 +Package_SO +SO-20-1EP_7.52x12.825mm_P1.27mm_EP6.045x12.09mm_Mask3.56x4.47mm +SO, 20 Pin (http://www.ti.com/lit/ds/symlink/opa569.pdf, http://www.ti.com/lit/an/slma004b/slma004b.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +23 +21 +Package_SO +SO-20-1EP_7.52x12.825mm_P1.27mm_EP6.045x12.09mm_Mask3.56x4.47mm_ThermalVias +SO, 20 Pin (http://www.ti.com/lit/ds/symlink/opa569.pdf, http://www.ti.com/lit/an/slma004b/slma004b.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +51 +21 +Package_SO +SO-20_5.3x12.6mm_P1.27mm +SO, 20 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +20 +20 +Package_SO +SO-20_12.8x7.5mm_P1.27mm +SO-20, 12.8x7.5mm, https://www.nxp.com/docs/en/data-sheet/SA605.pdf +S0-20 +0 +20 +20 +Package_SO +SO-24_5.3x15mm_P1.27mm +SO, 24 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SO SO +0 +24 +24 +Package_SO +SOIC-4_4.55x2.6mm_P1.27mm +SOIC, 4 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12884&prodName=TLP291), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +4 +4 +Package_SO +SOIC-4_4.55x3.7mm_P2.54mm +SOIC, 6 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=11791&prodName=TLP185), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +4 +4 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm_ThermalVias +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm +SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm_ThermalVias +SOIC, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.81mm +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.81mm_ThermalVias +SOIC, 8 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/ada4898-1_4898-2.pdf#page=29), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm +SOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lm5017.pdf#page=31), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +14 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm_ThermalVias +SOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lm5017.pdf#page=31), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +23 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm +SOIC, 8 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/hip2100.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +13 +9 +Package_SO +SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.514x3.2mm_ThermalVias +SOIC, 8 Pin (https://www.renesas.com/eu/en/www/doc/datasheet/hip2100.pdf#page=13), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +9 +Package_SO +SOIC-8-N7_3.9x4.9mm_P1.27mm +8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], pin 7 removed (Microchip Packaging Specification 00000049BS.pdf, http://www.onsemi.com/pub/Collateral/NCP1207B.PDF) +SOIC 1.27 +0 +7 +7 +Package_SO +SOIC-8_3.9x4.9mm_P1.27mm +SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +8 +8 +Package_SO +SOIC-8_5.23x5.23mm_P1.27mm +SOIC, 8 Pin (http://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf#page=68), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +8 +8 +Package_SO +SOIC-8_5.275x5.275mm_P1.27mm +SOIC, 8 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/20005045C.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +8 +8 +Package_SO +SOIC-8_7.5x5.85mm_P1.27mm +SOIC, 8 Pin (http://www.ti.com/lit/ml/mpds382b/mpds382b.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +8 +8 +Package_SO +SOIC-14-16_3.9x9.9mm_P1.27mm +SOIC, 16 Pin package with pin 2 and 13 removed for voltage clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf) +SOIC SO +0 +14 +14 +Package_SO +SOIC-14W_7.5x9mm_P1.27mm +SOIC, 14 Pin (JEDEC MS-013AF, https://www.analog.com/media/en/package-pcb-resources/package/54614177245586rw_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +14 +14 +Package_SO +SOIC-14_3.9x8.7mm_P1.27mm +SOIC, 14 Pin (JEDEC MS-012AB, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_14.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +14 +14 +Package_SO +SOIC-16W-12_7.5x10.3mm_P1.27mm +SOIC-16 With 12 Pin Placed - Wide, 7.50 mm Body [SOIC] (https://docs.broadcom.com/docs/AV02-0169EN) +SOIC 1.27 16 12 Wide +0 +12 +12 +Package_SO +SOIC-16W_5.3x10.2mm_P1.27mm +16-Lead Plastic Small Outline (SO) - Wide, 5.3 mm Body (http://www.ti.com/lit/ml/msop002a/msop002a.pdf) +SOIC 1.27 +0 +16 +16 +Package_SO +SOIC-16W_7.5x10.3mm_P1.27mm +SOIC, 16 Pin (JEDEC MS-013AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/rw_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +16 +16 +Package_SO +SOIC-16W_7.5x12.8mm_P1.27mm +SOIC, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ri_soic_ic/ri_16_1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +16 +16 +Package_SO +SOIC-16_3.9x9.9mm_P1.27mm +SOIC, 16 Pin (JEDEC MS-012AC, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +16 +16 +Package_SO +SOIC-16_4.55x10.3mm_P1.27mm +SOIC, 16 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12858&prodName=TLP291-4), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +16 +16 +Package_SO +SOIC-18W_7.5x11.6mm_P1.27mm +SOIC, 18 Pin (JEDEC MS-013AB, https://www.analog.com/media/en/package-pcb-resources/package/33254132129439rw_18.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +18 +18 +Package_SO +SOIC-20W_7.5x12.8mm_P1.27mm +SOIC, 20 Pin (JEDEC MS-013AC, https://www.analog.com/media/en/package-pcb-resources/package/233848rw_20.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +20 +20 +Package_SO +SOIC-24W_7.5x15.4mm_P1.27mm +SOIC, 24 Pin (JEDEC MS-013AD, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/RW_24.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +24 +24 +Package_SO +SOIC-28W_7.5x17.9mm_P1.27mm +SOIC, 28 Pin (JEDEC MS-013AE, https://www.analog.com/media/en/package-pcb-resources/package/35833120341221rw_28.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +28 +28 +Package_SO +SOIC-28W_7.5x18.7mm_P1.27mm +SOIC, 28 Pin (https://www.akm.com/akm/en/file/datasheet/AK5394AVS.pdf#page=23), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOIC SO +0 +28 +28 +Package_SO +SOIJ-8_5.3x5.3mm_P1.27mm +8-Lead Plastic Small Outline (SM) - Medium, 5.28 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf) +SOIC 1.27 +0 +8 +8 +Package_SO +SOJ-36_10.16x23.49mm_P1.27mm +SOJ, 36 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOJ SO +0 +36 +36 +Package_SO +SOP-4_3.8x4.1mm_P2.54mm +SOP, 4 Pin (http://www.ixysic.com/home/pdfs.nsf/www/CPC1017N.pdf/$file/CPC1017N.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +4 +4 +Package_SO +SOP-4_4.4x2.6mm_P1.27mm +SOP, 4 Pin (http://www.vishay.com/docs/83510/tcmt1100.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +4 +4 +Package_SO +SOP-8-1EP_4.57x4.57mm_P1.27mm_EP4.57x4.45mm +SOP, 8 Pin (https://ww2.minicircuits.com/case_style/XX112.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +13 +9 +Package_SO +SOP-8-1EP_4.57x4.57mm_P1.27mm_EP4.57x4.45mm_ThermalVias +SOP, 8 Pin (https://ww2.minicircuits.com/case_style/XX112.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +20 +9 +Package_SO +SOP-8_3.9x4.9mm_P1.27mm +SOP, 8 Pin (http://www.macronix.com/Lists/Datasheet/Attachments/7534/MX25R3235F,%20Wide%20Range,%2032Mb,%20v1.6.pdf#page=79), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-8_3.76x4.96mm_P1.27mm +SOP, 8 Pin (https://ww2.minicircuits.com/case_style/XX211.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-8_5.28x5.23mm_P1.27mm +SOP, 8 Pin (http://www.macronix.com/Lists/Datasheet/Attachments/7534/MX25R3235F,%20Wide%20Range,%2032Mb,%20v1.6.pdf#page=80), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-8_6.62x9.15mm_P2.54mm +SOP, 8 Pin (http://www.ti.com/lit/ds/symlink/iso1050.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +8 +8 +Package_SO +SOP-16_3.9x9.9mm_P1.27mm +SOP, 16 Pin (https://www.diodes.com/assets/Datasheets/PAM8403.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +16 +16 +Package_SO +SOP-16_4.4x10.4mm_P1.27mm +16-Lead Plastic Small Outline http://www.vishay.com/docs/49633/sg2098.pdf +SOP 1.27 +0 +16 +16 +Package_SO +SOP-16_4.55x10.3mm_P1.27mm +SOP, 16 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=12855&prodName=TLP290-4), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +16 +16 +Package_SO +SOP-18_7x12.5mm_P1.27mm +SOP, 18 Pin (https://toshiba.semicon-storage.com/info/docget.jsp?did=30523), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +18 +18 +Package_SO +SOP-20_7.5x12.8mm_P1.27mm +SOP, 20 Pin (https://www.holtek.com/documents/10179/116723/sop20-300.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +20 +20 +Package_SO +SOP-24_7.5x15.4mm_P1.27mm +SOP, 24 Pin (http://www.issi.com/WW/pdf/31FL3218.pdf#page=14), generated with kicad-footprint-generator ipc_gullwing_generator.py +SOP SO +0 +24 +24 +Package_SO +SSO-4_6.7x5.1mm_P2.54mm_Clearance8mm +4-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/84299/vor1142b4.pdf +SSO Stretched SO SOIC 2.54 +0 +4 +4 +Package_SO +SSO-6_6.8x4.6mm_P1.27mm_Clearance7mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC 1.27 +0 +6 +6 +Package_SO +SSO-6_6.8x4.6mm_P1.27mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC 1.27 +0 +6 +6 +Package_SO +SSO-8_6.7x9.8mm_P2.54mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf +SSO Stretched SO SOIC Pitch 2.54 +0 +8 +8 +Package_SO +SSO-8_6.8x5.9mm_P1.27mm_Clearance7mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_6.8x5.9mm_P1.27mm_Clearance8mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_9.6x6.3mm_P1.27mm_Clearance10.5mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSO-8_13.6x6.3mm_P1.27mm_Clearance14.2mm +8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true +SSO Stretched SO SOIC Pitch 1.27 +0 +8 +8 +Package_SO +SSOP-8_2.95x2.8mm_P0.65mm +SSOP-8 2.9 x2.8mm Pitch 0.65mm +SSOP-8 2.95x2.8mm Pitch 0.65mm +0 +8 +8 +Package_SO +SSOP-8_3.9x5.05mm_P1.27mm +SSOP, 8 Pin (http://www.fujitsu.com/downloads/MICRO/fsa/pdf/products/memory/fram/MB85RS16-DS501-00014-6v0-E.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +8 +8 +Package_SO +SSOP-8_3.95x5.21x3.27mm_P1.27mm +SSOP-8 3.95x5.21x3.27mm Pitch 1.27mm +SSOP-8 3.95x5.21x3.27mm 1.27mm +0 +8 +8 +Package_SO +SSOP-8_5.25x5.24mm_P1.27mm +SSOP, 8 Pin (http://www.fujitsu.com/ca/en/Images/MB85RS2MT-DS501-00023-1v0-E.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +8 +8 +Package_SO +SSOP-10_3.9x4.9mm_P1.00mm +10-Lead SSOP, 3.9 x 4.9mm body, 1.00mm pitch (http://www.st.com/resource/en/datasheet/viper01.pdf) +SSOP 3.9 4.9 1.00 +0 +10 +10 +Package_SO +SSOP-14_5.3x6.2mm_P0.65mm +SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot337-1_po.pdf) +SSOP 0.65 +0 +14 +14 +Package_SO +SSOP-16_3.9x4.9mm_P0.635mm +SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot519-1_po.pdf) +SSOP 0.635 +0 +16 +16 +Package_SO +SSOP-16_4.4x5.2mm_P0.65mm +SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot369-1_po.pdf) +SSOP 0.65 +0 +16 +16 +Package_SO +SSOP-16_5.3x6.2mm_P0.65mm +SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot338-1_po.pdf) +SSOP 0.65 +0 +16 +16 +Package_SO +SSOP-18_4.4x6.5mm_P0.65mm +SSOP18: plastic shrink small outline package; 18 leads; body width 4.4 mm (http://toshiba.semicon-storage.com/info/docget.jsp?did=30523&prodName=TBD62783APG) +SSOP 0.65 +0 +18 +18 +Package_SO +SSOP-20_3.9x8.7mm_P0.635mm +SSOP20: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635; (see http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT231X.pdf) +SSOP 0.635 +0 +20 +20 +Package_SO +SSOP-20_4.4x6.5mm_P0.65mm +SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot266-1_po.pdf) +SSOP 0.65 +0 +20 +20 +Package_SO +SSOP-20_5.3x7.2mm_P0.65mm +SSOP, 20 Pin (http://ww1.microchip.com/downloads/en/DeviceDoc/40001800C.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +20 +20 +Package_SO +SSOP-24_3.9x8.7mm_P0.635mm +SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot556-1_po.pdf) +SSOP 0.635 +0 +24 +24 +Package_SO +SSOP-24_5.3x8.2mm_P0.65mm +24-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +24 +24 +Package_SO +SSOP-28_3.9x9.9mm_P0.635mm +SSOP28: plastic shrink small outline package; 28 leads; body width 3.9 mm; lead pitch 0.635; (see http://cds.linear.com/docs/en/datasheet/38901fb.pdf) +SSOP 0.635 +0 +28 +28 +Package_SO +SSOP-28_5.3x10.2mm_P0.65mm +28-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +28 +28 +Package_SO +SSOP-32_11.305x20.495mm_P1.27mm +SSOP, 32 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +SSOP SO +0 +32 +32 +Package_SO +SSOP-44_5.3x12.8mm_P0.5mm +44-Lead Plastic Shrink Small Outline (SS)-5.30 mm Body [SSOP] (http://cds.linear.com/docs/en/datasheet/680313fa.pdf) +SSOP 0.5 +0 +44 +44 +Package_SO +SSOP-48_7.5x15.9mm_P0.635mm +SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf) +SSOP 0.635 +0 +48 +48 +Package_SO +SSOP-56_7.5x18.5mm_P0.635mm +SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot371-1_po.pdf) +SSOP 0.635 +0 +56 +56 +Package_SO +STC_SOP-16_3.9x9.9mm_P1.27mm +STC SOP, 16 Pin (https://www.stcmicro.com/datasheet/STC15F2K60S2-en.pdf#page=156), generated with kicad-footprint-generator ipc_gullwing_generator.py +STC SOP SO +0 +16 +16 +Package_SO +ST_MultiPowerSO-30 +MultiPowerSO-30 3EP 16.0x17.2mm Pitch 1mm (http://www.st.com/resource/en/datasheet/vnh2sp30-e.pdf) +MultiPowerSO-30 3EP 16.0x17.2mm Pitch 1mm +0 +33 +33 +Package_SO +ST_PowerSSO-24_SlugDown +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +25 +25 +Package_SO +ST_PowerSSO-24_SlugDown_ThermalVias +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +38 +25 +Package_SO +ST_PowerSSO-24_SlugUp +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7266p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-24 1EP 7.5x10.3mm Pitch 0.8mm +0 +24 +24 +Package_SO +ST_PowerSSO-36_SlugDown +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +37 +37 +Package_SO +ST_PowerSSO-36_SlugDown_ThermalVias +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +50 +37 +Package_SO +ST_PowerSSO-36_SlugUp +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm [JEDEC MO-271] (http://www.st.com/resource/en/datasheet/tda7492p.pdf, http://freedatasheets.com/downloads/Technical%20Note%20Powersso24%20TN0054.pdf) +ST PowerSSO-36 1EP 7.5x10.3mm Pitch 0.8mm +0 +36 +36 +Package_SO +TI_SO-PowerPAD-8 +8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf) +SSOP 0.50 exposed pad +0 +12 +9 +Package_SO +TI_SO-PowerPAD-8_ThermalVias +8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf +HTSOP 1.27 +0 +19 +9 +Package_SO +TSOP-5_1.65x3.05mm_P0.95mm +TSOP-5 package (comparable to TSOT-23), https://www.vishay.com/docs/71200/71200.pdf +Jedec MO-193C TSOP-5L +0 +5 +5 +Package_SO +TSOP-6_1.65x3.05mm_P0.95mm +TSOP-6 package (comparable to TSOT-23), https://www.vishay.com/docs/71200/71200.pdf +Jedec MO-193C TSOP-6L +0 +6 +6 +Package_SO +TSOP-I-28_11.8x8mm_P0.55mm +TSOP I, 28 pins, 18.8x8mm body, 0.55mm pitch, IPC-calculated pads (http://ww1.microchip.com/downloads/en/devicedoc/doc0807.pdf) +TSOP I 28 pins +0 +28 +28 +Package_SO +TSOP-I-32_11.8x8mm_P0.5mm +TSOP-I, 32 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSOP-I SO +0 +32 +32 +Package_SO +TSOP-I-32_18.4x8mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf, http://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/f32pm25.pdf) +TSOP I 32 +0 +32 +32 +Package_SO +TSOP-I-32_18.4x8mm_P0.5mm_Reverse +TSOP I, 32 pins, 18.4x8mm body (http://www.futurlec.com/Datasheet/Memory/628128.pdf), reverse mount +TSOP I 32 reverse +0 +32 +32 +Package_SO +TSOP-I-48_18.4x12mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf) +TSOP I 32 +0 +48 +48 +Package_SO +TSOP-I-56_18.4x14mm_P0.5mm +TSOP I, 32 pins, 18.4x8mm body (https://www.micron.com/~/media/documents/products/technical-note/nor-flash/tn1225_land_pad_design.pdf) +TSOP I 32 +0 +56 +56 +Package_SO +TSOP-II-32_21.0x10.2mm_P1.27mm +32-lead plastic TSOP; Type II +TSOP-II 32 +0 +32 +32 +Package_SO +TSOP-II-44_10.16x18.41mm_P0.8mm +TSOP-II, 44 Pin (http://www.issi.com/WW/pdf/61-64C5128AL.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSOP-II SO +0 +44 +44 +Package_SO +TSOP-II-54_22.2x10.16mm_P0.8mm +54-lead TSOP typ II package +TSOPII TSOP2 +0 +54 +54 +Package_SO +TSSOP-4_4.4x5mm_P4mm +TSSOP, 4 Pin (https://www.onsemi.com/pub/Collateral/MDB8S-D.PDF#page=4), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +4 +4 +Package_SO +TSSOP-8_3x3mm_P0.65mm +TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot505-1_po.pdf) +SSOP 0.65 +0 +8 +8 +Package_SO +TSSOP-8_4.4x3mm_P0.65mm +TSSOP, 8 Pin (JEDEC MO-153 Var AA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +8 +8 +Package_SO +TSSOP-10_3x3mm_P0.5mm +TSSOP10: plastic thin shrink small outline package; 10 leads; body width 3 mm; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot552-1_po.pdf) +SSOP 0.5 +0 +10 +10 +Package_SO +TSSOP-14-1EP_4.4x5mm_P0.65mm +14-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] with exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf) +SSOP 0.65 exposed pad +0 +18 +15 +Package_SO +TSSOP-14_4.4x5mm_P0.65mm +TSSOP, 14 Pin (JEDEC MO-153 Var AB-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +14 +14 +Package_SO +TSSOP-16-1EP_4.4x5mm_P0.65mm +FE Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad Variation BB; (see Linear Technology 1956f.pdf) +SSOP 0.65 +0 +24 +17 +Package_SO +TSSOP-16_4.4x5mm_P0.65mm +TSSOP, 16 Pin (JEDEC MO-153 Var AB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +16 +16 +Package_SO +TSSOP-20_4.4x5mm_P0.5mm +TSSOP, 20 Pin (JEDEC MO-153 Var BA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +20 +20 +Package_SO +TSSOP-20_4.4x6.5mm_P0.65mm +TSSOP, 20 Pin (JEDEC MO-153 Var AC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +20 +20 +Package_SO +TSSOP-24_4.4x5mm_P0.4mm +TSSOP, 24 Pin (JEDEC MO-153 Var CA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +24 +24 +Package_SO +TSSOP-24_4.4x6.5mm_P0.5mm +TSSOP, 24 Pin (JEDEC MO-153 Var BB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +24 +24 +Package_SO +TSSOP-24_4.4x7.8mm_P0.65mm +TSSOP, 24 Pin (JEDEC MO-153 Var AD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +24 +24 +Package_SO +TSSOP-24_6.1x7.8mm_P0.65mm +TSSOP, 24 Pin (JEDEC MO-153 Var DA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +24 +24 +Package_SO +TSSOP-28-1EP_4.4x9.7mm_P0.65mm +TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; Exposed Pad Variation; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot361-1_po.pdf) +SSOP 0.65 +0 +36 +29 +Package_SO +TSSOP-28_4.4x7.8mm_P0.5mm +TSSOP, 28 Pin (JEDEC MO-153 Var BC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +28 +28 +Package_SO +TSSOP-28_4.4x9.7mm_P0.65mm +TSSOP, 28 Pin (JEDEC MO-153 Var AE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +28 +28 +Package_SO +TSSOP-28_6.1x7.8mm_P0.5mm +TSSOP, 28 Pin (JEDEC MO-153 Var EA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +28 +28 +Package_SO +TSSOP-28_6.1x9.7mm_P0.65mm +TSSOP, 28 Pin (JEDEC MO-153 Var DB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +28 +28 +Package_SO +TSSOP-28_8x9.7mm_P0.65mm +TSSOP, 28 Pin (JEDEC MO-153 Var GA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +28 +28 +Package_SO +TSSOP-30_4.4x7.8mm_P0.5mm +TSSOP, 30 Pin (JEDEC MO-153 Var BC-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +30 +30 +Package_SO +TSSOP-30_6.1x9.7mm_P0.65mm +TSSOP, 30 Pin (JEDEC MO-153 Var DB-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +30 +30 +Package_SO +TSSOP-32_4.4x6.5mm_P0.4mm +TSSOP, 32 Pin (JEDEC MO-153 Var CB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +32 +32 +Package_SO +TSSOP-32_6.1x11mm_P0.65mm +TSSOP, 32 Pin (JEDEC MO-153 Var DC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +32 +32 +Package_SO +TSSOP-32_8x11mm_P0.65mm +TSSOP, 32 Pin (JEDEC MO-153 Var GB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +32 +32 +Package_SO +TSSOP-36_4.4x7.8mm_P0.4mm +TSSOP, 36 Pin (JEDEC MO-153 Var CC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_4.4x9.7mm_P0.5mm +TSSOP, 36 Pin (JEDEC MO-153 Var BD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_6.1x7.8mm_P0.4mm +TSSOP, 36 Pin (JEDEC MO-153 Var FA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_6.1x9.7mm_P0.5mm +TSSOP, 36 Pin (JEDEC MO-153 Var EB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_6.1x12.5mm_P0.65mm +TSSOP, 36 Pin (JEDEC MO-153 Var DD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_8x9.7mm_P0.5mm +TSSOP, 36 Pin (JEDEC MO-153 Var HA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-36_8x12.5mm_P0.65mm +TSSOP, 36 Pin (JEDEC MO-153 Var GC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +36 +36 +Package_SO +TSSOP-38_4.4x9.7mm_P0.5mm +TSSOP, 38 Pin (JEDEC MO-153 Var BD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +38 +38 +Package_SO +TSSOP-38_6.1x12.5mm_P0.65mm +TSSOP, 38 Pin (JEDEC MO-153 Var DD-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +38 +38 +Package_SO +TSSOP-40_6.1x11mm_P0.5mm +TSSOP, 40 Pin (JEDEC MO-153 Var EC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +40 +40 +Package_SO +TSSOP-40_6.1x14mm_P0.65mm +TSSOP, 40 Pin (JEDEC MO-153 Var DE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +40 +40 +Package_SO +TSSOP-40_8x11mm_P0.5mm +TSSOP, 40 Pin (JEDEC MO-153 Var HB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +40 +40 +Package_SO +TSSOP-40_8x14mm_P0.65mm +TSSOP, 40 Pin (JEDEC MO-153 Var GD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +40 +40 +Package_SO +TSSOP-44_4.4x11.2mm_P0.5mm +TSSOP44: plastic thin shrink small outline package; 44 leads; body width 4.4 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot510-1_po.pdf) +SSOP 0.5 +0 +44 +44 +Package_SO +TSSOP-44_4.4x11mm_P0.5mm +TSSOP, 44 Pin (JEDEC MO-153 Var BE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +44 +44 +Package_SO +TSSOP-44_6.1x11mm_P0.5mm +TSSOP, 44 Pin (JEDEC MO-153 Var EC-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +44 +44 +Package_SO +TSSOP-48_4.4x9.7mm_P0.4mm +TSSOP, 48 Pin (JEDEC MO-153 Var CD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +48 +48 +Package_SO +TSSOP-48_6.1x9.7mm_P0.4mm +TSSOP, 48 Pin (JEDEC MO-153 Var FB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +48 +48 +Package_SO +TSSOP-48_6.1x12.5mm_P0.5mm +TSSOP, 48 Pin (JEDEC MO-153 Var ED https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +48 +48 +Package_SO +TSSOP-48_8x9.7mm_P0.4mm +TSSOP, 48 Pin (JEDEC MO-153 Var JA https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +48 +48 +Package_SO +TSSOP-48_8x12.5mm_P0.5mm +TSSOP, 48 Pin (JEDEC MO-153 Var HC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +48 +48 +Package_SO +TSSOP-50_4.4x12.5mm_P0.5mm +TSSOP, 50 Pin (JEDEC MO-153 Var BF https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +50 +50 +Package_SO +TSSOP-52_6.1x11mm_P0.4mm +TSSOP, 52 Pin (JEDEC MO-153 Var FC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +52 +52 +Package_SO +TSSOP-52_8x11mm_P0.4mm +TSSOP, 52 Pin (JEDEC MO-153 Var JB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +52 +52 +Package_SO +TSSOP-56_6.1x12.5mm_P0.4mm +TSSOP, 56 Pin (JEDEC MO-153 Var FD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +56 +56 +Package_SO +TSSOP-56_6.1x14mm_P0.5mm +TSSOP, 56 Pin (JEDEC MO-153 Var EE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +56 +56 +Package_SO +TSSOP-56_8x12.5mm_P0.4mm +TSSOP, 56 Pin (JEDEC MO-153 Var JC https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +56 +56 +Package_SO +TSSOP-56_8x14mm_P0.5mm +TSSOP, 56 Pin (JEDEC MO-153 Var HD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +56 +56 +Package_SO +TSSOP-60_8x12.5mm_P0.4mm +TSSOP, 60 Pin (JEDEC MO-153 Var JC-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +60 +60 +Package_SO +TSSOP-64_6.1x14mm_P0.4mm +TSSOP, 64 Pin (JEDEC MO-153 Var FE https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +64 +64 +Package_SO +TSSOP-64_6.1x17mm_P0.5mm +TSSOP, 64 Pin (JEDEC MO-153 Var EF https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +64 +64 +Package_SO +TSSOP-64_8x14mm_P0.4mm +TSSOP, 64 Pin (JEDEC MO-153 Var JD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +64 +64 +Package_SO +TSSOP-68_8x14mm_P0.4mm +TSSOP, 68 Pin (JEDEC MO-153 Var JD-1 https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +68 +68 +Package_SO +TSSOP-80_6.1x17mm_P0.4mm +TSSOP, 80 Pin (JEDEC MO-153 Var FF https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py +TSSOP SO +0 +80 +80 +Package_SO +Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm +Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf) +HSOP 1.27 +0 +11 +9 +Package_SO +Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm_ThermalVias +Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf) +HSOP 1.27 +0 +20 +9 +Package_SO +Texas_HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias +8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf +HTSOP 1.27 +0 +18 +9 +Package_SO +Texas_PWP0020A +20-Pin Thermally Enhanced Thin Shrink Small-Outline Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf) +PWP HTSSOP 0.65mm +0 +25 +21 +Package_SO +Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm +HSOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOIC SO +0 +16 +9 +Package_SO +Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias +HSOIC, 8 Pin (http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +HSOIC SO +0 +23 +9 +Package_SO +Texas_R-PDSO-N5 +Plastic Small outline http://www.ti.com/lit/ml/mpds158c/mpds158c.pdf +SOT23 R-PDSO-N5 +0 +5 +5 +Package_SO +VSO-40_7.6x15.4mm_P0.762mm +VSO40: plastic very small outline package; 40 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot158-1_po.pdf) +SSOP 0.762 +0 +40 +40 +Package_SO +VSO-56_11.1x21.5mm_P0.75mm +VSO56: plastic very small outline package; 56 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot190-1_po.pdf) +SSOP 0.75 +0 +56 +56 +Package_SO +VSSOP-8_2.3x2mm_P0.5mm +VSSOP-8 2.3x2mm Pitch 0.5mm +VSSOP-8 2.3x2mm Pitch 0.5mm +0 +8 +8 +Package_SO +VSSOP-8_2.4x2.1mm_P0.5mm +http://www.ti.com/lit/ml/mpds050d/mpds050d.pdf +VSSOP DCU R-PDSO-G8 Pitch0.5mm +0 +8 +8 +Package_SO +VSSOP-8_3.0x3.0mm_P0.65mm +VSSOP-8 3.0 x 3.0, http://www.ti.com/lit/ds/symlink/lm75b.pdf +VSSOP-8 3.0 x 3.0 +0 +8 +8 +Package_SO +VSSOP-10_3x3mm_P0.5mm +VSSOP, 10 Pin (http://www.ti.com/lit/ds/symlink/ads1115.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py +VSSOP SO +0 +10 +10 +Package_SO +Vishay_PowerPAK_1212-8_Dual +PowerPAK 1212-8 Dual (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72598/72598.pdf) +Vishay_PowerPAK_1212-8_Dual +0 +6 +6 +Package_SO +Vishay_PowerPAK_1212-8_Single +PowerPAK 1212-8 Single (https://www.vishay.com/docs/71656/ppak12128.pdf, https://www.vishay.com/docs/72597/72597.pdf) +Vishay PowerPAK 1212-8 Single +0 +5 +5 +Package_SO +Zetex_SM8 +Zetex, SMD, 8 pin package (http://datasheet.octopart.com/ZDT6758TA-Zetex-datasheet-68057.pdf) +Zetex SM8 +0 +8 +8 +Package_SON +Diodes_PowerDI3333-8 +Diodes Incorporated PowerDI3333-8, Plastic Dual Flat No Lead Package, 3.3x3.3x0.8mm Body, https://www.diodes.com/assets/Package-Files/PowerDI3333-8.pdf +PowerDI 0.65 +0 +13 +5 +Package_SON +Fairchild_DualPower33-6_3x3mm +Fairchild Power33 MOSFET package, 3x3mm (see https://www.fairchildsemi.com/datasheets/FD/FDMC8032L.pdf) +mosfet +0 +18 +6 +Package_SON +Fairchild_MicroPak-6_1.0x1.45mm_P0.5mm +Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm https://www.nxp.com/docs/en/application-note/AN10343.pdff +Fairchild-specific MicroPak-6 1.0x1.45mm Pitch 0.5mm +0 +6 +6 +Package_SON +Fairchild_MicroPak2-6_1.0x1.0mm_P0.35mm +Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm https://www.nxp.com/docs/en/application-note/AN10343.pdff +Fairchild-specific MicroPak2-6 1.0x1.0mm Pitch 0.35mm +0 +6 +6 +Package_SON +HUSON-3-1EP_2x2mm_P1.3mm_EP1.1x1.6mm +HUSON, 3 Pin, SOT1061 (Ref: https://assets.nexperia.com/documents/data-sheet/PMEG2020CPA.pdf) +huson nolead SOT1061 +0 +4 +3 +Package_SON +HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm +HVSON, 8 Pin (https://www.nxp.com/docs/en/data-sheet/TJA1051.pdf#page=16), generated with kicad-footprint-generator ipc_noLead_generator.py +HVSON NoLead +0 +13 +9 +Package_SON +HVSON-8-1EP_4x4mm_P0.8mm_EP2.2x3.1mm +HVSON, 8 Pin (https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf (page 57)), generated with kicad-footprint-generator ipc_noLead_generator.py +HVSON NoLead +0 +13 +9 +Package_SON +Infineon_PG-LSON-8-1 +https://www.infineon.com/cms/en/product/packages/PG-LSON/PG-LSON-8-1/ +PG-LSON-8-1 +0 +17 +9 +Package_SON +Infineon_PG-TISON-8-2 +Infineon, PG-TISON-8-2, 5x6x1.15mm, 1.27mm Pitch, Exposed Paddle, https://www.infineon.com/cms/en/product/packages/PG-TISON/PG-TISON-8-2/ +tison +0 +23 +7 +Package_SON +Infineon_PG-TISON-8-3 +Infineon, PG-TISON-8-2, 5x6x1.15mm, 1.27mm Pitch, Exposed Paddle, https://www.infineon.com/cms/en/product/packages/PG-TISON/PG-TISON-8-2/ +tison +0 +23 +7 +Package_SON +Infineon_PG-TISON-8-4 +Infineon, PG-TISON-8-4, 5x6x1.15mm, 1.27mm Pitch, Exposed Paddle, https://www.infineon.com/cms/en/product/packages/PG-TISON/PG-TISON-8-4/ +tison +0 +26 +8 +Package_SON +Infineon_PG-TISON-8-5 +Infineon, PG-TISON-8-5, 8x8x1.1mm, 1mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-TISON/PG-TISON-8-5/ +tison +0 +34 +8 +Package_SON +NXP_XSON-16 +http://www.nxp.com/documents/outline_drawing/SOT1341-1.pdf +NXP XSON SOT-1341 +0 +16 +16 +Package_SON +ROHM_VML0806 +VML0806, Rohm (http://rohmfs.rohm.com/en/techdata_basic/transistor/soldering_condition/VML0806_Soldering_Condition.pdf, http://rohmfs.rohm.com/en/products/databook/package/spec/discrete/vml0806_tr-e.pdf) +ROHM VML0806 +0 +3 +3 +Package_SON +RTC_SMD_MicroCrystal_C3_2.5x3.7mm +MicroCrystal C3 2.5x3.7mm, https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-1805-C3.pdf +RTC C3 +0 +10 +10 +Package_SON +SON-8-1EP_3x2mm_P0.5mm_EP1.4x1.6mm +SON, 8 Pin (http://www.fujitsu.com/downloads/MICRO/fsa/pdf/products/memory/fram/MB85RS16-DS501-00014-6v0-E.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +SON NoLead +0 +13 +9 +Package_SON +Texas_DQK +Texas WSON-6 DQK, http://www.ti.com/lit/ds/symlink/csd16301q2.pdf +Texas WSON6 2x2mm +0 +10 +8 +Package_SON +Texas_DRC0010J +Texas DRC0010J, VSON10 3x3mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf +Texas VSON10 3x3mm +0 +17 +11 +Package_SON +Texas_DRC0010J_ThermalVias +Texas DRC0010J, VSON10 3x3mm Body, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/tps63000.pdf +Texas VSON10 3x3mm +0 +21 +11 +Package_SON +Texas_DSC0010J +3x3mm Body, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 DSC0010J WSON +0 +33 +11 +Package_SON +Texas_DSC0010J_ThermalVias +3x3mm Body, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 DSC0010J WSON +0 +39 +11 +Package_SON +Texas_PWSON-N6 +Plastic Small Outline No-Lead http://www.ti.com/lit/ml/mpds176e/mpds176e.pdf +Plastic Small Outline No-Lead +0 +7 +7 +Package_SON +Texas_R-PWSON-N12_EP0.4x2mm +http://www.ti.com/lit/ds/symlink/tpd6f003.pdf +WSON SMD +0 +16 +13 +Package_SON +Texas_S-PDSO-N12 +http://www.ti.com/lit/ds/symlink/bq27441-g1.pdf +SON thermal pads +0 +44 +13 +Package_SON +Texas_S-PVSON-N8 +8-Lead Plastic VSON, 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf +DFN 0.65 S-PVSON-N8 +0 +21 +9 +Package_SON +Texas_S-PVSON-N8_ThermalVias +8-Lead Plastic VSON, 3x3mm Body, 0.65mm Pitch, S-PVSON-N8, http://www.ti.com/lit/ds/symlink/opa2333.pdf +DFN 0.65 S-PVSON-N8 +0 +27 +9 +Package_SON +Texas_S-PVSON-N10 +3x3mm Body, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 S-PVSON-N10 DRC +0 +33 +11 +Package_SON +Texas_S-PVSON-N10_ThermalVias +3x3mm Body, 0.5mm Pitch, S-PVSON-N10, DRC, http://www.ti.com/lit/ds/symlink/tps61201.pdf +0.5 S-PVSON-N10 DRC +0 +39 +11 +Package_SON +Texas_S-PWSON-N8_EP1.2x2mm +WSON, 8 Pin (http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +11 +9 +Package_SON +Texas_S-PWSON-N8_EP1.2x2mm_ThermalVias +WSON, 8 Pin (http://www.ti.com/lit/ds/symlink/lp2951.pdf#page=27), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +18 +9 +Package_SON +Texas_S-PWSON-N10 +3x3mm Body, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf +0.5 S-PWSON-N10 DSC +0 +41 +11 +Package_SON +Texas_S-PWSON-N10_ThermalVias +3x3mm Body, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf +0.5 S-PWSON-N10 DSC +0 +47 +11 +Package_SON +Texas_X2SON-4_1x1mm_P0.65mm +X2SON 5 pin 1x1mm package (Reference Datasheet: http://www.ti.com/lit/ds/sbvs193d/sbvs193d.pdf Reference part: TPS383x) [StepUp generated footprint] +X2SON +0 +13 +5 +Package_SON +USON-10_2.5x1.0mm_P0.5mm +USON-10 2.5x1.0mm_ Pitch 0.5mm http://www.ti.com/lit/ds/symlink/tpd4e02b04.pdf +USON-10 2.5x1.0mm Pitch 0.5mm +0 +10 +10 +Package_SON +USON-20_2x4mm_P0.4mm +USON-20 2x4mm Pitch 0.4mm http://www.ti.com/lit/ds/symlink/txb0108.pdf +USON-20 2x4mm Pitch 0.4mm +0 +20 +20 +Package_SON +VSON-8_3.3x3.3mm_P0.65mm_NexFET +8-Lead Plastic Dual Flat, No Lead Package (MF) - 3.3x3.3x1 mm Body [VSON] http://www.ti.com/lit/ds/symlink/csd87334q3d.pdf +VSON 0.65 +0 +12 +5 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm +VSON, 10 Pin (http://rohmfs.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator/bd8314nuv-e.pdf (Page 20)), generated with kicad-footprint-generator ipc_noLead_generator.py +VSON NoLead +0 +15 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm_ThermalVias +VSON, 10 Pin (http://rohmfs.rohm.com/en/products/databook/datasheet/ic/power/switching_regulator/bd8314nuv-e.pdf (Page 20)), generated with kicad-footprint-generator ipc_noLead_generator.py +VSON NoLead +0 +18 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm +0 +21 +11 +Package_SON +VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm_ThermalVias +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm http://chip.tomsk.ru/chip/chipdoc.nsf/Package/D8A64DD165C2AAD9472579400024FC41!OpenDocument +VSON 10 Thermal on 11 3x3mm Pitch 0.5mm +0 +27 +11 +Package_SON +VSONP-8-1EP_5x6_P1.27mm +SON, 8-Leads, Body 5x6x1mm, Pitch 1.27mm; (see Texas Instruments CSD18531Q5A http://www.ti.com/lit/ds/symlink/csd18531q5a.pdf) +VSONP 1.27 +0 +13 +3 +Package_SON +WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm +WSON, 6 Pin (http://www.ti.com/lit/ds/symlink/tps61040.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +9 +7 +Package_SON +WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias +WSON, 6 Pin (http://www.ti.com/lit/ds/symlink/tps61040.pdf#page=35), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +12 +7 +Package_SON +WSON-6-1EP_3x3mm_P0.95mm +WSON6 3*3 MM, 0.95 PITCH; http://www.ti.com/lit/ds/symlink/lmr62421.pdf +WSON6 0.95 +0 +10 +7 +Package_SON +WSON-6_1.5x1.5mm_P0.5mm +WSON6, http://www.ti.com/lit/ds/symlink/tlv702.pdf +WSON6_1.5x1.5mm_P0.5mm +0 +6 +6 +Package_SON +WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP +0 +11 +9 +Package_SON +WSON-8-1EP_2x2mm_P0.5mm_EP0.9x1.6mm_ThermalVias +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP ThermalVias +0 +14 +9 +Package_SON +WSON-8-1EP_3x2.5mm_P0.5mm_EP1.2x1.5mm_PullBack +WSON, 8 Pin (http://www.ti.com/lit/ml/mpds400/mpds400.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +13 +9 +Package_SON +WSON-8-1EP_3x2.5mm_P0.5mm_EP1.2x1.5mm_PullBack_ThermalVias +WSON, 8 Pin (http://www.ti.com/lit/ml/mpds400/mpds400.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +18 +9 +Package_SON +WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm +8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf +WSON 8 1EP +0 +13 +9 +Package_SON +WSON-8-1EP_6x5mm_P1.27mm_EP3.4x4.3mm +WSON, 8 Pin (http://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf (page 68)), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +13 +9 +Package_SON +WSON-8-1EP_6x5mm_P1.27mm_EP3.4x4mm +WSON, 8 Pin (http://ww1.microchip.com/downloads/en/AppNotes/S72030.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +13 +9 +Package_SON +WSON-8_4x4mm_P0.8mm +http://www.ti.com/lit/ml/mpds406/mpds406.pdf +WSON8_4x4mm_P0.8mm +0 +9 +9 +Package_SON +WSON-10-1EP_2.5x2.5mm_P0.5mm_EP1.2x2mm +WSON, 10 Pin (http://www.ti.com/lit/gpn/tps63030#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +15 +11 +Package_SON +WSON-10-1EP_2.5x2.5mm_P0.5mm_EP1.2x2mm_ThermalVias +WSON, 10 Pin (http://www.ti.com/lit/gpn/tps63030#page=24), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +22 +11 +Package_SON +WSON-10-1EP_2x3mm_P0.5mm_EP0.84x2.4mm +WSON-10 package 2x3mm body, pitch 0.5mm, see http://www.ti.com/lit/ds/symlink/tps62177.pdf +WSON 0.5 +0 +14 +11 +Package_SON +WSON-10-1EP_2x3mm_P0.5mm_EP0.84x2.4mm_ThermalVias +WSON-10 package 2x3mm body, pitch 0.5mm, thermal vias and counter-pad, see http://www.ti.com/lit/ds/symlink/tps62177.pdf +WSON 0.5 thermal vias +0 +17 +11 +Package_SON +WSON-10-1EP_4x3mm_P0.5mm_EP2.2x2mm +10-Lead Plastic WSON, 4x3mm Body, 0.5mm Pitch (http://www.ti.com/lit/ds/symlink/lm4990.pdf) +WSON 0.5 +0 +15 +11 +Package_SON +WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65 +WSON-12 http://www.ti.com/lit/ds/symlink/lm27762.pdf +WSON-12 +0 +15 +13 +Package_SON +WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65_ThermalVias +WSON-12 http://www.ti.com/lit/ds/symlink/lm27762.pdf +WSON-12 +0 +19 +13 +Package_SON +WSON-12-1EP_4x4mm_P0.5mm_EP2.6x3mm +WSON, 12 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +17 +13 +Package_SON +WSON-12-1EP_4x4mm_P0.5mm_EP2.6x3mm_ThermalVias +WSON, 12 Pin (http://www.ti.com/lit/ds/symlink/ldc1312.pdf#page=62), generated with kicad-footprint-generator ipc_noLead_generator.py +WSON NoLead +0 +27 +13 +Package_SON +WSON-14-1EP_4.0x4.0mm_P0.5mm_EP2.6x2.6mm +14-Lead Plastic Dual Flat, No Lead Package - 4.0x4.0x0.8 mm Body [WSON], http://www.ti.com/lit/ml/mpds421/mpds421.pdf +NHL014B +0 +19 +15 +Package_SON +WSON-16_3.3x1.35_P0.4mm +WSON-16 3.3 x 1.35mm Pitch 0.4mm http://www.chip.tomsk.ru/chip/chipdoc.nsf/Package/C67E729A4D6C883A4725793E004C8739!OpenDocument +WSON-16 3.3 x 1.35mm Pitch 0.4mm +0 +20 +17 +Package_SON +X2SON-8_1.4x1mm_P0.35mm +X2SON-8 1.4x1mm Pitch0.35mm http://www.ti.com/lit/ds/symlink/pca9306.pdf +X2SON-8 1.4x1mm Pitch0.35mm +0 +8 +8 +Package_SO_J-Lead +TSOC-6_3.76x3.94mm_P1.27mm +Maxim Integrated TSOC-6 D6+1,https://datasheets.maximintegrated.com/en/ds/DS2401.pdf, https://pdfserv.maximintegrated.com/land_patterns/90-0321.PDF +TSOC-6 +0 +6 +6 +Package_TO_SOT_SMD +ATPAK-2 +ATPAK SMD package, http://www.onsemi.com/pub/Collateral/ENA2192-D.PDF +ATPAK +0 +7 +3 +Package_TO_SOT_SMD +Analog_KS-4 +Analog Devices KS-4, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sc70ks/ks_4.pdf +Analog Devices KS-4 (like EIAJ SC-82) +0 +4 +4 +Package_TO_SOT_SMD +Diodes_SOT-553 +Diodes SOT-553, https://www.diodes.com/assets/Package-Files/SOT553.pdf +SOT-553 +0 +5 +5 +Package_TO_SOT_SMD +HVSOF5 +HVSOF5, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hvsof5_1-e.pdf, http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/hall/bu52001gul-e.pdf +HVSOF5 +0 +5 +5 +Package_TO_SOT_SMD +HVSOF6 +HVSOF6, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hvsof6_1-e.pdf, http://rohmfs.rohm.com/en/products/databook/datasheet/ic/audio_video/video_amplifier/bh76106hfv-e.pdf +HVSOF6 +0 +7 +7 +Package_TO_SOT_SMD +Infineon_PG-HDSOP-10-1 +Infineon PG-HDSOP-10-1 (DDPAK), 20.96x6.5x2.3mm, slug up (https://www.infineon.com/cms/en/product/packages/PG-HDSOP/PG-HDSOP-10-1/) +hdsop 10 ddpak +0 +10 +10 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-1 +HSOF-8-1 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/) +mosfet hsof toll +0 +53 +3 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-1_ThermalVias +HSOF-8-1 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-1/) +mosfet hsof toll thermal vias +0 +96 +3 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-2 +HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/) +mosfet hsof toll +0 +12 +4 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-2_ThermalVias +HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/) +mosfet hsof toll thermal vias +0 +97 +4 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-2_ThermalVias2 +HSOF-8-2 [TOLL] power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-2/, https://www.infineon.com/dgdl/Infineon-ApplicationNote_600V_CoolMOS_C7_Gold_TOLL-AN-v01_00-EN.pdf?fileId=5546d4625b10283a015b144a1af70df6) +mosfet hsof toll thermal vias +0 +159 +4 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-3 +HSOF-8-3 power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-3/) +mosfet hsof +0 +25 +4 +Package_TO_SOT_SMD +Infineon_PG-HSOF-8-3_ThermalVias +HSOF-8-3 power MOSFET (http://www.infineon.com/cms/en/product/packages/PG-HSOF/PG-HSOF-8-3/) +mosfet hsof +0 +64 +4 +Package_TO_SOT_SMD +Infineon_PG-TO-220-7Lead_TabPin8 +Infineon PG-TO-220-7, Tab as Pin 8, see e.g. https://www.infineon.com/dgdl/Infineon-BTS50055-1TMC-DS-v01_00-EN.pdf?fileId=5546d4625a888733015aa9b0007235e9 +Infineon PG-TO-220-7 +0 +12 +8 +Package_TO_SOT_SMD +LFPAK33 +LFPAK33 SOT-1210 https://assets.nexperia.com/documents/outline-drawing/SOT1210.pdf +LFPAK33 SOT-1210 +0 +17 +5 +Package_TO_SOT_SMD +LFPAK56 +LFPAK56 https://assets.nexperia.com/documents/outline-drawing/SOT669.pdf +LFPAK56 SOT-669 Power-SO8 +0 +18 +5 +Package_TO_SOT_SMD +OnSemi_ECH8 +On Semiconductor ECH8, https://www.onsemi.com/pub/Collateral/318BF.PDF +ECH8 SOT28-FL SOT-28-FL +0 +8 +8 +Package_TO_SOT_SMD +PQFN_8x8 +Low Profile 8x8mm PQFN, Dual Cool 88, https://www.onsemi.com/pub/Collateral/FDMT80080DC-D.pdf +pqfn vdfn mosfet +0 +9 +3 +Package_TO_SOT_SMD +PowerMacro_M234_NoHole +TO-50-4 Power Macro Package Style M234 +TO-50-4 Power Macro Package Style M234 +0 +4 +4 +Package_TO_SOT_SMD +PowerMacro_M234_WithHole +TO-50-4 Power Macro Package Style M234 +TO-50-4 Power Macro Package Style M234 +0 +4 +4 +Package_TO_SOT_SMD +Rohm_HRP7 +Rohm HRP7 SMD package, http://rohmfs.rohm.com/en/techdata_basic/ic/package/hrp7_1-e.pdf, http://rohmfs.rohm.com/en/products/databook/datasheet/ic/motor/dc/bd621x-e.pdf +Rohm HRP7 SMD +0 +69 +7 +Package_TO_SOT_SMD +SC-59 +SC-59, https://lib.chipdip.ru/images/import_diod/original/SOT-23_SC-59.jpg +SC-59 +0 +3 +3 +Package_TO_SOT_SMD +SC-59_Handsoldering +SC-59, hand-soldering varaint, https://lib.chipdip.ru/images/import_diod/original/SOT-23_SC-59.jpg +SC-59 hand-soldering +0 +3 +3 +Package_TO_SOT_SMD +SC-70-8 +SC70-8 +SC70-8 +0 +8 +8 +Package_TO_SOT_SMD +SC-70-8_Handsoldering +SC70-8, Handsoldering +SC70-8 Handsoldering +0 +8 +8 +Package_TO_SOT_SMD +SC-82AA +SC-82AA +SC-82AA +0 +4 +4 +Package_TO_SOT_SMD +SC-82AA_Handsoldering +SC-82AA +SC-82AA +0 +4 +4 +Package_TO_SOT_SMD +SC-82AB +SC-82AB +SC-82AB +0 +4 +4 +Package_TO_SOT_SMD +SC-82AB_Handsoldering +SC-82AB +SC-82AB +0 +4 +4 +Package_TO_SOT_SMD +SOT-23 +SOT-23, Standard +SOT-23 +0 +3 +3 +Package_TO_SOT_SMD +SOT-23-5 +5-pin SOT23 package +SOT-23-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-23-5_HandSoldering +5-pin SOT23 package +SOT-23-5 hand-soldering +0 +5 +5 +Package_TO_SOT_SMD +SOT-23-6 +6-pin SOT-23 package +SOT-23-6 +0 +6 +6 +Package_TO_SOT_SMD +SOT-23-6_Handsoldering +6-pin SOT-23 package, Handsoldering +SOT-23-6 Handsoldering +0 +6 +6 +Package_TO_SOT_SMD +SOT-23-8 +8-pin SOT-23 package, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sot-23rj/rj_8.pdf +SOT-23-8 +0 +8 +8 +Package_TO_SOT_SMD +SOT-23-8_Handsoldering +8-pin SOT-23 package, Handsoldering, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sot-23rj/rj_8.pdf +SOT-23-8 Handsoldering +0 +8 +8 +Package_TO_SOT_SMD +SOT-23W +SOT-23W http://www.allegromicro.com/~/media/Files/Datasheets/A112x-Datasheet.ashx?la=en&hash=7BC461E058CC246E0BAB62433B2F1ECA104CA9D3 +SOT-23W +0 +3 +3 +Package_TO_SOT_SMD +SOT-23W_Handsoldering +SOT-23W http://www.allegromicro.com/~/media/Files/Datasheets/A112x-Datasheet.ashx?la=en&hash=7BC461E058CC246E0BAB62433B2F1ECA104CA9D3 +SOT-23W for handsoldering +0 +3 +3 +Package_TO_SOT_SMD +SOT-23_Handsoldering +SOT-23, Handsoldering +SOT-23 +0 +3 +3 +Package_TO_SOT_SMD +SOT-89-3 +SOT-89-3, http://ww1.microchip.com/downloads/en/DeviceDoc/3L_SOT-89_MB_C04-029C.pdf +SOT-89-3 +0 +3 +3 +Package_TO_SOT_SMD +SOT-89-3_Handsoldering +SOT-89-3 Handsoldering +SOT-89-3 Handsoldering +0 +3 +3 +Package_TO_SOT_SMD +SOT-89-5 +SOT-89-5, http://www.e-devices.ricoh.co.jp/en/products/product_power/pkg/sot-89-5.pdf +SOT-89-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-89-5_Handsoldering +SOT-89-5, http://www.e-devices.ricoh.co.jp/en/products/product_power/pkg/sot-89-5.pdf +SOT-89-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-143 +SOT-143 +SOT-143 +0 +4 +4 +Package_TO_SOT_SMD +SOT-143R_Reverse +SOT-143R Reverse +SOT-143R Reverse +0 +4 +4 +Package_TO_SOT_SMD +SOT-143R_Reverse_Handsoldering +SOT-143R Reverse Handsoldering +SOT-143 Reverse Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-143_Handsoldering +SOT-143 Handsoldering +SOT-143 Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-223 +module CMS SOT223 4 pins +CMS SOT +0 +4 +4 +Package_TO_SOT_SMD +SOT-223-3_TabPin2 +module CMS SOT223 4 pins +CMS SOT +0 +4 +3 +Package_TO_SOT_SMD +SOT-223-5 +module CMS SOT223 5 pins, http://ww1.microchip.com/downloads/en/DeviceDoc/51751a.pdf +CMS SOT +0 +5 +5 +Package_TO_SOT_SMD +SOT-223-6 +module CMS SOT223 6 pins, http://www.ti.com/lit/ds/symlink/tps737.pdf +CMS SOT +0 +6 +6 +Package_TO_SOT_SMD +SOT-223-6_TabPin3 +module CMS SOT223 6 pins, http://www.ti.com/lit/ds/symlink/tps737.pdf +CMS SOT +0 +6 +5 +Package_TO_SOT_SMD +SOT-223-8 +module CMS SOT223 8 pins, https://www.diodes.com/assets/Datasheets/ZXSBMR16PT8.pdf +CMS SOT +0 +8 +8 +Package_TO_SOT_SMD +SOT-323_SC-70 +SOT-323, SC-70 +SOT-323 SC-70 +0 +3 +3 +Package_TO_SOT_SMD +SOT-323_SC-70_Handsoldering +SOT-323, SC-70 Handsoldering +SOT-323 SC-70 Handsoldering +0 +3 +3 +Package_TO_SOT_SMD +SOT-343_SC-70-4 +SOT-343, SC-70-4 +SOT-343 SC-70-4 +0 +4 +4 +Package_TO_SOT_SMD +SOT-343_SC-70-4_Handsoldering +SOT-343, SC-70-4, Handsoldering +SOT-343 SC-70-4 Handsoldering +0 +4 +4 +Package_TO_SOT_SMD +SOT-353_SC-70-5 +SOT-353, SC-70-5 +SOT-353 SC-70-5 +0 +5 +5 +Package_TO_SOT_SMD +SOT-353_SC-70-5_Handsoldering +SOT-353, SC-70-5, Handsoldering +SOT-353 SC-70-5 Handsoldering +0 +5 +5 +Package_TO_SOT_SMD +SOT-363_SC-70-6 +SOT-363, SC-70-6 +SOT-363 SC-70-6 +0 +6 +6 +Package_TO_SOT_SMD +SOT-363_SC-70-6_Handsoldering +SOT-363, SC-70-6, Handsoldering +SOT-363 SC-70-6 Handsoldering +0 +6 +6 +Package_TO_SOT_SMD +SOT-383F +8-pin SOT-383F, http://www.mouser.com/ds/2/80/CPDVR085V0C-HF-RevB-10783.pdf +SOT-383F +0 +9 +9 +Package_TO_SOT_SMD +SOT-383FL +8-pin SOT-383FL package, http://www.onsemi.com/pub_link/Collateral/ENA2267-D.PDF +SOT-383FL +0 +8 +8 +Package_TO_SOT_SMD +SOT-416 +SOT-416, https://www.nxp.com/docs/en/package-information/SOT416.pdf +SOT-416 +0 +3 +3 +Package_TO_SOT_SMD +SOT-523 +SOT523, https://www.diodes.com/assets/Package-Files/SOT523.pdf +SOT-523 +0 +3 +3 +Package_TO_SOT_SMD +SOT-543 +SOT-543 4 lead surface package +SOT-543 SC-107A EMD4 +0 +4 +4 +Package_TO_SOT_SMD +SOT-553 +SOT553 +SOT-553 +0 +5 +5 +Package_TO_SOT_SMD +SOT-563 +SOT563 +SOT-563 +0 +6 +6 +Package_TO_SOT_SMD +SOT-665 +SOT665 +SOT-665 +0 +5 +5 +Package_TO_SOT_SMD +SOT-666 +SOT666 +SOT-666 +0 +6 +6 +Package_TO_SOT_SMD +SOT-723 +http://toshiba.semicon-storage.com/info/docget.jsp?did=5879&prodName=RN1104MFV +sot 723 +0 +3 +3 +Package_TO_SOT_SMD +SOT-883 +SOT-883, https://assets.nexperia.com/documents/outline-drawing/SOT883.pdf +SOT-883 +0 +3 +3 +Package_TO_SOT_SMD +SOT-886 +SOT-886 +SOT-886 +0 +6 +6 +Package_TO_SOT_SMD +SOT-963 +SOT 963 6 pins package 1x0.8mm pitch 0.35mm +SOT 963 6 pins package 1x0.8mm pitch 0.35mm +0 +6 +6 +Package_TO_SOT_SMD +SOT-1123 +SOT-1123 small outline transistor (see http://www.onsemi.com/pub/Collateral/NST3906F3-D.PDF) +SOT-1123 transistor +0 +3 +3 +Package_TO_SOT_SMD +SOT-1333-1 +SOT-1333-1 +SOT-1333-1 +0 +9 +9 +Package_TO_SOT_SMD +SOT-1334-1 +SOT-1334-1 +SOT-1334-1 +0 +14 +14 +Package_TO_SOT_SMD +SuperSOT-3 +3-pin SuperSOT package https://www.fairchildsemi.com/package-drawings/MA/MA03B.pdf +SuperSOT-3 SSOT-3 +0 +3 +3 +Package_TO_SOT_SMD +SuperSOT-6 +6-pin SuperSOT package http://www.mouser.com/ds/2/149/FMB5551-889214.pdf +SuperSOT-6 SSOT-6 +0 +6 +6 +Package_TO_SOT_SMD +SuperSOT-8 +8-pin SuperSOT package, http://www.icbank.com/icbank_data/semi_package/ssot8_dim.pdf +SuperSOT-8 SSOT-8 +0 +8 +8 +Package_TO_SOT_SMD +TDSON-8-1 +Power MOSFET package, TDSON-8-1, 5.15x5.9mm (https://www.infineon.com/cms/en/product/packages/PG-TDSON/PG-TDSON-8-1/) +tdson +0 +14 +5 +Package_TO_SOT_SMD +TO-50-3_LongPad-NoHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_LongPad-WithHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_ShortPad-NoHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-3_ShortPad-WithHole_Housing +TO-50-3 Macro T Package Style M236 +TO-50-3 Macro T Package Style M236 +0 +3 +3 +Package_TO_SOT_SMD +TO-50-4_LongPad-NoHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_LongPad-WithHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_ShortPad-NoHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-50-4_ShortPad-WithHole_Housing +TO-50-4 Macro X Package Style M238 +TO-50-4 Macro X Package Style M238 +0 +4 +4 +Package_TO_SOT_SMD +TO-252-2 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +7 +3 +Package_TO_SOT_SMD +TO-252-2_TabPin1 +TO-252-2, tab to pin 1 https://www.wolfspeed.com/media/downloads/87/CSD01060.pdf +TO-252-2 diode +0 +7 +2 +Package_TO_SOT_SMD +TO-252-3_TabPin2 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +8 +3 +Package_TO_SOT_SMD +TO-252-3_TabPin4 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-3-1/ +DPAK TO-252 DPAK-3 TO-252-3 SOT-428 +0 +8 +4 +Package_TO_SOT_SMD +TO-252-4 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +9 +5 +Package_TO_SOT_SMD +TO-252-5_TabPin3 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +10 +5 +Package_TO_SOT_SMD +TO-252-5_TabPin6 +TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ +DPAK TO-252 DPAK-5 TO-252-5 +0 +10 +6 +Package_TO_SOT_SMD +TO-263-2 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +7 +3 +Package_TO_SOT_SMD +TO-263-2_TabPin1 +TO-263 / D2PAK / DDPAK SMD package, tab to pin 1, https://www.wolfspeed.com/media/downloads/137/C3D06060G.pdf +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 diode +0 +7 +2 +Package_TO_SOT_SMD +TO-263-3_TabPin2 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +8 +3 +Package_TO_SOT_SMD +TO-263-3_TabPin4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-3-1/ +D2PAK DDPAK TO-263 D2PAK-3 TO-263-3 SOT-404 +0 +8 +4 +Package_TO_SOT_SMD +TO-263-4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +9 +5 +Package_TO_SOT_SMD +TO-263-5_TabPin3 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +10 +5 +Package_TO_SOT_SMD +TO-263-5_TabPin6 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-5-1/ +D2PAK DDPAK TO-263 D2PAK-5 TO-263-5 SOT-426 +0 +10 +6 +Package_TO_SOT_SMD +TO-263-6 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +11 +7 +Package_TO_SOT_SMD +TO-263-7_TabPin4 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +12 +7 +Package_TO_SOT_SMD +TO-263-7_TabPin8 +TO-263 / D2PAK / DDPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO263/PG-TO263-7-1/ +D2PAK DDPAK TO-263 D2PAK-7 TO-263-7 SOT-427 +0 +12 +8 +Package_TO_SOT_SMD +TO-263-9_TabPin5 +TO-263 / D2PAK / DDPAK SMD package, http://www.ti.com/lit/ds/symlink/lm4755.pdf +D2PAK DDPAK TO-263 D2PAK-9 TO-263-9 +0 +14 +9 +Package_TO_SOT_SMD +TO-263-9_TabPin10 +TO-263 / D2PAK / DDPAK SMD package, http://www.ti.com/lit/ds/symlink/lm4755.pdf +D2PAK DDPAK TO-263 D2PAK-9 TO-263-9 +0 +14 +10 +Package_TO_SOT_SMD +TO-268-2 +TO-268/D3PAK SMD package, http://www.icbank.com/icbank_data/semi_package/to268aa_dim.pdf +D3PAK TO-268 D3PAK-3 TO-268-3 +0 +7 +3 +Package_TO_SOT_SMD +TO-269AA +SMD package TO-269AA (e.g. diode bridge), see http://www.vishay.com/docs/88854/padlayouts.pdf +TO-269AA MBS diode bridge +0 +4 +4 +Package_TO_SOT_SMD +TO-277A +Thermal enhanced ultra thin SMD package; 3 leads; body: 4.3x6.1x0.43mm, https://www.vishay.com/docs/95570/to-277asmpc.pdf +TO-277A SMPC +0 +12 +3 +Package_TO_SOT_SMD +TO-277B +TO-227B https://media.digikey.com/pdf/Data%20Sheets/Littelfuse%20PDFs/DST2050S.pdf +TO-277B +0 +9 +3 +Package_TO_SOT_SMD +TSOT-23 +3-pin TSOT23 package, http://www.analog.com.tw/pdf/All_In_One.pdf +TSOT-23 +0 +3 +3 +Package_TO_SOT_SMD +TSOT-23-5 +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23-5 +0 +5 +5 +Package_TO_SOT_SMD +TSOT-23-5_HandSoldering +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23-5 Hand-soldering +0 +5 +5 +Package_TO_SOT_SMD +TSOT-23-6 +6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf +TSOT-23-6 MK06A TSOT-6 +0 +6 +6 +Package_TO_SOT_SMD +TSOT-23-6_HandSoldering +6-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_6_05-08-1636.pdf +TSOT-23-6 MK06A TSOT-6 Hand-soldering +0 +6 +6 +Package_TO_SOT_SMD +TSOT-23-8 +8-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_8_05-08-1637.pdf +TSOT-23-8 +0 +8 +8 +Package_TO_SOT_SMD +TSOT-23-8_HandSoldering +8-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_8_05-08-1637.pdf +TSOT-23-8 Hand-soldering +0 +8 +8 +Package_TO_SOT_SMD +TSOT-23_HandSoldering +5-pin TSOT23 package, http://cds.linear.com/docs/en/packaging/SOT_5_05-08-1635.pdf +TSOT-23 Hand-soldering +0 +3 +3 +Package_TO_SOT_SMD +Texas_DRT-3 +Texas Instrument DRT-3 1x0.8mm Pitch 0.7mm http://www.ti.com/lit/ds/symlink/tpd2eusb30.pdf +DRT-3 1x0.8mm Pitch 0.7mm +0 +3 +3 +Package_TO_SOT_SMD +Texas_NDQ +Texas Instruments, NDQ, 5 pin (https://www.ti.com/lit/ml/mmsf022/mmsf022.pdf) +ti pfm dap +0 +6 +6 +Package_TO_SOT_SMD +Texas_NDY0011A +TO-PMOD-11 11-pin switching regulator package, http://www.ti.com/lit/ml/mmsf025/mmsf025.pdf +Texas TO-PMOD NDY00011A +0 +12 +12 +Package_TO_SOT_SMD +Texas_R-PDSO-G6 +R-PDSO-G6, http://www.ti.com/lit/ds/slis144b/slis144b.pdf +R-PDSO-G6 SC-70-6 +0 +6 +6 +Package_TO_SOT_SMD +VSOF5 +VSOF5 +VSOF5 +0 +5 +5 +Package_TO_SOT_SMD +Vishay_PowerPAK_SC70-6L_Dual +Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70487/70487.pdf +powerpak sc70 sc-70 dual +0 +8 +6 +Package_TO_SOT_SMD +Vishay_PowerPAK_SC70-6L_Single +Vishay PowerPAK SC70 single transistor package http://www.vishay.com/docs/70486/70486.pdf +powerpak sc70 sc-70 +0 +6 +3 +Package_TO_SOT_THT +Fairchild_TO-220F-6L +Fairchild TO-220F-6L, http://www.mouser.com/ds/2/149/FSL136MRT-113334.pdf +Fairchild TO-220F-6L +0 +6 +6 +Package_TO_SOT_THT +Heraeus_TO-92-2 +TO-92 2-pin variant by Heraeus, drill 0.75mm (http://www.produktinfo.conrad.com/datenblaetter/175000-199999/181293-da-01-de-TO92_Temperatursensor_PT1000_32209225.pdf) +to-92 +0 +2 +2 +Package_TO_SOT_THT +NEC_Molded_7x4x9mm +Molded Japan Transistor Package 7x4x9mm^3, http://rtellason.com/transdata/2sb734.pdf +Japan transistor +0 +3 +3 +Package_TO_SOT_THT +PowerIntegrations_TO-220-7C +Non Isolated Modified TO-220 7pin Package, see http://www.farnell.com/datasheets/5793.pdf +Power Integration Y Package +0 +6 +6 +Package_TO_SOT_THT +SIPAK-1EP_Horizontal_TabDown +SIPAK, Horizontal, RM 2.286mm +SIPAK Horizontal RM 2.286mm +0 +4 +4 +Package_TO_SOT_THT +SIPAK_Vertical +SIPAK, Vertical, RM 2.286mm +SIPAK Vertical RM 2.286mm +0 +3 +3 +Package_TO_SOT_THT +SOD-70_P2.54mm +Plastic near cylindrical package Sod-70 see: https://www.nxp.com/docs/en/data-sheet/KTY81_SER.pdf [StepUp generated footprint] +Sod-70 +0 +2 +2 +Package_TO_SOT_THT +SOD-70_P5.08mm +Plastic near cylindrical package Sod-70 see: https://www.nxp.com/docs/en/data-sheet/KTY81_SER.pdf [StepUp generated footprint] +Sod-70 +0 +2 +2 +Package_TO_SOT_THT +SOT-227 +SOT-227 / SOT-227B / ISOTOP, M4 mounting screws (https://www.vishay.com/docs/95423/sot227g2.pdf, https://www.vishay.com/docs/95793/vs-fc420sa10.pdf) +sot 227 isotop +0 +8 +4 +Package_TO_SOT_THT +TO-3 +Transistor TO-3 +TR TO-3 TO3 TO-204 +0 +4 +3 +Package_TO_SOT_THT +TO-3P-3_Horizontal_TabDown +TO-3P-3, Horizontal, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3P-3_Horizontal_TabUp +TO-3P-3, Horizontal, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3P-3_Vertical +TO-3P-3, Vertical, RM 5.45mm, , see https://toshiba.semicon-storage.com/ap-en/design-support/package/detail.TO-3P(N).html +TO-3P-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Horizontal_TabDown +TO-3PB-3, Horizontal, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Horizontal_TabUp +TO-3PB-3, Horizontal, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-3PB-3_Vertical +TO-3PB-3, Vertical, RM 5.45mm, , see http://www.onsemi.com/pub/Collateral/340AC.PDF +TO-3PB-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-5-2 +TO-5-2 +TO-5-2 +0 +2 +2 +Package_TO_SOT_THT +TO-5-2_Window +TO-5-2_Window, Window +TO-5-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-5-3 +TO-5-3 +TO-5-3 +0 +3 +3 +Package_TO_SOT_THT +TO-5-3_Window +TO-5-3_Window, Window +TO-5-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-5-4 +TO-5-4 +TO-5-4 +0 +4 +4 +Package_TO_SOT_THT +TO-5-4_Window +TO-5-4_Window, Window +TO-5-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-5-6 +TO-5-6 +TO-5-6 +0 +6 +6 +Package_TO_SOT_THT +TO-5-6_Window +TO-5-6_Window, Window +TO-5-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-5-8 +TO-5-8 +TO-5-8 +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_PD5.08 +TO-5-8_PD5.08 +TO-5-8_PD5.08 +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_PD5.08_Window +TO-5-8_PD5.08_Window, Window +TO-5-8_PD5.08_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-5-8_Window +TO-5-8_Window, Window +TO-5-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-5-10 +TO-5-10 +TO-5-10 +0 +10 +10 +Package_TO_SOT_THT +TO-5-10_Window +TO-5-10_Window, Window +TO-5-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-8-2 +TO-8-2 +TO-8-2 +0 +2 +2 +Package_TO_SOT_THT +TO-8-2_Window +TO-8-2_Window, Window +TO-8-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-8-3 +TO-8-3 +TO-8-3 +0 +3 +3 +Package_TO_SOT_THT +TO-8-3_Window +TO-8-3_Window, Window +TO-8-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-11-2 +TO-11-2 +TO-11-2 +0 +2 +2 +Package_TO_SOT_THT +TO-11-2_Window +TO-11-2_Window, Window +TO-11-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-11-3 +TO-11-3 +TO-11-3 +0 +3 +3 +Package_TO_SOT_THT +TO-11-3_Window +TO-11-3_Window, Window +TO-11-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-12-4 +TO-12-4 +TO-12-4 +0 +4 +4 +Package_TO_SOT_THT +TO-12-4_Window +TO-12-4_Window, Window +TO-12-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-17-4 +TO-17-4 +TO-17-4 +0 +4 +4 +Package_TO_SOT_THT +TO-17-4_Window +TO-17-4_Window, Window +TO-17-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-18-2 +TO-18-2 +TO-18-2 +0 +2 +2 +Package_TO_SOT_THT +TO-18-2_Lens +TO-18-2_Lens, Lens +TO-18-2_Lens Lens +0 +2 +2 +Package_TO_SOT_THT +TO-18-2_Window +TO-18-2_Window, Window +TO-18-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-18-3 +TO-18-3 +TO-18-3 +0 +3 +3 +Package_TO_SOT_THT +TO-18-3_Lens +TO-18-3_Lens, Lens +TO-18-3_Lens Lens +0 +3 +3 +Package_TO_SOT_THT +TO-18-3_Window +TO-18-3_Window, Window +TO-18-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-18-4 +TO-18-4 +TO-18-4 +0 +4 +4 +Package_TO_SOT_THT +TO-18-4_Lens +TO-18-4_Lens, Lens +TO-18-4_Lens Lens +0 +4 +4 +Package_TO_SOT_THT +TO-18-4_Window +TO-18-4_Window, Window +TO-18-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-33-4 +TO-33-4 +TO-33-4 +0 +4 +4 +Package_TO_SOT_THT +TO-33-4_Window +TO-33-4_Window, Window +TO-33-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-38-2 +TO-38-2 +TO-38-2 +0 +2 +2 +Package_TO_SOT_THT +TO-38-2_Window +TO-38-2_Window, Window +TO-38-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-38-3 +TO-38-3 +TO-38-3 +0 +3 +3 +Package_TO_SOT_THT +TO-38-3_Window +TO-38-3_Window, Window +TO-38-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-39-2 +TO-39-2 +TO-39-2 +0 +2 +2 +Package_TO_SOT_THT +TO-39-2_Window +TO-39-2_Window, Window +TO-39-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-39-3 +TO-39-3 +TO-39-3 +0 +3 +3 +Package_TO_SOT_THT +TO-39-3_Window +TO-39-3_Window, Window +TO-39-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-39-4 +TO-39-4 +TO-39-4 +0 +4 +4 +Package_TO_SOT_THT +TO-39-4_Window +TO-39-4_Window, Window +TO-39-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-39-6 +TO-39-6 +TO-39-6 +0 +6 +6 +Package_TO_SOT_THT +TO-39-6_Window +TO-39-6_Window, Window +TO-39-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-39-8 +TO-39-8 +TO-39-8 +0 +8 +8 +Package_TO_SOT_THT +TO-39-8_Window +TO-39-8_Window, Window +TO-39-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-39-10 +TO-39-10 +TO-39-10 +0 +10 +10 +Package_TO_SOT_THT +TO-39-10_Window +TO-39-10_Window, Window +TO-39-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-46-2 +TO-46-2 +TO-46-2 +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Pin2Center +TO-46-2, Pin2 at center of package, Thorlabs photodiodes +TO-46-2 Thorlabs +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Pin2Center_Window +TO-46-2, Pin2 at center of package, Thorlabs photodiodes +TO-46-2 Thorlabs +0 +2 +2 +Package_TO_SOT_THT +TO-46-2_Window +TO-46-2_Window, Window +TO-46-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-46-3 +TO-46-3 +TO-46-3 +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Pin2Center +TO-46-3, Pin2 at center of package, Thorlabs photodiodes, https://www.thorlabs.de/drawings/374b6862eb3b5a04-9360B5F6-5056-2306-D912111C06C3F830/FDGA05-SpecSheet.pdf +TO-46-3 Thorlabs +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Pin2Center_Window +TO-46-3, Pin2 at center of package, Thorlabs photodiodes, https://www.thorlabs.de/drawings/374b6862eb3b5a04-9360B5F6-5056-2306-D912111C06C3F830/FDGA05-SpecSheet.pdf +TO-46-3 Thorlabs +0 +3 +3 +Package_TO_SOT_THT +TO-46-3_Window +TO-46-3_Window, Window +TO-46-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-46-4 +TO-46-4 +TO-46-4 +0 +4 +4 +Package_TO_SOT_THT +TO-46-4_Window +TO-46-4_Window, Window +TO-46-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-52-2 +TO-52-2 +TO-52-2 +0 +2 +2 +Package_TO_SOT_THT +TO-52-2_Window +TO-52-2_Window, Window +TO-52-2_Window Window +0 +2 +2 +Package_TO_SOT_THT +TO-52-3 +TO-52-3 +TO-52-3 +0 +3 +3 +Package_TO_SOT_THT +TO-52-3_Window +TO-52-3_Window, Window +TO-52-3_Window Window +0 +3 +3 +Package_TO_SOT_THT +TO-72-4 +TO-72-4 +TO-72-4 +0 +4 +4 +Package_TO_SOT_THT +TO-72-4_Window +TO-72-4_Window, Window +TO-72-4_Window Window +0 +4 +4 +Package_TO_SOT_THT +TO-75-6 +TO-75-6 +TO-75-6 +0 +6 +6 +Package_TO_SOT_THT +TO-75-6_Window +TO-75-6_Window, Window +TO-75-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-78-6 +TO-78-6 +TO-78-6 +0 +6 +6 +Package_TO_SOT_THT +TO-78-6_Window +TO-78-6_Window, Window +TO-78-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-78-8 +TO-78-8 +TO-78-8 +0 +8 +8 +Package_TO_SOT_THT +TO-78-8_Window +TO-78-8_Window, Window +TO-78-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-78-10 +TO-78-10 +TO-78-10 +0 +10 +10 +Package_TO_SOT_THT +TO-78-10_Window +TO-78-10_Window, Window +TO-78-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-92 +TO-92 leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92-2 +TO-92 2-pin leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 diode SOD70 +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Horizontal1 +2-pin TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 temperature sensor diode +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Horizontal2 +2-pin TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 temperature sensor diode +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_W4.0mm_Horizontal_FlatSideDown +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_W4.0mm_Horizontal_FlatSideUp +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92-2_Wide +TO-92 2-pin leads in-line, wide, drill 0.75mm +to-92 sc-43 sc-43a sot54 PA33 diode SOD70 +0 +2 +2 +Package_TO_SOT_THT +TO-92Flat +TO-92Flat package, often used for hall sensors, drill 0.75mm (see e.g. http://www.ti.com/lit/ds/symlink/drv5023.pdf) +to-92Flat hall sensor +0 +3 +3 +Package_TO_SOT_THT +TO-92L +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Molded Narrow transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_HandSolder +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm, hand-soldering variant with enlarged pads (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Inline +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Inline Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Inline_Wide +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Inline Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92L_Wide +TO-92L leads in-line (large body variant of TO-92), also known as TO-226, wide, drill 0.75mm (see https://www.diodes.com/assets/Package-Files/TO92L.pdf and http://www.ti.com/lit/an/snoa059/snoa059.pdf) +TO-92L Molded Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92Mini-2 +TO-92Mini package, drill 0.6mm (https://media.digikey.com/pdf/Data%20Sheets/Infineon%20PDFs/KT,KTY.pdf) +to-92Mini transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92S +TO-92S package, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +to-92S transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92S-2 +TO-92S package, 2-pin, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +to-92S transistor +0 +2 +2 +Package_TO_SOT_THT +TO-92S_Wide +TO-92S_Wide package, drill 0.75mm (https://www.diodes.com/assets/Package-Files/TO92S%20(Type%20B).pdf) +TO-92S_Wide transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_HandSolder +TO-92 leads molded, narrow, drill 0.75mm, handsoldering variant with enlarged pads (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Horizontal1 +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Horizontal2 +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline +TO-92 leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Horizontal1 +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Horizontal2 +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_W4.0mm_Horizontal_FlatSideDown +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_W4.0mm_Horizontal_FlatSideUp +TO-92 horizontal, leads in-line, narrow, oval pads, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Inline_Wide +TO-92 leads in-line, wide, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_W4.0mm_StaggerEven_Horizontal_FlatSideDown +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_W4.0mm_StaggerEven_Horizontal_FlatSideUp +TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-92_Wide +TO-92 leads molded, wide, drill 0.75mm (see NXP sot054_po.pdf) +to-92 sc-43 sc-43a sot54 PA33 transistor +0 +3 +3 +Package_TO_SOT_THT +TO-99-6 +TO-99-6 +TO-99-6 +0 +6 +6 +Package_TO_SOT_THT +TO-99-6_Window +TO-99-6_Window, Window +TO-99-6_Window Window +0 +6 +6 +Package_TO_SOT_THT +TO-99-8 +TO-99-8 +TO-99-8 +0 +8 +8 +Package_TO_SOT_THT +TO-99-8_Window +TO-99-8_Window, Window +TO-99-8_Window Window +0 +8 +8 +Package_TO_SOT_THT +TO-100-10 +TO-100-10 +TO-100-10 +0 +10 +10 +Package_TO_SOT_THT +TO-100-10_Window +TO-100-10_Window, Window +TO-100-10_Window Window +0 +10 +10 +Package_TO_SOT_THT +TO-126-2_Horizontal_TabDown +TO-126-2, Horizontal, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-2_Horizontal_TabUp +TO-126-2, Horizontal, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-2_Vertical +TO-126-2, Vertical, RM 5.08mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-126-3_Horizontal_TabDown +TO-126-3, Horizontal, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-126-3_Horizontal_TabUp +TO-126-3, Horizontal, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-126-3_Vertical +TO-126-3, Vertical, RM 2.54mm, see https://www.diodes.com/assets/Package-Files/TO126.pdf +TO-126-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-218-2_Horizontal_TabDown +TO-218-2, Horizontal, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Horizontal RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-2_Horizontal_TabUp +TO-218-2, Horizontal, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Horizontal RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-2_Vertical +TO-218-2, Vertical, RM 10.95mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-2 Vertical RM 10.95mm SOT-93 +0 +2 +2 +Package_TO_SOT_THT +TO-218-3_Horizontal_TabDown +TO-218-3, Horizontal, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Horizontal RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-218-3_Horizontal_TabUp +TO-218-3, Horizontal, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Horizontal RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-218-3_Vertical +TO-218-3, Vertical, RM 5.475mm, SOT-93, see https://www.vishay.com/docs/95214/fto218.pdf +TO-218-3 Vertical RM 5.475mm SOT-93 +0 +3 +3 +Package_TO_SOT_THT +TO-220-2_Horizontal_TabDown +TO-220-2, Horizontal, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-2_Horizontal_TabUp +TO-220-2, Horizontal, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-2_Vertical +TO-220-2, Vertical, RM 5.08mm, see https://www.centralsemi.com/PDFS/CASE/TO-220-2PD.PDF +TO-220-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220-3_Horizontal_TabDown +TO-220-3, Horizontal, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-3_Horizontal_TabUp +TO-220-3, Horizontal, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-3_Vertical +TO-220-3, Vertical, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf +TO-220-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220-4_Horizontal_TabDown +TO-220-4, Horizontal, RM 2.54mm +TO-220-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_Horizontal_TabUp +TO-220-4, Horizontal, RM 2.54mm +TO-220-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerEven_Lead3.8mm_Vertical +TO-220-4, Vertical, RM 2.54mm, staggered type-2 +TO-220-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-4, Horizontal, RM 2.54mm, staggered type-2 +TO-220-4 Horizontal RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-4, Vertical, RM 2.54mm, staggered type-1 +TO-220-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_P5.08x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-4, Horizontal, RM 2.54mm, staggered type-1 +TO-220-4 Horizontal RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220-4_Vertical +TO-220-4, Vertical, RM 2.54mm +TO-220-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220-5_Horizontal_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_Horizontal_TabUp +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-2, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-1, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.8mm_StaggerEven_Lead7.13mm_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-2, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_P3.4x3.8mm_StaggerOdd_Lead7.13mm_TabDown +TO-220-5, Horizontal, RM 1.7mm, Pentawatt, Multiwatt-5, staggered type-1, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421.pdf?domain=www.linear.com, https://www.diodes.com/assets/Package-Files/TO220-5.pdf +TO-220-5 Horizontal RM 1.7mm Pentawatt Multiwatt-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220-5_Vertical +TO-220-5, Vertical, RM 1.7mm, Pentawatt, Multiwatt-5, see http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-to-220/to-220_5_05-08-1421_straight_lead.pdf +TO-220-5 Vertical RM 1.7mm Pentawatt Multiwatt-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220-7_P2.54x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-7, Vertical, RM 1.27mm, Multiwatt-7, staggered type-2 +TO-220-7 Vertical RM 1.27mm Multiwatt-7 staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-7, Vertical, RM 1.27mm, Multiwatt-7, staggered type-1 +TO-220-7 Vertical RM 1.27mm Multiwatt-7 staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.8mm_StaggerEven_Lead5.85mm_TabDown +TO-220-7, Horizontal, RM 1.27mm, Multiwatt-7, staggered type-2 +TO-220-7 Horizontal RM 1.27mm Multiwatt-7 staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220-7_P2.54x3.8mm_StaggerOdd_Lead5.85mm_TabDown +TO-220-7, Horizontal, RM 1.27mm, Multiwatt-7, staggered type-1 +TO-220-7 Horizontal RM 1.27mm Multiwatt-7 staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220-8_Vertical +TO-220-8 (Multiwatt8), Vertical, 2.54mm Pitch (http://www.st.com/resource/en/datasheet/tda7264.pdf) +TO-220-9 Vertical 2.54mm Pitch Multiwatt 8 +0 +8 +8 +Package_TO_SOT_THT +TO-220-9_P1.94x3.7mm_StaggerEven_Lead3.8mm_Vertical +TO-220-9, Vertical, RM 0.97mm, Multiwatt-9, staggered type-2 +TO-220-9 Vertical RM 0.97mm Multiwatt-9 staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.7mm_StaggerOdd_Lead3.8mm_Vertical +TO-220-9, Vertical, RM 0.97mm, Multiwatt-9, staggered type-1 +TO-220-9 Vertical RM 0.97mm Multiwatt-9 staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.8mm_StaggerEven_Lead5.85mm_TabDown +TO-220-9, Horizontal, RM 0.97mm, Multiwatt-9, staggered type-2 +TO-220-9 Horizontal RM 0.97mm Multiwatt-9 staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220-9_P1.94x3.8mm_StaggerOdd_Lead5.85mm_TabDown +TO-220-9, Horizontal, RM 0.97mm, Multiwatt-9, staggered type-1 +TO-220-9 Horizontal RM 0.97mm Multiwatt-9 staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220-11_P3.4x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-2, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-1, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerEven_Lead4.58mm_Vertical +TO-220-11, Vertical, RM 1.7mm, staggered type-2, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Vertical RM 1.7mm staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerOdd_Lead4.85mm_Vertical +TO-220-11, Vertical, RM 1.7mm, staggered type-1, see http://www.st.com/resource/en/datasheet/tda7391lv.pdf +TO-220-11 Vertical RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-11_P3.4x5.08mm_StaggerOdd_Lead8.45mm_TabDown +TO-220-11, Horizontal, RM 1.7mm, staggered type-1, see http://www.ti.com/lit/ds/symlink/lmd18200.pdf +TO-220-11 Horizontal RM 1.7mm staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerEven_Lead4.58mm_Vertical +TO-220-15, Vertical, RM 1.27mm, staggered type-2, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Vertical RM 1.27mm staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerEven_Lead5.84mm_TabDown +TO-220-15, Horizontal, RM 1.27mm, staggered type-2, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Horizontal RM 1.27mm staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerOdd_Lead4.58mm_Vertical +TO-220-15, Vertical, RM 1.27mm, staggered type-1, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Vertical RM 1.27mm staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-220-15_P2.54x2.54mm_StaggerOdd_Lead5.84mm_TabDown +TO-220-15, Horizontal, RM 1.27mm, staggered type-1, see http://www.st.com/resource/en/datasheet/l298.pdf +TO-220-15 Horizontal RM 1.27mm staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-220F-2_Horizontal_TabDown +TO-220F-2, Horizontal, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-2_Horizontal_TabUp +TO-220F-2, Horizontal, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Horizontal RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-2_Vertical +TO-220F-2, Vertical, RM 5.08mm, see http://www.onsemi.com/pub/Collateral/FFPF10F150S-D.pdf +TO-220F-2 Vertical RM 5.08mm +0 +2 +2 +Package_TO_SOT_THT +TO-220F-3_Horizontal_TabDown +TO-220F-3, Horizontal, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-3_Horizontal_TabUp +TO-220F-3, Horizontal, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Horizontal RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-3_Vertical +TO-220F-3, Vertical, RM 2.54mm, see http://www.st.com/resource/en/datasheet/stp20nm60.pdf +TO-220F-3 Vertical RM 2.54mm +0 +3 +3 +Package_TO_SOT_THT +TO-220F-4_Horizontal_TabDown +TO-220F-4, Horizontal, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_Horizontal_TabUp +TO-220F-4, Horizontal, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x2.05mm_StaggerEven_Lead1.85mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-2, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x2.05mm_StaggerOdd_Lead1.85mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-1, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-2, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-2 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_P5.08x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-4, Vertical, RM 2.54mm, staggered type-1, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm staggered type-1 +0 +4 +4 +Package_TO_SOT_THT +TO-220F-4_Vertical +TO-220F-4, Vertical, RM 2.54mm, see https://www.njr.com/semicon/PDF/package/TO-220F-4_E.pdf +TO-220F-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-220F-5_Horizontal_TabDown +TO-220F-5, Horizontal, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Horizontal RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_Horizontal_TabUp +TO-220F-5, Horizontal, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Horizontal RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x2.06mm_StaggerEven_Lead1.86mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-2 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x2.06mm_StaggerOdd_Lead1.86mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-1 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-2 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-2 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_P3.4x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5, staggered type-1 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 staggered type-1 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-5_Vertical +TO-220F-5, Vertical, RM 1.7mm, PentawattF-, MultiwattF-5 +TO-220F-5 Vertical RM 1.7mm PentawattF- MultiwattF-5 +0 +5 +5 +Package_TO_SOT_THT +TO-220F-7_P2.54x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-7, Vertical, RM 1.27mm, staggered type-2 +TO-220F-7 Vertical RM 1.27mm staggered type-2 +0 +7 +7 +Package_TO_SOT_THT +TO-220F-7_P2.54x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-7, Vertical, RM 1.27mm, staggered type-1 +TO-220F-7 Vertical RM 1.27mm staggered type-1 +0 +7 +7 +Package_TO_SOT_THT +TO-220F-9_P1.8x3.7mm_StaggerEven_Lead3.5mm_Vertical +TO-220F-9, Vertical, RM 0.9mm, staggered type-2 +TO-220F-9 Vertical RM 0.9mm staggered type-2 +0 +9 +9 +Package_TO_SOT_THT +TO-220F-9_P1.8x3.7mm_StaggerOdd_Lead3.5mm_Vertical +TO-220F-9, Vertical, RM 0.9mm, staggered type-1 +TO-220F-9 Vertical RM 0.9mm staggered type-1 +0 +9 +9 +Package_TO_SOT_THT +TO-220F-11_P3.4x5.08mm_StaggerEven_Lead5.08mm_Vertical +TO-220F-11, Vertical, RM 1.7mm, MultiwattF-11, staggered type-2, see http://www.ti.com/lit/ds/symlink/lm3886.pdf +TO-220F-11 Vertical RM 1.7mm MultiwattF-11 staggered type-2 +0 +11 +11 +Package_TO_SOT_THT +TO-220F-11_P3.4x5.08mm_StaggerOdd_Lead5.08mm_Vertical +TO-220F-11, Vertical, RM 1.7mm, MultiwattF-11, staggered type-1, see http://www.ti.com/lit/ds/symlink/lm3886.pdf +TO-220F-11 Vertical RM 1.7mm MultiwattF-11 staggered type-1 +0 +11 +11 +Package_TO_SOT_THT +TO-220F-15_P2.54x5.08mm_StaggerEven_Lead5.08mm_Vertical +TO-220F-15, Vertical, RM 1.27mm, MultiwattF-15, staggered type-2 +TO-220F-15 Vertical RM 1.27mm MultiwattF-15 staggered type-2 +0 +15 +15 +Package_TO_SOT_THT +TO-220F-15_P2.54x5.08mm_StaggerOdd_Lead5.08mm_Vertical +TO-220F-15, Vertical, RM 1.27mm, MultiwattF-15, staggered type-1 +TO-220F-15 Vertical RM 1.27mm MultiwattF-15 staggered type-1 +0 +15 +15 +Package_TO_SOT_THT +TO-247-2_Horizontal_TabDown +TO-247-2, Horizontal, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-2_Horizontal_TabUp +TO-247-2, Horizontal, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-2_Vertical +TO-247-2, Vertical, RM 10.9mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-2 Vertical RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-247-3_Horizontal_TabDown +TO-247-3, Horizontal, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-3_Horizontal_TabUp +TO-247-3, Horizontal, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-3_Vertical +TO-247-3, Vertical, RM 5.45mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-247-4_Horizontal_TabDown +TO-247-4, Horizontal, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-4_Horizontal_TabUp +TO-247-4, Horizontal, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Horizontal RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-4_Vertical +TO-247-4, Vertical, RM 2.54mm, see https://toshiba.semicon-storage.com/us/product/mosfet/to-247-4l.html +TO-247-4 Vertical RM 2.54mm +0 +4 +4 +Package_TO_SOT_THT +TO-247-5_Horizontal_TabDown +TO-247-5, Horizontal, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Horizontal RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-247-5_Horizontal_TabUp +TO-247-5, Horizontal, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Horizontal RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-247-5_Vertical +TO-247-5, Vertical, RM 2.54mm, see http://ww1.microchip.com/downloads/en/DeviceDoc/20005685A.pdf +TO-247-5 Vertical RM 2.54mm +0 +5 +5 +Package_TO_SOT_THT +TO-251-2-1EP_Horizontal_TabDown +TO-251-2, Horizontal, RM 4.58mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-2 Horizontal RM 4.58mm IPAK +0 +3 +3 +Package_TO_SOT_THT +TO-251-2_Vertical +TO-251-2, Vertical, RM 4.58mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-2 Vertical RM 4.58mm IPAK +0 +2 +2 +Package_TO_SOT_THT +TO-251-3-1EP_Horizontal_TabDown +TO-251-3, Horizontal, RM 2.29mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-3 Horizontal RM 2.29mm IPAK +0 +4 +4 +Package_TO_SOT_THT +TO-251-3_Vertical +TO-251-3, Vertical, RM 2.29mm, IPAK, see https://www.diodes.com/assets/Package-Files/TO251.pdf +TO-251-3 Vertical RM 2.29mm IPAK +0 +3 +3 +Package_TO_SOT_THT +TO-262-3-1EP_Horizontal_TabDown +TO-262-3, Horizontal, RM 2.54mm, IIPAK, I2PAK, see http://www.onsemi.com/pub/Collateral/EN8586-D.PDF +TO-262-3 Horizontal RM 2.54mm IIPAK I2PAK +0 +4 +4 +Package_TO_SOT_THT +TO-262-3_Vertical +TO-262-3, Vertical, RM 2.54mm, IIPAK, I2PAK, see http://www.onsemi.com/pub/Collateral/EN8586-D.PDF +TO-262-3 Vertical RM 2.54mm IIPAK I2PAK +0 +3 +3 +Package_TO_SOT_THT +TO-262-5-1EP_Horizontal_TabDown +TO-262-5, Horizontal, RM 1.7mm, IIPAK, I2PAK, see http://pdf.datasheetcatalog.com/datasheet/irf/iris4011.pdf +TO-262-5 Horizontal RM 1.7mm IIPAK I2PAK +0 +6 +6 +Package_TO_SOT_THT +TO-262-5_Vertical +TO-262-5, Vertical, RM 1.7mm, IIPAK, I2PAK, see http://pdf.datasheetcatalog.com/datasheet/irf/iris4011.pdf +TO-262-5 Vertical RM 1.7mm IIPAK I2PAK +0 +5 +5 +Package_TO_SOT_THT +TO-264-2_Horizontal_TabDown +TO-264-2, Horizontal, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-2_Horizontal_TabUp +TO-264-2, Horizontal, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Horizontal RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-2_Vertical +TO-264-2, Vertical, RM 10.9mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-2 Vertical RM 10.9mm +0 +2 +2 +Package_TO_SOT_THT +TO-264-3_Horizontal_TabDown +TO-264-3, Horizontal, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-3_Horizontal_TabUp +TO-264-3, Horizontal, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Horizontal RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-3_Vertical +TO-264-3, Vertical, RM 5.45mm, see https://www.fairchildsemi.com/package-drawings/TO/TO264A03.pdf +TO-264-3 Vertical RM 5.45mm +0 +3 +3 +Package_TO_SOT_THT +TO-264-5_Horizontal_TabDown +TO-264-5, Horizontal, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Horizontal RM 3.81mm +0 +5 +5 +Package_TO_SOT_THT +TO-264-5_Horizontal_TabUp +TO-264-5, Horizontal, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Horizontal RM 3.81mm +0 +5 +5 +Package_TO_SOT_THT +TO-264-5_Vertical +TO-264-5, Vertical, RM 3.81mm, see https://www.onsemi.com/pub/Collateral/NJL3281D-D.PDF +TO-264-5 Vertical RM 3.81mm +0 +5 +5 +Potentiometer_SMD +Potentiometer_ACP_CA6-VSMD_Vertical +Potentiometer, vertical, ACP CA6-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer vertical ACP CA6-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA6-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA6-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer vertical hole ACP CA6-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA9-VSMD_Vertical +Potentiometer, vertical, ACP CA9-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical ACP CA9-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA9-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA9-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical hole ACP CA9-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA14-VSMD_Vertical +Potentiometer, vertical, ACP CA14-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical ACP CA14-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_ACP_CA14-VSMD_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA14-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical hole ACP CA14-VSMD +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214G_Horizontal +Potentiometer, horizontal, Bourns 3214G, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer horizontal Bourns 3214G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214J_Horizontal +Potentiometer, horizontal, Bourns 3214J, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer horizontal Bourns 3214J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214W_Vertical +Potentiometer, vertical, Bourns 3214W, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer vertical Bourns 3214W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3214X_Vertical +Potentiometer, vertical, Bourns 3214X, https://www.bourns.com/docs/Product-Datasheets/3214.pdf +Potentiometer vertical Bourns 3214X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224G_Horizontal +Potentiometer, horizontal, Bourns 3224G, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer horizontal Bourns 3224G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224J_Horizontal +Potentiometer, horizontal, Bourns 3224J, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer horizontal Bourns 3224J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224W_Vertical +Potentiometer, vertical, Bourns 3224W, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer vertical Bourns 3224W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3224X_Vertical +Potentiometer, vertical, Bourns 3224X, https://www.bourns.com/docs/Product-Datasheets/3224.pdf +Potentiometer vertical Bourns 3224X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269P_Horizontal +Potentiometer, horizontal, Bourns 3269P, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer horizontal Bourns 3269P +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269W_Vertical +Potentiometer, vertical, Bourns 3269W, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer vertical Bourns 3269W +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3269X_Horizontal +Potentiometer, horizontal, Bourns 3269X, https://www.bourns.com/docs/Product-Datasheets/3269.pdf +Potentiometer horizontal Bourns 3269X +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314G_Vertical +Potentiometer, vertical, Bourns 3314G, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314G +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314J_Vertical +Potentiometer, vertical, Bourns 3314J, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314J +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314R-1_Vertical_Hole +Potentiometer, vertical, shaft hole, Bourns 3314R-1, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical hole Bourns 3314R-1 +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314R-GM5_Vertical +Potentiometer, vertical, Bourns 3314R-GM5, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer vertical Bourns 3314R-GM5 +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_3314S_Horizontal +Potentiometer, horizontal, Bourns 3314S, http://www.bourns.com/docs/Product-Datasheets/3314.pdf +Potentiometer horizontal Bourns 3314S +0 +3 +3 +Potentiometer_SMD +Potentiometer_Bourns_PRS11S_Vertical +Potentiometer, vertical, Bourns PRS11S, http://www.bourns.com/docs/Product-Datasheets/PRS11S.pdf +Potentiometer vertical Bourns PRS11S +0 +5 +5 +Potentiometer_SMD +Potentiometer_Bourns_TC33X_Vertical +Potentiometer, Bourns, TC33X, Vertical, https://www.bourns.com/pdfs/TC33.pdf +Potentiometer Bourns TC33X Vertical +0 +3 +3 +Potentiometer_SMD +Potentiometer_Vishay_TS53YJ_Vertical +Potentiometer, vertical, Vishay TS53YJ, https://www.vishay.com/docs/51008/ts53.pdf +Potentiometer vertical Vishay TS53YJ +0 +3 +3 +Potentiometer_SMD +Potentiometer_Vishay_TS53YL_Vertical +Potentiometer, vertical, Vishay TS53YL, https://www.vishay.com/docs/51008/ts53.pdf +Potentiometer vertical Vishay TS53YL +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA6-H2,5_Horizontal +Potentiometer, horizontal, ACP CA6-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/06/01-ACP-CA6.pdf +Potentiometer horizontal ACP CA6-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H2,5_Horizontal +Potentiometer, horizontal, ACP CA9-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H3,8_Horizontal +Potentiometer, horizontal, ACP CA9-H3,8, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H3,8 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-H5_Horizontal +Potentiometer, horizontal, ACP CA9-H5, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer horizontal ACP CA9-H5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-V10_Vertical +Potentiometer, vertical, ACP CA9-V10, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical ACP CA9-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA9-V10_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA9-V10, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf +Potentiometer vertical hole ACP CA9-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H2,5_Horizontal +Potentiometer, horizontal, ACP CA14-H2,5, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H2,5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H4_Horizontal +Potentiometer, horizontal, ACP CA14-H4, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H4 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14-H5_Horizontal +Potentiometer, horizontal, ACP CA14-H5, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer horizontal ACP CA14-H5 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14V-15_Vertical +Potentiometer, vertical, ACP CA14V-15, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical ACP CA14V-15 +0 +3 +3 +Potentiometer_THT +Potentiometer_ACP_CA14V-15_Vertical_Hole +Potentiometer, vertical, shaft hole, ACP CA14V-15, http://www.acptechnologies.com/wp-content/uploads/2017/10/03-ACP-CA14-CE14.pdf +Potentiometer vertical hole ACP CA14V-15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Alpha_RD901F-40-00D_Single_Vertical +Potentiometer, vertical, 9mm, single, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles +Potentiometer, vertical, 9mm, single, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical +Potentiometer, vertical, 9mm, dual, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm dual +0 +8 +6 +Potentiometer_THT +Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical_CircularHoles +Potentiometer, vertical, 9mm, dual, http://www.taiwanalpha.com.tw/downloads?target=products&id=113 +potentiometer vertical 9mm dual +0 +8 +6 +Potentiometer_THT +Potentiometer_Alps_RK09K_Single_Horizontal +Potentiometer, horizontal, Alps RK09K Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09K/RK09K_list.html +Potentiometer horizontal Alps RK09K Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alps_RK09K_Single_Vertical +Potentiometer, vertical, Alps RK09K Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09K/RK09K_list.html +Potentiometer vertical Alps RK09K Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK09L_Double_Horizontal +Potentiometer, horizontal, Alps RK09L Double, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer horizontal Alps RK09L Double +0 +8 +6 +Potentiometer_THT +Potentiometer_Alps_RK09L_Double_Vertical +Potentiometer, vertical, Alps RK09L Double, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer vertical Alps RK09L Double +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK09L_Single_Horizontal +Potentiometer, horizontal, Alps RK09L Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer horizontal Alps RK09L Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Alps_RK09L_Single_Vertical +Potentiometer, vertical, Alps RK09L Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09L/RK09L_list.html +Potentiometer vertical Alps RK09L Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK09Y11_Single_Horizontal +Potentiometer, horizontal, Alps RK09Y11 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK09Y11/RK09Y11_list.html +Potentiometer horizontal Alps RK09Y11 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK097_Dual_Horizontal +Potentiometer, horizontal, Alps RK097 Dual, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK097/RK097_list.html +Potentiometer horizontal Alps RK097 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK097_Single_Horizontal +Potentiometer, horizontal, Alps RK097 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK097/RK097_list.html +Potentiometer horizontal Alps RK097 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Alps_RK163_Dual_Horizontal +Potentiometer, horizontal, Alps RK163 Dual, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK16/RK16_list.html +Potentiometer horizontal Alps RK163 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Alps_RK163_Single_Horizontal +Potentiometer, horizontal, Alps RK163 Single, http://www.alps.com/prod/info/E/HTML/Potentiometer/RotaryPotentiometers/RK16/RK16_list.html +Potentiometer horizontal Alps RK163 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3005_Horizontal +Potentiometer, horizontal, Bourns 3005, http://www.bourns.com/docs/Product-Datasheets/3005.pdf +Potentiometer horizontal Bourns 3005 +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006P_Horizontal +Potentiometer, horizontal, Bourns 3006P, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006W_Horizontal +Potentiometer, horizontal, Bourns 3006W, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3006Y_Horizontal +Potentiometer, horizontal, Bourns 3006Y, https://www.bourns.com/docs/Product-Datasheets/3006.pdf +Potentiometer horizontal Bourns 3006Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3009P_Horizontal +Potentiometer, horizontal, Bourns 3009P, http://www.bourns.com/docs/Product-Datasheets/3009.pdf +Potentiometer horizontal Bourns 3009P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3009Y_Horizontal +Potentiometer, horizontal, Bourns 3009Y, http://www.bourns.com/docs/Product-Datasheets/3009.pdf +Potentiometer horizontal Bourns 3009Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266P_Horizontal +Potentiometer, horizontal, Bourns 3266P, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266W_Vertical +Potentiometer, vertical, Bourns 3266W, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer vertical Bourns 3266W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266X_Horizontal +Potentiometer, horizontal, Bourns 3266X, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266Y_Vertical +Potentiometer, vertical, Bourns 3266Y, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer vertical Bourns 3266Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3266Z_Horizontal +Potentiometer, horizontal, Bourns 3266Z, https://www.bourns.com/docs/Product-Datasheets/3266.pdf +Potentiometer horizontal Bourns 3266Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296P_Horizontal +Potentiometer, horizontal, Bourns 3296P, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296W_Vertical +Potentiometer, vertical, Bourns 3296W, https://www.bourns.com/pdfs/3296.pdf +Potentiometer vertical Bourns 3296W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296X_Horizontal +Potentiometer, horizontal, Bourns 3296X, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296Y_Vertical +Potentiometer, vertical, Bourns 3296Y, https://www.bourns.com/pdfs/3296.pdf +Potentiometer vertical Bourns 3296Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3296Z_Horizontal +Potentiometer, horizontal, Bourns 3296Z, https://www.bourns.com/pdfs/3296.pdf +Potentiometer horizontal Bourns 3296Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299P_Horizontal +Potentiometer, horizontal, Bourns 3299P, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299W_Vertical +Potentiometer, vertical, Bourns 3299W, https://www.bourns.com/pdfs/3299.pdf +Potentiometer vertical Bourns 3299W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299X_Horizontal +Potentiometer, horizontal, Bourns 3299X, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299Y_Vertical +Potentiometer, vertical, Bourns 3299Y, https://www.bourns.com/pdfs/3299.pdf +Potentiometer vertical Bourns 3299Y +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3299Z_Horizontal +Potentiometer, horizontal, Bourns 3299Z, https://www.bourns.com/pdfs/3299.pdf +Potentiometer horizontal Bourns 3299Z +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339H_Vertical +Potentiometer, vertical, Bourns 3339H, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339H +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339P_Vertical +Potentiometer, vertical, Bourns 3339P, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339P_Vertical_HandSoldering +Potentiometer, vertical, Bourns 3339P, hand-soldering, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer vertical Bourns 3339P hand-soldering +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339S_Horizontal +Potentiometer, horizontal, Bourns 3339S, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer horizontal Bourns 3339S +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3339W_Horizontal +Potentiometer, horizontal, Bourns 3339W, http://www.bourns.com/docs/Product-Datasheets/3339.pdf +Potentiometer horizontal Bourns 3339W +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386C_Horizontal +Potentiometer, horizontal, Bourns 3386C, https://www.bourns.com/pdfs/3386.pdf +Potentiometer horizontal Bourns 3386C +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386F_Vertical +Potentiometer, vertical, Bourns 3386F, https://www.bourns.com/pdfs/3386.pdf +Potentiometer vertical Bourns 3386F +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386P_Vertical +Potentiometer, vertical, Bourns 3386P, https://www.bourns.com/pdfs/3386.pdf +Potentiometer vertical Bourns 3386P +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_3386X_Horizontal +Potentiometer, horizontal, Bourns 3386X, https://www.bourns.com/pdfs/3386.pdf +Potentiometer horizontal Bourns 3386X +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_PTA1543_Single_Slide +Bourns single-gang slide potentiometer, 15.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 15.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA2043_Single_Slide +Bourns single-gang slide potentiometer, 20.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 20.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA3043_Single_Slide +Bourns single-gang slide potentiometer, 30.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 30.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA4543_Single_Slide +Bourns single-gang slide potentiometer, 45.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 45.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTA6043_Single_Slide +Bourns single-gang slide potentiometer, 60.0mm travel, https://www.bourns.com/docs/Product-Datasheets/pta.pdf +Bourns single-gang slide potentiometer 60.0mm +0 +7 +4 +Potentiometer_THT +Potentiometer_Bourns_PTV09A-1_Single_Vertical +Potentiometer, vertical, Bourns PTV09A-1 Single, http://www.bourns.com/docs/Product-Datasheets/ptv09.pdf +Potentiometer vertical Bourns PTV09A-1 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Bourns_PTV09A-2_Single_Horizontal +Potentiometer, horizontal, Bourns PTV09A-2 Single, http://www.bourns.com/docs/Product-Datasheets/ptv09.pdf +Potentiometer horizontal Bourns PTV09A-2 Single +0 +5 +3 +Potentiometer_THT +Potentiometer_Omeg_PC16BU_Horizontal +Potentiometer, horizontal, Omeg PC16BU, http://www.omeg.co.uk/pc6bubrc.htm +Potentiometer horizontal Omeg PC16BU +0 +3 +3 +Potentiometer_THT +Potentiometer_Omeg_PC16BU_Vertical +Potentiometer, vertical, Omeg PC16BU, http://www.omeg.co.uk/pc6bubrc.htm +Potentiometer vertical Omeg PC16BU +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Dual_Horizontal +Potentiometer, horizontal, Piher PC-16 Dual, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Piher_PC-16_Single_Horizontal +Potentiometer, horizontal, Piher PC-16 Single, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Single_Vertical +Potentiometer, vertical, Piher PC-16 Single, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer vertical Piher PC-16 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PC-16_Triple_Horizontal +Potentiometer, horizontal, Piher PC-16 Triple, http://www.piher-nacesa.com/pdf/20-PC16v03.pdf +Potentiometer horizontal Piher PC-16 Triple +0 +9 +9 +Potentiometer_THT +Potentiometer_Piher_PT-6-H_Horizontal +Potentiometer, horizontal, Piher PT-6-H, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer horizontal Piher PT-6-H +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-6-V_Vertical +Potentiometer, vertical, Piher PT-6-V, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer vertical Piher PT-6-V +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-6-V_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-6-V, http://www.piher-nacesa.com/pdf/11-PT6v03.pdf +Potentiometer vertical hole Piher PT-6-V +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-H01_Horizontal +Potentiometer, horizontal, Piher PT-10-H01, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer horizontal Piher PT-10-H01 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-H05_Horizontal +Potentiometer, horizontal, Piher PT-10-H05, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer horizontal Piher PT-10-H05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V05_Vertical +Potentiometer, vertical, Piher PT-10-V05, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical Piher PT-10-V05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V10_Vertical +Potentiometer, vertical, Piher PT-10-V10, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical Piher PT-10-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-10-V10_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-10-V10, http://www.piher-nacesa.com/pdf/12-PT10v03.pdf +Potentiometer vertical hole Piher PT-10-V10 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H01_Horizontal +Potentiometer, horizontal, Piher PT-15-H01, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H01 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H05_Horizontal +Potentiometer, horizontal, Piher PT-15-H05, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H05 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H06_Horizontal +Potentiometer, horizontal, Piher PT-15-H06, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H06 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-H25_Horizontal +Potentiometer, horizontal, Piher PT-15-H25, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer horizontal Piher PT-15-H25 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V02_Vertical +Potentiometer, vertical, Piher PT-15-V02, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical Piher PT-15-V02 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V02_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-15-V02, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical hole Piher PT-15-V02 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V15_Vertical +Potentiometer, vertical, Piher PT-15-V15, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical Piher PT-15-V15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_PT-15-V15_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher PT-15-V15, http://www.piher-nacesa.com/pdf/14-PT15v03.pdf +Potentiometer vertical hole Piher PT-15-V15 +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_T-16H_Double_Horizontal +Potentiometer, horizontal, Piher T-16H Double, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer horizontal Piher T-16H Double +0 +6 +6 +Potentiometer_THT +Potentiometer_Piher_T-16H_Single_Horizontal +Potentiometer, horizontal, Piher T-16H Single, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer horizontal Piher T-16H Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Piher_T-16L_Single_Vertical_Hole +Potentiometer, vertical, shaft hole, Piher T-16L Single, http://www.piher-nacesa.com/pdf/22-T16v03.pdf +Potentiometer vertical hole Piher T-16L Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Runtron_RM-063_Horizontal +Potentiometer, horizontal, Trimmer, RM-063 http://www.runtron.com/down/PDF%20Datasheet/Carbon%20Film%20Potentiometer/RM065%20RM063.pdf +Potentiometer Trimmer RM-063 +0 +3 +3 +Potentiometer_THT +Potentiometer_Runtron_RM-065_Vertical +Potentiometer, vertical, Trimmer, RM-065 http://www.runtron.com/down/PDF%20Datasheet/Carbon%20Film%20Potentiometer/RM065%20RM063.pdf +Potentiometer Trimmer RM-065 +0 +3 +3 +Potentiometer_THT +Potentiometer_TT_P0915N +http://www.ttelectronics.com/sites/default/files/download-files/Datasheet_PanelPot_P09xSeries.pdf +potentiometer vertical TT P0915N single +0 +5 +3 +Potentiometer_THT +Potentiometer_Vishay_43_Horizontal +Potentiometer, horizontal, Vishay 43, http://www.vishay.com/docs/57026/43.pdf +Potentiometer horizontal Vishay 43 +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148-149_Dual_Horizontal +Potentiometer, horizontal, Vishay 148-149 Dual, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148-149 Dual +0 +6 +6 +Potentiometer_THT +Potentiometer_Vishay_148-149_Single_Horizontal +Potentiometer, horizontal, Vishay 148-149 Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148-149 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148-149_Single_Vertical +Potentiometer, vertical, Vishay 148-149 Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer vertical Vishay 148-149 Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_148E-149E_Dual_Horizontal +Potentiometer, horizontal, Vishay 148E-149E Dual, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148E-149E Dual +0 +10 +6 +Potentiometer_THT +Potentiometer_Vishay_148E-149E_Single_Horizontal +Potentiometer, horizontal, Vishay 148E-149E Single, http://www.vishay.com/docs/57040/148149.pdf +Potentiometer horizontal Vishay 148E-149E Single +0 +7 +3 +Potentiometer_THT +Potentiometer_Vishay_248BH-249BH_Single_Horizontal +Potentiometer, horizontal, Vishay 248BH-249BH Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer horizontal Vishay 248BH-249BH Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_248GJ-249GJ_Single_Horizontal +Potentiometer, horizontal, Vishay 248GJ-249GJ Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer horizontal Vishay 248GJ-249GJ Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_248GJ-249GJ_Single_Vertical +Potentiometer, vertical, Vishay 248GJ-249GJ Single, http://www.vishay.com/docs/57054/248249.pdf +Potentiometer vertical Vishay 248GJ-249GJ Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T7-YA_Single_Vertical +Potentiometer, vertical, Vishay T7-YA Single, http://www.vishay.com/docs/51015/t7.pdf +Potentiometer vertical Vishay T7-YA Single +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73XW_Horizontal +Potentiometer, horizontal, Vishay T73XW, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer horizontal Vishay T73XW +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73XX_Horizontal +Potentiometer, horizontal, Vishay T73XX, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer horizontal Vishay T73XX +0 +3 +3 +Potentiometer_THT +Potentiometer_Vishay_T73YP_Vertical +Potentiometer, vertical, Vishay T73YP, http://www.vishay.com/docs/51016/t73.pdf +Potentiometer vertical Vishay T73YP +0 +3 +3 +RF +Skyworks_SKY13575_639LF +http://www.skyworksinc.com/uploads/documents/SKY13575_639LF_203270D.pdf +Skyworks +0 +19 +15 +RF +Skyworks_SKY65404-31 +http://www.skyworksinc.com/uploads/documents/SKY65404_31_201512K.pdf +Skyworks +0 +7 +7 +RF_Antenna +Abracon_APAES868R8060C16-T +Abracon RHCP ceramic patch antenna 854-882Mhz, 5dBi +APAES patch antenna +0 +1 +1 +RF_Antenna +Coilcraft_MA5532-AE_RFID +RFID Transponder Coil +antenna rfid coilcraft +0 +2 +2 +RF_Antenna +Johanson_2450AT18x100 +Johanson 2450AT43F0100 SMD antenna 2400-2500Mhz, -0.5dBi, https://www.johansontechnology.com/datasheets/2450AT18A100/2450AT18A100.pdf +antenna +0 +2 +2 +RF_Antenna +Johanson_2450AT43F0100 +Johanson 2450AT43F0100 SMD antenna 2400-2500Mhz, 1dBi, https://www.johansontechnology.com/datasheets/2450AT43F0100/2450AT43F0100.pdf +antenna +0 +2 +2 +RF_Antenna +Pulse_W3011 +Pulse RF Antenna, 4mm Clearance +antenna rf +0 +3 +2 +RF_Antenna +Texas_SWRA117D_2.4GHz_Left +http://www.ti.com/lit/an/swra117d/swra117d.pdf +PCB antenna +0 +2 +2 +RF_Antenna +Texas_SWRA117D_2.4GHz_Right +http://www.ti.com/lit/an/swra117d/swra117d.pdf +PCB antenna +0 +2 +2 +RF_Antenna +Texas_SWRA416_868MHz_915MHz +http://www.ti.com/lit/an/swra416/swra416.pdf +PCB antenna +0 +20 +1 +RF_Converter +Anaren_0805_2012Metric-6 +https://cdn.anaren.com/product-documents/Xinger/DirectionalCouplers/DC4759J5020AHF/DC4759J5020AHF_DataSheet(Rev_E).pdf +coupler rf +0 +6 +6 +RF_Converter +Balun_Johanson_1.6x0.8mm +6-pin 1.6x0.8 mm balun footprint +Johanson balun filter +0 +6 +6 +RF_Converter +Balun_Johanson_5400BL15B050E +https://www.johansontechnology.com/datasheets/5400BL15B050/5400BL15B050.pdf +balun RF +0 +6 +6 +RF_Converter +RF_Attenuator_Susumu_PAT1220 +http://www.susumu-usa.com/pdf/Foot_Print_38.pdf, https://www.susumu.co.jp/common/pdf/n_catalog_partition16_en.pdf +2mm 1.2mm +0 +3 +3 +RF_GPS +Linx_RXM-GPS +GPS Module, Linx +gps linx +0 +22 +22 +RF_GPS +SIM28ML +https://simcom.ee/documents/SIM28ML/SIM28ML_Hardware%20Design_V1.01.pdf +SIM28ML GPS +0 +18 +18 +RF_GPS +Sierra_XA11X0 +QFN-24, Pitch 1.20 no EP, https://source.sierrawireless.com/resources/airprime/hardware_specs_user_guides/airprime_xm1100_product_technical_specification +QFN-24 P1.20 +0 +24 +24 +RF_GPS +Sierra_XM11X0 +QFN-20, Pitch 1.20 no EP, https://source.sierrawireless.com/resources/airprime/hardware_specs_user_guides/airprime_xm1100_product_technical_specification +QFN-20 P1.20 +0 +20 +20 +RF_GPS +ublox_LEA +ublox LEA 6/7/8, (https://www.u-blox.com/sites/default/files/LEA-M8S-M8T-FW3_HardwareIntegrationManual_%28UBX-15030060%29.pdf) +GPS ublox LEA 6/7/8 +0 +28 +28 +RF_GPS +ublox_MAX +ublox MAX 6/7/8, (https://www.u-blox.com/sites/default/files/MAX-8-M8-FW3_HardwareIntegrationManual_%28UBX-15030059%29.pdf) +GPS ublox MAX 6/7/8 +0 +18 +18 +RF_GPS +ublox_NEO +ublox NEO 6/7/8, (https://www.u-blox.com/sites/default/files/NEO-8Q-NEO-M8-FW3_HardwareIntegrationManual_%28UBX-15029985%29_0.pdf) +GPS ublox NEO 6/7/8 +0 +24 +24 +RF_GPS +ublox_SAM-M8Q +GPS Module, 15.5x15.5x6.3mm, https://www.u-blox.com/sites/default/files/SAM-M8Q_HardwareIntegrationManual_%28UBX-16018358%29.pdf +ublox SAM-M8Q +0 +100 +20 +RF_GPS +ublox_SAM-M8Q_HandSolder +GPS Module, 15.5x15.5x6.3mm, https://www.u-blox.com/sites/default/files/SAM-M8Q_HardwareIntegrationManual_%28UBX-16018358%29.pdf +ublox SAM-M8Q +0 +20 +20 +RF_GPS +ublox_ZED +ublox ZED-F9, https://www.u-blox.com/sites/default/files/ZED-F9P_DataSheet_%28UBX-17051259%29.pdf +GPS GNSS ublox ZED +0 +102 +55 +RF_GSM +Quectel_BC66 +GSM NB-IoT module, 15.8x17.7x2mm, https://www.quectel.com/UploadImage/Downlad/Quectel_BC66_Hardware_Design_V1.1.pdf +GSM NB-IoT Module BC66 M66 +0 +116 +58 +RF_GSM +SIMCom_SIM800C +Quad-Band GSM/GPRS module, 17.6x15.7x2.3mm, http://simcom.ee/documents/SIM800C/SIM800C_Hardware_Design_V1.05.pdf +GSM Module SIM800C +0 +84 +42 +RF_GSM +SIMCom_SIM900 +Quad-Band GSM/GPRS module, 24x24x3mm, http://simcom.ee/documents/SIM900/SIM900_Hardware%20Design_V2.05.pdf +GSM Module SIM900 +0 +68 +68 +RF_GSM +Telit_xL865 +Telit xL865 familly footprint, http://www.telit.com/fileadmin/user_upload/products/Downloads/3G/Telit_UL865_Hardware_User_Guide_r8.pdf +xL865 gsm umts +0 +52 +48 +RF_GSM +ublox_SARA-G3_LGA-96 +ublox Sara GSM/HSPA modem, https://www.u-blox.com/sites/default/files/SARA-G3-U2_SysIntegrManual_%28UBX-13000995%29.pdf, pag.162 +ublox SARA-G3 SARA-U2 GSM HSPA +0 +192 +96 +RF_Mini-Circuits +Mini-Circuits_BK377 +Footprint for Mini-Circuits case BK377 (https://ww2.minicircuits.com/case_style/BK276.pdf) +Mini-circuits BK377 +0 +14 +14 +RF_Mini-Circuits +Mini-Circuits_BK377_LandPatternPL-005 +Footprint for Mini-Circuits case BK377 (https://ww2.minicircuits.com/case_style/BK276.pdf) according to land-pattern PL-005, including GND vias (https://ww2.minicircuits.com/pcb/98-pl005.pdf) +Mini-circuits VCXO JTOS PL-005 +0 +50 +14 +RF_Mini-Circuits +Mini-Circuits_CD541_H2.08mm +https://ww2.minicircuits.com/case_style/CD541.pdf +RF Transformer +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_CD542_H2.84mm +https://ww2.minicircuits.com/case_style/CD542.pdf +RF Transformer +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_CD542_LandPatternPL-052 +Footprint for Mini-Circuits case CD542 (https://ww2.minicircuits.com/case_style/CD542.pdf) using land-pattern PL-052, including GND-vias (https://ww2.minicircuits.com/pcb/98-pl052.pdf) +MiniCircuits PL-052 CD542 +0 +17 +6 +RF_Mini-Circuits +Mini-Circuits_CD542_LandPatternPL-094 +Footprint for mini circuit case CD542, Land pattern PL-094, pads 5 and 2 connected via insulated copper area below body, vias included (case drawing: https://ww2.minicircuits.com/case_style/CD542.pdf, land pattern drawing: https://ww2.minicircuits.com/pcb/98-pl094.pdf) +mini-circuits CD542 pl-094 +0 +18 +6 +RF_Mini-Circuits +Mini-Circuits_CD636_H4.11mm +https://ww2.minicircuits.com/case_style/CD636.pdf +RF Transformer +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_CD636_LandPatternPL-035 +Footprint for Mini-Circuits case CD636 (https://ww2.minicircuits.com/case_style/CD636.pdf) following land pattern PL-035, including GND-vias (https://ww2.minicircuits.com/pcb/98-pl035.pdf) +mini-circuits pl-035 CD636 +0 +13 +6 +RF_Mini-Circuits +Mini-Circuits_CD637_H5.23mm +https://ww2.minicircuits.com/case_style/CD637.pdf +RF Transformer +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_CK605 +Footprint for Mini-Circuits case CK605 (https://ww2.minicircuits.com/case_style/CK605.pdf) +Mini-Circuits CK605 +0 +16 +16 +RF_Mini-Circuits +Mini-Circuits_CK605_LandPatternPL-012 +Footprint for Mini-Circuits case CK605 (https://ww2.minicircuits.com/case_style/CK605.pdf) following land pattern PL-012, including GND vias (https://ww2.minicircuits.com/pcb/98-pl012.pdf) +Mini-Circuits PL-012 +0 +53 +16 +RF_Mini-Circuits +Mini-Circuits_DB1627 +Mini-Circuits top-hat case DB1627 (https://ww2.minicircuits.com/case_style/DB1627.pdf) +Mini-Circuits DB1627 +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_GP731 +Footprint for Mini-Circuits case GP731 (https://ww2.minicircuits.com/case_style/GP731.pdf) +Mini-Circuits GP731 +0 +8 +8 +RF_Mini-Circuits +Mini-Circuits_GP731_LandPatternPL-176 +Footprint for Mini-Circuits case GP731 (https://ww2.minicircuits.com/case_style/GP731.pdf) following land pattern PL-176, including GND vias (https://www.minicircuits.com/pcb/98-pl176.pdf) +mini-circuits PL-176 +0 +21 +8 +RF_Mini-Circuits +Mini-Circuits_GP1212 +Footprint for Mini-Circuits case GP1212 (https://ww2.minicircuits.com/case_style/GP731.pdf) +mini-circuits GP1212 +0 +8 +8 +RF_Mini-Circuits +Mini-Circuits_GP1212_LandPatternPL-176 +Footprint for Mini-Circuits case GP1212 (https://ww2.minicircuits.com/case_style/GP731.pdf) following land pattern PL-176, including GND vias (https://www.minicircuits.com/pcb/98-pl176.pdf) +mini-circuits PL-176 +0 +21 +8 +RF_Mini-Circuits +Mini-Circuits_HF1139 +Footprint for Mini-Circuits case HF1139 (https://ww2.minicircuits.com/case_style/HF1139.pdf) +Mini-Circuits HF1139 +0 +8 +8 +RF_Mini-Circuits +Mini-Circuits_HF1139_LandPatternPL-230 +Footprint for Mini-Circuits case HF1139 (https://ww2.minicircuits.com/case_style/HF1139.pdf) following land pattern PL-230, including GND vias (https://ww2.minicircuits.com/pcb/98-pl230.pdf) +Mini-Circuits PL-230 +0 +37 +8 +RF_Mini-Circuits +Mini-Circuits_HQ1157 +Footprint for Mini-Circuits case HQ1157 (https://www.minicircuits.com/case_style/HQ1157.pdf) +Mini-Circuits HQ1157 +0 +14 +14 +RF_Mini-Circuits +Mini-Circuits_HZ1198 +Footprint for Mini-Circuits case HZ1198 (https://ww2.minicircuits.com/case_style/HZ1198.pdf) +Mini-Circuits HZ1198 +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_HZ1198_LandPatternPL-247 +Footprint for Mini-Circuits cas HZ1198 (https://ww2.minicircuits.com/case_style/HZ1198.pdf) following land pattern PL-247, including GND-vias (https://www.minicircuits.com/pcb/98-pl247.pdf) +Mini-Circuits PL-247 HZ1198 +0 +40 +6 +RF_Mini-Circuits +Mini-Circuits_MMM168 +Footprint for Mini-Circuits case MMM168 (https://ww2.minicircuits.com/case_style/MMM168.pdf) +Mini-Circuits MMM168 +0 +4 +4 +RF_Mini-Circuits +Mini-Circuits_MMM168_LandPatternPL-225 +Footprint for Mini-Circuits case MMM168, Land pattern PL-225, vias included, (case drawing: https://ww2.minicircuits.com/case_style/MMM168.pdf, land pattern drawing: https://ww2.minicircuits.com/pcb/98-pl225.pdf) +pl-225 +0 +10 +4 +RF_Mini-Circuits +Mini-Circuits_QQQ130_ClockwisePinNumbering +Footprint for Mini-Circuits case QQQ130 (https://ww2.minicircuits.com/case_style/QQQ130.pdf) +Mini-Circuits QQQ130 +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_QQQ130_LandPattern_PL-236_ClockwisePinNumbering +Footprint for Mini-Circuits case QQQ130 (https://ww2.minicircuits.com/case_style/QQQ130.pdf) following land pattern PL-236, including GND vias (https://ww2.minicircuits.com/pcb/98-pl236.pdf) +Mini-Circuits PL-236 +0 +14 +6 +RF_Mini-Circuits +Mini-Circuits_TT1224_ClockwisePinNumbering +Footprint for Mini-Circuits case TT1224 (https://ww2.minicircuits.com/case_style/TT1224.pdf) following land-pattern PL-258, including GND-vias (https://www.minicircuits.com/pcb/98-pl258.pdf) +Mini-Circuits TT1224 +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_TT1224_LandPatternPL-258_ClockwisePinNumbering +Footprint for Mini-Circuits case TT1224 (https://ww2.minicircuits.com/case_style/TT1224.pdf) following land-pattern PL-258, including GND-vias (https://www.minicircuits.com/pcb/98-pl258.pdf) +PL-258 Mini-Circuits +0 +26 +6 +RF_Mini-Circuits +Mini-Circuits_TTT167 +Footprint for Mini-Circuits case TTT167 (https://ww2.minicircuits.com/case_style/TTT167.pdf) +Mini-Circuits TTT167 +0 +6 +6 +RF_Mini-Circuits +Mini-Circuits_TTT167_LandPatternPL-079 +Footprint for Mini-Circuits case TTT167 (Mini-Circuits_TTT167_LandPatternPL-079) following land pattern PL-079, including GND vias (https://ww2.minicircuits.com/pcb/98-pl079.pdf) +Mini-Circuits PL-079 +0 +36 +6 +RF_Mini-Circuits +Mini-Circuits_YY161 +Footprint for Mini-Circuits case YY161 (https://ww2.minicircuits.com/case_style/YY161.pdf) +Mini-Circuits YY161 +0 +8 +8 +RF_Mini-Circuits +Mini-Circuits_YY161_LandPatternPL-049 +Footprint for Mini-Circuits case YY161 (https://ww2.minicircuits.com/case_style/YY161.pdf) using land-pattern PL-049, including GND-connections and vias (https://ww2.minicircuits.com/pcb/98-pl049.pdf) +mini-circuits pl-049 +0 +36 +8 +RF_Module +Ai-Thinker-Ra-01-LoRa +Ai Thinker Ra-01 LoRa +LoRa Ra-01 +0 +16 +16 +RF_Module +Atmel_ATSAMR21G18-MR210UA_NoRFPads +http://ww1.microchip.com/downloads/en/devicedoc/atmel-42475-atsamr21g18-mr210ua_datasheet.pdf +module wireless zigbee 802.15.4 flash crypto ATSAMR21G18 AT45DB041E TECC508A U.Fi +0 +42 +42 +RF_Module +BLE112-A +Class 4 Bluetooth Module with on-board antenna +Bluetooth Module +0 +30 +30 +RF_Module +CMWX1ZZABZ +https://wireless.murata.com/RFM/data/type_abz.pdf +iot lora sigfox +0 +57 +57 +RF_Module +CYBLE-21Pin-10x10mm +Cypress EZ-BLE PRoC Module (Bluetooth Smart) 21 Pin Module +Cypress BT Bluetooth +0 +21 +21 +RF_Module +DWM1000 +IEEE802.15.4-2011 UWB +UWB Module +0 +24 +24 +RF_Module +DecaWave_DWM1001 +https://www.decawave.com/sites/default/files/dwm1001_datasheet.pdf +UWB module +0 +34 +34 +RF_Module +Digi_XBee_SMT +http://www.digi.com/resources/documentation/digidocs/pdfs/90002126.pdf http://ftp1.digi.com/support/documentation/90001020_F.pdf +Digi XBee SMT RF +0 +37 +37 +RF_Module +E18-MS1-PCB +http://www.cdebyte.com/en/downpdf.aspx?id=122 +Zigbee +0 +24 +24 +RF_Module +E73-2G4M04S +http://www.cdebyte.com/en/downpdf.aspx?id=243 +BLE BLE5 nRF52832 +0 +44 +44 +RF_Module +ESP-07 +Wi-Fi Module, http://wiki.ai-thinker.com/_media/esp8266/docs/a007ps01a2_esp-07_product_specification_v1.2.pdf +Wi-Fi Module +0 +16 +16 +RF_Module +ESP-12E +Wi-Fi Module, http://wiki.ai-thinker.com/_media/esp8266/docs/aithinker_esp_12f_datasheet_en.pdf +Wi-Fi Module +0 +22 +22 +RF_Module +ESP-WROOM-02 +http://espressif.com/sites/default/files/documentation/0c-esp-wroom-02_datasheet_en.pdf +ESP WROOM-02 espressif esp8266ex +0 +19 +19 +RF_Module +ESP32-S2-WROVER +ESP32-S2-WROVER(-I) 2.4 GHz Wi-Fi https://www.espressif.com/sites/default/files/documentation/esp32-s2-wroom_esp32-s2-wroom-i_datasheet_en.pdf +ESP32-S2 ESP32 WIFI +0 +43 +43 +RF_Module +ESP32-WROOM-32 +Single 2.4 GHz Wi-Fi and Bluetooth combo chip https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32_datasheet_en.pdf +Single 2.4 GHz Wi-Fi and Bluetooth combo chip +0 +39 +39 +RF_Module +ESP32-WROOM-32U +Single 2.4 GHz Wi-Fi and Bluetooth combo chip with U.FL connector, https://www.espressif.com/sites/default/files/documentation/esp32-wroom-32d_esp32-wroom-32u_datasheet_en.pdf +Single 2.4 GHz Wi-Fi and Bluetooth combo chip +0 +39 +39 +RF_Module +Garmin_M8-35_9.8x14.0mm_Layout6x6_P1.5mm +D52M ANT SoC Module https://www.thisisant.com/assets/resources/D00001687_D52_Module_Datasheet.v.2.3_(Garmin).pdf +RF SoC Radio ANT Bluetooth BLE D52 nRF52 Garmin Canada Dynastream Nordic +0 +35 +35 +RF_Module +HOPERF_RFM9XW_SMD +Low Power Long Range Transceiver Module SMD-16 (https://www.hoperf.com/data/upload/portal/20181127/5bfcbea20e9ef.pdf) +LoRa Low Power Long Range Transceiver Module +0 +16 +16 +RF_Module +HOPERF_RFM9XW_THT +Low Power Long Range Transceiver Module THT-16 (https://www.hoperf.com/data/upload/portal/20181127/5bfcbea20e9ef.pdf) +Low Power Long Range Transceiver Module LoRa +0 +16 +16 +RF_Module +HOPERF_RFM69HW +Radio, RF, Module, http://www.hoperf.com/upload/rf/RFM69HW-V1.3.pdf +Radio RF Module +0 +16 +16 +RF_Module +IQRF_TRx2DA_KON-SIM-01 +8 pin SIM connector for IQRF TR-x2DA(T) modules, http://iqrf.org/weben/downloads.php?id=104 +IQRF_KON-SIM-01 IQRF_TRx2DA +0 +10 +8 +RF_Module +IQRF_TRx2D_KON-SIM-01 +8 pin SIM connector for IQRF TR-x2D(C)(T) modules, http://iqrf.org/weben/downloads.php?id=104 +IQRF_KON-SIM-01 IQRF_TRx2D IQRF_TRx2DC +0 +10 +8 +RF_Module +Laird_BL652 +Bluetooth v4.2 + NFC module +Bluetooth BLE NFC +0 +39 +39 +RF_Module +MOD-nRF8001 +BLE module, https://www.olimex.com/Products/Modules/RF/MOD-nRF8001/ +BLE module +0 +11 +11 +RF_Module +Microchip_RN4871 +Microchip RN4871 footprint +RN4871 BLE +0 +16 +16 +RF_Module +Modtronix_inAir9 +Modtronix Wireless SX1276 LoRa Module (http://modtronix.com/img/prod/imod/inair9/inair_dimensions.gif) +Modtronix LoRa inAir inAir9 SX1276 RF 915MHz 868MHz Wireless +0 +14 +14 +RF_Module +MonoWireless_TWE-L-WX +https://www.mono-wireless.com/jp/products/TWE-LITE/MW-PDS-TWELITE-JP.pdf +TWE-L-WX +0 +32 +32 +RF_Module +Particle_P1 +https://docs.particle.io/datasheets/p1-datasheet/ +Particle P1 +0 +75 +75 +RF_Module +RFDigital_RFD77101 +RFDigital RFD77101 Simblee +RFDigital RFD77101 Simblee +0 +48 +45 +RF_Module +RN42 +Class 2 Bluetooth Module with on-board antenna +Bluetooth Module +0 +36 +33 +RF_Module +RN42N +Class 2 Bluetooth Module without antenna +Bluetooth Module +0 +39 +36 +RF_Module +RN2483 +Low-Power Long Range LoRa Transceiver Module +rf module lora lorawan +0 +47 +47 +RF_Module +ST_SPBTLE +Bluetooth Low Energy Module +ble module st bluetooth +0 +11 +11 +RF_Module +TD1205 +https://github.com/Telecom-Design/Documentation_TD_RF_Module/blob/master/TD1205%20Datasheet.pdf +SIGFOX Module +0 +9 +9 +RF_Module +TD1208 +https://github.com/Telecom-Design/Documentation_TD_RF_Module/blob/master/TD1208%20Datasheet.pdf +SIGFOX Module +0 +25 +25 +RF_Module +Taiyo-Yuden_EYSGJNZWY +Taiyo Yuden NRF51822 Module Bluetooth https://www.yuden.co.jp/wireless_module/document/datareport2/en/TY_BLE_EYSGJNZ_DataReport_V1_9_20180530E.pdf +Taiyo Yuden NRF51822 Module Bluetooth +0 +30 +28 +RF_Module +ZETA-433-SO_SMD +RF transceiver SMD style https://www.rfsolutions.co.uk/downloads/1456219226DS-ZETA.pdf +RF transceiver SMD style +0 +12 +12 +RF_Module +ZETA-433-SO_THT +RF transceiver THT style https://www.rfsolutions.co.uk/downloads/1456219226DS-ZETA.pdf +RF transceiver SMD style +0 +12 +12 +RF_Module +nRF24L01_Breakout +nRF24L01 breakout board +nRF24L01 adapter breakout +0 +8 +8 +RF_Shielding +Laird_Technologies_97-2002_25.40x25.40mm +Laird Technologies 97-2002 EZ PEEL Shielding Cabinet One Piece SMD 25.40x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +8 +1 +RF_Shielding +Laird_Technologies_97-2003_12.70x13.37mm +Laird Technologies 97-2003 EZ PEEL Shielding Cabinet One Piece SMD 12.70x13.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +8 +1 +RF_Shielding +Laird_Technologies_BMI-S-101_13.66x12.70mm +Laird Technologies BMI-S-101 Shielding Cabinet One Piece SMD 13.66x12.70mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-102_16.50x16.50mm +Laird Technologies BMI-S-102 Shielding Cabinet One Piece SMD 16.50x16.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-103_26.21x26.21mm +Laird Technologies BMI-S-103 Shielding Cabinet One Piece SMD 26.21x26.21mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +24 +1 +RF_Shielding +Laird_Technologies_BMI-S-104_32.00x32.00mm +Laird Technologies BMI-S-104 Shielding Cabinet One Piece SMD 32.00x32.00mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-105_38.10x25.40mm +Laird Technologies BMI-S-105 Shielding Cabinet One Piece SMD 38.10x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-106_36.83x33.68mm +Laird Technologies BMI-S-106 Shielding Cabinet One Piece SMD 36.83x33.68mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-107_44.37x44.37mm +Laird Technologies BMI-S-107 Shielding Cabinet One Piece SMD 44.37x44.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +36 +1 +RF_Shielding +Laird_Technologies_BMI-S-201-F_13.66x12.70mm +Laird Technologies BMI-S-201-F Shielding Cabinet Two Piece SMD 13.66x12.70mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-202-F_16.50x16.50mm +Laird Technologies BMI-S-202-F Shielding Cabinet Two Piece SMD 16.50x16.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +16 +1 +RF_Shielding +Laird_Technologies_BMI-S-203-F_26.21x26.21mm +Laird Technologies BMI-S-203-F Shielding Cabinet Two Piece SMD 26.21x26.21mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +24 +1 +RF_Shielding +Laird_Technologies_BMI-S-204-F_32.00x32.00mm +Laird Technologies BMI-S-204-F Shielding Cabinet Two Piece SMD 32.00x32.00mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-205-F_38.10x25.40mm +Laird Technologies BMI-S-205-F Shielding Cabinet Two Piece SMD 38.10x25.40mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-206-F_36.83x33.68mm +Laird Technologies BMI-S-206-F Shielding Cabinet Two Piece SMD 36.83x33.68mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +28 +1 +RF_Shielding +Laird_Technologies_BMI-S-207-F_44.37x44.37mm +Laird Technologies BMI-S-207-F Shielding Cabinet Two Piece SMD 44.37x44.37mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +36 +1 +RF_Shielding +Laird_Technologies_BMI-S-208-F_39.60x39.60mm +Laird Technologies BMI-S-208-F Shielding Cabinet Two Piece SMD 39.60x39.60mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +32 +1 +RF_Shielding +Laird_Technologies_BMI-S-209-F_29.36x18.50mm +Laird Technologies BMI-S-209-F Shielding Cabinet Two Piece SMD 29.36x18.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +20 +1 +RF_Shielding +Laird_Technologies_BMI-S-210-F_44.00x30.50mm +Laird Technologies BMI-S-210-F Shielding Cabinet Two Piece SMD 44.00x30.50mm (https://assets.lairdtech.com/home/brandworld/files/Board%20Level%20Shields%20Catalog%20Download.pdf) +Shielding Cabinet +0 +32 +1 +RF_Shielding +Laird_Technologies_BMI-S-230-F_50.8x38.1mm +Laird Technologies BMI-S-230-F Shielding Cabinet Two Piece SMD 50.8x38.1mm +Shielding Cabinet +0 +36 +1 +RF_Shielding +Wuerth_36103205_20x20mm +WE-SHC Shielding Cabinet SMD 20x20mm +Shielding Cabinet +0 +20 +1 +RF_Shielding +Wuerth_36103255_25x25mm +WE-SHC Shielding Cabinet SMD 25x25mm +Shielding Cabinet +0 +24 +1 +RF_Shielding +Wuerth_36103305_30x30mm +WE-SHC Shielding Cabinet SMD 30x30mm +Shielding Cabinet +0 +28 +1 +RF_Shielding +Wuerth_36103505_50x50mm +WE-SHC Shielding Cabinet SMD 50x50mm +Shielding Cabinet +0 +44 +1 +RF_Shielding +Wuerth_36103605_60x60mm +WE-SHC Shielding Cabinet SMD 60x60mm +Shielding Cabinet +0 +52 +1 +RF_Shielding +Wuerth_36503205_20x20mm +WE-SHC Shielding Cabinet THT 21x21mm +Shielding Cabinet +0 +16 +1 +RF_Shielding +Wuerth_36503255_25x25mm +WE-SHC Shielding Cabinet THT 26x26mm +Shielding Cabinet +0 +20 +1 +RF_Shielding +Wuerth_36503305_30x30mm +WE-SHC Shielding Cabinet THT 31x31mm +Shielding Cabinet +0 +24 +1 +RF_Shielding +Wuerth_36503505_50x50mm +WE-SHC Shielding Cabinet THT 51x51mm +Shielding Cabinet +0 +40 +1 +RF_Shielding +Wuerth_36503605_60x60mm +WE-SHC Shielding Cabinet THT 61x61mm +Shielding Cabinet +0 +48 +1 +RF_WiFi +USR-C322 +https://www.usriot.com/download/WIFI/USR-C322-Hardware-Manual_V1.2.01.pdf +WiFi IEEE802.11 b/g/n +0 +44 +44 +Relay_SMD +Relay_DPDT_AXICOM_IMSeries_JLeg +http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Specification+Or+Standard%7F108-98001%7FW5%7Fpdf%7FEnglish%7FENG_SS_108-98001_W5.pdf +AXICOM IM-Series Relay J JLeg +0 +8 +8 +Relay_SMD +Relay_DPDT_FRT5_SMD +IM Signal Relay DPDT FRT5 narrow footprint, SMD version of package +Relay DPDT IM-relay FRT5 +0 +10 +10 +Relay_SMD +Relay_DPDT_Kemet_EE2_NU +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double coil latching surface mount SMD +0 +8 +8 +Relay_SMD +Relay_DPDT_Kemet_EE2_NUH +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double coil latching surface mount SMD +0 +8 +8 +Relay_SMD +Relay_DPDT_Kemet_EE2_NUH_DoubleCoil +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double dual coil latching surface mount SMD +0 +10 +10 +Relay_SMD +Relay_DPDT_Kemet_EE2_NUX_DoubleCoil +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double dual coil latching surface mount SMD +0 +10 +10 +Relay_SMD +Relay_DPDT_Kemet_EE2_NUX_NKX +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double coil latching surface mount SMD +0 +8 +8 +Relay_SMD +Relay_DPDT_Kemet_EE2_NU_DoubleCoil +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double dual coil latching surface mount SMD +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6H-2F +package for Omron G6H-2F relais, see http://cdn-reichelt.de/documents/datenblatt/C300/G6H%23OMR.pdf +Omron G6H-2F relais +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6K-2F +Omron G6K-2F relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2F relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2F-Y +Omron G6K-2F-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2F-Y relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2G +Omron G6K-2G relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2G relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6K-2G-Y +Omron G6K-2G-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2G-Y relay +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6S-2F +Relay Omron G6S-2F, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2F +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6S-2G +Relay Omron G6S-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2G +0 +8 +8 +Relay_SMD +Relay_DPDT_Omron_G6SK-2F +Relay Omron G6SK-2F, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2F +0 +10 +10 +Relay_SMD +Relay_DPDT_Omron_G6SK-2G +Relay Omron G6SK-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2G +0 +10 +10 +Relay_SMD +Relay_Fujitsu_FTR-B3S +https://www.fujitsu.com/downloads/MICRO/fcai/relays/ftr-b3.pdf +Fujitsh FTR B3S B3SA Relay J JLeg +0 +8 +8 +Relay_SMD +Relay_SPDT_AXICOM_HF3Series_50ohms_Pitch1.27mm +hiqsdr.com/images/3/3e/Axicom-HF3.pdf +AXICOM HF3-Series Relay Pitch 1.27mm 50ohms +0 +16 +16 +Relay_SMD +Relay_SPDT_AXICOM_HF3Series_75ohms_Pitch1.27mm +hiqsdr.com/images/3/3e/Axicom-HF3.pdf +AXICOM HF3-Series Relay Pitch 1.27mm 75ohm +0 +16 +16 +Relay_THT +Relay_1-Form-A_Schrack-RYII_RM5mm +Relay, 1-Form-A, Schrack-RYII, RM5mm, SPST-NO +Relay 1-Form-A Schrack-RYII RM5mm SPST-NO +0 +4 +4 +Relay_THT +Relay_1-Form-B_Schrack-RYII_RM5mm +Relay, 1-Form-B, Schrack-RYII, RM5mm, SPST-NC +Relay 1-Form-B Schrack-RYII RM5mm SPST-NC +0 +4 +4 +Relay_THT +Relay_1-Form-C_Schrack-RYII_RM3.2mm +Relay, 1-Form-C, Schrack-RYII, RM3.2mm, SPDT +Relay 1-Form-C Schrack-RYII RM3.2mm SPDT +0 +5 +5 +Relay_THT +Relay_1P1T_NO_10x24x18.8mm_Panasonic_ADW11xxxxW_THT +Panasonic Relay SPST 10mm 24mm, https://www.panasonic-electric-works.com/pew/es/downloads/ds_dw_hl_en.pdf +Panasonic Relay SPST +0 +4 +4 +Relay_THT +Relay_DPDT_AXICOM_IMSeries_Pitch3.2mm +AXICOM IM-Series Relays, DPDR, Pitch 3.2mm, http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Specification+Or+Standard%7F108-98001%7FV%7Fpdf%7FEnglish%7FENG_SS_108-98001_V_IM_0614_v1.pdf%7F4-1462039-1 +AXICOM IM-Series Relay DPDR Pitch 3.2mm +0 +8 +8 +Relay_THT +Relay_DPDT_AXICOM_IMSeries_Pitch5.08mm +AXICOM IM-Series Relays, DPDR, Pitch 5.08 +AXICOM IM-Series Relay DPDR Pitch 5.08 +0 +8 +8 +Relay_THT +Relay_DPDT_FRT5 +IM Signal Relay DPDT FRT5 narrow footprint +Relay DPDT IM-relay FRT5 +0 +10 +10 +Relay_THT +Relay_DPDT_Finder_30.22 +Finder 32.21-x000 Relay, DPDT, https://gfinder.findernet.com/public/attachments/30/EN/S30EN.pdf +AXICOM IM-Series Relay SPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Finder_40.52 +Relay DPDT Finder 40.52, Pitch 5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.52 Pitch 5mm +0 +8 +8 +Relay_THT +Relay_DPDT_Fujitsu_FTR-F1C +https://www.fujitsu.com/downloads/MICRO/fcai/relays/ftr-f1.pdf +relay dpdt fujitsu tht +0 +8 +8 +Relay_THT +Relay_DPDT_Kemet_EC2 +Kemet signal relay, DPDT, non-latching, single coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT non single coil latching through hole THT +0 +8 +8 +Relay_THT +Relay_DPDT_Kemet_EC2_DoubleCoil +Kemet signal relay, DPDT, double coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf +Kemet EC2 signal relay DPDT double dual coil latching through hole THT +0 +10 +10 +Relay_THT +Relay_DPDT_Omron_G2RL +Omron Relay DPDT, https://omronfs.omron.com/en_US/ecb/products/pdf/en-g2rl.pdf +Omron Relay DPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G5V-2 +http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5v2.pdf +Omron G5V-2 Relay DPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6H-2 +Omron relay G6H-2, see http://cdn-reichelt.de/documents/datenblatt/C300/G6H%23OMR.pdf +Omron relay G6H-2 +0 +10 +10 +Relay_THT +Relay_DPDT_Omron_G6K-2P +Omron G6K-2P relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2P relay +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6K-2P-Y +Omron G6K-2P-Y relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf +Omron G6K-2P-Y relay +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6S-2 +Relay Omron G6S-2, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6S-2 +0 +8 +8 +Relay_THT +Relay_DPDT_Omron_G6SK-2 +Relay Omron G6SK-2, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf +Relay Omron G6SK-2 +0 +10 +10 +Relay_THT +Relay_DPDT_Panasonic_JW2 +Panasonic Relay DPDT, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay DPDT +0 +8 +8 +Relay_THT +Relay_DPDT_Schrack-RT2-FormC-Dual-Coil_RM5mm +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Data+Sheet%7FRT2_bistable%7F1116%7Fpdf%7FEnglish%7FENG_DS_RT2_bistable_1116.pdf%7F1-1415537-8 +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Relay +0 +9 +9 +Relay_THT +Relay_DPDT_Schrack-RT2-FormC_RM5mm +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay DPDT Schrack-RT2 RM5mm 16A 250V AC Relay +0 +8 +8 +Relay_THT +Relay_DPST_Fujitsu_FTR-F1A +https://www.fujitsu.com/downloads/MICRO/fcai/relays/ftr-f1.pdf +relay dpst fujitsu tht +0 +6 +6 +Relay_THT +Relay_DPST_Schrack-RT2-FormA_RM5mm +Relay DPST Schrack-RT2 RM5mm 16A 250V AC Form A http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay DPST Schrack-RT2 RM5mm 16A 250V AC Relay +0 +6 +6 +Relay_THT +Relay_SPDT_Finder_32.21-x000 +Finder 32.21-x000 Relay, SPDT, https://gfinder.findernet.com/assets/Series/355/S32EN.pdf +AXICOM IM-Series Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_34.51_Horizontal +Relay SPDT, Finder Type34.51, horizontal form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPDT Finder +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_34.51_Vertical +Relay SPDT, Finder Type34.51, vertical/standing form, see https://gfinder.findernet.com/public/attachments/34/EN/S34USAEN.pdf +Relay SPDT Finder +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_36.11 +FINDER 36.11, SPDT relay, 10A, https://gfinder.findernet.com/public/attachments/36/EN/S36EN.pdf +spdt relay +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.11 +Relay SPDT Finder 40.11, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay SPDT Finder 40.11 +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.31 +Relay DPDT Finder 40.31, Pitch 3.5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.31 Pitch 3.5mm +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.41 +Relay DPDT Finder 40.41, Pitch 3.5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.41 Pitch 3.5mm +0 +5 +5 +Relay_THT +Relay_SPDT_Finder_40.51 +Relay DPDT Finder 40.51, Pitch 5mm/7.5mm, https://www.finder-relais.net/de/finder-relais-serie-40.pdf +Relay DPDT Finder 40.51 Pitch 5mm +0 +5 +5 +Relay_THT +Relay_SPDT_HJR-4102 +IM Signal Relay SPDT HJR-4102 +Relay SPDT IM-relay HJR-4102 +0 +6 +6 +Relay_THT +Relay_SPDT_HsinDa_Y14 +http://www.hsinda.com.cn/en/ProductShow.asp?ID=208 +Relay Y14 +0 +6 +6 +Relay_THT +Relay_SPDT_Omron-G5LE-1 +Omron Relay SPDT, http://www.omron.com/ecb/products/pdf/en-g5le.pdf +Omron Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_Omron-G5Q-1 +Relay SPDT Omron Serie G5Q, http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5q.pdf +Relay SPDT Omron Serie G5Q +0 +5 +5 +Relay_THT +Relay_SPDT_Omron_G5V-1 +Relay Omron G5V-1, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5v_1.pdf +Relay Omron G5V-1 +0 +6 +6 +Relay_THT +Relay_SPDT_Omron_G6E +Relay SPDT Omron Serie G6E +Relay SPDT Omron Serie G6E 1x um +0 +5 +5 +Relay_THT +Relay_SPDT_Omron_G6EK +Relay SPDT Omron Serie G6EK, see http://www.logosfoundation.org/instrum_gwr/pi/Omron_G6E_134P.pdf +Relay SPDT Omron Serie G6EK +0 +6 +6 +Relay_THT +Relay_SPDT_Panasonic_JW1_FormC +Panasonic Relay SPDT, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_PotterBrumfield_T9AP5D52_12V30A +Relay SPDT Potter&Brumfield T9AP5D52 12V 30A 1xUn Connector Fast ON Only Dummy for Space NO Pads +Relay SPDT Potter&Brumfield T9AP5D52 12V 30A 1xUm Connector Fast ON Flachsteckeranschluss Only Dummy for Space NO Pads +0 +0 +0 +Relay_THT +Relay_SPDT_RAYEX-L90 +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90 SPDT +0 +6 +6 +Relay_THT +Relay_SPDT_RAYEX-L90S +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90S SPDT +0 +5 +5 +Relay_THT +Relay_SPDT_SANYOU_SRD_Series_Form_C +relay Sanyou SRD series Form C http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form C +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-16A-FormC_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Relay +0 +8 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-FormC_RM3.5mm +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RP-II-1-FormC_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-16A-FormC_RM5mm +Relay SPST Schrack-RT1 RM5mm 16A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 16A 250V AC Relay +0 +8 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-FormC_RM3.5mm +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_Schrack-RT1-FormC_RM5mm +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Relay +0 +5 +5 +Relay_THT +Relay_SPDT_StandexMeder_SIL_Form1C +Standex-Meder SIL-relais, Form 1C, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +5 +5 +Relay_THT +Relay_SPST_Finder_32.21-x300 +Finder 32.21-x300 Relay, SPST, https://gfinder.findernet.com/assets/Series/355/S32EN.pdf +Finder 32.21-x300 Relay SPST +0 +4 +4 +Relay_THT +Relay_SPST_Omron-G5Q-1A +Relay SPST-NO Omron Serie G5Q, http://omronfs.omron.com/en_US/ecb/products/pdf/en-g5q.pdf +Relay SPST-NO Omron Serie G5Q +0 +4 +4 +Relay_THT +Relay_SPST_Panasonic_JW1_FormA +Panasonic Relay SPST, http://www3.panasonic.biz/ac/e_download/control/relay/power/catalog/mech_eng_jw.pdf?via=ok +Panasonic Relay SPST +0 +4 +4 +Relay_THT +Relay_SPST_PotterBrumfield_T9AP1D52_12V30A +Relay SPST Potter&Brumfield T9AP1D52 12V 30A 1xEin Connector Fast ON Only Dummy for Space NO Pads +Relau SPST Potter&Brumfield T9AP1D52 12V 30A 1xEin Connector Fast ON Flachsteckeranschluss Only Dummy for Space NO Pads +0 +0 +0 +Relay_THT +Relay_SPST_RAYEX-L90A +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90A SPST NO +0 +5 +5 +Relay_THT +Relay_SPST_RAYEX-L90AS +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90AS SPST NO +0 +4 +4 +Relay_THT +Relay_SPST_RAYEX-L90B +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90B SPST NC +0 +5 +5 +Relay_THT +Relay_SPST_RAYEX-L90BS +https://a3.sofastcdn.com/attachment/7jioKBjnRiiSrjrjknRiwS77gwbf3zmp/L90-SERIES.pdf +Relay RAYEX L90BS SPST NC +0 +4 +4 +Relay_THT +Relay_SPST_SANYOU_SRD_Series_Form_A +relay Sanyou SRD series Form A http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form A +0 +4 +4 +Relay_THT +Relay_SPST_SANYOU_SRD_Series_Form_B +relay Sanyou SRD series Form B opener http://www.sanyourelay.ca/public/products/pdf/SRD.pdf +relay Sanyu SRD form B opener +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-16A-FormA_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Form A http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-FormA_RM3.5mm +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Form A +Relay SPST Schrack-RP-II/1 RM3.5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP-II-1-FormA_RM5mm +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Form A http://image.schrack.com/datenblaetter/h_rp810012-b.pdf +Relay SPST Schrack-RP-II/1 RM5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RP3SL-1coil_RM5mm +Relay SPST Schrack-RP3SL, 1-coil-version, RM5mm 16A 250V AC Form A http://www.alliedelec.com/m/d/543c6bed18bf23a83ae5238947033ee0.pdf +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RP3SL_RM5mm +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Form A http://www.alliedelec.com/m/d/543c6bed18bf23a83ae5238947033ee0.pdf +Relay SPST Schrack-RP3SL RM5mm 16A 250V AC Relay +0 +7 +5 +Relay_THT +Relay_SPST_Schrack-RT1-16A-FormA_RM5mm +Relay SPST Schrack-RT2 RM5mm 16A 250V AC Form C http://www.te.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=RT2_reflow&DocType=DS&DocLang=EN +Relay SPST Schrack-RT2 RM5mm 16A 250V AC Relay +0 +6 +4 +Relay_THT +Relay_SPST_Schrack-RT1-FormA_RM3.5mm +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Form A +Relay SPST Schrack-RT1 RM3.5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_Schrack-RT1-FormA_RM5mm +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Form C http://image.schrack.com/datenblaetter/h_rt114012--_de.pdf +Relay SPST Schrack-RT1 RM5mm 8A 250V AC Relay +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_MS_Form1AB +Standex-Meder MS SIL-relais, Form 1A/1B, see https://standexelectronics.com/de/produkte/ms-reed-relais/ +Standex Meder MS SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_SIL_Form1A +Standex-Meder SIL-relais, Form 1A, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_StandexMeder_SIL_Form1B +Standex-Meder SIL-relais, Form 1B, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_SIL.pdf +Standex Meder SIL reed relais +0 +4 +4 +Relay_THT +Relay_SPST_TE_PCH-1xxx2M +Miniature PCB Relay, PCH Series, 1 Form A (NO), SPST http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Data+Sheet%7FPCH_series_relay_data_sheet_E%7F1215%7Fpdf%7FEnglish%7FENG_DS_PCH_series_relay_data_sheet_E_1215.pdf +Relay SPST NO +0 +4 +4 +Relay_THT +Relay_SPST_TE_PCN-1xxD3MHZ +https://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F1461491%7FG2%7Fpdf%7FEnglish%7FENG_CD_1461491_G2.pdf%7F3-1461491-0 +SPST relay slim +0 +4 +4 +Relay_THT +Relay_Socket_DPDT_Finder_96.12 +https://gfinder.findernet.com/public/attachments/56/DE/S56DE.pdf +Relay socket DPDT Finder 96.12 56.32 +0 +8 +8 +Relay_THT +Relay_StandexMeder_DIP_HighProfile +package for Standex Meder DIP reed relay series, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_DIP.pdf +DIL DIP PDIP 2.54mm 7.62mm 300mil reed relay +0 +8 +8 +Relay_THT +Relay_StandexMeder_DIP_LowProfile +package for Standex Meder DIP reed relay series, see https://standexelectronics.com/wp-content/uploads/datasheet_reed_relay_DIP.pdf +DIL DIP PDIP 2.54mm 7.62mm 300mil reed relay +0 +8 +8 +Relay_THT +Relay_StandexMeder_UMS +Standex-Meder SIL-relais, UMS, see http://cdn-reichelt.de/documents/datenblatt/C300/UMS05_1A80_75L_DB.pdf +Standex Meder SIL reed relais +0 +4 +4 +Resistor_SMD +R_0201_0603Metric +Resistor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_0201_0603Metric_Pad0.64x0.40mm_HandSolder +Resistor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +4 +2 +Resistor_SMD +R_0402_1005Metric +Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0402_1005Metric_Pad0.72x0.64mm_HandSolder +Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0603_1608Metric +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0603_1608Metric_Pad0.98x0.95mm_HandSolder +Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0612_1632Metric +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0612_1632Metric_Pad1.18x3.40mm_HandSolder +Resistor SMD 0612 (1632 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0805_2012Metric +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0805_2012Metric_Pad1.20x1.40mm_HandSolder +Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_0815_2038Metric +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.susumu.co.jp/common/pdf/n_catalog_partition07_en.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_0815_2038Metric_Pad1.20x4.05mm_HandSolder +Resistor SMD 0815 (2038 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.susumu.co.jp/common/pdf/n_catalog_partition07_en.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_01005_0402Metric +Resistor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +resistor +0 +4 +2 +Resistor_SMD +R_01005_0402Metric_Pad0.57x0.30mm_HandSolder +Resistor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +4 +2 +Resistor_SMD +R_1020_2550Metric +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1020_2550Metric_Pad1.33x5.20mm_HandSolder +Resistor SMD 1020 (2550 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1206_3216Metric +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1206_3216Metric_Pad1.30x1.75mm_HandSolder +Resistor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1210_3225Metric +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1210_3225Metric_Pad1.30x2.65mm_HandSolder +Resistor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1218_3246Metric +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1218_3246Metric_Pad1.22x4.75mm_HandSolder +Resistor SMD 1218 (3246 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20035/dcrcwe3.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_1812_4532Metric +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Resistor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2010_5025Metric +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2010_5025Metric_Pad1.40x2.65mm_HandSolder +Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2512_6332Metric +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2512_6332Metric_Pad1.40x3.35mm_HandSolder +Resistor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_2816_7142Metric +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_2816_7142Metric_Pad3.20x4.45mm_HandSolder +Resistor SMD 2816 (7142 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size from: https://www.vishay.com/docs/30100/wsl.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_4020_10251Metric +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor +0 +2 +2 +Resistor_SMD +R_4020_10251Metric_Pad1.65x5.30mm_HandSolder +Resistor SMD 4020 (10251 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://datasheet.octopart.com/HVC0603T5004FET-Ohmite-datasheet-26699797.pdf), generated with kicad-footprint-generator +resistor handsolder +0 +2 +2 +Resistor_SMD +R_Array_Concave_2x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Concave_4x0402 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA04P (see cra04p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Concave_4x0603 +Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_2x0402 +Chip Resistor Network, ROHM MNR02 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0603 +Chip Resistor Network, ROHM MNR12 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x0606 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_2x1206 +Chip Resistor Network, ROHM MNR32 (see mnr_g.pdf) +resistor array +0 +4 +4 +Resistor_SMD +R_Array_Convex_4x0402 +Chip Resistor Network, ROHM MNR04 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0603 +Chip Resistor Network, ROHM MNR14 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x0612 +Precision Thin Film Chip Resistor Array, VISHAY (see http://www.vishay.com/docs/28770/acasat.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_4x1206 +Chip Resistor Network, ROHM MNR34 (see mnr_g.pdf) +resistor array +0 +8 +8 +Resistor_SMD +R_Array_Convex_5x0603 +Chip Resistor Network, ROHM MNR15 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_5x1206 +Chip Resistor Network, ROHM MNR35 (see mnr_g.pdf) +resistor array +0 +10 +10 +Resistor_SMD +R_Array_Convex_8x0602 +Chip Resistor Network, ROHM MNR18 (see mnr_g.pdf) +resistor array +0 +16 +16 +Resistor_SMD +R_Cat16-2 +SMT resistor net, Bourns CAT16 series, 2 way +SMT resistor net Bourns CAT16 series 2 way +0 +4 +4 +Resistor_SMD +R_Cat16-4 +SMT resistor net, Bourns CAT16 series, 4 way +SMT resistor net Bourns CAT16 series 4 way +0 +8 +8 +Resistor_SMD +R_Cat16-8 +SMT resistor net, Bourns CAT16 series, 8 way +SMT resistor net Bourns CAT16 series 8 way +0 +16 +16 +Resistor_SMD +R_MELF_MMB-0207 +Resistor, MELF, MMB-0207, http://www.vishay.com/docs/28713/melfprof.pdf +MELF Resistor +0 +2 +2 +Resistor_SMD +R_MicroMELF_MMU-0102 +Resistor, MicroMELF, MMU-0102, http://www.vishay.com/docs/28713/melfprof.pdf +MicroMELF Resistor +0 +2 +2 +Resistor_SMD +R_MiniMELF_MMA-0204 +Resistor, MiniMELF, MMA-0204, http://www.vishay.com/docs/28713/melfprof.pdf +MiniMELF Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Ohmite_LVK12 +4 contact shunt resistor +shunt resistor 4 contacts +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK20 +4 contacts shunt resistor, https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK24 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Ohmite_LVK25 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T1.19mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 1.19mm, 5 to 200 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.21mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.21mm, 1 to 4.9 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSK2512_6332Metric_T2.66mm +Shunt Resistor SMD 2512 (6332 Metric), 2.6mm thick, Vishay WKS2512, Terminal length (T) 2.66mm, 0.5 to 0.99 milli Ohm (http://http://www.vishay.com/docs/30108/wsk.pdf) +resistor shunt WSK2512 +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSKW0612 +https://www.vishay.com/docs/30332/wskw0612.pdf +4-Terminal SMD Shunt +0 +4 +4 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3 +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +2 +2 +Resistor_SMD +R_Shunt_Vishay_WSR2_WSR3_KelvinConnection +Power Metal Strip Resistors 0.005 to 0.2, https://www.vishay.com/docs/30101/wsr.pdf +SMD Shunt Resistor +0 +4 +2 +Resistor_THT +R_Array_SIP4 +4-pin Resistor SIP pack +R +0 +4 +4 +Resistor_THT +R_Array_SIP5 +5-pin Resistor SIP pack +R +0 +5 +5 +Resistor_THT +R_Array_SIP6 +6-pin Resistor SIP pack +R +0 +6 +6 +Resistor_THT +R_Array_SIP7 +7-pin Resistor SIP pack +R +0 +7 +7 +Resistor_THT +R_Array_SIP8 +8-pin Resistor SIP pack +R +0 +8 +8 +Resistor_THT +R_Array_SIP9 +9-pin Resistor SIP pack +R +0 +9 +9 +Resistor_THT +R_Array_SIP10 +10-pin Resistor SIP pack +R +0 +10 +10 +Resistor_THT +R_Array_SIP11 +11-pin Resistor SIP pack +R +0 +11 +11 +Resistor_THT +R_Array_SIP12 +12-pin Resistor SIP pack +R +0 +12 +12 +Resistor_THT +R_Array_SIP13 +13-pin Resistor SIP pack +R +0 +13 +13 +Resistor_THT +R_Array_SIP14 +14-pin Resistor SIP pack +R +0 +14 +14 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=1.9mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 1.9mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P2.54mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=2.54mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 2.54mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Horizontal +Resistor, Axial_DIN0204 series, Axial, Horizontal, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Horizontal pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P5.08mm_Vertical +Resistor, Axial_DIN0204 series, Axial, Vertical, pin pitch=5.08mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Vertical pin pitch 5.08mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0204_L3.6mm_D1.6mm_P7.62mm_Horizontal +Resistor, Axial_DIN0204 series, Axial, Horizontal, pin pitch=7.62mm, 0.167W, length*diameter=3.6*1.6mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0204 series Axial Horizontal pin pitch 7.62mm 0.167W length 3.6mm diameter 1.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P2.54mm_Vertical +Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=2.54mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Vertical pin pitch 2.54mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P5.08mm_Vertical +Resistor, Axial_DIN0207 series, Axial, Vertical, pin pitch=5.08mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Vertical pin pitch 5.08mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=7.62mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 7.62mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=10.16mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 10.16mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0207_L6.3mm_D2.5mm_P15.24mm_Horizontal +Resistor, Axial_DIN0207 series, Axial, Horizontal, pin pitch=15.24mm, 0.25W = 1/4W, length*diameter=6.3*2.5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0207 series Axial Horizontal pin pitch 15.24mm 0.25W = 1/4W length 6.3mm diameter 2.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P2.54mm_Vertical +Resistor, Axial_DIN0309 series, Axial, Vertical, pin pitch=2.54mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Vertical pin pitch 2.54mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P5.08mm_Vertical +Resistor, Axial_DIN0309 series, Axial, Vertical, pin pitch=5.08mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Vertical pin pitch 5.08mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P12.70mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=12.7mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 12.7mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P15.24mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=15.24mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 15.24mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P20.32mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=20.32mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 20.32mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0309_L9.0mm_D3.2mm_P25.40mm_Horizontal +Resistor, Axial_DIN0309 series, Axial, Horizontal, pin pitch=25.4mm, 0.5W = 1/2W, length*diameter=9*3.2mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0309 series Axial Horizontal pin pitch 25.4mm 0.5W = 1/2W length 9mm diameter 3.2mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P5.08mm_Vertical +Resistor, Axial_DIN0411 series, Axial, Vertical, pin pitch=5.08mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Vertical pin pitch 5.08mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P7.62mm_Vertical +Resistor, Axial_DIN0411 series, Axial, Vertical, pin pitch=7.62mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Vertical pin pitch 7.62mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P12.70mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=12.7mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 12.7mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P15.24mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=15.24mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 15.24mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P20.32mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=20.32mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 20.32mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0411_L9.9mm_D3.6mm_P25.40mm_Horizontal +Resistor, Axial_DIN0411 series, Axial, Horizontal, pin pitch=25.4mm, 1W, length*diameter=9.9*3.6mm^2 +Resistor Axial_DIN0411 series Axial Horizontal pin pitch 25.4mm 1W length 9.9mm diameter 3.6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P5.08mm_Vertical +Resistor, Axial_DIN0414 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Vertical pin pitch 5.08mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P7.62mm_Vertical +Resistor, Axial_DIN0414 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Vertical pin pitch 7.62mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P15.24mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=15.24mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 15.24mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P20.32mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 20.32mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0414_L11.9mm_D4.5mm_P25.40mm_Horizontal +Resistor, Axial_DIN0414 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=11.9*4.5mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0414 series Axial Horizontal pin pitch 25.4mm 2W length 11.9mm diameter 4.5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P5.08mm_Vertical +Resistor, Axial_DIN0516 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Vertical pin pitch 5.08mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0516 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Vertical pin pitch 7.62mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P20.32mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 20.32mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 25.4mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0516_L15.5mm_D5.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0516 series, Axial, Horizontal, pin pitch=30.48mm, 2W, length*diameter=15.5*5mm^2, http://cdn-reichelt.de/documents/datenblatt/B400/1_4W%23YAG.pdf +Resistor Axial_DIN0516 series Axial Horizontal pin pitch 30.48mm 2W length 15.5mm diameter 5mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P5.08mm_Vertical +Resistor, Axial_DIN0614 series, Axial, Vertical, pin pitch=5.08mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Vertical pin pitch 5.08mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P7.62mm_Vertical +Resistor, Axial_DIN0614 series, Axial, Vertical, pin pitch=7.62mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Vertical pin pitch 7.62mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P15.24mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=15.24mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 15.24mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P20.32mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=20.32mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 20.32mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0614_L14.3mm_D5.7mm_P25.40mm_Horizontal +Resistor, Axial_DIN0614 series, Axial, Horizontal, pin pitch=25.4mm, 1.5W, length*diameter=14.3*5.7mm^2 +Resistor Axial_DIN0614 series Axial Horizontal pin pitch 25.4mm 1.5W length 14.3mm diameter 5.7mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P5.08mm_Vertical +Resistor, Axial_DIN0617 series, Axial, Vertical, pin pitch=5.08mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Vertical pin pitch 5.08mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0617 series, Axial, Vertical, pin pitch=7.62mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Vertical pin pitch 7.62mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P20.32mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=20.32mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 20.32mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=25.4mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 25.4mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0617_L17.0mm_D6.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0617 series, Axial, Horizontal, pin pitch=30.48mm, 2W, length*diameter=17*6mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0617 series Axial Horizontal pin pitch 30.48mm 2W length 17mm diameter 6mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0918 series, Axial, Vertical, pin pitch=7.62mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Vertical pin pitch 7.62mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P22.86mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=22.86mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 22.86mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=25.4mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 25.4mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0918_L18.0mm_D9.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0918 series, Axial, Horizontal, pin pitch=30.48mm, 4W, length*diameter=18*9mm^2 +Resistor Axial_DIN0918 series Axial Horizontal pin pitch 30.48mm 4W length 18mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P7.62mm_Vertical +Resistor, Axial_DIN0922 series, Axial, Vertical, pin pitch=7.62mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Vertical pin pitch 7.62mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P25.40mm_Horizontal +Resistor, Axial_DIN0922 series, Axial, Horizontal, pin pitch=25.4mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Horizontal pin pitch 25.4mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_DIN0922_L20.0mm_D9.0mm_P30.48mm_Horizontal +Resistor, Axial_DIN0922 series, Axial, Horizontal, pin pitch=30.48mm, 5W, length*diameter=20*9mm^2, http://www.vishay.com/docs/20128/wkxwrx.pdf +Resistor Axial_DIN0922 series Axial Horizontal pin pitch 30.48mm 5W length 20mm diameter 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P5.08mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=5.08mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 5.08mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P22.40mm +Resistor, Axial_Power series, Box, pin pitch=22.4mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 22.4mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P25.40mm +Resistor, Axial_Power series, Box, pin pitch=25.4mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 25.4mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L20.0mm_W6.4mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 4W, length*width*height=20*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 4W length 20mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W6.4mm_P27.94mm +Resistor, Axial_Power series, Box, pin pitch=27.94mm, 5W, length*width*height=25*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 27.94mm 5W length 25mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W6.4mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 5W, length*width*height=25*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 5W length 25mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P27.94mm +Resistor, Axial_Power series, Box, pin pitch=27.94mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 27.94mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L25.0mm_W9.0mm_P30.48mm +Resistor, Axial_Power series, Box, pin pitch=30.48mm, 7W, length*width*height=25*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 30.48mm 7W length 25mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W6.4mm_P40.64mm +Resistor, Axial_Power series, Box, pin pitch=40.64mm, 7W, length*width*height=38*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 40.64mm 7W length 38mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W6.4mm_P45.72mm +Resistor, Axial_Power series, Box, pin pitch=45.72mm, 7W, length*width*height=38*6.4*6.4mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 45.72mm 7W length 38mm width 6.4mm height 6.4mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W9.0mm_P40.64mm +Resistor, Axial_Power series, Box, pin pitch=40.64mm, 9W, length*width*height=38*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 40.64mm 9W length 38mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L38.0mm_W9.0mm_P45.72mm +Resistor, Axial_Power series, Box, pin pitch=45.72mm, 9W, length*width*height=38*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 45.72mm 9W length 38mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P7.62mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=7.62mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 7.62mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P55.88mm +Resistor, Axial_Power series, Box, pin pitch=55.88mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 55.88mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L48.0mm_W12.5mm_P60.96mm +Resistor, Axial_Power series, Box, pin pitch=60.96mm, 15W, length*width*height=48*12.5*12.5mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 60.96mm 15W length 48mm width 12.5mm height 12.5mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L50.0mm_W9.0mm_P55.88mm +Resistor, Axial_Power series, Box, pin pitch=55.88mm, 11W, length*width*height=50*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 55.88mm 11W length 50mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L50.0mm_W9.0mm_P60.96mm +Resistor, Axial_Power series, Box, pin pitch=60.96mm, 11W, length*width*height=50*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 60.96mm 11W length 50mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P10.16mm_Vertical +Resistor, Axial_Power series, Axial, Vertical, pin pitch=10.16mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Axial Vertical pin pitch 10.16mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P66.04mm +Resistor, Axial_Power series, Box, pin pitch=66.04mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 66.04mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L60.0mm_W14.0mm_P71.12mm +Resistor, Axial_Power series, Box, pin pitch=71.12mm, 25W, length*width*height=60*14*14mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 71.12mm 25W length 60mm width 14mm height 14mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L75.0mm_W9.0mm_P81.28mm +Resistor, Axial_Power series, Box, pin pitch=81.28mm, 17W, length*width*height=75*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 81.28mm 17W length 75mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Power_L75.0mm_W9.0mm_P86.36mm +Resistor, Axial_Power series, Box, pin pitch=86.36mm, 17W, length*width*height=75*9*9mm^3, http://cdn-reichelt.de/documents/datenblatt/B400/5WAXIAL_9WAXIAL_11WAXIAL_17WAXIAL%23YAG.pdf +Resistor Axial_Power series Box pin pitch 86.36mm 17W length 75mm width 9mm height 9mm +0 +2 +2 +Resistor_THT +R_Axial_Shunt_L22.2mm_W8.0mm_PS14.30mm_P25.40mm +Resistor, Axial_Shunt series, Box, pin pitch=25.4mm, 3W, length*width*height=22.2*8*8mm^3, shunt pin pitch = 14.30mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 25.4mm 3W length 22.2mm width 8mm height 8mm shunt pin pitch 14.30mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L22.2mm_W9.5mm_PS14.30mm_P25.40mm +Resistor, Axial_Shunt series, Box, pin pitch=25.4mm, 5W, length*width*height=22.2*9.5*9.5mm^3, shunt pin pitch = 14.30mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 25.4mm 5W length 22.2mm width 9.5mm height 9.5mm shunt pin pitch 14.30mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L35.3mm_W9.5mm_PS25.40mm_P38.10mm +Resistor, Axial_Shunt series, Box, pin pitch=38.1mm, 7W, length*width*height=35.3*9.5*9.5mm^3, shunt pin pitch = 25.40mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 38.1mm 7W length 35.3mm width 9.5mm height 9.5mm shunt pin pitch 25.40mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L47.6mm_W9.5mm_PS34.93mm_P50.80mm +Resistor, Axial_Shunt series, Box, pin pitch=50.8mm, 10W, length*width*height=47.6*9.5*9.5mm^3, shunt pin pitch = 34.93mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 50.8mm 10W length 47.6mm width 9.5mm height 9.5mm shunt pin pitch 34.93mm +0 +4 +4 +Resistor_THT +R_Axial_Shunt_L47.6mm_W12.7mm_PS34.93mm_P50.80mm +Resistor, Axial_Shunt series, Box, pin pitch=50.8mm, 15W, length*width*height=47.6*12.7*12.7mm^3, shunt pin pitch = 34.93mm, http://www.vishay.com/docs/30217/cpsl.pdf +Resistor Axial_Shunt series Box pin pitch 50.8mm 15W length 47.6mm width 12.7mm height 12.7mm shunt pin pitch 34.93mm +0 +4 +4 +Resistor_THT +R_Bare_Metal_Element_L12.4mm_W4.8mm_P11.40mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=11.4mm, 1W, length*width=12.4*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 11.4mm 1W length 12.4mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Bare_Metal_Element_L16.3mm_W4.8mm_P15.30mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=15.3mm, 3W, length*width=16.3*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 15.3mm 3W length 16.3mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Bare_Metal_Element_L21.3mm_W4.8mm_P20.30mm +Resistor, Bare_Metal_Element series, Bare Metal Strip/Wire, Horizontal, pin pitch=20.3mm, 5W, length*width=21.3*4.8mm^2, https://www.bourns.com/pdfs/PWR4412-2S.pdf +Resistor Bare_Metal_Element series Bare Metal Strip Wire Horizontal pin pitch 20.3mm 5W length 21.3mm width 4.8mm +0 +2 +2 +Resistor_THT +R_Box_L8.4mm_W2.5mm_P5.08mm +Resistor, Box series, Radial, pin pitch=5.08mm, 0.5W = 1/2W, length*width=8.38*2.54mm^2, http://www.vishay.com/docs/60051/cns020.pdf +Resistor Box series Radial pin pitch 5.08mm 0.5W = 1/2W length 8.38mm width 2.54mm +0 +2 +2 +Resistor_THT +R_Box_L13.0mm_W4.0mm_P9.00mm +Resistor, Box series, Radial, pin pitch=9.00mm, 2W, length*width=13.0*4.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm +0 +2 +2 +Resistor_THT +R_Box_L14.0mm_W5.0mm_P9.00mm +Resistor, Box series, Radial, pin pitch=9.00mm, 5W, length*width=14.0*5.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 9.00mm 5W length 14.0mm width 5.0mm +0 +2 +2 +Resistor_THT +R_Box_L26.0mm_W5.0mm_P20.00mm +Resistor, Box series, Radial, pin pitch=20.00mm, 10W, length*width=26.0*5.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf +Resistor Box series Radial pin pitch 20.00mm 10W length 26.0mm width 5.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L7.0mm_W8.0mm_Px2.40mm_Py2.30mm +Resistor, Radial_Power series, Radial, pin pitch=2.40*2.30mm^2, 7W, length*width=7*8mm^2, http://www.vitrohm.com/content/files/vitrohm_series_kv_-_201601.pdf +Resistor Radial_Power series Radial pin pitch 2.40*2.30mm^2 7W length 7mm width 8mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L9.0mm_W10.0mm_Px2.70mm_Py2.30mm +Resistor, Radial_Power series, Radial, pin pitch=2.70*2.30mm^2, 17W, length*width=9*10mm^2, http://www.vitrohm.com/content/files/vitrohm_series_kv_-_201601.pdf +Resistor Radial_Power series Radial pin pitch 2.70*2.30mm^2 17W length 9mm width 10mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L11.0mm_W7.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 2W, length*width=11.0*7.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 2W length 11.0mm width 7.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L12.0mm_W8.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 3W, length*width=12.0*8.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 3W length 12.0mm width 8.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L13.0mm_W9.0mm_P5.00mm +Resistor, Radial_Power series, Radial, pin pitch=5.00mm, 7W, length*width=13.0*9.0mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 5.00mm 7W length 13.0mm width 9.0mm +0 +2 +2 +Resistor_THT +R_Radial_Power_L16.1mm_W9.0mm_P7.37mm +Resistor, Radial_Power series, Radial, pin pitch=7.37mm, 10W, length*width=16.1*9mm^2, http://www.vishay.com/docs/30218/cpcx.pdf +Resistor Radial_Power series Radial pin pitch 7.37mm 10W length 16.1mm width 9mm +0 +2 +2 +Rotary_Encoder +RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm +Alps rotary encoder, EC12E... with switch, vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... with switch, vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC11E_Vertical_H20mm +Alps rotary encoder, EC12E... without switch (pins are dummy), vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC11E_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... without switch (pins are dummy), vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC11/EC11E15204A3.html +rotary encoder +0 +7 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC12E-Switch_Vertical_H20mm +Alps rotary encoder, EC12E... with switch, vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html & http://cdn-reichelt.de/documents/datenblatt/F100/402097STEC12E08.PDF +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC12E-Switch_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E... with switch, vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html & http://cdn-reichelt.de/documents/datenblatt/F100/402097STEC12E08.PDF +rotary encoder +0 +7 +6 +Rotary_Encoder +RotaryEncoder_Alps_EC12E_Vertical_H20mm +Alps rotary encoder, EC12E..., vertical shaft, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html +rotary encoder +0 +5 +4 +Rotary_Encoder +RotaryEncoder_Alps_EC12E_Vertical_H20mm_CircularMountingHoles +Alps rotary encoder, EC12E..., vertical shaft, mounting holes with circular drills, http://www.alps.com/prod/info/E/HTML/Encoder/Incremental/EC12E/EC12E1240405.html +rotary encoder +0 +5 +4 +Sensor +Aosong_DHT11_5.5x12.0_P2.54mm +Temperature and humidity module, http://akizukidenshi.com/download/ds/aosong/DHT11.pdf +Temperature and humidity module +0 +4 +4 +Sensor +MQ-6 +Gas Sensor, 6 pin, https://www.winsen-sensor.com/d/files/semiconductor/mq-6.pdf +gas sensor +0 +6 +6 +Sensor +SHT1x +SHT1x +SHT1x +0 +8 +8 +Sensor_Audio +CUI_CMC-4013-SMT +Omnidirectional, -42dB, reflowable, electret condenser microphone https://www.cuidevices.com/product/resource/cmc-4013-smt-tr.pdf +Microphone CUI +0 +2 +2 +Sensor_Audio +Infineon_PG-LLGA-5-1 +Infineon_PG-LLGA-5-1 StepUp generated footprint, https://www.infineon.com/cms/en/product/packages/PG-LLGA/PG-LLGA-5-1/ +infineon mems microphone +0 +15 +5 +Sensor_Audio +ST_HLGA-6_3.76x4.72mm_P1.65mm +http://www.st.com/content/ccc/resource/technical/document/datasheet/group3/27/62/48/98/44/54/4d/36/DM00303211/files/DM00303211.pdf/jcr:content/translations/en.DM00303211.pdf +HLGA Sensor Audio +0 +6 +6 +Sensor_Current +AKM_CQ_7 +AKM Current Sensor, 7 pin, THT (http://www.akm.com/akm/en/file/datasheet/CQ-236B.pdf) +akm current sensor tht +0 +39 +7 +Sensor_Current +AKM_CQ_7S +AKM Current Sensor, 7 pin, SMD (http://www.akm.com/akm/en/file/datasheet/CQ-236B.pdf) +akm current sensor smd +0 +19 +7 +Sensor_Current +AKM_CQ_VSOP-24_5.6x7.9mm_P0.65mm +AKM VSOP-24 current sensor, 5.6x7.9mm body, 0.65mm pitch (http://www.akm.com/akm/en/file/datasheet/CQ-330J.pdf) +akm vsop 24 +0 +10 +10 +Sensor_Current +AKM_CZ_SSOP-10_6.5x8.1mm_P0.95mm +AKM CZ-381x current sensor, 6.5x8.1mm body, 0.95mm pitch (http://www.akm.com/akm/en/product/detail/0009/) +akm cz-381x 10 +0 +10 +10 +Sensor_Current +Allegro_CB_PFF +Allegro MicroSystems, CB-PFF Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) !PADS 4-5 DO NOT MATCH DATASHEET! +Allegro CB-PFF +0 +37 +5 +Sensor_Current +Allegro_CB_PSF +Allegro MicroSystems, CB-PSF Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) +Allegro CB-PSF +0 +5 +5 +Sensor_Current +Allegro_CB_PSS +Allegro MicroSystems, CB-PSS Package (http://www.allegromicro.com/en/Products/Current-Sensor-ICs/Fifty-To-Two-Hundred-Amp-Integrated-Conductor-Sensor-ICs/ACS758.aspx) +Allegro CB-PSS +0 +5 +5 +Sensor_Current +Allegro_PSOF-7_4.8x6.4mm_P1.60mm +Allegro Microsystems PSOF-7, 4.8x6.4mm Body, 1.60mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS780-Datasheet.ashx) +Allegro PSOF-7 +0 +7 +7 +Sensor_Current +Allegro_QFN-12-10-1EP_3x3mm_P0.5mm +Allegro Microsystems 12-Lead (10-Lead Populated) Quad Flat Pack, 3x3mm Body, 0.5mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS711-Datasheet.ashx) +Allegro QFN 0.5 +0 +14 +10 +Sensor_Current +Allegro_QSOP-24_3.9x8.7mm_P0.635mm +Allegro Microsystems 24-Lead Plastic Shrink Small Outline Narrow Body Body [QSOP] (http://www.allegromicro.com/~/media/Files/Datasheets/ACS726-Datasheet.ashx?la=en) +Allegro QSOP 0.635 +0 +24 +24 +Sensor_Current +Allegro_SIP-3 +Allegro Microsystems SIP-3, 1.27mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/A1369-Datasheet.ashx) +Allegro SIP-3 +0 +3 +3 +Sensor_Current +Allegro_SIP-4 +Allegro Microsystems SIP-4, 1.27mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/A1363-Datasheet.ashx) +Allegro SIP-4 +0 +4 +4 +Sensor_Current +Diodes_SIP-3_4.1x1.5mm_P1.27mm +Diodes SIP-3 Bulk Pack, 1.27mm Pitch (https://www.diodes.com/assets/Package-Files/SIP-3-Bulk-Pack.pdf) +Diodes SIP-3 Bulk Pack +0 +3 +3 +Sensor_Current +Diodes_SIP-3_4.1x1.5mm_P2.65mm +Diodes SIP-3 Ammo Pack, 2.65mm Pitch (https://www.diodes.com/assets/Package-Files/SIP-3-Ammo-Pack.pdf) +Diodes SIP-3 Ammo Pack +0 +3 +3 +Sensor_Current +Honeywell_CSLW +https://sensing.honeywell.com/honeywell-sensing-cslw-series-product-sheet-005861-1-en.pdf +Miniature Wired Open-Loop Current Sensor +0 +5 +5 +Sensor_Current +LEM_CKSR +LEM CKSR 6/15/25/50/75-NP Current Transducer, https://www.lem.com/sites/default/files/products_datasheets/cksr_75-np.pdf +current transducer LEM +0 +14 +14 +Sensor_Current +LEM_HO8-NP +LEM HO 8/15/25-NP Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-np-0000_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HO8-NSM +LEM HO 8/15/25-NSM Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-nsm-0000_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HO40-NP +LEM HO 40/60/120/150-NP Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/ho-np_0100__1100_series.pdf) +current transducer +0 +13 +13 +Sensor_Current +LEM_HTFS +LEM HTFS x00-P current transducer (https://www.lem.com/sites/default/files/products_datasheets/htfs_200_800-p.pdf) +HTFS current transducer +0 +4 +4 +Sensor_Current +LEM_HX02-P +LEM HX02-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX03-P-SP2 +LEM HX03-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX04-P +LEM HX04-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX05-NP +LEM HX05-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX05-P-SP2 +LEM HX05-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX06-P +LEM HX06-P hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%202_6-p_e%20v5.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX10-NP +LEM HX10-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX10-P-SP2 +LEM HX10-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX15-NP +LEM HX15-NP hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%205_15-np_e%20v10.pdf) +hall current +0 +8 +8 +Sensor_Current +LEM_HX15-P-SP2 +LEM HX15-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX20-P-SP2 +LEM HX20-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX25-P-SP2 +LEM HX25-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_HX50-P-SP2 +LEM HX50-P-SP2 hall effect current transducer (https://www.lem.com/sites/default/files/products_datasheets/hx%203_50-p_sp2_e%20v07.pdf) +hall current +0 +6 +6 +Sensor_Current +LEM_LA25-P +LEM Current Transducer (https://www.lem.com/sites/default/files/products_datasheets/la_25-p.pdf) +current transducer +0 +3 +3 +Sensor_Current +LEM_LTSR-NP +LEM current transducer LEM_LTSR-NP 5V supply voltage series https://www.lem.com/sites/default/files/products_datasheets/ltsr_6-np.pdf +Current transducer +0 +10 +10 +Sensor_Distance +ST_VL53L1x +VL53L1x distance sensor +VL53L1CXV0FY1 VL53L1x +0 +13 +12 +Sensor_Humidity +Sensirion_DFN-4-1EP_2x2mm_P1mm_EP0.7x1.6mm +DFN, 4 Pin (https://www.sensirion.com/fileadmin/user_upload/customers/sensirion/Dokumente/0_Datasheets/Humidity/Sensirion_Humidity_Sensors_SHTC3_Datasheet.pdf) +Sensirion DFN NoLead +0 +10 +5 +Sensor_Humidity +Sensirion_DFN-8-1EP_2.5x2.5mm_P0.5mm_EP1.1x1.7mm +Sensirion DFN-8 SHT3x-DIS (https://www.sensirion.com/fileadmin/user_upload/customers/sensirion/Dokumente/2_Humidity_Sensors/Datasheets/Sensirion_Humidity_Sensors_SHT3x_Datasheet_digital.pdf) +sensirion dfn nolead +0 +10 +9 +Sensor_Motion +InvenSense_QFN-24_3x3mm_P0.4mm +24-Lead Plastic QFN (3mm x 3mm); Pitch 0.4mm; EP 1.7x1.54mm; for InvenSense motion sensors; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU9250REV1.0.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf) +QFN 0.4 +0 +24 +24 +Sensor_Motion +InvenSense_QFN-24_3x3mm_P0.4mm_NoMask +24-Lead Plastic QFN (3mm x 3mm); Pitch 0.4mm; EP 1.7x1.54mm; for InvenSense motion sensors; Mask removed below exposed pad; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU9250REV1.0.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf) +QFN 0.4 +0 +25 +24 +Sensor_Motion +InvenSense_QFN-24_4x4mm_P0.5mm +24-Lead Plastic QFN (4mm x 4mm); Pitch 0.5mm; EP 2.7x2.6mm; for InvenSense motion sensors; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf) +QFN 0.5 +0 +24 +24 +Sensor_Motion +InvenSense_QFN-24_4x4mm_P0.5mm_NoMask +24-Lead Plastic QFN (4mm x 4mm); Pitch 0.5mm; EP 2.7x2.6mm; for InvenSense motion sensors; Mask removed below exposed pad; keepout area marked (Package see: https://store.invensense.com/datasheets/invensense/MPU-6050_DataSheet_V3%204.pdf; See also https://www.invensense.com/wp-content/uploads/2015/02/InvenSense-MEMS-Handling.pdf) +QFN 0.5 +0 +25 +24 +Sensor_Pressure +Freescale_98ARH99066A +https://www.nxp.com/docs/en/data-sheet/MPXH6250A.pdf +sensor pressure ssop 98ARH99066A +0 +8 +8 +Sensor_Pressure +Freescale_98ARH99089A +https://www.nxp.com/docs/en/data-sheet/MPXH6250A.pdf +sensor pressure ssop 98ARH99089A +0 +8 +8 +Sensor_Pressure +Honeywell_40PCxxxG1A +https://www.honeywellscportal.com/index.php?ci_id=138832 +pressure sensor automotive honeywell +0 +3 +3 +Sensor_Voltage +LEM_LV25-P +LEM LV25-P Voltage transducer, https://www.lem.com/sites/default/files/products_datasheets/lv_25-p.pdf +LEM Hall Effect Voltage transducer +0 +5 +5 +Socket +3M_Textool_240-1288-00-0602J_2x20_P2.54mm +3M 40-pin zero insertion force socket, though-hole, row spacing 25.4 mm (1000 mils) +THT DIP DIL ZIF 25.4mm 1000mil Socket +0 +40 +40 +Socket +DIP_Socket-14_W4.3_W5.08_W7.62_W10.16_W10.9_3M_214-3339-00-0602J +3M 14-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +14 +14 +Socket +DIP_Socket-16_W4.3_W5.08_W7.62_W10.16_W10.9_3M_216-3340-00-0602J +3M 16-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +16 +16 +Socket +DIP_Socket-18_W4.3_W5.08_W7.62_W10.16_W10.9_3M_218-3341-00-0602J +3M 18-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +18 +18 +Socket +DIP_Socket-20_W4.3_W5.08_W7.62_W10.16_W10.9_3M_220-3342-00-0602J +3M 20-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +20 +20 +Socket +DIP_Socket-22_W6.9_W7.62_W10.16_W12.7_W13.5_3M_222-3343-00-0602J +3M 22-pin zero insertion force socket, through-hole, row spacing 10.16 mm (400 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 10.16mm 400mil Socket +0 +22 +22 +Socket +DIP_Socket-24_W4.3_W5.08_W7.62_W10.16_W10.9_3M_224-5248-00-0602J +3M 24-pin zero insertion force socket, through-hole, row spacing 7.62 mm (300 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 7.62mm 300mil Socket +0 +24 +24 +Socket +DIP_Socket-24_W11.9_W12.7_W15.24_W17.78_W18.5_3M_224-1275-00-0602J +3M 24-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +24 +24 +Socket +DIP_Socket-28_W6.9_W7.62_W10.16_W12.7_W13.5_3M_228-4817-00-0602J +3M 28-pin zero insertion force socket, through-hole, row spacing 10.16 mm (400 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 10.16mm 400mil Socket +0 +28 +28 +Socket +DIP_Socket-28_W11.9_W12.7_W15.24_W17.78_W18.5_3M_228-1277-00-0602J +3M 28-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +28 +28 +Socket +DIP_Socket-32_W11.9_W12.7_W15.24_W17.78_W18.5_3M_232-1285-00-0602J +3M 32-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +32 +32 +Socket +DIP_Socket-40_W11.9_W12.7_W15.24_W17.78_W18.5_3M_240-1280-00-0602J +3M 40-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +40 +40 +Socket +DIP_Socket-40_W22.1_W22.86_W25.4_W27.94_W28.7_3M_240-3639-00-0602J +3M 40-pin zero insertion force socket, through-hole, row spacing 25.4 mm (1000 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 25.4mm 1000mil Socket +0 +40 +40 +Socket +DIP_Socket-42_W11.9_W12.7_W15.24_W17.78_W18.5_3M_242-1281-00-0602J +3M 42-pin zero insertion force socket, through-hole, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf +THT DIP DIL ZIF 15.24mm 600mil Socket +0 +42 +42 +Socket +Wells_648-0482211SA01 +https://www.farnell.com/cad/316865.pdf?_ga=2.37208032.177107060.1530611323-249019997.1498114824 +48pin TSOP Socket +0 +48 +48 +Symbol +CE-Logo_8.5x6mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_11.2x8mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_16.8x12mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_28x20mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_42x30mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +CE-Logo_56.1x40mm_SilkScreen +CE marking +Logo CE certification +0 +0 +0 +Symbol +ESD-Logo_6.6x6mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_8.9x8mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_13.2x12mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_22x20mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_33x30mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +ESD-Logo_44.1x40mm_SilkScreen +Electrostatic discharge Logo +Logo ESD +0 +0 +0 +Symbol +FCC-Logo_7.3x6mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_9.6x8mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_14.6x12mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_24.2x20mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_36.3x30mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +FCC-Logo_48.3x40mm_SilkScreen +FCC marking +Logo FCC certification +0 +0 +0 +Symbol +KiCad-Logo2_5mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_5mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_6mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_6mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_8mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_8mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_12mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_12mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_20mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_20mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_30mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_30mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_40mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo2_40mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_5mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_5mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_6mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_6mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_8mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_8mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_12mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_12mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_20mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_20mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_30mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_30mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_40mm_Copper +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +KiCad-Logo_40mm_SilkScreen +KiCad Logo +Logo KiCad +0 +0 +0 +Symbol +OSHW-Logo2_7.3x6mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_7.3x6mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_9.8x8mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_9.8x8mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_14.6x12mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_14.6x12mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_24.3x20mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_24.3x20mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_36.5x30mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_36.5x30mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_48.7x40mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo2_48.7x40mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Logo_5.7x6mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_5.7x6mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_7.5x8mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_7.5x8mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_11.4x12mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_11.4x12mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_19x20mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_19x20mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_28.5x30mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_28.5x30mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_38.1x40mm_Copper +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Logo_38.1x40mm_SilkScreen +Open Source Hardware Logo +Logo OSHW +0 +0 +0 +Symbol +OSHW-Symbol_6.7x6mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_6.7x6mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_8.9x8mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_8.9x8mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_13.4x12mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_13.4x12mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_22.3x20mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_22.3x20mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_33.5x30mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_33.5x30mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_44.5x40mm_Copper +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +OSHW-Symbol_44.5x40mm_SilkScreen +Open Source Hardware Symbol +Logo Symbol OSHW +0 +0 +0 +Symbol +Polarity_Center_Negative_6mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_8mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_12mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_20mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_30mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Negative_40mm_SilkScreen +Polarity Logo, Center Negative +Logo Polarity Center Negative +0 +0 +0 +Symbol +Polarity_Center_Positive_6mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_8mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_12mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_20mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_30mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +Polarity_Center_Positive_40mm_SilkScreen +Polarity Logo, Center Positive +Logo Polarity Center Positive +0 +0 +0 +Symbol +RoHS-Logo_6mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_8mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_12mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_20mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_30mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +RoHS-Logo_40mm_SilkScreen +Restriction of Hazardous Substances Directive Logo +Logo RoHS +0 +0 +0 +Symbol +Symbol_Attention_CopperTop_Big +Symbol, Attention, Copper Top, Big, +Symbol, Attention, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_Attention_CopperTop_Small +Symbol, Attention, Copper Top, Small, +Symbol, Attention, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_Barrel_Polarity +Barrel connector polarity indicator +barrel polarity +0 +0 +0 +Symbol +Symbol_CC-Attribution_CopperTop_Big +Symbol, CC-Attribution, Copper Top, Big, +Symbol, CC-Attribution, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-Attribution_CopperTop_Small +Symbol, CC-Share Alike, Copper Top, Small, +Symbol, CC-Share Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-Noncommercial_CopperTop_Big +Symbol, CC-Noncommercial, Copper Top, Big, +Symbol, CC-Noncommercial, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-Noncommercial_CopperTop_Small +Symbol, CC-Noncommercial Alike, Copper Top, Small, +Symbol, CC-Noncommercial Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_CopperTop_Big +Symbol, CC-PublicDomain, Copper Top, Big, +Symbol, CC-PublicDomain, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_CopperTop_Small +Symbol, CC-Public Domain, Copper Top, Small, +Symbol, CC-Public Domain, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CC-PublicDomain_SilkScreenTop_Big +Symbol, CC-PublicDomain, SilkScreen Top, Big, +Symbol, CC-PublicDomain, SilkScreen Top, Big, +0 +0 +0 +Symbol +Symbol_CC-ShareAlike_CopperTop_Big +Symbol, CC-Share Alike, Copper Top, Big, +Symbol, CC-Share Alike, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_CC-ShareAlike_CopperTop_Small +Symbol, CC-Share Alike, Copper Top, Small, +Symbol, CC-Share Alike, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommonsPublicDomain_CopperTop_Small +Symbol, Creative Commons Public Domain, CopperTop, Small, +Symbol, Creative Commons Public Domain, CopperTop, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommonsPublicDomain_SilkScreenTop_Small +Symbol, Creative Commons Public Domain, SilkScreenTop, Small, +Symbol, Creative Commons Public Domain, SilkScreen Top, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type1_Big +Symbol, Creative Commons, CopperTop, Type 1, Big, +Symbol, Creative Commons, CopperTop, Type 1, Big, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type2_Big +Symbol, Creative Commons, CopperTop, Type 2, Big, +Symbol, Creative Commons, CopperTop, Type 2, Big, +0 +0 +0 +Symbol +Symbol_CreativeCommons_CopperTop_Type2_Small +Symbol, Creative Commons, CopperTop, Type 2, Small, +Symbol, Creative Commons, CopperTop, Type 2, Small, +0 +0 +0 +Symbol +Symbol_CreativeCommons_SilkScreenTop_Type2_Big +Symbol, Creative Commons, SilkScreen Top, Type 2, Big, +Symbol, Creative Commons, SilkScreen Top, Type 2, Big, +0 +0 +0 +Symbol +Symbol_Danger_CopperTop_Big +Symbol, Danger, CopperTop, Big, +Symbol, Danger, CopperTop, Big, +0 +0 +0 +Symbol +Symbol_Danger_CopperTop_Small +Symbol, Danger, Copper Top, Small, +Symbol, Danger, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_ESD-Logo-Text_CopperTop + + +0 +0 +0 +Symbol +Symbol_ESD-Logo_CopperTop +ESD-Logo, similar JEDEC-14, without text, ohne Text, Copper Top, +ESD-Logo, similar JEDEC-14, without text, ohne Text, Copper Top, +0 +0 +0 +Symbol +Symbol_GNU-GPL_CopperTop_Big +Symbol, GNU-GPL, Copper Top, Big, +Symbol, GNU-GPL, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_GNU-GPL_CopperTop_Small +Symbol, GNU-GPL, Copper Top, Small, +Symbol, GNU-GPL, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_GNU-Logo_CopperTop +GNU-Logo, GNU-Head, GNU-Kopf, Copper Top, +GNU-Logo, GNU-Head, GNU-Kopf, Copper Top, +0 +0 +0 +Symbol +Symbol_GNU-Logo_SilkscreenTop +GNU-Logo, GNU-Head, GNU-Kopf, Silkscreen, +GNU-Logo, GNU-Head, GNU-Kopf, Silkscreen, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type1_CopperTop_Big +Symbol, HighVoltage, Type1, Copper Top, Big, +Symbol, HighVoltage, Type1, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type2_CopperTop_Big +Symbol, HighVoltage, Type2, Copper Top, Big, +Symbol, HighVoltage, Type2, Copper Top, Big, +0 +0 +0 +Symbol +Symbol_HighVoltage_Type2_CopperTop_VerySmall +Symbol, High Voltage, Type 2, Copper Top, Very Small, +Symbol, High Voltage, Type 2, Copper Top, Very Small, +0 +0 +0 +Symbol +Symbol_Highvoltage_Type1_CopperTop_Small +Symbol, Highvoltage, Type 1, Copper Top, Small, +Symbol, Highvoltage, Type 1, Copper Top, Small, +0 +0 +0 +Symbol +Symbol_Highvoltage_Type2_CopperTop_Small +Symbol, Highvoltage, Type 2, Copper Top, Small, +Symbol, Highvoltage, Type 2, Copper Top, Small, +0 +0 +0 +Symbol +WEEE-Logo_4.2x6mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_5.6x8mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_8.4x12mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_14x20mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_21x30mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +Symbol +WEEE-Logo_28.1x40mm_SilkScreen +Waste Electrical and Electronic Equipment Directive +Logo WEEE +0 +0 +0 +TerminalBlock +TerminalBlock_Altech_AK300-2_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +2 +2 +TerminalBlock +TerminalBlock_Altech_AK300-3_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +3 +3 +TerminalBlock +TerminalBlock_Altech_AK300-4_P5.00mm +Altech AK300 terminal block, pitch 5.0mm, 45 degree angled, see http://www.mouser.com/ds/2/16/PCBMETRC-24178.pdf +Altech AK300 terminal block pitch 5.0mm +0 +4 +4 +TerminalBlock +TerminalBlock_Wuerth_691311400102_P7.62mm +https://katalog.we-online.de/em/datasheet/6913114001xx.pdf +Wuerth WR-TBL Series 3114 terminal block pitch 7.62mm +0 +2 +2 +TerminalBlock +TerminalBlock_bornier-2_P5.08mm +simple 2-pin terminal block, pitch 5.08mm, revamped version of bornier2 +terminal block bornier2 +0 +2 +2 +TerminalBlock +TerminalBlock_bornier-3_P5.08mm +simple 3-pin terminal block, pitch 5.08mm, revamped version of bornier3 +terminal block bornier3 +0 +3 +3 +TerminalBlock +TerminalBlock_bornier-4_P5.08mm +simple 4-pin terminal block, pitch 5.08mm, revamped version of bornier4 +terminal block bornier4 +0 +4 +4 +TerminalBlock +TerminalBlock_bornier-5_P5.08mm +simple 5-pin terminal block, pitch 5.08mm, revamped version of bornier5 +terminal block bornier5 +0 +5 +5 +TerminalBlock +TerminalBlock_bornier-6_P5.08mm +simple 6pin terminal block, pitch 5.08mm, revamped version of bornier6 +terminal block bornier6 +0 +6 +6 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x02_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19963, 2 pins, pitch 3.5mm, size 7.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19963.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19963 pitch 3.5mm size 7.7x7mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x02_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10693, vertical (cable from top), 2 pins, pitch 3.5mm, size 8x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10693.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10693 vertical pitch 3.5mm size 8x8.3mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x03_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20193, 3 pins, pitch 3.5mm, size 11.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20193.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20193 pitch 3.5mm size 11.2x7mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x03_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10694, vertical (cable from top), 3 pins, pitch 3.5mm, size 11.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10694.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10694 vertical pitch 3.5mm size 11.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x04_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20001, 4 pins, pitch 3.5mm, size 14.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20001.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20001 pitch 3.5mm size 14.7x7mm^2 drill 1.2mm pad 2.4mm +0 +4 +4 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x04_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10695, vertical (cable from top), 4 pins, pitch 3.5mm, size 15x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10695.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10695 vertical pitch 3.5mm size 15x8.3mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x05_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 20223, 5 pins, pitch 3.5mm, size 18.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/20223.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 20223 pitch 3.5mm size 18.2x7mm^2 drill 1.2mm pad 2.4mm +0 +5 +5 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x05_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10696, vertical (cable from top), 5 pins, pitch 3.5mm, size 18.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10696.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10696 vertical pitch 3.5mm size 18.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x06_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19964, 6 pins, pitch 3.5mm, size 21.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19964.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19964 pitch 3.5mm size 21.7x7mm^2 drill 1.2mm pad 2.4mm +0 +6 +6 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x06_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10697, vertical (cable from top), 6 pins, pitch 3.5mm, size 22x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10697.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10697 vertical pitch 3.5mm size 22x8.3mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x07_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10684, 7 pins, pitch 3.5mm, size 25.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10684.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10684 pitch 3.5mm size 25.2x7mm^2 drill 1.2mm pad 2.4mm +0 +7 +7 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x07_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10698, vertical (cable from top), 7 pins, pitch 3.5mm, size 25.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10698.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10698 vertical pitch 3.5mm size 25.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x08_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 19965, 8 pins, pitch 3.5mm, size 28.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/19965.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 19965 pitch 3.5mm size 28.7x7mm^2 drill 1.2mm pad 2.4mm +0 +8 +8 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x08_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10699, vertical (cable from top), 8 pins, pitch 3.5mm, size 29x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10699.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10699 vertical pitch 3.5mm size 29x8.3mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x09_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10686, 9 pins, pitch 3.5mm, size 32.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10686.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10686 pitch 3.5mm size 32.2x7mm^2 drill 1.2mm pad 2.4mm +0 +9 +9 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x09_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10700, vertical (cable from top), 9 pins, pitch 3.5mm, size 32.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10700.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10700 vertical pitch 3.5mm size 32.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x10_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10687, 10 pins, pitch 3.5mm, size 35.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10687.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10687 pitch 3.5mm size 35.7x7mm^2 drill 1.2mm pad 2.4mm +0 +10 +10 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x10_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10701, vertical (cable from top), 10 pins, pitch 3.5mm, size 36x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10701.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10701 vertical pitch 3.5mm size 36x8.3mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x11_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10688, 11 pins, pitch 3.5mm, size 39.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10688.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10688 pitch 3.5mm size 39.2x7mm^2 drill 1.2mm pad 2.4mm +0 +11 +11 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x11_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10702, vertical (cable from top), 11 pins, pitch 3.5mm, size 39.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10702.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10702 vertical pitch 3.5mm size 39.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x12_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10689, 12 pins, pitch 3.5mm, size 42.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10689.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10689 pitch 3.5mm size 42.7x7mm^2 drill 1.2mm pad 2.4mm +0 +12 +12 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x12_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10703, vertical (cable from top), 12 pins, pitch 3.5mm, size 43x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10703.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10703 vertical pitch 3.5mm size 43x8.3mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x13_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10690, 13 pins, pitch 3.5mm, size 46.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10690.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10690 pitch 3.5mm size 46.2x7mm^2 drill 1.2mm pad 2.4mm +0 +13 +13 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x13_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10704, vertical (cable from top), 13 pins, pitch 3.5mm, size 46.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10704.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10704 vertical pitch 3.5mm size 46.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x14_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10691, 14 pins, pitch 3.5mm, size 49.7x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10691.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10691 pitch 3.5mm size 49.7x7mm^2 drill 1.2mm pad 2.4mm +0 +14 +14 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x14_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10705, vertical (cable from top), 14 pins, pitch 3.5mm, size 50x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10705.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10705 vertical pitch 3.5mm size 50x8.3mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x15_P3.50mm_Horizontal +Terminal Block 4Ucon ItemNo. 10692, 15 pins, pitch 3.5mm, size 53.2x7mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.4uconnector.com/online/object/4udrawing/10692.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10692 pitch 3.5mm size 53.2x7mm^2 drill 1.2mm pad 2.4mm +0 +15 +15 +TerminalBlock_4Ucon +TerminalBlock_4Ucon_1x15_P3.50mm_Vertical +Terminal Block 4Ucon ItemNo. 10706, vertical (cable from top), 15 pins, pitch 3.5mm, size 53.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.4uconnector.com/online/object/4udrawing/10706.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_4Ucon +THT Terminal Block 4Ucon ItemNo. 10706 vertical pitch 3.5mm size 53.5x8.3mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Altech +Altech_AK300_1x02_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +2 +2 +TerminalBlock_Altech +Altech_AK300_1x03_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +3 +3 +TerminalBlock_Altech +Altech_AK300_1x04_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +4 +4 +TerminalBlock_Altech +Altech_AK300_1x05_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +5 +5 +TerminalBlock_Altech +Altech_AK300_1x06_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +6 +6 +TerminalBlock_Altech +Altech_AK300_1x07_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +7 +7 +TerminalBlock_Altech +Altech_AK300_1x08_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +8 +8 +TerminalBlock_Altech +Altech_AK300_1x09_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +9 +9 +TerminalBlock_Altech +Altech_AK300_1x10_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +10 +10 +TerminalBlock_Altech +Altech_AK300_1x11_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +11 +11 +TerminalBlock_Altech +Altech_AK300_1x12_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +12 +12 +TerminalBlock_Altech +Altech_AK300_1x13_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +13 +13 +TerminalBlock_Altech +Altech_AK300_1x14_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +14 +14 +TerminalBlock_Altech +Altech_AK300_1x15_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +15 +15 +TerminalBlock_Altech +Altech_AK300_1x16_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +16 +16 +TerminalBlock_Altech +Altech_AK300_1x17_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +17 +17 +TerminalBlock_Altech +Altech_AK300_1x18_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +18 +18 +TerminalBlock_Altech +Altech_AK300_1x19_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +19 +19 +TerminalBlock_Altech +Altech_AK300_1x20_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +20 +20 +TerminalBlock_Altech +Altech_AK300_1x21_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +21 +21 +TerminalBlock_Altech +Altech_AK300_1x22_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +22 +22 +TerminalBlock_Altech +Altech_AK300_1x23_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +23 +23 +TerminalBlock_Altech +Altech_AK300_1x24_P5.00mm_45-Degree +Altech AK300 serie terminal block (Script generated with StandardBox.py) (http://www.altechcorp.com/PDFS/PCBMETRC.PDF) +Altech AK300 serie connector +0 +24 +24 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-02_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +2 +2 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-03_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +3 +3 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-04_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +4 +4 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-05_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +5 +5 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-06_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +6 +6 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-07_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +7 +7 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-08_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +8 +8 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-09_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +9 +9 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-10_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +10 +10 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-11_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +11 +11 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-12_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +12 +12 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-13_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +13 +13 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-14_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +14 +14 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-15_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +15 +15 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-16_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +16 +16 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-17_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +17 +17 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-18_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +18 +18 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-19_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +19 +19 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-20_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +20 +20 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-21_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +21 +21 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-22_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +22 +22 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-23_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +23 +23 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-24_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +24 +24 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-25_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +25 +25 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-26_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +26 +26 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-27_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +27 +27 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-28_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +28 +28 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-29_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +29 +29 +TerminalBlock_Dinkle +TerminalBlock_Dinkle_DT-55-B01X-30_P10.00mm +Dinkle DT-55-B01X Terminal Block pitch 10.00mm https://www.dinkle.com/en/terminal/DT-55-B01W-XX +Dinkle DT-55-B01X Terminal Block pitch 10.00mm +0 +30 +30 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360271_1x01_Horizontal_ScrewM3.0_Boxed +single screw terminal block Metz Connect 360271, block size 9x7.3mm^2, drill diamater 1.5mm, 1 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 134, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360271 size 9x7.3mm^2 drill 1.5mm pad 3mm +0 +1 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360272_1x01_Horizontal_ScrewM2.6 +single screw terminal block Metz Connect 360272, block size 4x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 131, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360272 size 4x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360273_1x01_Horizontal_ScrewM2.6_WireProtection +single screw terminal block Metz Connect 360273, block size 5x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 131, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360273 size 5x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360291_1x01_Horizontal_ScrewM3.0_Boxed +single screw terminal block Metz Connect 360291, block size 9x7.3mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360291 size 9x7.3mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360322_1x01_Horizontal_ScrewM3.0_WireProtection +single screw terminal block Metz Connect 360322, block size 6x4mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360322 size 6x4mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360381_1x01_Horizontal_ScrewM3.0 +single screw terminal block Metz Connect 360381, block size 5x5mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 133, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360381 size 5x5mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360410_1x01_Horizontal_ScrewM3.0 +single screw terminal block Metz Connect 360410, block size 5x5mm^2, drill diamater 1.5mm, 2 pads, pad diameter 3mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 132, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360410 size 5x5mm^2 drill 1.5mm pad 3mm +0 +2 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_360425_1x01_Horizontal_ScrewM4.0_Boxed +single screw terminal block Metz Connect 360425, block size 9x9mm^2, drill diamater 1.6mm, 4 pads, pad diameter 3.2mm, see http://www.metz-connect.com/de/system/files/METZ_CONNECT_U_Contact_Katalog_Anschlusssysteme_fuer_Leiterplatten_DE_31_07_2017_OFF_024803.pdf?language=en page 134, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT single screw terminal block Metz Connect 360425 size 9x9mm^2 drill 1.6mm pad 3.2mm +0 +4 +1 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05502HBWC_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05502HBWC, 2 pins, pitch 5mm, size 10x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05502HBWC pitch 5mm size 10x10.5mm^2 drill 1.4mm pad 2.8mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05503HBWC_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05503HBWC, 3 pins, pitch 5mm, size 15x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05503HBWC pitch 5mm size 15x10.5mm^2 drill 1.4mm pad 2.8mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05504HBWC_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05504HBWC, 4 pins, pitch 5mm, size 20x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05504HBWC pitch 5mm size 20x10.5mm^2 drill 1.4mm pad 2.8mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05505HBWC_1x05_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05505HBWC, 5 pins, pitch 5mm, size 25x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05505HBWC pitch 5mm size 25x10.5mm^2 drill 1.4mm pad 2.8mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type011_RT05506HBWC_1x06_P5.00mm_Horizontal +terminal block Metz Connect Type011_RT05506HBWC, 6 pins, pitch 5mm, size 30x10.5mm^2, drill diamater 1.4mm, pad diameter 2.8mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310111_RT055xxHBLC_OFF-022717S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type011_RT05506HBWC pitch 5mm size 30x10.5mm^2 drill 1.4mm pad 2.8mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01502HDWU_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01502HDWU, 2 pins, pitch 5mm, size 10x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01502HDWU pitch 5mm size 10x8mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01503HDWU_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01503HDWU, 3 pins, pitch 5mm, size 15x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01503HDWU pitch 5mm size 15x8mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type055_RT01504HDWU_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type055_RT01504HDWU, 4 pins, pitch 5mm, size 20x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310551_RT015xxHDWU_OFF-022723S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type055_RT01504HDWU pitch 5mm size 20x8mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06302HBWC_1x02_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06302HBWC, 2 pins, pitch 3.5mm, size 7x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06302HBWC pitch 3.5mm size 7x6.5mm^2 drill 1.2mm pad 2.3mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06303HBWC_1x03_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06303HBWC, 3 pins, pitch 3.5mm, size 10.5x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06303HBWC pitch 3.5mm size 10.5x6.5mm^2 drill 1.2mm pad 2.3mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06304HBWC_1x04_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06304HBWC, 4 pins, pitch 3.5mm, size 14x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06304HBWC pitch 3.5mm size 14x6.5mm^2 drill 1.2mm pad 2.3mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06305HBWC_1x05_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06305HBWC, 5 pins, pitch 3.5mm, size 17.5x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06305HBWC pitch 3.5mm size 17.5x6.5mm^2 drill 1.2mm pad 2.3mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type059_RT06306HBWC_1x06_P3.50mm_Horizontal +terminal block Metz Connect Type059_RT06306HBWC, 6 pins, pitch 3.5mm, size 21x6.5mm^2, drill diamater 1.2mm, pad diameter 2.3mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310591_RT063xxHBWC_OFF-022684T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type059_RT06306HBWC pitch 3.5mm size 21x6.5mm^2 drill 1.2mm pad 2.3mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01902HDWC_1x02_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01902HDWC, 2 pins, pitch 10mm, size 15.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01902HDWC pitch 10mm size 15.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01903HDWC_1x03_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01903HDWC, 3 pins, pitch 10mm, size 25.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01903HDWC pitch 10mm size 25.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01904HDWC_1x04_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01904HDWC, 4 pins, pitch 10mm, size 35.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01904HDWC pitch 10mm size 35.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type067_RT01905HDWC_1x05_P10.00mm_Horizontal +terminal block Metz Connect Type067_RT01905HDWC, 5 pins, pitch 10mm, size 45.8x8.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310671_RT019xxHDWC_OFF-023605N.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type067_RT01905HDWC pitch 10mm size 45.8x8.2mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type073_RT02602HBLU_1x02_P5.08mm_Horizontal +terminal block Metz Connect Type073_RT02602HBLU, 2 pins, pitch 5.08mm, size 10.2x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310731_RT026xxHBLU_OFF-022792U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type073_RT02602HBLU pitch 5.08mm size 10.2x11mm^2 drill 1.4mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type073_RT02603HBLU_1x03_P5.08mm_Horizontal +terminal block Metz Connect Type073_RT02603HBLU, 3 pins, pitch 5.08mm, size 15.2x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310731_RT026xxHBLU_OFF-022792U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type073_RT02603HBLU pitch 5.08mm size 15.2x11mm^2 drill 1.4mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03402HBLC_1x02_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03402HBLC, 2 pins, pitch 3.81mm, size 7.51x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03402HBLC pitch 3.81mm size 7.51x7.3mm^2 drill 0.7mm pad 1.4mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03403HBLC_1x03_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03403HBLC, 3 pins, pitch 3.81mm, size 11.3x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03403HBLC pitch 3.81mm size 11.3x7.3mm^2 drill 0.7mm pad 1.4mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03404HBLC_1x04_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03404HBLC, 4 pins, pitch 3.81mm, size 15.1x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03404HBLC pitch 3.81mm size 15.1x7.3mm^2 drill 0.7mm pad 1.4mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03405HBLC_1x05_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03405HBLC, 5 pins, pitch 3.81mm, size 18.9x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03405HBLC pitch 3.81mm size 18.9x7.3mm^2 drill 0.7mm pad 1.4mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type086_RT03406HBLC_1x06_P3.81mm_Horizontal +terminal block Metz Connect Type086_RT03406HBLC, 6 pins, pitch 3.81mm, size 22.8x7.3mm^2, drill diamater 0.7mm, pad diameter 1.4mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_310861_RT034xxHBLC_OFF-026114K.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type086_RT03406HBLC pitch 3.81mm size 22.8x7.3mm^2 drill 0.7mm pad 1.4mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03502HBLU_1x02_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03502HBLU, 2 pins, pitch 5mm, size 10x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03502HBLU pitch 5mm size 10x8.3mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03503HBLU_1x03_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03503HBLU, 3 pins, pitch 5mm, size 15x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03503HBLU pitch 5mm size 15x8.3mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03504HBLU_1x04_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03504HBLU, 4 pins, pitch 5mm, size 20x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03504HBLU pitch 5mm size 20x8.3mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03505HBLU_1x05_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03505HBLU, 5 pins, pitch 5mm, size 25x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03505HBLU pitch 5mm size 25x8.3mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type094_RT03506HBLU_1x06_P5.00mm_Horizontal +terminal block Metz Connect Type094_RT03506HBLU, 6 pins, pitch 5mm, size 30x8.3mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/ru/system/files/productfiles/Data_sheet_310941_RT035xxHBLU_OFF-022742T.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type094_RT03506HBLU pitch 5mm size 30x8.3mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01602HBWC_1x02_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01602HBWC, 2 pins, pitch 5.08mm, size 10.2x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01602HBWC pitch 5.08mm size 10.2x8mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01603HBWC_1x03_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01603HBWC, 3 pins, pitch 5.08mm, size 15.2x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01603HBWC pitch 5.08mm size 15.2x8mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01604HBWC_1x04_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01604HBWC, 4 pins, pitch 5.08mm, size 20.3x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01604HBWC pitch 5.08mm size 20.3x8mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01605HBWC_1x05_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01605HBWC, 5 pins, pitch 5.08mm, size 25.4x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01605HBWC pitch 5.08mm size 25.4x8mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type101_RT01606HBWC_1x06_P5.08mm_Horizontal +terminal block Metz Connect Type101_RT01606HBWC, 6 pins, pitch 5.08mm, size 30.5x8mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311011_RT016xxHBWC_OFF-022771S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type101_RT01606HBWC pitch 5.08mm size 30.5x8mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13702HBWC_1x02_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13702HBWC, 2 pins, pitch 7.5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13702HBWC pitch 7.5mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13703HBWC_1x03_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13703HBWC, 3 pins, pitch 7.5mm, size 22.5x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13703HBWC pitch 7.5mm size 22.5x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13704HBWC_1x04_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13704HBWC, 4 pins, pitch 7.5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13704HBWC pitch 7.5mm size 30x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13705HBWC_1x05_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13705HBWC, 5 pins, pitch 7.5mm, size 37.5x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13705HBWC pitch 7.5mm size 37.5x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type171_RT13706HBWC_1x06_P7.50mm_Horizontal +terminal block Metz Connect Type171_RT13706HBWC, 6 pins, pitch 7.5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311711_RT137xxHBWC_OFF-022811Q.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type171_RT13706HBWC pitch 7.5mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02702HBLC_1x02_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02702HBLC, 2 pins, pitch 7.5mm, size 15x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02702HBLC pitch 7.5mm size 15x11mm^2 drill 1.4mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02703HBLC_1x03_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02703HBLC, 3 pins, pitch 7.5mm, size 22.5x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02703HBLC pitch 7.5mm size 22.5x11mm^2 drill 1.4mm pad 2.6mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02704HBLC_1x04_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02704HBLC, 4 pins, pitch 7.5mm, size 30x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02704HBLC pitch 7.5mm size 30x11mm^2 drill 1.4mm pad 2.6mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02705HBLC_1x05_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02705HBLC, 5 pins, pitch 7.5mm, size 37.5x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02705HBLC pitch 7.5mm size 37.5x11mm^2 drill 1.4mm pad 2.6mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type175_RT02706HBLC_1x06_P7.50mm_Horizontal +terminal block Metz Connect Type175_RT02706HBLC, 6 pins, pitch 7.5mm, size 45x11mm^2, drill diamater 1.4mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_311751_RT027xxHBLC_OFF-022814U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type175_RT02706HBLC pitch 7.5mm size 45x11mm^2 drill 1.4mm pad 2.6mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04502UBLC_1x02_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04502UBLC, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 10x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04502UBLC 45Degree pitch 5mm size 10x12.5mm^2 drill 1.4mm pad 2.7mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04503UBLC_1x03_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04503UBLC, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 15x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04503UBLC 45Degree pitch 5mm size 15x12.5mm^2 drill 1.4mm pad 2.7mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04504UBLC_1x04_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04504UBLC, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 20x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04504UBLC 45Degree pitch 5mm size 20x12.5mm^2 drill 1.4mm pad 2.7mm +0 +4 +4 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04505UBLC_1x05_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04505UBLC, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 25x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04505UBLC 45Degree pitch 5mm size 25x12.5mm^2 drill 1.4mm pad 2.7mm +0 +5 +5 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type205_RT04506UBLC_1x06_P5.00mm_45Degree +terminal block Metz Connect Type205_RT04506UBLC, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 30x12.5mm^2, drill diamater 1.4mm, pad diameter 2.7mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_312051_RT045xxUBLC_OFF-022759T.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type205_RT04506UBLC 45Degree pitch 5mm size 30x12.5mm^2 drill 1.4mm pad 2.7mm +0 +6 +6 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type701_RT11L02HGLU_1x02_P6.35mm_Horizontal +terminal block Metz Connect Type701_RT11L02HGLU, 2 pins, pitch 6.35mm, size 12.7x12.5mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317011_RT11LxxHGLU_OFF-022798U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type701_RT11L02HGLU pitch 6.35mm size 12.7x12.5mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type701_RT11L03HGLU_1x03_P6.35mm_Horizontal +terminal block Metz Connect Type701_RT11L03HGLU, 3 pins, pitch 6.35mm, size 19x12.5mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317011_RT11LxxHGLU_OFF-022798U.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type701_RT11L03HGLU pitch 6.35mm size 19x12.5mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type703_RT10N02HGLU_1x02_P9.52mm_Horizontal +terminal block Metz Connect Type703_RT10N02HGLU, 2 pins, pitch 9.52mm, size 19x12.5mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317031_RT10NxxHGLU_OFF-022897S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type703_RT10N02HGLU pitch 9.52mm size 19x12.5mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_MetzConnect +TerminalBlock_MetzConnect_Type703_RT10N03HGLU_1x03_P9.52mm_Horizontal +terminal block Metz Connect Type703_RT10N03HGLU, 3 pins, pitch 9.52mm, size 28.6x12.5mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.metz-connect.com/de/system/files/productfiles/Datenblatt_317031_RT10NxxHGLU_OFF-022897S.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_MetzConnect +THT terminal block Metz Connect Type703_RT10N03HGLU pitch 9.52mm size 28.6x12.5mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Philmore +TerminalBlock_Philmore_TB132_1x02_P5.00mm_Horizontal +Terminal Block Philmore , 2 pins, pitch 5mm, size 10x10.2mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.philmore-datak.com/mc/Page%20197.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Philmore +THT Terminal Block Philmore pitch 5mm size 10x10.2mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_Philmore +TerminalBlock_Philmore_TB133_1x03_P5.00mm_Horizontal +Terminal Block Philmore , 3 pins, pitch 5mm, size 15x10.2mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see http://www.philmore-datak.com/mc/Page%20197.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Philmore +THT Terminal Block Philmore pitch 5mm size 15x10.2mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-2-5.08_1x02_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-2-5.08, 2 pins, pitch 5.08mm, size 10.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-2-5.08 pitch 5.08mm size 10.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-2, 2 pins, pitch 5mm, size 10x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-2 pitch 5mm size 10x9.8mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-3-5.08_1x03_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-3-5.08, 3 pins, pitch 5.08mm, size 15.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-3-5.08 pitch 5.08mm size 15.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-3_1x03_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-3, 3 pins, pitch 5mm, size 15x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-3 pitch 5mm size 15x9.8mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-4-5.08_1x04_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-4-5.08, 4 pins, pitch 5.08mm, size 20.3x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-4-5.08 pitch 5.08mm size 20.3x9.8mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-4_1x04_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-4, 4 pins, pitch 5mm, size 20x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-4 pitch 5mm size 20x9.8mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-5-5.08_1x05_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-5-5.08, 5 pins, pitch 5.08mm, size 25.4x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-5-5.08 pitch 5.08mm size 25.4x9.8mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-5_1x05_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-5, 5 pins, pitch 5mm, size 25x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-5 pitch 5mm size 25x9.8mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-6-5.08_1x06_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-6-5.08, 6 pins, pitch 5.08mm, size 30.5x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-6-5.08 pitch 5.08mm size 30.5x9.8mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-6_1x06_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-6, 6 pins, pitch 5mm, size 30x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-6 pitch 5mm size 30x9.8mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-7-5.08_1x07_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-7-5.08, 7 pins, pitch 5.08mm, size 35.6x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-7-5.08 pitch 5.08mm size 35.6x9.8mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-7_1x07_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-7, 7 pins, pitch 5mm, size 35x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-7 pitch 5mm size 35x9.8mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-8-5.08_1x08_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-8-5.08, 8 pins, pitch 5.08mm, size 40.6x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-8-5.08 pitch 5.08mm size 40.6x9.8mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-8_1x08_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-8, 8 pins, pitch 5mm, size 40x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-8 pitch 5mm size 40x9.8mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-9-5.08_1x09_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-9-5.08, 9 pins, pitch 5.08mm, size 45.7x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-9-5.08 pitch 5.08mm size 45.7x9.8mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-9_1x09_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-9, 9 pins, pitch 5mm, size 45x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-9 pitch 5mm size 45x9.8mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-10-5.08_1x10_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-10-5.08, 10 pins, pitch 5.08mm, size 50.8x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-10-5.08 pitch 5.08mm size 50.8x9.8mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-10_1x10_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-10, 10 pins, pitch 5mm, size 50x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-10 pitch 5mm size 50x9.8mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-11-5.08_1x11_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-11-5.08, 11 pins, pitch 5.08mm, size 55.9x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-11-5.08 pitch 5.08mm size 55.9x9.8mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-11_1x11_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-11, 11 pins, pitch 5mm, size 55x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-11 pitch 5mm size 55x9.8mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-12-5.08_1x12_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-12-5.08, 12 pins, pitch 5.08mm, size 61x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-12-5.08 pitch 5.08mm size 61x9.8mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-12_1x12_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-12, 12 pins, pitch 5mm, size 60x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-12 pitch 5mm size 60x9.8mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-13-5.08_1x13_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-13-5.08, 13 pins, pitch 5.08mm, size 66x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-13-5.08 pitch 5.08mm size 66x9.8mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-13_1x13_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-13, 13 pins, pitch 5mm, size 65x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-13 pitch 5mm size 65x9.8mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-14-5.08_1x14_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-14-5.08, 14 pins, pitch 5.08mm, size 71.1x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-14-5.08 pitch 5.08mm size 71.1x9.8mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-14_1x14_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-14, 14 pins, pitch 5mm, size 70x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-14 pitch 5mm size 70x9.8mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-15-5.08_1x15_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-15-5.08, 15 pins, pitch 5.08mm, size 76.2x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-15-5.08 pitch 5.08mm size 76.2x9.8mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-15_1x15_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-15, 15 pins, pitch 5mm, size 75x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-15 pitch 5mm size 75x9.8mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-16-5.08_1x16_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-1,5-16-5.08, 16 pins, pitch 5.08mm, size 81.3x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-16-5.08 pitch 5.08mm size 81.3x9.8mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-1,5-16_1x16_P5.00mm_Horizontal +Terminal Block Phoenix MKDS-1,5-16, 16 pins, pitch 5mm, size 80x9.8mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/100425.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-1,5-16 pitch 5mm size 80x9.8mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-2-5.08_1x02_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-2-5.08, 2 pins, pitch 5.08mm, size 10.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-2-5.08 pitch 5.08mm size 10.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-3-5.08_1x03_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-3-5.08, 3 pins, pitch 5.08mm, size 15.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-3-5.08 pitch 5.08mm size 15.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-4-5.08_1x04_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-4-5.08, 4 pins, pitch 5.08mm, size 20.3x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-4-5.08 pitch 5.08mm size 20.3x11.2mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-5-5.08_1x05_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-5-5.08, 5 pins, pitch 5.08mm, size 25.4x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-5-5.08 pitch 5.08mm size 25.4x11.2mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-6-5.08_1x06_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-6-5.08, 6 pins, pitch 5.08mm, size 30.5x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-6-5.08 pitch 5.08mm size 30.5x11.2mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-7-5.08_1x07_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-7-5.08, 7 pins, pitch 5.08mm, size 35.6x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-7-5.08 pitch 5.08mm size 35.6x11.2mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-8-5.08_1x08_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-8-5.08, 8 pins, pitch 5.08mm, size 40.6x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-8-5.08 pitch 5.08mm size 40.6x11.2mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-9-5.08_1x09_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-9-5.08, 9 pins, pitch 5.08mm, size 45.7x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-9-5.08 pitch 5.08mm size 45.7x11.2mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-10-5.08_1x10_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-10-5.08, 10 pins, pitch 5.08mm, size 50.8x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-10-5.08 pitch 5.08mm size 50.8x11.2mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-11-5.08_1x11_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-11-5.08, 11 pins, pitch 5.08mm, size 55.9x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-11-5.08 pitch 5.08mm size 55.9x11.2mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-12-5.08_1x12_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-12-5.08, 12 pins, pitch 5.08mm, size 61x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-12-5.08 pitch 5.08mm size 61x11.2mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-13-5.08_1x13_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-13-5.08, 13 pins, pitch 5.08mm, size 66x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-13-5.08 pitch 5.08mm size 66x11.2mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-14-5.08_1x14_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-14-5.08, 14 pins, pitch 5.08mm, size 71.1x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-14-5.08 pitch 5.08mm size 71.1x11.2mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-15-5.08_1x15_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-15-5.08, 15 pins, pitch 5.08mm, size 76.2x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-15-5.08 pitch 5.08mm size 76.2x11.2mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MKDS-3-16-5.08_1x16_P5.08mm_Horizontal +Terminal Block Phoenix MKDS-3-16-5.08, 16 pins, pitch 5.08mm, size 81.3x11.2mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.farnell.com/datasheets/2138224.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MKDS-3-16-5.08 pitch 5.08mm size 81.3x11.2mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-2-2.54_1x02_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-2-2.54, 2 pins, pitch 2.54mm, size 5.54x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725656-920552.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-2-2.54 pitch 2.54mm size 5.54x6.2mm^2 drill 1.1mm pad 2.2mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-3-2.54_1x03_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-3-2.54, 3 pins, pitch 2.54mm, size 8.08x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725656-920552.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-3-2.54 pitch 2.54mm size 8.08x6.2mm^2 drill 1.1mm pad 2.2mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-4-2.54_1x04_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-4-2.54, 4 pins, pitch 2.54mm, size 10.6x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-4-2.54 pitch 2.54mm size 10.6x6.2mm^2 drill 1.1mm pad 2.2mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-5-2.54_1x05_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-5-2.54, 5 pins, pitch 2.54mm, size 13.2x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-5-2.54 pitch 2.54mm size 13.2x6.2mm^2 drill 1.1mm pad 2.2mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-6-2.54_1x06_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-6-2.54, 6 pins, pitch 2.54mm, size 15.7x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-6-2.54 pitch 2.54mm size 15.7x6.2mm^2 drill 1.1mm pad 2.2mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-7-2.54_1x07_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-7-2.54, 7 pins, pitch 2.54mm, size 18.2x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-7-2.54 pitch 2.54mm size 18.2x6.2mm^2 drill 1.1mm pad 2.2mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-8-2.54_1x08_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-8-2.54, 8 pins, pitch 2.54mm, size 20.8x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-8-2.54 pitch 2.54mm size 20.8x6.2mm^2 drill 1.1mm pad 2.2mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-9-2.54_1x09_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-9-2.54, 9 pins, pitch 2.54mm, size 23.3x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-9-2.54 pitch 2.54mm size 23.3x6.2mm^2 drill 1.1mm pad 2.2mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-10-2.54_1x10_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-10-2.54, 10 pins, pitch 2.54mm, size 25.9x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-10-2.54 pitch 2.54mm size 25.9x6.2mm^2 drill 1.1mm pad 2.2mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-11-2.54_1x11_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-11-2.54, 11 pins, pitch 2.54mm, size 28.4x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-11-2.54 pitch 2.54mm size 28.4x6.2mm^2 drill 1.1mm pad 2.2mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_MPT-0,5-12-2.54_1x12_P2.54mm_Horizontal +Terminal Block Phoenix MPT-0,5-12-2.54, 12 pins, pitch 2.54mm, size 30.9x6.2mm^2, drill diamater 1.1mm, pad diameter 2.2mm, see http://www.mouser.com/ds/2/324/ItemDetail_1725672-916605.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix MPT-0,5-12-2.54 pitch 2.54mm size 30.9x6.2mm^2 drill 1.1mm pad 2.2mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-2-3.5-H_1x02_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-2-3.5-H, 2 pins, pitch 3.5mm, size 7x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-2-3.5-H pitch 3.5mm size 7x7.6mm^2 drill 1.2mm pad 2.4mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-2-5.0-H_1x02_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-2-5.0-H, 2 pins, pitch 5mm, size 10x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-2-5.0-H pitch 5mm size 10x9mm^2 drill 1.3mm pad 2.6mm +0 +2 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-3-3.5-H_1x03_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-3-3.5-H, 3 pins, pitch 3.5mm, size 10.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-3-3.5-H pitch 3.5mm size 10.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-3-5.0-H_1x03_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-3-5.0-H, 3 pins, pitch 5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-3-5.0-H pitch 5mm size 15x9mm^2 drill 1.3mm pad 2.6mm +0 +3 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-4-3.5-H_1x04_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-4-3.5-H, 4 pins, pitch 3.5mm, size 14x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-4-3.5-H pitch 3.5mm size 14x7.6mm^2 drill 1.2mm pad 2.4mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-4-5.0-H_1x04_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-4-5.0-H, 4 pins, pitch 5mm, size 20x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-4-5.0-H pitch 5mm size 20x9mm^2 drill 1.3mm pad 2.6mm +0 +4 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-5-3.5-H_1x05_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-5-3.5-H, 5 pins, pitch 3.5mm, size 17.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-5-3.5-H pitch 3.5mm size 17.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-5-5.0-H_1x05_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-5-5.0-H, 5 pins, pitch 5mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-5-5.0-H pitch 5mm size 25x9mm^2 drill 1.3mm pad 2.6mm +0 +5 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-6-3.5-H_1x06_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-6-3.5-H, 6 pins, pitch 3.5mm, size 21x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-6-3.5-H pitch 3.5mm size 21x7.6mm^2 drill 1.2mm pad 2.4mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-6-5.0-H_1x06_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-6-5.0-H, 6 pins, pitch 5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-6-5.0-H pitch 5mm size 30x9mm^2 drill 1.3mm pad 2.6mm +0 +6 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-7-3.5-H_1x07_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-7-3.5-H, 7 pins, pitch 3.5mm, size 24.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-7-3.5-H pitch 3.5mm size 24.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-7-5.0-H_1x07_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-7-5.0-H, 7 pins, pitch 5mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-7-5.0-H pitch 5mm size 35x9mm^2 drill 1.3mm pad 2.6mm +0 +7 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-8-3.5-H_1x08_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-8-3.5-H, 8 pins, pitch 3.5mm, size 28x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-8-3.5-H pitch 3.5mm size 28x7.6mm^2 drill 1.2mm pad 2.4mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-8-5.0-H_1x08_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-8-5.0-H, 8 pins, pitch 5mm, size 40x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-8-5.0-H pitch 5mm size 40x9mm^2 drill 1.3mm pad 2.6mm +0 +8 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-9-3.5-H_1x09_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-9-3.5-H, 9 pins, pitch 3.5mm, size 31.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-9-3.5-H pitch 3.5mm size 31.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-9-5.0-H_1x09_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-9-5.0-H, 9 pins, pitch 5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-9-5.0-H pitch 5mm size 45x9mm^2 drill 1.3mm pad 2.6mm +0 +9 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-10-3.5-H_1x10_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-10-3.5-H, 10 pins, pitch 3.5mm, size 35x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-10-3.5-H pitch 3.5mm size 35x7.6mm^2 drill 1.2mm pad 2.4mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-10-5.0-H_1x10_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-10-5.0-H, 10 pins, pitch 5mm, size 50x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-10-5.0-H pitch 5mm size 50x9mm^2 drill 1.3mm pad 2.6mm +0 +10 +10 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-11-3.5-H_1x11_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-11-3.5-H, 11 pins, pitch 3.5mm, size 38.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-11-3.5-H pitch 3.5mm size 38.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-11-5.0-H_1x11_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-11-5.0-H, 11 pins, pitch 5mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-11-5.0-H pitch 5mm size 55x9mm^2 drill 1.3mm pad 2.6mm +0 +11 +11 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-12-3.5-H_1x12_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-12-3.5-H, 12 pins, pitch 3.5mm, size 42x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-12-3.5-H pitch 3.5mm size 42x7.6mm^2 drill 1.2mm pad 2.4mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-12-5.0-H_1x12_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-12-5.0-H, 12 pins, pitch 5mm, size 60x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-12-5.0-H pitch 5mm size 60x9mm^2 drill 1.3mm pad 2.6mm +0 +12 +12 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-13-3.5-H_1x13_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-13-3.5-H, 13 pins, pitch 3.5mm, size 45.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-13-3.5-H pitch 3.5mm size 45.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-13-5.0-H_1x13_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-13-5.0-H, 13 pins, pitch 5mm, size 65x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-13-5.0-H pitch 5mm size 65x9mm^2 drill 1.3mm pad 2.6mm +0 +13 +13 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-14-3.5-H_1x14_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-14-3.5-H, 14 pins, pitch 3.5mm, size 49x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-14-3.5-H pitch 3.5mm size 49x7.6mm^2 drill 1.2mm pad 2.4mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-14-5.0-H_1x14_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-14-5.0-H, 14 pins, pitch 5mm, size 70x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-14-5.0-H pitch 5mm size 70x9mm^2 drill 1.3mm pad 2.6mm +0 +14 +14 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-15-3.5-H_1x15_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-15-3.5-H, 15 pins, pitch 3.5mm, size 52.5x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-15-3.5-H pitch 3.5mm size 52.5x7.6mm^2 drill 1.2mm pad 2.4mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-15-5.0-H_1x15_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-15-5.0-H, 15 pins, pitch 5mm, size 75x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-15-5.0-H pitch 5mm size 75x9mm^2 drill 1.3mm pad 2.6mm +0 +15 +15 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-16-3.5-H_1x16_P3.50mm_Horizontal +Terminal Block Phoenix PT-1,5-16-3.5-H, 16 pins, pitch 3.5mm, size 56x7.6mm^2, drill diamater 1.2mm, pad diameter 2.4mm, see , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-16-3.5-H pitch 3.5mm size 56x7.6mm^2 drill 1.2mm pad 2.4mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PT-1,5-16-5.0-H_1x16_P5.00mm_Horizontal +Terminal Block Phoenix PT-1,5-16-5.0-H, 16 pins, pitch 5mm, size 80x9mm^2, drill diamater 1.3mm, pad diameter 2.6mm, see http://www.mouser.com/ds/2/324/ItemDetail_1935161-922578.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PT-1,5-16-5.0-H pitch 5mm size 80x9mm^2 drill 1.3mm pad 2.6mm +0 +16 +16 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2,5-V-SMD_1x02-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 2 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814702/pdf +PhoenixContact PTSM0.5 2 2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2.5-H-THR_1x02_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-2-2.5-H-THR, 2 pins, pitch 2.5mm, size 7.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-2-2.5-H-THR pitch 2.5mm size 7.2x10mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-2.5-V-THR_1x02_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-2-2.5-V-THR, vertical (cable from top), 2 pins, pitch 2.5mm, size 5.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-2-2.5-V-THR vertical pitch 2.5mm size 5.5x5mm^2 drill 1.2mm pad 2mm +0 +4 +2 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-2-HV-2.5-SMD_1x02-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 2 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778696/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2,5-V-SMD_1x03-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 3 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814715/pdf +PhoenixContact PTSM0.5 3 2.5mm vertical SMD spring clamp terminal block connector +0 +5 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2.5-H-THR_1x03_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-3-2.5-H-THR, 3 pins, pitch 2.5mm, size 9.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-3-2.5-H-THR pitch 2.5mm size 9.7x10mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-2.5-V-THR_1x03_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-3-2.5-V-THR, vertical (cable from top), 3 pins, pitch 2.5mm, size 8x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-3-2.5-V-THR vertical pitch 2.5mm size 8x5mm^2 drill 1.2mm pad 2mm +0 +6 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-3-HV-2.5-SMD_1x03-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 3 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778706/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +5 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2,5-V-SMD_1x04-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 4 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814728/pdf +PhoenixContact PTSM0.5 4 2.5mm vertical SMD spring clamp terminal block connector +0 +6 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2.5-H-THR_1x04_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-4-2.5-H-THR, 4 pins, pitch 2.5mm, size 12.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-4-2.5-H-THR pitch 2.5mm size 12.2x10mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-2.5-V-THR_1x04_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-4-2.5-V-THR, vertical (cable from top), 4 pins, pitch 2.5mm, size 10.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-4-2.5-V-THR vertical pitch 2.5mm size 10.5x5mm^2 drill 1.2mm pad 2mm +0 +8 +4 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-4-HV-2.5-SMD_1x04-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 4 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778719/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +4 +3 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2,5-V-SMD_1x05-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 5 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814731/pdf +PhoenixContact PTSM0.5 5 2.5mm vertical SMD spring clamp terminal block connector +0 +7 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2.5-H-THR_1x05_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-5-2.5-H-THR, 5 pins, pitch 2.5mm, size 14.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-5-2.5-H-THR pitch 2.5mm size 14.7x10mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-2.5-V-THR_1x05_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-5-2.5-V-THR, vertical (cable from top), 5 pins, pitch 2.5mm, size 13x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-5-2.5-V-THR vertical pitch 2.5mm size 13x5mm^2 drill 1.2mm pad 2mm +0 +10 +5 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-5-HV-2.5-SMD_1x05-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 5 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778722/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +7 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2,5-V-SMD_1x06-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 6 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814744/pdf +PhoenixContact PTSM0.5 6 2.5mm vertical SMD spring clamp terminal block connector +0 +8 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2.5-H-THR_1x06_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-6-2.5-H-THR, 6 pins, pitch 2.5mm, size 17.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-6-2.5-H-THR pitch 2.5mm size 17.2x10mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-2.5-V-THR_1x06_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-6-2.5-V-THR, vertical (cable from top), 6 pins, pitch 2.5mm, size 15.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-6-2.5-V-THR vertical pitch 2.5mm size 15.5x5mm^2 drill 1.2mm pad 2mm +0 +12 +6 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-6-HV-2.5-SMD_1x06-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 6 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778735/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +8 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2,5-V-SMD_1x07-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 7 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814757/pdf +PhoenixContact PTSM0.5 7 2.5mm vertical SMD spring clamp terminal block connector +0 +9 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2.5-H-THR_1x07_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-7-2.5-H-THR, 7 pins, pitch 2.5mm, size 19.7x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-7-2.5-H-THR pitch 2.5mm size 19.7x10mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-2.5-V-THR_1x07_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-7-2.5-V-THR, vertical (cable from top), 7 pins, pitch 2.5mm, size 18x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-7-2.5-V-THR vertical pitch 2.5mm size 18x5mm^2 drill 1.2mm pad 2mm +0 +14 +7 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-7-HV-2.5-SMD_1x07-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 7 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778748/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +9 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2,5-V-SMD_1x08-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 8 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1814760/pdf +PhoenixContact PTSM0.5 8 2.5mm vertical SMD spring clamp terminal block connector +0 +10 +9 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2.5-H-THR_1x08_P2.50mm_Horizontal +Terminal Block Phoenix PTSM-0,5-8-2.5-H-THR, 8 pins, pitch 2.5mm, size 22.2x10mm^2, drill diamater 1.2mm, pad diameter 3mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556441-da-01-de-LEITERPLATTENKL__PTSM_0_5__8_2_5_H_THR.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-8-2.5-H-THR pitch 2.5mm size 22.2x10mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-2.5-V-THR_1x08_P2.50mm_Vertical +Terminal Block Phoenix PTSM-0,5-8-2.5-V-THR, vertical (cable from top), 8 pins, pitch 2.5mm, size 20.5x5mm^2, drill diamater 1.2mm, pad diameter 2mm, see http://www.produktinfo.conrad.com/datenblaetter/550000-574999/556444-da-01-de-LEITERPLATTENKL__PTSM_0_5__4_2_5_V_THR.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_Phoenix +THT Terminal Block Phoenix PTSM-0,5-8-2.5-V-THR vertical pitch 2.5mm size 20.5x5mm^2 drill 1.2mm pad 2mm +0 +16 +8 +TerminalBlock_Phoenix +TerminalBlock_Phoenix_PTSM-0,5-8-HV-2.5-SMD_1x08-1MP_P2.50mm_Vertical +PhoenixContact PTSM0,5 8 HV 2,5mm vertical SMD spring clamp terminal block connector http://www.phoenixcontact.com/us/products/1778751/pdf +2.5mm vertical SMD spring clamp terminal block connector +0 +10 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00001_1x02_P5.00mm_Horizontal +terminal block RND 205-00001, 2 pins, pitch 5mm, size 10x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00001 pitch 5mm size 10x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00002_1x03_P5.00mm_Horizontal +terminal block RND 205-00002, 3 pins, pitch 5mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00002 pitch 5mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00003_1x04_P5.00mm_Horizontal +terminal block RND 205-00003, 4 pins, pitch 5mm, size 20x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00003 pitch 5mm size 20x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00004_1x05_P5.00mm_Horizontal +terminal block RND 205-00004, 5 pins, pitch 5mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00004 pitch 5mm size 25x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00005_1x06_P5.00mm_Horizontal +terminal block RND 205-00005, 6 pins, pitch 5mm, size 30x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00005 pitch 5mm size 30x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00006_1x07_P5.00mm_Horizontal +terminal block RND 205-00006, 7 pins, pitch 5mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00006 pitch 5mm size 35x9mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00007_1x08_P5.00mm_Horizontal +terminal block RND 205-00007, 8 pins, pitch 5mm, size 40x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00007 pitch 5mm size 40x9mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00008_1x09_P5.00mm_Horizontal +terminal block RND 205-00008, 9 pins, pitch 5mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00008 pitch 5mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00009_1x10_P5.00mm_Horizontal +terminal block RND 205-00009, 10 pins, pitch 5mm, size 50x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00009 pitch 5mm size 50x9mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00010_1x11_P5.00mm_Horizontal +terminal block RND 205-00010, 11 pins, pitch 5mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00010 pitch 5mm size 55x9mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00011_1x12_P5.00mm_Horizontal +terminal block RND 205-00011, 12 pins, pitch 5mm, size 60x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00001_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00011 pitch 5mm size 60x9mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00012_1x02_P5.00mm_Horizontal +terminal block RND 205-00012, 2 pins, pitch 5mm, size 10x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00012 pitch 5mm size 10x7.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00013_1x03_P5.00mm_Horizontal +terminal block RND 205-00013, 3 pins, pitch 5mm, size 15x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00013 pitch 5mm size 15x7.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00014_1x04_P5.00mm_Horizontal +terminal block RND 205-00014, 4 pins, pitch 5mm, size 20x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00014 pitch 5mm size 20x7.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00015_1x05_P5.00mm_Horizontal +terminal block RND 205-00015, 5 pins, pitch 5mm, size 25x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00015 pitch 5mm size 25x7.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00016_1x06_P5.00mm_Horizontal +terminal block RND 205-00016, 6 pins, pitch 5mm, size 30x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00016 pitch 5mm size 30x7.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00017_1x07_P5.00mm_Horizontal +terminal block RND 205-00017, 7 pins, pitch 5mm, size 35x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00017 pitch 5mm size 35x7.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00018_1x08_P5.00mm_Horizontal +terminal block RND 205-00018, 8 pins, pitch 5mm, size 40x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00018 pitch 5mm size 40x7.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00019_1x09_P5.00mm_Horizontal +terminal block RND 205-00019, 9 pins, pitch 5mm, size 45x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00019 pitch 5mm size 45x7.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00020_1x10_P5.00mm_Horizontal +terminal block RND 205-00020, 10 pins, pitch 5mm, size 50x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00020 pitch 5mm size 50x7.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00021_1x11_P5.00mm_Horizontal +terminal block RND 205-00021, 11 pins, pitch 5mm, size 55x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00021 pitch 5mm size 55x7.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00022_1x12_P5.00mm_Horizontal +terminal block RND 205-00022, 12 pins, pitch 5mm, size 60x7.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00012_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00022 pitch 5mm size 60x7.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00023_1x02_P10.00mm_Horizontal +terminal block RND 205-00023, 2 pins, pitch 10mm, size 15x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00023 pitch 10mm size 15x9mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00024_1x03_P10.00mm_Horizontal +terminal block RND 205-00024, 3 pins, pitch 10mm, size 25x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00024 pitch 10mm size 25x9mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00025_1x04_P10.00mm_Horizontal +terminal block RND 205-00025, 4 pins, pitch 10mm, size 35x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00025 pitch 10mm size 35x9mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00026_1x05_P10.00mm_Horizontal +terminal block RND 205-00026, 5 pins, pitch 10mm, size 45x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00026 pitch 10mm size 45x9mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00027_1x06_P10.00mm_Horizontal +terminal block RND 205-00027, 6 pins, pitch 10mm, size 55x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00027 pitch 10mm size 55x9mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00028_1x07_P10.00mm_Horizontal +terminal block RND 205-00028, 7 pins, pitch 10mm, size 65x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00028 pitch 10mm size 65x9mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00029_1x08_P10.00mm_Horizontal +terminal block RND 205-00029, 8 pins, pitch 10mm, size 75x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00029 pitch 10mm size 75x9mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00030_1x09_P10.00mm_Horizontal +terminal block RND 205-00030, 9 pins, pitch 10mm, size 85x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00030 pitch 10mm size 85x9mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00031_1x10_P10.00mm_Horizontal +terminal block RND 205-00031, 10 pins, pitch 10mm, size 95x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00031 pitch 10mm size 95x9mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00032_1x11_P10.00mm_Horizontal +terminal block RND 205-00032, 11 pins, pitch 10mm, size 105x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00032 pitch 10mm size 105x9mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00033_1x12_P10.00mm_Horizontal +terminal block RND 205-00033, 12 pins, pitch 10mm, size 115x9mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00033 pitch 10mm size 115x9mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00045_1x02_P5.00mm_Horizontal +terminal block RND 205-00045, 2 pins, pitch 5mm, size 10x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00045 pitch 5mm size 10x8.1mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00046_1x03_P5.00mm_Horizontal +terminal block RND 205-00046, 3 pins, pitch 5mm, size 15x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00046 pitch 5mm size 15x8.1mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00047_1x04_P5.00mm_Horizontal +terminal block RND 205-00047, 4 pins, pitch 5mm, size 20x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00047 pitch 5mm size 20x8.1mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00048_1x05_P5.00mm_Horizontal +terminal block RND 205-00048, 5 pins, pitch 5mm, size 25x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00048 pitch 5mm size 25x8.1mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00049_1x06_P5.00mm_Horizontal +terminal block RND 205-00049, 6 pins, pitch 5mm, size 30x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00049 pitch 5mm size 30x8.1mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00050_1x07_P5.00mm_Horizontal +terminal block RND 205-00050, 7 pins, pitch 5mm, size 35x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00050 pitch 5mm size 35x8.1mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00051_1x08_P5.00mm_Horizontal +terminal block RND 205-00051, 8 pins, pitch 5mm, size 40x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00051 pitch 5mm size 40x8.1mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00052_1x09_P5.00mm_Horizontal +terminal block RND 205-00052, 9 pins, pitch 5mm, size 45x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00052 pitch 5mm size 45x8.1mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00053_1x10_P5.00mm_Horizontal +terminal block RND 205-00053, 10 pins, pitch 5mm, size 50x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00053 pitch 5mm size 50x8.1mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00054_1x11_P5.00mm_Horizontal +terminal block RND 205-00054, 11 pins, pitch 5mm, size 55x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00054 pitch 5mm size 55x8.1mm^2 drill 1.1mm pad 2.1mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00055_1x12_P5.00mm_Horizontal +terminal block RND 205-00055, 12 pins, pitch 5mm, size 60x8.1mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00045_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00055 pitch 5mm size 60x8.1mm^2 drill 1.1mm pad 2.1mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00056_1x02_P5.00mm_45Degree +terminal block RND 205-00056, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 10x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00056 45Degree pitch 5mm size 10x12.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00057_1x03_P5.00mm_45Degree +terminal block RND 205-00057, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 15x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00057 45Degree pitch 5mm size 15x12.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00058_1x04_P5.00mm_45Degree +terminal block RND 205-00058, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 20x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00058 45Degree pitch 5mm size 20x12.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00059_1x05_P5.00mm_45Degree +terminal block RND 205-00059, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 25x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00059 45Degree pitch 5mm size 25x12.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00060_1x06_P5.00mm_45Degree +terminal block RND 205-00060, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 30x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00060 45Degree pitch 5mm size 30x12.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00061_1x07_P5.00mm_45Degree +terminal block RND 205-00061, 45Degree (cable under 45degree), 7 pins, pitch 5mm, size 35x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00061 45Degree pitch 5mm size 35x12.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00062_1x08_P5.00mm_45Degree +terminal block RND 205-00062, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 40x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00062 45Degree pitch 5mm size 40x12.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00063_1x09_P5.00mm_45Degree +terminal block RND 205-00063, 45Degree (cable under 45degree), 9 pins, pitch 5mm, size 45x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00063 45Degree pitch 5mm size 45x12.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00064_1x10_P5.00mm_45Degree +terminal block RND 205-00064, 45Degree (cable under 45degree), 10 pins, pitch 5mm, size 50x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00064 45Degree pitch 5mm size 50x12.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00065_1x11_P5.00mm_45Degree +terminal block RND 205-00065, 45Degree (cable under 45degree), 11 pins, pitch 5mm, size 55x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00065 45Degree pitch 5mm size 55x12.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00066_1x12_P5.00mm_45Degree +terminal block RND 205-00066, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 60x12.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00056_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00066 45Degree pitch 5mm size 60x12.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00067_1x02_P7.50mm_Horizontal +terminal block RND 205-00067, 2 pins, pitch 7.5mm, size 15x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00067 pitch 7.5mm size 15x10.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00068_1x03_P7.50mm_Horizontal +terminal block RND 205-00068, 3 pins, pitch 7.5mm, size 22.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00068 pitch 7.5mm size 22.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00069_1x04_P7.50mm_Horizontal +terminal block RND 205-00069, 4 pins, pitch 7.5mm, size 30x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00069 pitch 7.5mm size 30x10.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00070_1x05_P7.50mm_Horizontal +terminal block RND 205-00070, 5 pins, pitch 7.5mm, size 37.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00070 pitch 7.5mm size 37.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00071_1x06_P7.50mm_Horizontal +terminal block RND 205-00071, 6 pins, pitch 7.5mm, size 45x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00071 pitch 7.5mm size 45x10.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00072_1x07_P7.50mm_Horizontal +terminal block RND 205-00072, 7 pins, pitch 7.5mm, size 52.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00072 pitch 7.5mm size 52.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00073_1x08_P7.50mm_Horizontal +terminal block RND 205-00073, 8 pins, pitch 7.5mm, size 60x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00073 pitch 7.5mm size 60x10.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00074_1x09_P7.50mm_Horizontal +terminal block RND 205-00074, 9 pins, pitch 7.5mm, size 67.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00074 pitch 7.5mm size 67.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00075_1x10_P7.50mm_Horizontal +terminal block RND 205-00075, 10 pins, pitch 7.5mm, size 75x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00075 pitch 7.5mm size 75x10.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00076_1x11_P7.50mm_Horizontal +terminal block RND 205-00076, 11 pins, pitch 7.5mm, size 82.5x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00076 pitch 7.5mm size 82.5x10.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00077_1x12_P7.50mm_Horizontal +terminal block RND 205-00077, 12 pins, pitch 7.5mm, size 90x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00067_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00077 pitch 7.5mm size 90x10.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00078_1x02_P10.00mm_Horizontal +terminal block RND 205-00078, 2 pins, pitch 10mm, size 15x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00078 pitch 10mm size 15x10.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00079_1x03_P10.00mm_Horizontal +terminal block RND 205-00079, 3 pins, pitch 10mm, size 25x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00079 pitch 10mm size 25x10.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00080_1x04_P10.00mm_Horizontal +terminal block RND 205-00080, 4 pins, pitch 10mm, size 35x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00080 pitch 10mm size 35x10.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00081_1x05_P10.00mm_Horizontal +terminal block RND 205-00081, 5 pins, pitch 10mm, size 45x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00081 pitch 10mm size 45x10.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00082_1x06_P10.00mm_Horizontal +terminal block RND 205-00082, 6 pins, pitch 10mm, size 55x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00082 pitch 10mm size 55x10.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00083_1x07_P10.00mm_Horizontal +terminal block RND 205-00083, 7 pins, pitch 10mm, size 65x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00083 pitch 10mm size 65x10.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00084_1x08_P10.00mm_Horizontal +terminal block RND 205-00084, 8 pins, pitch 10mm, size 75x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00084 pitch 10mm size 75x10.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00085_1x09_P10.00mm_Horizontal +terminal block RND 205-00085, 9 pins, pitch 10mm, size 85x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00085 pitch 10mm size 85x10.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00086_1x10_P10.00mm_Horizontal +terminal block RND 205-00086, 10 pins, pitch 10mm, size 95x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00086 pitch 10mm size 95x10.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00087_1x11_P10.00mm_Horizontal +terminal block RND 205-00087, 11 pins, pitch 10mm, size 105x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00087 pitch 10mm size 105x10.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00088_1x12_P10.00mm_Horizontal +terminal block RND 205-00088, 12 pins, pitch 10mm, size 115x10.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00078_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00088 pitch 10mm size 115x10.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00232_1x02_P5.08mm_Horizontal +terminal block RND 205-00232, 2 pins, pitch 5.08mm, size 10.2x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00232 pitch 5.08mm size 10.2x8.45mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00233_1x03_P5.08mm_Horizontal +terminal block RND 205-00233, 3 pins, pitch 5.08mm, size 15.2x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00233 pitch 5.08mm size 15.2x8.45mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00234_1x04_P5.08mm_Horizontal +terminal block RND 205-00234, 4 pins, pitch 5.08mm, size 20.3x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00234 pitch 5.08mm size 20.3x8.45mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00235_1x05_P5.08mm_Horizontal +terminal block RND 205-00235, 5 pins, pitch 5.08mm, size 25.4x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00235 pitch 5.08mm size 25.4x8.45mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00236_1x06_P5.08mm_Horizontal +terminal block RND 205-00236, 6 pins, pitch 5.08mm, size 30.5x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00236 pitch 5.08mm size 30.5x8.45mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00237_1x07_P5.08mm_Horizontal +terminal block RND 205-00237, 7 pins, pitch 5.08mm, size 35.6x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00237 pitch 5.08mm size 35.6x8.45mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00238_1x08_P5.08mm_Horizontal +terminal block RND 205-00238, 8 pins, pitch 5.08mm, size 40.6x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00238 pitch 5.08mm size 40.6x8.45mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00239_1x09_P5.08mm_Horizontal +terminal block RND 205-00239, 9 pins, pitch 5.08mm, size 45.7x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00239 pitch 5.08mm size 45.7x8.45mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00240_1x10_P5.08mm_Horizontal +terminal block RND 205-00240, 10 pins, pitch 5.08mm, size 50.8x8.45mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00240 pitch 5.08mm size 50.8x8.45mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00241_1x02_P10.16mm_Horizontal +terminal block RND 205-00241, 2 pins, pitch 10.2mm, size 15.2x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00241 pitch 10.2mm size 15.2x8.3mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00242_1x03_P10.16mm_Horizontal +terminal block RND 205-00242, 3 pins, pitch 10.2mm, size 25.4x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00242 pitch 10.2mm size 25.4x8.3mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00243_1x04_P10.16mm_Horizontal +terminal block RND 205-00243, 4 pins, pitch 10.2mm, size 35.6x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00243 pitch 10.2mm size 35.6x8.3mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00244_1x05_P10.16mm_Horizontal +terminal block RND 205-00244, 5 pins, pitch 10.2mm, size 45.7x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00244 pitch 10.2mm size 45.7x8.3mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00245_1x06_P10.16mm_Horizontal +terminal block RND 205-00245, 6 pins, pitch 10.2mm, size 55.9x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00245 pitch 10.2mm size 55.9x8.3mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00246_1x07_P10.16mm_Horizontal +terminal block RND 205-00246, 7 pins, pitch 10.2mm, size 66x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00246 pitch 10.2mm size 66x8.3mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00247_1x08_P10.16mm_Horizontal +terminal block RND 205-00247, 8 pins, pitch 10.2mm, size 76.2x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00247 pitch 10.2mm size 76.2x8.3mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00248_1x09_P10.16mm_Horizontal +terminal block RND 205-00248, 9 pins, pitch 10.2mm, size 86.4x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00248 pitch 10.2mm size 86.4x8.3mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00249_1x10_P10.16mm_Horizontal +terminal block RND 205-00249, 10 pins, pitch 10.2mm, size 96.5x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00249 pitch 10.2mm size 96.5x8.3mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00250_1x11_P10.16mm_Horizontal +terminal block RND 205-00250, 11 pins, pitch 10.2mm, size 107x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00250 pitch 10.2mm size 107x8.3mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00251_1x12_P10.16mm_Horizontal +terminal block RND 205-00251, 12 pins, pitch 10.2mm, size 117x8.3mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00023_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00251 pitch 10.2mm size 117x8.3mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00276_1x02_P5.00mm_Vertical +terminal block RND 205-00078, vertical (cable from top), 2 pins, pitch 5mm, size 10x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00078 vertical pitch 5mm size 10x10mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00277_1x03_P5.00mm_Vertical +terminal block RND 205-00079, vertical (cable from top), 3 pins, pitch 5mm, size 15x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00079 vertical pitch 5mm size 15x10mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00278_1x04_P5.00mm_Vertical +terminal block RND 205-00080, vertical (cable from top), 4 pins, pitch 5mm, size 20x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00080 vertical pitch 5mm size 20x10mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00279_1x05_P5.00mm_Vertical +terminal block RND 205-00081, vertical (cable from top), 5 pins, pitch 5mm, size 25x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00081 vertical pitch 5mm size 25x10mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00280_1x06_P5.00mm_Vertical +terminal block RND 205-00082, vertical (cable from top), 6 pins, pitch 5mm, size 30x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00082 vertical pitch 5mm size 30x10mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00281_1x07_P5.00mm_Vertical +terminal block RND 205-00083, vertical (cable from top), 7 pins, pitch 5mm, size 35x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00083 vertical pitch 5mm size 35x10mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00282_1x08_P5.00mm_Vertical +terminal block RND 205-00084, vertical (cable from top), 8 pins, pitch 5mm, size 40x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00084 vertical pitch 5mm size 40x10mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00283_1x09_P5.00mm_Vertical +terminal block RND 205-00085, vertical (cable from top), 9 pins, pitch 5mm, size 45x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00085 vertical pitch 5mm size 45x10mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00284_1x10_P5.00mm_Vertical +terminal block RND 205-00086, vertical (cable from top), 10 pins, pitch 5mm, size 50x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00086 vertical pitch 5mm size 50x10mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00285_1x11_P5.00mm_Vertical +terminal block RND 205-00087, vertical (cable from top), 11 pins, pitch 5mm, size 55x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00087 vertical pitch 5mm size 55x10mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00286_1x12_P5.00mm_Vertical +terminal block RND 205-00088, vertical (cable from top), 12 pins, pitch 5mm, size 60x10mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00276_DB_EN.pdf, script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00088 vertical pitch 5mm size 60x10mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00287_1x02_P5.08mm_Horizontal +terminal block RND 205-00287, 2 pins, pitch 5.08mm, size 10.2x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00287 pitch 5.08mm size 10.2x10.6mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00288_1x03_P5.08mm_Horizontal +terminal block RND 205-00288, 3 pins, pitch 5.08mm, size 15.2x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00288 pitch 5.08mm size 15.2x10.6mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00289_1x04_P5.08mm_Horizontal +terminal block RND 205-00289, 4 pins, pitch 5.08mm, size 20.3x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00289 pitch 5.08mm size 20.3x10.6mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00290_1x05_P5.08mm_Horizontal +terminal block RND 205-00290, 5 pins, pitch 5.08mm, size 25.4x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00290 pitch 5.08mm size 25.4x10.6mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00291_1x06_P5.08mm_Horizontal +terminal block RND 205-00291, 6 pins, pitch 5.08mm, size 30.5x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00291 pitch 5.08mm size 30.5x10.6mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00292_1x07_P5.08mm_Horizontal +terminal block RND 205-00292, 7 pins, pitch 5.08mm, size 35.6x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00292 pitch 5.08mm size 35.6x10.6mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00293_1x08_P5.08mm_Horizontal +terminal block RND 205-00293, 8 pins, pitch 5.08mm, size 40.6x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00293 pitch 5.08mm size 40.6x10.6mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00294_1x09_P5.08mm_Horizontal +terminal block RND 205-00294, 9 pins, pitch 5.08mm, size 45.7x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00294 pitch 5.08mm size 45.7x10.6mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00295_1x10_P5.08mm_Horizontal +terminal block RND 205-00295, 10 pins, pitch 5.08mm, size 50.8x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00295 pitch 5.08mm size 50.8x10.6mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00296_1x11_P5.08mm_Horizontal +terminal block RND 205-00296, 11 pins, pitch 5.08mm, size 55.9x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00296 pitch 5.08mm size 55.9x10.6mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00297_1x12_P5.08mm_Horizontal +terminal block RND 205-00297, 12 pins, pitch 5.08mm, size 61x10.6mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00287_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00297 pitch 5.08mm size 61x10.6mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_RND +TerminalBlock_RND_205-00298_1x02_P10.00mm_Horizontal +terminal block RND 205-00298, 2 pins, pitch 10mm, size 15x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00298 pitch 10mm size 15x8.1mm^2 drill 1.3mm pad 2.5mm +0 +2 +2 +TerminalBlock_RND +TerminalBlock_RND_205-00299_1x03_P10.00mm_Horizontal +terminal block RND 205-00299, 3 pins, pitch 10mm, size 25x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00299 pitch 10mm size 25x8.1mm^2 drill 1.3mm pad 2.5mm +0 +3 +3 +TerminalBlock_RND +TerminalBlock_RND_205-00300_1x04_P10.00mm_Horizontal +terminal block RND 205-00300, 4 pins, pitch 10mm, size 35x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00300 pitch 10mm size 35x8.1mm^2 drill 1.3mm pad 2.5mm +0 +4 +4 +TerminalBlock_RND +TerminalBlock_RND_205-00301_1x05_P10.00mm_Horizontal +terminal block RND 205-00301, 5 pins, pitch 10mm, size 45x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00301 pitch 10mm size 45x8.1mm^2 drill 1.3mm pad 2.5mm +0 +5 +5 +TerminalBlock_RND +TerminalBlock_RND_205-00302_1x06_P10.00mm_Horizontal +terminal block RND 205-00302, 6 pins, pitch 10mm, size 55x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00302 pitch 10mm size 55x8.1mm^2 drill 1.3mm pad 2.5mm +0 +6 +6 +TerminalBlock_RND +TerminalBlock_RND_205-00303_1x07_P10.00mm_Horizontal +terminal block RND 205-00303, 7 pins, pitch 10mm, size 65x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00303 pitch 10mm size 65x8.1mm^2 drill 1.3mm pad 2.5mm +0 +7 +7 +TerminalBlock_RND +TerminalBlock_RND_205-00304_1x08_P10.00mm_Horizontal +terminal block RND 205-00304, 8 pins, pitch 10mm, size 75x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00304 pitch 10mm size 75x8.1mm^2 drill 1.3mm pad 2.5mm +0 +8 +8 +TerminalBlock_RND +TerminalBlock_RND_205-00305_1x09_P10.00mm_Horizontal +terminal block RND 205-00305, 9 pins, pitch 10mm, size 85x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00305 pitch 10mm size 85x8.1mm^2 drill 1.3mm pad 2.5mm +0 +9 +9 +TerminalBlock_RND +TerminalBlock_RND_205-00306_1x10_P10.00mm_Horizontal +terminal block RND 205-00306, 10 pins, pitch 10mm, size 95x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00306 pitch 10mm size 95x8.1mm^2 drill 1.3mm pad 2.5mm +0 +10 +10 +TerminalBlock_RND +TerminalBlock_RND_205-00307_1x11_P10.00mm_Horizontal +terminal block RND 205-00307, 11 pins, pitch 10mm, size 105x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00307 pitch 10mm size 105x8.1mm^2 drill 1.3mm pad 2.5mm +0 +11 +11 +TerminalBlock_RND +TerminalBlock_RND_205-00308_1x12_P10.00mm_Horizontal +terminal block RND 205-00308, 12 pins, pitch 10mm, size 115x8.1mm^2, drill diamater 1.3mm, pad diameter 2.5mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00298_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_RND +THT terminal block RND 205-00308 pitch 10mm size 115x8.1mm^2 drill 1.3mm pad 2.5mm +0 +12 +12 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-0_1x10_P2.54mm_Horizontal +Terminal Block TE 1-282834-0, 10 pins, pitch 2.54mm, size 25.86x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-0 pitch 2.54mm size 25.86x6.5mm^2 drill 1.1mm pad 2.1mm +0 +10 +10 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-1_1x11_P2.54mm_Horizontal +Terminal Block TE 1-282834-1, 11 pins, pitch 2.54mm, size 28.4x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-1 pitch 2.54mm size 28.4x6.5mm^2 drill 1.1mm pad 2.1mm +0 +11 +11 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_1-282834-2_1x12_P2.54mm_Horizontal +Terminal Block TE 1-282834-2, 12 pins, pitch 2.54mm, size 30.94x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 1-282834-2 pitch 2.54mm size 30.94x6.5mm^2 drill 1.1mm pad 2.1mm +0 +12 +12 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-2_1x02_P2.54mm_Horizontal +Terminal Block TE 282834-2, 2 pins, pitch 2.54mm, size 5.54x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-2 pitch 2.54mm size 5.54x6.5mm^2 drill 1.1mm pad 2.1mm +0 +2 +2 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-3_1x03_P2.54mm_Horizontal +Terminal Block TE 282834-3, 3 pins, pitch 2.54mm, size 8.08x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-3 pitch 2.54mm size 8.08x6.5mm^2 drill 1.1mm pad 2.1mm +0 +3 +3 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-4_1x04_P2.54mm_Horizontal +Terminal Block TE 282834-4, 4 pins, pitch 2.54mm, size 10.620000000000001x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-4 pitch 2.54mm size 10.620000000000001x6.5mm^2 drill 1.1mm pad 2.1mm +0 +4 +4 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-5_1x05_P2.54mm_Horizontal +Terminal Block TE 282834-5, 5 pins, pitch 2.54mm, size 13.16x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-5 pitch 2.54mm size 13.16x6.5mm^2 drill 1.1mm pad 2.1mm +0 +5 +5 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-6_1x06_P2.54mm_Horizontal +Terminal Block TE 282834-6, 6 pins, pitch 2.54mm, size 15.7x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-6 pitch 2.54mm size 15.7x6.5mm^2 drill 1.1mm pad 2.1mm +0 +6 +6 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-7_1x07_P2.54mm_Horizontal +Terminal Block TE 282834-7, 7 pins, pitch 2.54mm, size 18.240000000000002x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-7 pitch 2.54mm size 18.240000000000002x6.5mm^2 drill 1.1mm pad 2.1mm +0 +7 +7 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-8_1x08_P2.54mm_Horizontal +Terminal Block TE 282834-8, 8 pins, pitch 2.54mm, size 20.78x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-8 pitch 2.54mm size 20.78x6.5mm^2 drill 1.1mm pad 2.1mm +0 +8 +8 +TerminalBlock_TE-Connectivity +TerminalBlock_TE_282834-9_1x09_P2.54mm_Horizontal +Terminal Block TE 282834-9, 9 pins, pitch 2.54mm, size 23.32x6.5mm^2, drill diamater 1.1mm, pad diameter 2.1mm, see http://www.te.com/commerce/DocumentDelivery/DDEController?Action=showdoc&DocId=Customer+Drawing%7F282834%7FC1%7Fpdf%7FEnglish%7FENG_CD_282834_C1.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_TE-Connectivity +THT Terminal Block TE 282834-9 pitch 2.54mm size 23.32x6.5mm^2 drill 1.1mm pad 2.1mm +0 +9 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-101_1x01_P5.00mm_45Degree +Terminal Block WAGO 236-101, 45Degree (cable under 45degree), 1 pins, pitch 5mm, size 7.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-101 45Degree pitch 5mm size 7.3x14mm^2 drill 1.15mm pad 3mm +0 +1 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-102_1x02_P5.00mm_45Degree +Terminal Block WAGO 236-102, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 12.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-102 45Degree pitch 5mm size 12.3x14mm^2 drill 1.15mm pad 3mm +0 +2 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-103_1x03_P5.00mm_45Degree +Terminal Block WAGO 236-103, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 17.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-103 45Degree pitch 5mm size 17.3x14mm^2 drill 1.15mm pad 3mm +0 +3 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-104_1x04_P5.00mm_45Degree +Terminal Block WAGO 236-104, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 22.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-104 45Degree pitch 5mm size 22.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-106_1x06_P5.00mm_45Degree +Terminal Block WAGO 236-106, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-106 45Degree pitch 5mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +6 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-108_1x08_P5.00mm_45Degree +Terminal Block WAGO 236-108, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 42.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-108 45Degree pitch 5mm size 42.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-112_1x12_P5.00mm_45Degree +Terminal Block WAGO 236-112, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-112 45Degree pitch 5mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +12 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-116_1x16_P5.00mm_45Degree +Terminal Block WAGO 236-116, 45Degree (cable under 45degree), 16 pins, pitch 5mm, size 82.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-116 45Degree pitch 5mm size 82.3x14mm^2 drill 1.15mm pad 3mm +0 +16 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-124_1x24_P5.00mm_45Degree +Terminal Block WAGO 236-124, 45Degree (cable under 45degree), 24 pins, pitch 5mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-124 45Degree pitch 5mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +24 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-136_1x36_P5.00mm_45Degree +Terminal Block WAGO 236-136, 45Degree (cable under 45degree), 36 pins, pitch 5mm, size 182x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-136 45Degree pitch 5mm size 182x14mm^2 drill 1.15mm pad 3mm +0 +36 +36 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-148_1x48_P5.00mm_45Degree +Terminal Block WAGO 236-148, 45Degree (cable under 45degree), 48 pins, pitch 5mm, size 242x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-148 45Degree pitch 5mm size 242x14mm^2 drill 1.15mm pad 3mm +0 +48 +48 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-201_1x01_P7.50mm_45Degree +Terminal Block WAGO 236-201, 45Degree (cable under 45degree), 1 pins, pitch 7.5mm, size 9.8x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-201 45Degree pitch 7.5mm size 9.8x14mm^2 drill 1.15mm pad 3mm +0 +1 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-202_1x02_P7.50mm_45Degree +Terminal Block WAGO 236-202, 45Degree (cable under 45degree), 2 pins, pitch 7.5mm, size 17.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-202 45Degree pitch 7.5mm size 17.3x14mm^2 drill 1.15mm pad 3mm +0 +2 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-203_1x03_P7.50mm_45Degree +Terminal Block WAGO 236-203, 45Degree (cable under 45degree), 3 pins, pitch 7.5mm, size 24.8x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-203 45Degree pitch 7.5mm size 24.8x14mm^2 drill 1.15mm pad 3mm +0 +3 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-204_1x04_P7.50mm_45Degree +Terminal Block WAGO 236-204, 45Degree (cable under 45degree), 4 pins, pitch 7.5mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-204 45Degree pitch 7.5mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-206_1x06_P7.50mm_45Degree +Terminal Block WAGO 236-206, 45Degree (cable under 45degree), 6 pins, pitch 7.5mm, size 47.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-206 45Degree pitch 7.5mm size 47.3x14mm^2 drill 1.15mm pad 3mm +0 +6 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-208_1x08_P7.50mm_45Degree +Terminal Block WAGO 236-208, 45Degree (cable under 45degree), 8 pins, pitch 7.5mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-208 45Degree pitch 7.5mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-212_1x12_P7.50mm_45Degree +Terminal Block WAGO 236-212, 45Degree (cable under 45degree), 12 pins, pitch 7.5mm, size 92.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-212 45Degree pitch 7.5mm size 92.3x14mm^2 drill 1.15mm pad 3mm +0 +12 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-216_1x16_P7.50mm_45Degree +Terminal Block WAGO 236-216, 45Degree (cable under 45degree), 16 pins, pitch 7.5mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-216 45Degree pitch 7.5mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +16 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-224_1x24_P7.50mm_45Degree +Terminal Block WAGO 236-224, 45Degree (cable under 45degree), 24 pins, pitch 7.5mm, size 182x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-224 45Degree pitch 7.5mm size 182x14mm^2 drill 1.15mm pad 3mm +0 +24 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-301_1x01_P10.00mm_45Degree +Terminal Block WAGO 236-301, 45Degree (cable under 45degree), 1 pins, pitch 10mm, size 12.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-301 45Degree pitch 10mm size 12.3x14mm^2 drill 1.15mm pad 3mm +0 +1 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-302_1x02_P10.00mm_45Degree +Terminal Block WAGO 236-302, 45Degree (cable under 45degree), 2 pins, pitch 10mm, size 22.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-302 45Degree pitch 10mm size 22.3x14mm^2 drill 1.15mm pad 3mm +0 +2 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-303_1x03_P10.00mm_45Degree +Terminal Block WAGO 236-303, 45Degree (cable under 45degree), 3 pins, pitch 10mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-303 45Degree pitch 10mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +3 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-304_1x04_P10.00mm_45Degree +Terminal Block WAGO 236-304, 45Degree (cable under 45degree), 4 pins, pitch 10mm, size 42.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-304 45Degree pitch 10mm size 42.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-306_1x06_P10.00mm_45Degree +Terminal Block WAGO 236-306, 45Degree (cable under 45degree), 6 pins, pitch 10mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-306 45Degree pitch 10mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +6 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-308_1x08_P10.00mm_45Degree +Terminal Block WAGO 236-308, 45Degree (cable under 45degree), 8 pins, pitch 10mm, size 82.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-308 45Degree pitch 10mm size 82.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-312_1x12_P10.00mm_45Degree +Terminal Block WAGO 236-312, 45Degree (cable under 45degree), 12 pins, pitch 10mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-312 45Degree pitch 10mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +12 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-316_1x16_P10.00mm_45Degree +Terminal Block WAGO 236-316, 45Degree (cable under 45degree), 16 pins, pitch 10mm, size 162x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-316 45Degree pitch 10mm size 162x14mm^2 drill 1.15mm pad 3mm +0 +16 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-324_1x24_P10.00mm_45Degree +Terminal Block WAGO 236-324, 45Degree (cable under 45degree), 24 pins, pitch 10mm, size 242x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-324 45Degree pitch 10mm size 242x14mm^2 drill 1.15mm pad 3mm +0 +24 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-401_1x01_P5.00mm_45Degree +Terminal Block WAGO 236-401, 45Degree (cable under 45degree), 1 pins, pitch 5mm, size 7.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-401 45Degree pitch 5mm size 7.3x14mm^2 drill 1.15mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-402_1x02_P5.00mm_45Degree +Terminal Block WAGO 236-402, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 12.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-402 45Degree pitch 5mm size 12.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-403_1x03_P5.00mm_45Degree +Terminal Block WAGO 236-403, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 17.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-403 45Degree pitch 5mm size 17.3x14mm^2 drill 1.15mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-404_1x04_P5.00mm_45Degree +Terminal Block WAGO 236-404, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 22.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-404 45Degree pitch 5mm size 22.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-406_1x06_P5.00mm_45Degree +Terminal Block WAGO 236-406, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-406 45Degree pitch 5mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-408_1x08_P5.00mm_45Degree +Terminal Block WAGO 236-408, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 42.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-408 45Degree pitch 5mm size 42.3x14mm^2 drill 1.15mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-412_1x12_P5.00mm_45Degree +Terminal Block WAGO 236-412, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-412 45Degree pitch 5mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-416_1x16_P5.00mm_45Degree +Terminal Block WAGO 236-416, 45Degree (cable under 45degree), 16 pins, pitch 5mm, size 82.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-416 45Degree pitch 5mm size 82.3x14mm^2 drill 1.15mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-424_1x24_P5.00mm_45Degree +Terminal Block WAGO 236-424, 45Degree (cable under 45degree), 24 pins, pitch 5mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-424 45Degree pitch 5mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-436_1x36_P5.00mm_45Degree +Terminal Block WAGO 236-436, 45Degree (cable under 45degree), 36 pins, pitch 5mm, size 182x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-436 45Degree pitch 5mm size 182x14mm^2 drill 1.15mm pad 3mm +0 +72 +36 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-448_1x48_P5.00mm_45Degree +Terminal Block WAGO 236-448, 45Degree (cable under 45degree), 48 pins, pitch 5mm, size 242x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-448 45Degree pitch 5mm size 242x14mm^2 drill 1.15mm pad 3mm +0 +96 +48 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-501_1x01_P7.50mm_45Degree +Terminal Block WAGO 236-501, 45Degree (cable under 45degree), 1 pins, pitch 7.5mm, size 9.8x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-501 45Degree pitch 7.5mm size 9.8x14mm^2 drill 1.15mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-502_1x02_P7.50mm_45Degree +Terminal Block WAGO 236-502, 45Degree (cable under 45degree), 2 pins, pitch 7.5mm, size 17.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-502 45Degree pitch 7.5mm size 17.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-503_1x03_P7.50mm_45Degree +Terminal Block WAGO 236-503, 45Degree (cable under 45degree), 3 pins, pitch 7.5mm, size 24.8x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-503 45Degree pitch 7.5mm size 24.8x14mm^2 drill 1.15mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-504_1x04_P7.50mm_45Degree +Terminal Block WAGO 236-504, 45Degree (cable under 45degree), 4 pins, pitch 7.5mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-504 45Degree pitch 7.5mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-506_1x06_P7.50mm_45Degree +Terminal Block WAGO 236-506, 45Degree (cable under 45degree), 6 pins, pitch 7.5mm, size 47.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-506 45Degree pitch 7.5mm size 47.3x14mm^2 drill 1.15mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-508_1x08_P7.50mm_45Degree +Terminal Block WAGO 236-508, 45Degree (cable under 45degree), 8 pins, pitch 7.5mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-508 45Degree pitch 7.5mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-512_1x12_P7.50mm_45Degree +Terminal Block WAGO 236-512, 45Degree (cable under 45degree), 12 pins, pitch 7.5mm, size 92.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-512 45Degree pitch 7.5mm size 92.3x14mm^2 drill 1.15mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-516_1x16_P7.50mm_45Degree +Terminal Block WAGO 236-516, 45Degree (cable under 45degree), 16 pins, pitch 7.5mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-516 45Degree pitch 7.5mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-524_1x24_P7.50mm_45Degree +Terminal Block WAGO 236-524, 45Degree (cable under 45degree), 24 pins, pitch 7.5mm, size 182x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-524 45Degree pitch 7.5mm size 182x14mm^2 drill 1.15mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-601_1x01_P10.00mm_45Degree +Terminal Block WAGO 236-601, 45Degree (cable under 45degree), 1 pins, pitch 10mm, size 12.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-601 45Degree pitch 10mm size 12.3x14mm^2 drill 1.15mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-602_1x02_P10.00mm_45Degree +Terminal Block WAGO 236-602, 45Degree (cable under 45degree), 2 pins, pitch 10mm, size 22.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-602 45Degree pitch 10mm size 22.3x14mm^2 drill 1.15mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-603_1x03_P10.00mm_45Degree +Terminal Block WAGO 236-603, 45Degree (cable under 45degree), 3 pins, pitch 10mm, size 32.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-603 45Degree pitch 10mm size 32.3x14mm^2 drill 1.15mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-604_1x04_P10.00mm_45Degree +Terminal Block WAGO 236-604, 45Degree (cable under 45degree), 4 pins, pitch 10mm, size 42.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-604 45Degree pitch 10mm size 42.3x14mm^2 drill 1.15mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-606_1x06_P10.00mm_45Degree +Terminal Block WAGO 236-606, 45Degree (cable under 45degree), 6 pins, pitch 10mm, size 62.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-606 45Degree pitch 10mm size 62.3x14mm^2 drill 1.15mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-608_1x08_P10.00mm_45Degree +Terminal Block WAGO 236-608, 45Degree (cable under 45degree), 8 pins, pitch 10mm, size 82.3x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-608 45Degree pitch 10mm size 82.3x14mm^2 drill 1.15mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-612_1x12_P10.00mm_45Degree +Terminal Block WAGO 236-612, 45Degree (cable under 45degree), 12 pins, pitch 10mm, size 122x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-612 45Degree pitch 10mm size 122x14mm^2 drill 1.15mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-616_1x16_P10.00mm_45Degree +Terminal Block WAGO 236-616, 45Degree (cable under 45degree), 16 pins, pitch 10mm, size 162x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-616 45Degree pitch 10mm size 162x14mm^2 drill 1.15mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_236-624_1x24_P10.00mm_45Degree +Terminal Block WAGO 236-624, 45Degree (cable under 45degree), 24 pins, pitch 10mm, size 242x14mm^2, drill diamater 1.15mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 236-624 45Degree pitch 10mm size 242x14mm^2 drill 1.15mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-101_1x01_P5.00mm_45Degree +Terminal Block WAGO 804-101, 45Degree (cable under 45degree), 1 pins, pitch 5mm, size 6.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-101 45Degree pitch 5mm size 6.5x15mm^2 drill 1.2mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-102_1x02_P5.00mm_45Degree +Terminal Block WAGO 804-102, 45Degree (cable under 45degree), 2 pins, pitch 5mm, size 11.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-102 45Degree pitch 5mm size 11.5x15mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-103_1x03_P5.00mm_45Degree +Terminal Block WAGO 804-103, 45Degree (cable under 45degree), 3 pins, pitch 5mm, size 16.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-103 45Degree pitch 5mm size 16.5x15mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-104_1x04_P5.00mm_45Degree +Terminal Block WAGO 804-104, 45Degree (cable under 45degree), 4 pins, pitch 5mm, size 21.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-104 45Degree pitch 5mm size 21.5x15mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-105_1x05_P5.00mm_45Degree +Terminal Block WAGO 804-105, 45Degree (cable under 45degree), 5 pins, pitch 5mm, size 26.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-105 45Degree pitch 5mm size 26.5x15mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-106_1x06_P5.00mm_45Degree +Terminal Block WAGO 804-106, 45Degree (cable under 45degree), 6 pins, pitch 5mm, size 31.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-106 45Degree pitch 5mm size 31.5x15mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-107_1x07_P5.00mm_45Degree +Terminal Block WAGO 804-107, 45Degree (cable under 45degree), 7 pins, pitch 5mm, size 36.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-107 45Degree pitch 5mm size 36.5x15mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-108_1x08_P5.00mm_45Degree +Terminal Block WAGO 804-108, 45Degree (cable under 45degree), 8 pins, pitch 5mm, size 41.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-108 45Degree pitch 5mm size 41.5x15mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-109_1x09_P5.00mm_45Degree +Terminal Block WAGO 804-109, 45Degree (cable under 45degree), 9 pins, pitch 5mm, size 46.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-109 45Degree pitch 5mm size 46.5x15mm^2 drill 1.2mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-110_1x10_P5.00mm_45Degree +Terminal Block WAGO 804-110, 45Degree (cable under 45degree), 10 pins, pitch 5mm, size 51.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-110 45Degree pitch 5mm size 51.5x15mm^2 drill 1.2mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-112_1x12_P5.00mm_45Degree +Terminal Block WAGO 804-112, 45Degree (cable under 45degree), 12 pins, pitch 5mm, size 61.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-112 45Degree pitch 5mm size 61.5x15mm^2 drill 1.2mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-116_1x16_P5.00mm_45Degree +Terminal Block WAGO 804-116, 45Degree (cable under 45degree), 16 pins, pitch 5mm, size 81.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-116 45Degree pitch 5mm size 81.5x15mm^2 drill 1.2mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-124_1x24_P5.00mm_45Degree +Terminal Block WAGO 804-124, 45Degree (cable under 45degree), 24 pins, pitch 5mm, size 122x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-124 45Degree pitch 5mm size 122x15mm^2 drill 1.2mm pad 3mm +0 +48 +24 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-301_1x01_P7.50mm_45Degree +Terminal Block WAGO 804-301, 45Degree (cable under 45degree), 1 pins, pitch 7.5mm, size 6.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-301 45Degree pitch 7.5mm size 6.5x15mm^2 drill 1.2mm pad 3mm +0 +2 +1 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-302_1x02_P7.50mm_45Degree +Terminal Block WAGO 804-302, 45Degree (cable under 45degree), 2 pins, pitch 7.5mm, size 14x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-302 45Degree pitch 7.5mm size 14x15mm^2 drill 1.2mm pad 3mm +0 +4 +2 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-303_1x03_P7.50mm_45Degree +Terminal Block WAGO 804-303, 45Degree (cable under 45degree), 3 pins, pitch 7.5mm, size 21.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-303 45Degree pitch 7.5mm size 21.5x15mm^2 drill 1.2mm pad 3mm +0 +6 +3 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-304_1x04_P7.50mm_45Degree +Terminal Block WAGO 804-304, 45Degree (cable under 45degree), 4 pins, pitch 7.5mm, size 29x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-304 45Degree pitch 7.5mm size 29x15mm^2 drill 1.2mm pad 3mm +0 +8 +4 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-305_1x05_P7.50mm_45Degree +Terminal Block WAGO 804-305, 45Degree (cable under 45degree), 5 pins, pitch 7.5mm, size 36.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-305 45Degree pitch 7.5mm size 36.5x15mm^2 drill 1.2mm pad 3mm +0 +10 +5 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-306_1x06_P7.50mm_45Degree +Terminal Block WAGO 804-306, 45Degree (cable under 45degree), 6 pins, pitch 7.5mm, size 44x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-306 45Degree pitch 7.5mm size 44x15mm^2 drill 1.2mm pad 3mm +0 +12 +6 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-307_1x07_P7.50mm_45Degree +Terminal Block WAGO 804-307, 45Degree (cable under 45degree), 7 pins, pitch 7.5mm, size 51.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-307 45Degree pitch 7.5mm size 51.5x15mm^2 drill 1.2mm pad 3mm +0 +14 +7 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-308_1x08_P7.50mm_45Degree +Terminal Block WAGO 804-308, 45Degree (cable under 45degree), 8 pins, pitch 7.5mm, size 59x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-308 45Degree pitch 7.5mm size 59x15mm^2 drill 1.2mm pad 3mm +0 +16 +8 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-309_1x09_P7.50mm_45Degree +Terminal Block WAGO 804-309, 45Degree (cable under 45degree), 9 pins, pitch 7.5mm, size 66.5x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-309 45Degree pitch 7.5mm size 66.5x15mm^2 drill 1.2mm pad 3mm +0 +18 +9 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-310_1x10_P7.50mm_45Degree +Terminal Block WAGO 804-310, 45Degree (cable under 45degree), 10 pins, pitch 7.5mm, size 74x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-310 45Degree pitch 7.5mm size 74x15mm^2 drill 1.2mm pad 3mm +0 +20 +10 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-312_1x12_P7.50mm_45Degree +Terminal Block WAGO 804-312, 45Degree (cable under 45degree), 12 pins, pitch 7.5mm, size 89x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-312 45Degree pitch 7.5mm size 89x15mm^2 drill 1.2mm pad 3mm +0 +24 +12 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-316_1x16_P7.50mm_45Degree +Terminal Block WAGO 804-316, 45Degree (cable under 45degree), 16 pins, pitch 7.5mm, size 119x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-316 45Degree pitch 7.5mm size 119x15mm^2 drill 1.2mm pad 3mm +0 +32 +16 +TerminalBlock_WAGO +TerminalBlock_WAGO_804-324_1x24_P7.50mm_45Degree +Terminal Block WAGO 804-324, 45Degree (cable under 45degree), 24 pins, pitch 7.5mm, size 179x15mm^2, drill diamater 1.2mm, pad diameter 3mm, see , script-generated with , script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO +THT Terminal Block WAGO 804-324 45Degree pitch 7.5mm size 179x15mm^2 drill 1.2mm pad 3mm +0 +48 +24 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650073_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650073.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650074_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650074.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650094_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650094.pdf) +screw terminal thread redcube thr power connector +0 +16 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650173_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650173.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650174_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650174.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650194_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650194.pdf) +screw terminal thread redcube thr power connector +0 +18 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74650195_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74650195.pdf) +screw terminal thread redcube thr power connector +0 +18 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRBU_74655095_THR +REDCUBE THR with internal through-hole thread WP-THRBU (https://www.we-online.de/katalog/datasheet/74655095.pdf) +screw terminal thread redcube thr power connector +0 +16 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRSH_74651173_THR +REDCUBE THR with internal through-hole thread WP-THRSH (https://www.we-online.de/katalog/datasheet/74651173.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRSH_74651174_THR +REDCUBE THR with internal through-hole thread WP-THRSH (https://www.we-online.de/katalog/datasheet/74651174.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRSH_74651175_THR +REDCUBE THR with internal through-hole thread WP-THRSH (https://www.we-online.de/katalog/datasheet/74651175.pdf) +screw terminal thread redcube thr power connector +0 +8 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRSH_74651194_THR +REDCUBE THR with internal through-hole thread WP-THRSH (https://www.we-online.de/katalog/datasheet/74651194.pdf) +screw terminal thread redcube thr power connector +0 +18 +1 +TerminalBlock_Wuerth +Wuerth_REDCUBE-THR_WP-THRSH_74651195_THR +REDCUBE THR with internal through-hole thread WP-THRSH (https://www.we-online.de/katalog/datasheet/74651195.pdf) +screw terminal thread redcube thr power connector +0 +18 +1 +TestPoint +TestPoint_2Pads_Pitch2.54mm_Drill0.8mm +Test point with 2 pins, pitch 2.54mm, drill diameter 0.8mm +CONN DEV +0 +2 +2 +TestPoint +TestPoint_2Pads_Pitch5.08mm_Drill1.3mm +Test point with 2 pads, pitch 5.08mm, hole diameter 1.3mm, wire diameter 1.0mm +CONN DEV +0 +2 +2 +TestPoint +TestPoint_Bridge_Pitch2.0mm_Drill0.7mm +wire loop as test point, pitch 2.0mm, hole diameter 0.7mm, wire diameter 0.5mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill0.7mm +wire loop as test point, pitch 2.0mm, hole diameter 0.7mm, wire diameter 0.5mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill1.0mm +wire loop as test point, pitch 2.54mm, hole diameter 1.0mm, wire diameter 0.8mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch2.54mm_Drill1.3mm +wire loop as test point, pitch 2.54mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch3.81mm_Drill1.3mm +wire loop as test point, pitch 3.81mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch5.08mm_Drill0.7mm +wire loop as test point, pitch 5.08mm, hole diameter 0.7mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch5.08mm_Drill1.3mm +wire loop as test point, pitch 5.08mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch6.35mm_Drill1.3mm +wire loop as test point, pitch 6.35mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Bridge_Pitch7.62mm_Drill1.3mm +wire loop as test point, pitch 7.62mm, hole diameter 1.3mm, wire diameter 1.0mm +test point wire loop +0 +2 +1 +TestPoint +TestPoint_Keystone_5000-5004_Miniature +Keystone Miniature THM Test Point 5000-5004, http://www.keyelco.com/product-pdf.cfm?p=1309 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5005-5009_Compact +Keystone Miniature THM Test Point 5005-5009, http://www.keyelco.com/product-pdf.cfm?p=1314 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5010-5014_Multipurpose +Keystone Miniature THM Test Point 5010-5014, http://www.keyelco.com/product-pdf.cfm?p=1319 +Through Hole Mount Test Points +0 +1 +1 +TestPoint +TestPoint_Keystone_5015_Micro-Minature +SMT Test Point- Micro Miniature 5015, http://www.keyelco.com/product-pdf.cfm?p=1353 +Test Point +0 +1 +1 +TestPoint +TestPoint_Keystone_5019_Minature +SMT Test Point- Micro Miniature 5019, http://www.keyelco.com/product-pdf.cfm?p=1357 +Test Point +0 +1 +1 +TestPoint +TestPoint_Loop_D1.80mm_Drill1.0mm_Beaded +wire loop with bead as test point, loop diameter 1.8mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.0mm +wire loop as test point, loop diameter 2.5mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.0mm_LowProfile +low profile wire loop as test point, loop diameter 2.5mm, hole diameter 1.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.50mm_Drill1.85mm +wire loop as test point, loop diameter 2.5mm, hole diameter 1.85mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.54mm_Drill1.5mm_Beaded +wire loop with bead as test point, loop diameter2.548mm, hole diameter 1.5mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill0.9mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 0.9mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill1.4mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 1.4mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D2.60mm_Drill1.6mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 1.6mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.50mm_Drill0.9mm_Beaded +wire loop with bead as test point, loop diameter2.6mm, hole diameter 0.9mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.50mm_Drill1.4mm_Beaded +wire loop with bead as test point, loop diameter 3.5mm, hole diameter 1.4mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.0mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.0mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.5mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.5mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Loop_D3.80mm_Drill2.8mm +wire loop as test point, loop diameter 3.8mm, hole diameter 2.8mm +test point wire loop bead +0 +1 +1 +TestPoint +TestPoint_Pad_1.0x1.0mm +SMD rectangular pad as test Point, square 1.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_1.5x1.5mm +SMD rectangular pad as test Point, square 1.5mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_2.0x2.0mm +SMD rectangular pad as test Point, square 2.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_2.5x2.5mm +SMD rectangular pad as test Point, square 2.5mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_3.0x3.0mm +SMD rectangular pad as test Point, square 3.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_4.0x4.0mm +SMD rectangular pad as test Point, square 4.0mm side length +test point SMD pad rectangle square +0 +1 +1 +TestPoint +TestPoint_Pad_D1.0mm +SMD pad as test Point, diameter 1.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D1.5mm +SMD pad as test Point, diameter 1.5mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D2.0mm +SMD pad as test Point, diameter 2.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D2.5mm +SMD pad as test Point, diameter 2.5mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D3.0mm +SMD pad as test Point, diameter 3.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Pad_D4.0mm +SMD pad as test Point, diameter 4.0mm +test point SMD pad +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D2.0mm +Plated Hole as test Point, diameter 2.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D3.0mm +Plated Hole as test Point, diameter 3.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D4.0mm +Plated Hole as test Point, diameter 4.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_Plated_Hole_D5.0mm +Plated Hole as test Point, diameter 5.0mm +test point plated hole +0 +1 +1 +TestPoint +TestPoint_THTPad_1.0x1.0mm_Drill0.5mm +THT rectangular pad as test Point, square 1.0mm side length, hole diameter 0.5mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_1.5x1.5mm_Drill0.7mm +THT rectangular pad as test Point, square 1.5mm side length, hole diameter 0.7mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_2.0x2.0mm_Drill1.0mm +THT rectangular pad as test Point, square 2.0mm_Drill1.0mm side length, hole diameter 1.0mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_2.5x2.5mm_Drill1.2mm +THT rectangular pad as test Point, square 2.5mm side length, hole diameter 1.2mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_3.0x3.0mm_Drill1.5mm +THT rectangular pad as test Point, square 3.0mm side length, hole diameter 1.5mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_4.0x4.0mm_Drill2.0mm +THT rectangular pad as test Point, square 4.0mm side length, hole diameter 2.0mm +test point THT pad rectangle square +0 +1 +1 +TestPoint +TestPoint_THTPad_D1.0mm_Drill0.5mm +THT pad as test Point, diameter 1.0mm, hole diameter 0.5mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D1.5mm_Drill0.7mm +THT pad as test Point, diameter 1.5mm, hole diameter 0.7mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D2.0mm_Drill1.0mm +THT pad as test Point, diameter 2.0mm, hole diameter 1.0mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D2.5mm_Drill1.2mm +THT pad as test Point, diameter 2.5mm, hole diameter 1.2mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D3.0mm_Drill1.5mm +THT pad as test Point, diameter 3.0mm, hole diameter 1.5mm +test point THT pad +0 +1 +1 +TestPoint +TestPoint_THTPad_D4.0mm_Drill2.0mm +THT pad as test Point, diameter 4.0mm, hole diameter 2.0mm +test point THT pad +0 +1 +1 +Transformer_SMD +Pulse_P0926NL +SMT Gate Drive Transformer, 1:1:1, 8.0x6.3x5.3mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa0926nl +0 +6 +6 +Transformer_SMD +Pulse_PA1323NL +SMT Gate Drive Transformer, 1:1, 9.5x7.1x5.3mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa1323nl +0 +6 +6 +Transformer_SMD +Pulse_PA2001NL +SMT Gate Drive Transformer, 1:1, 8.6x6.7x2.5mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2001nl pe-68386nl +0 +4 +4 +Transformer_SMD +Pulse_PA2002NL-PA2008NL-PA2009NL +SMT Gate Drive Transformer, 1:1:1 or 2:1:1 or 2.5:1:1 or 1:1, 9.0x8.6x7.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2002nl pa2008nl pa2009nl p0544nl pa0184nl pa0297nl pa0510nl +0 +6 +6 +Transformer_SMD +Pulse_PA2004NL +SMT Gate Drive Transformer, 1:1:1, 8.6x6.7x3.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2004nl pa0264nl +0 +6 +6 +Transformer_SMD +Pulse_PA2005NL +SMT Gate Drive Transformer, 1:1:1, 11.8x8.8x4.0mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2005nl pa0173nl +0 +6 +6 +Transformer_SMD +Pulse_PA2006NL +SMT Gate Drive Transformer, 1:1, 11.8x8.8x4.0mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2006nl pa0186nl +0 +4 +4 +Transformer_SMD +Pulse_PA2007NL +SMT Gate Drive Transformer, 1:1, 9.0x8.6x7.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf) +pulse pa2007nl +0 +4 +4 +Transformer_SMD +Pulse_PA2777NL +SMT Gate Drive Transformer, 1:1, 7.1x6.1x5.5mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa2777nl +0 +8 +8 +Transformer_SMD +Pulse_PA3493NL +SMT Gate Drive Transformer, 1.25:1, 10.9x9.7x2.7mm (https://productfinder.pulseeng.com/products/datasheets/SPM2007_61.pdf) +pulse pa3493nl +0 +4 +4 +Transformer_SMD +Transformer_Coilcraft_CST1 +Current sense transformer, SMD, 8.0x8.13x5.3mm (https://www.coilcraft.com/pdfs/cst.pdf) +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Coilcraft_CST2 +Current sense transformer, SMD, 8.0x8.13x5.3mm (https://www.coilcraft.com/pdfs/cst.pdf) +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Coilcraft_CST2010 +Current sense transformer, SMD, 14.55x19.91x10.50mm (https://www.coilcraft.com/pdfs/cst2010.pdf) +Transformer current sense SMD +0 +12 +12 +Transformer_SMD +Transformer_CurrentSense_8.4x7.2mm +Transformer current sense SMD 8.4x7.2mm +Transformer current sense SMD +0 +8 +8 +Transformer_SMD +Transformer_Ethernet_Bel_S558-5999-T7-F +Ethernet Transformer, Bel S558-5999-T7-F, https://www.belfuse.com/resources/ICMs/lan-/S558-5999-T7-F.pdf +Ethernet Transformer +0 +16 +16 +Transformer_SMD +Transformer_Ethernet_Bourns_PT61017PEL +https://www.bourns.com/docs/Product-Datasheets/PT61017PEL.pdf +Transformer Ethernet Single Center-Tap +0 +16 +16 +Transformer_SMD +Transformer_Ethernet_HALO_TG111-MSC13 +Transformer Ethernet SMD, https://www.haloelectronics.com/pdf/discrete-genesus.pdf +Transformer Ethernet SMD +0 +24 +24 +Transformer_SMD +Transformer_MACOM_SM-22 +https://cdn.macom.com/datasheets/ETC1-1-13.pdf +RF Transformer +0 +5 +5 +Transformer_SMD +Transformer_Murata_78250JC +Murata 78250JC https://www.murata-ps.com/datasheet?/data/magnetics/kmp_78250j.pdf +Murata transformer +0 +6 +6 +Transformer_SMD +Transformer_NF_ETAL_P2781 +NF-Transformer, ETAL, P2781, SMD, +NF-Transformer ETAL P2781 SMD +0 +8 +7 +Transformer_SMD +Transformer_NF_ETAL_P2781_HandSoldering +NF-Transformer, ETAL, P2781, SMD, Handsoldering +NF-Transformer ETAL P2781 SMD Handsoldering +0 +8 +7 +Transformer_SMD +Transformer_NF_ETAL_P3000 +NF-Reansformer, ETAL, P3000, SMD, +NF-Reansformer ETAL P3000 SMD +0 +15 +13 +Transformer_SMD +Transformer_NF_ETAL_P3000_HandSoldering +NF-Reansformer, ETAL, P3000, SMD, Handsoldering, +NF-Reansformer ETAL P3000 SMD Handsoldering +0 +15 +13 +Transformer_SMD +Transformer_NF_ETAL_P3181 +NF-Transformer, ETAL, P3181, SMD, +NF-Transformer ETAL P3181 SMD +0 +7 +6 +Transformer_SMD +Transformer_NF_ETAL_P3181_HandSoldering +NF-Transformer, ETAL, P3181, SMD, Hand Soldering, +NF-Transformer ETAL P3181 SMD Hand Soldering +0 +7 +6 +Transformer_SMD +Transformer_NF_ETAL_P3188 +NF-Transformer, ETAL, P3188, SMD, +NF-Transformer ETAL P3188 SMD +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3188_HandSoldering +NF-Transformer, ETAL, P3188, SMD, Handsoldering, +NF-Transformer ETAL P3188 SMD Handsoldering +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3191 +NF-Transformer, ETAL, P3191, SMD, +NF-Transformer ETAL P3191 SMD +0 +8 +6 +Transformer_SMD +Transformer_NF_ETAL_P3191_HandSoldering +NF-Transformer, ETAL, P3191, SMD, Handsoldering, +NF-Transformer ETAL P3191 SMD Handsoldering +0 +8 +6 +Transformer_SMD +Transformer_Pulse_H1100NL +For H1100NL, H1101NL, H1102NL, H1121NL, H1183NL, H1199NL, HX1188NL, HX1198NL and H1302NL. https://productfinder.pulseeng.com/doc_type/WEB301/doc_num/H1102NL/doc_part/H1102NL.pdf +H1100NL H1101NL H1102NL H1121NL H1183NL H1199NL HX1188NL HX1198NL H1302N +0 +16 +16 +Transformer_SMD +Transformer_Wuerth_750315371 +Power Transformer, horizontal core with bobbin, 6 pin, 2.54mm pitch, 11.24mm row spacing, 12.6x8.3x4.1mm +transformer flyback +0 +6 +6 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D9.0mm_Amidon-T30 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 9mm, Amidon T30, +Autotransformer Toroid horizontal laying 1 Tap Diameter 9mm Amidon T30 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D10.5mm_Amidon-T37 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 10,5mm, Amidon T37, +Autotransformer Toroid horizontal laying 1 Tap Diameter 10 5mm Amidon T37 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D12.5mm_Amidon-T44 +Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 12,5mm, Amidon T44, +Autotransformer Toroid horizontal laying 1 Tap Diameter 12 5mm Amidon T44 +0 +3 +3 +Transformer_THT +Autotransformer_Toroid_1Tap_Horizontal_D14.0mm_Amidon-T50 +Choke, Inductance, Autotransformer, Toroid, horizontal, laying, 1 Tap, Diameter 14mm, Amidon T50, +Choke Inductance Autotransformer Toroid horizontal laying 1 Tap Diameter 14mm Amidon T50 +0 +3 +3 +Transformer_THT +Autotransformer_ZS1052-AC +Ignition coil for xenon flash, http://www.excelitas.com/downloads/ZS1052ACH.pdf +ignition coil autotransformer +0 +3 +3 +Transformer_THT +Transformer_37x44 +transformer 37x44mm² +transformer 37x44mm² +0 +12 +4 +Transformer_THT +Transformer_Breve_TEZ-22x24 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +7 +7 +Transformer_THT +Transformer_Breve_TEZ-28x33 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-35x42 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-38x45 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +9 +9 +Transformer_THT +Transformer_Breve_TEZ-44x52 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +10 +10 +Transformer_THT +Transformer_Breve_TEZ-47x57 +http://www.breve.pl/pdf/ANG/TEZ_ang.pdf +TEZ PCB Transformer +0 +13 +13 +Transformer_THT +Transformer_CHK_EI30-2VA_1xSec +Trafo, Printtrafo, CHK, EI30, 2VA, 1x Sec,http://www.eratransformers.com/downloads/030-7585.0.pdf +Trafo Printtrafo CHK EI30 2VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI30-2VA_2xSec +Trafo, Printtrafo, CHK, EI30, 2VA, 2x Sec, +Trafo Printtrafo CHK EI30 2VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI30-2VA_Neutral +Trafo, Printtrafo, CHK, EI30, 2VA, neutral, +Trafo Printtrafo CHK EI30 2VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_1xSec +Trafo, Printtrafo, CHK, EI38, 3VA, 1x Sec, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI38 3VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_2xSec +Trafo, Printtrafo, CHK, EI38, 3VA, 2x Sec, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI38 3VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI38-3VA_Neutral +Trafo, Printtrafo, CHK, EI38, 3VA, neutral, http://www.eratransformers.com/product-detail/20 +Trafo Printtrafo CHK EI42 3VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_1xSec +Trafo, Printtrafo, CHK, EI42, 5VA, 1x Sec, +Trafo Printtrafo CHK EI42 5VA 1x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_2xSec +Trafo, Printtrafo, CHK, EI42, 5VA, 2x Sec, +Trafo Printtrafo CHK EI42 5VA 2x Sec +0 +10 +10 +Transformer_THT +Transformer_CHK_EI42-5VA_Neutral +Trafo, Printtrafo, CHK, EI42, 5VA, neutral, +Trafo Printtrafo CHK EI42 5VA neutral +0 +10 +10 +Transformer_THT +Transformer_CHK_EI48-8VA_1xSec +Trafo, Printtrafo, CHK, EI48, 8VA, 1x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA 1x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-8VA_2xSec +Trafo, Printtrafo, CHK, EI48, 8VA, 2x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA 2x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-8VA_Neutral +Trafo, Printtrafo, CHK, EI48, 8VA, neutral, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 8VA neutral +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_1xSec +Trafo, Printtrafo, CHK, EI48, 10VA, 1x Sec, +Trafo Printtrafo CHK EI48 10VA 1x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_2xSec +Trafo, Printtrafo, CHK, EI48, 10VA, 2x Sec, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 10VA 2x Sec +0 +12 +12 +Transformer_THT +Transformer_CHK_EI48-10VA_Neutral +Trafo, Printtrafo, CHK, EI48, 10VA, neutral, http://www.eratransformers.com/product-detail/18 +Trafo Printtrafo CHK EI48 10VA neutral +0 +12 +12 +Transformer_THT +Transformer_CHK_EI54-12VA_1xSec +Trafo, Printtrafo, CHK, EI54, 12VA, 1x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA 1x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-12VA_2xSec +Trafo, Printtrafo, CHK, EI54, 12VA, 2x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA 2x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-12VA_Neutral +Trafo, Printtrafo, CHK, EI54, 12VA, neutral,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 12VA neutral +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_1xSec +Trafo, Printtrafo, CHK, EI54, 16VA, 1x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA 1x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_2xSec +Trafo, Printtrafo, CHK, EI54, 16VA, 2x Sec,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA 2x Sec +0 +14 +14 +Transformer_THT +Transformer_CHK_EI54-16VA_Neutral +Trafo, Printtrafo, CHK, EI54, 16VA, neutral,http://www.eratransformers.com/product-detail/19 +Trafo Printtrafo CHK EI54 16VA neutral +0 +14 +14 +Transformer_THT +Transformer_CHK_UI30-4VA_Flat +Trafo, Flattrafo, CHK, UI30, 4VA, +Trafo Flattrafo CHK UI30 4VA +0 +16 +16 +Transformer_THT +Transformer_CHK_UI39-10VA_Flat +Trafo, Flattrafo, CHK, UI39, 10VA, +Trafo Flattrafo CHK UI39 10VA +0 +20 +20 +Transformer_THT +Transformer_Coilcraft_Q4434-B_Rhombus-T1311 +Transformator, Transformer, Flyback, Coilcraft Q4434-B, Rgombus T1311, +Transformator Transformer Flyback Coilcraft Q4434-B Rgombus T1311 +0 +8 +8 +Transformer_THT +Transformer_EPCOS_B66359A1013T_Horizontal +Transformer, Transformator, ETD29, 13 Pin, Horizontal, EPCOS-B66359A1013T, +Transformer Transformator ETD29 13 Pin Horizontal EPCOS-B66359A1013T +0 +13 +13 +Transformer_THT +Transformer_EPCOS_B66359J1014T_Vertical +Transformer, Transformator, ETD29, 14 Pin, Vertical, EPCOS-B66359J1014T, +Transformer Transformator ETD29 14 Pin Vertical EPCOS-B66359J1014T +0 +14 +14 +Transformer_THT +Transformer_Microphone_Lundahl_LL1538 +AUDIO TRAFO LUNDAHL, https://www.lundahltransformers.com/wp-content/uploads/datasheets/1538_8xl.pdf +AUDIO TRAFO LUNDAHL +0 +7 +7 +Transformer_THT +Transformer_Microphone_Lundahl_LL1587 +AUDIO TRAFO LUNDAHL, https://www.lundahltransformers.com/wp-content/uploads/datasheets/1587.pdf +AUDIO TRAFO LUNDAHL +0 +7 +7 +Transformer_THT +Transformer_Myrra_74040_Horizontal +Transformer, Transformator, ETD29, 13 Pin, Horizontal, Myrra-74040, +Transformer Transformator ETD29 13 Pin Horizontal Myrra-74040 +0 +13 +13 +Transformer_THT +Transformer_Myrra_EF20_7408x +EF20 flyback transformer,http://myrra.com/wp-content/uploads/2017/09/Datasheet-74087-74088-74089-rev-A.pdf +transformer flyback SMPS +0 +9 +9 +Transformer_THT +Transformer_NF_ETAL_1-1_P1200 +NF-Transformer, 1:1, ETAL P1200,http://www.etalgroup.com/sites/default/files/products/P1200_April_2005.pdf +NF-Transformer 1to1 ETAL P1200 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P1165 +NF-Transformer, ETAL, P1165,http://www.etalgroup.com/sites/default/files/products/P1165_February_2006.pdf +NF-Transformer ETAL P1165 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P3324 +NF-Transformer, ETAL P3324,http://www.etalgroup.com/sites/default/files/products/P3324_April_2005.pdf +NF-Transformer ETAL P3324 +0 +4 +4 +Transformer_THT +Transformer_NF_ETAL_P3356 +NF-Transformer, ETAL P3356, http://www.etalgroup.com/sites/default/files/products/P3356_December_2005.pdf +NF-Transformer ETAL P3356 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D9.0mm_Amidon-T30 +Transformer, Toroid, horizontal, laying, Diameter 9mm, Amidon, T30, +Transformer Toroid horizontal laying Diameter 9mm Amidon T30 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D10.5mm_Amidon-T37 +Transformer, Toroid, horizontal, laying, Diameter 10,5mm, Amidon T37, +Transformer Toroid horizontal laying Diameter 10 5mm Amidon T37 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D12.5mm_Amidon-T44 +Transformer, Toroid, horizontal, laying, Diameter 12,5mm, Amidon T44, +Transformer Toroid horizontal laying Diameter 12 5mm Amidon T44 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D14.0mm_Amidon-T50 +Transformer, Toroid, horizontal, laying, Diameter 14mm, Amidon T50, +Transformer Toroid horizontal laying Diameter 14mm Amidon T50 +0 +4 +4 +Transformer_THT +Transformer_Toroid_Horizontal_D18.0mm +Transformer, Toroid, tapped, horizontal, laying, Diameter 18mm, +Transformer Toroid tapped horizontal laying Diameter 18mm +0 +5 +4 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D9.0mm_Amidon-T30 +Transformer, Toroid, tapped, horizontal, laying, Diameter 9mm, Amidon, T30, +Transformer Toroid tapped horizontal laying Diameter 9mm Amidon T30 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D10.5mm_Amidon-T37 +Transformer, Toroid, tapped, horizontal, laying, Diameter 10,5mm, Amidon, T37, +Transformer Toroid tapped horizontal laying Diameter 10 5mm Amidon T37 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D12.5mm_Amidon-T44 +Transformer, Toroid, tapped, horizontal, laying, Diameter 12,5mm, Amidon, T44, +Transformer Toroid tapped horizontal laying Diameter 12 5mm Amidon T44 +0 +6 +6 +Transformer_THT +Transformer_Toroid_Tapped_Horizontal_D14.0mm_Amidon-T50 +Transformer, Toroid, tapped, horizontal, laying, Diameter 14mm, Amidon T50, +Transformer Toroid tapped horizontal laying Diameter 14mm Amidon T50 +0 +6 +6 +Transformer_THT +Transformer_Wuerth_750343373 +Transformer, horizontal core with bobbin, 10 pin, 3.81mm pitch, 15.24mm row spacing, 22x23x17.53mm (https://katalog.we-online.com/ctm/datasheet/750343373.pdf) +transformer flyback +0 +10 +10 +Valve +Valve_ECC-83-1 +Valve ECC-83-1 round pins +Valve ECC-83-1 round pins +0 +9 +9 +Valve +Valve_ECC-83-2 +Valve ECC-83-2 flat pins +Valve ECC-83-2 flat pins +0 +10 +9 +Valve +Valve_EURO +Valve Euro +Valve Euro +0 +7 +5 +Valve +Valve_Glimm +Valve Glimm +Valve Glimm +0 +2 +2 +Valve +Valve_Mini_G +Valve mini G +Valve mini G +0 +9 +7 +Valve +Valve_Mini_P +Valve mini P +Valve mini P +0 +7 +7 +Valve +Valve_Mini_Pentode_Linear +Mini-Pentode, 5-pin, e.g. JAN6418 +Valve Mini-Pentode 5-pin JAN6418 +0 +5 +5 +Valve +Valve_Noval_G +Valve NOVAL G +Valve NOVAL G +0 +11 +9 +Valve +Valve_Noval_P +Valve NOVAL P +Valve NOVAL P +0 +9 +9 +Valve +Valve_Octal +8-pin round valve +valve +0 +9 +8 +Varistor +RV_Disc_D7mm_W3.4mm_P5mm +Varistor, diameter 7mm, width 3.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.5mm_P5mm +Varistor, diameter 7mm, width 3.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.6mm_P5mm +Varistor, diameter 7mm, width 3.6mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.7mm_P5mm +Varistor, diameter 7mm, width 3.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.8mm_P5mm +Varistor, diameter 7mm, width 3.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W3.9mm_P5mm +Varistor, diameter 7mm, width 3.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.2mm_P5mm +Varistor, diameter 7mm, width 4.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.3mm_P5mm +Varistor, diameter 7mm, width 4.3mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.5mm_P5mm +Varistor, diameter 7mm, width 4.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.8mm_P5mm +Varistor, diameter 7mm, width 4.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4.9mm_P5mm +Varistor, diameter 7mm, width 4.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W4mm_P5mm +Varistor, diameter 7mm, width 4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.1mm_P5mm +Varistor, diameter 7mm, width 5.1mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.4mm_P5mm +Varistor, diameter 7mm, width 5.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.5mm_P5mm +Varistor, diameter 7mm, width 5.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D7mm_W5.7mm_P5mm +Varistor, diameter 7mm, width 5.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.3mm_P5mm +Varistor, diameter 9mm, width 3.3mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.4mm_P5mm +Varistor, diameter 9mm, width 3.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.5mm_P5mm +Varistor, diameter 9mm, width 3.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.6mm_P5mm +Varistor, diameter 9mm, width 3.6mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.7mm_P5mm +Varistor, diameter 9mm, width 3.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.8mm_P5mm +Varistor, diameter 9mm, width 3.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W3.9mm_P5mm +Varistor, diameter 9mm, width 3.9mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.1mm_P5mm +Varistor, diameter 9mm, width 4.1mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.2mm_P5mm +Varistor, diameter 9mm, width 4.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.4mm_P5mm +Varistor, diameter 9mm, width 4.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.5mm_P5mm +Varistor, diameter 9mm, width 4.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4.8mm_P5mm +Varistor, diameter 9mm, width 4.8mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W4mm_P5mm +Varistor, diameter 9mm, width 4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.2mm_P5mm +Varistor, diameter 9mm, width 5.2mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.4mm_P5mm +Varistor, diameter 9mm, width 5.4mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.5mm_P5mm +Varistor, diameter 9mm, width 5.5mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W5.7mm_P5mm +Varistor, diameter 9mm, width 5.7mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D9mm_W6.1mm_P5mm +Varistor, diameter 9mm, width 6.1mm, pitch 5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W3.9mm_P7.5mm +Varistor, diameter 12mm, width 3.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.2mm_P7.5mm +Varistor, diameter 12mm, width 4.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.3mm_P7.5mm +Varistor, diameter 12mm, width 4.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.4mm_P7.5mm +Varistor, diameter 12mm, width 4.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.5mm_P7.5mm +Varistor, diameter 12mm, width 4.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.6mm_P7.5mm +Varistor, diameter 12mm, width 4.6mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.7mm_P7.5mm +Varistor, diameter 12mm, width 4.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4.8mm_P7.5mm +Varistor, diameter 12mm, width 4.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W4mm_P7.5mm +Varistor, diameter 12mm, width 4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.1mm_P7.5mm +Varistor, diameter 12mm, width 5.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.4mm_P7.5mm +Varistor, diameter 12mm, width 5.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5.8mm_P7.5mm +Varistor, diameter 12mm, width 5.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W5mm_P7.5mm +Varistor, diameter 12mm, width 5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.1mm_P7.5mm +Varistor, diameter 12mm, width 6.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.2mm_P7.5mm +Varistor, diameter 12mm, width 6.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.3mm_P7.5mm +Varistor, diameter 12mm, width 6.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W6.7mm_P7.5mm +Varistor, diameter 12mm, width 6.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.1mm_P7.5mm +Varistor, diameter 12mm, width 7.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.5mm_P7.5mm +Varistor, diameter 12mm, width 7.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D12mm_W7.9mm_P7.5mm +Varistor, diameter 12mm, width 7.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W3.9mm_P7.5mm +Varistor, diameter 15.5mm, width 3.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.2mm_P7.5mm +Varistor, diameter 15.5mm, width 4.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.3mm_P7.5mm +Varistor, diameter 15.5mm, width 4.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.4mm_P7.5mm +Varistor, diameter 15.5mm, width 4.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.5mm_P7.5mm +Varistor, diameter 15.5mm, width 4.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.6mm_P7.5mm +Varistor, diameter 15.5mm, width 4.6mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.7mm_P7.5mm +Varistor, diameter 15.5mm, width 4.7mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.8mm_P7.5mm +Varistor, diameter 15.5mm, width 4.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4.9mm_P7.5mm +Varistor, diameter 15.5mm, width 4.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W4mm_P7.5mm +Varistor, diameter 15.5mm, width 4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.2mm_P7.5mm +Varistor, diameter 15.5mm, width 5.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.4mm_P7.5mm +Varistor, diameter 15.5mm, width 5.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5.9mm_P7.5mm +Varistor, diameter 15.5mm, width 5.9mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W5mm_P7.5mm +Varistor, diameter 15.5mm, width 5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.1mm_P7.5mm +Varistor, diameter 15.5mm, width 6.1mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.3mm_P7.5mm +Varistor, diameter 15.5mm, width 6.3mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.4mm_P7.5mm +Varistor, diameter 15.5mm, width 6.4mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W6.8mm_P7.5mm +Varistor, diameter 15.5mm, width 6.8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W7.2mm_P7.5mm +Varistor, diameter 15.5mm, width 7.2mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W7.5mm_P7.5mm +Varistor, diameter 15.5mm, width 7.5mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W8mm_P7.5mm +Varistor, diameter 15.5mm, width 8mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D15.5mm_W11mm_P7.5mm +Varistor, diameter 15.5mm, width 11mm, pitch 7.5mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D16.5mm_W6.7mm_P7.5mm +Varistor, diameter 16.5mm, width 6.7mm, pitch 5mm, https://katalog.we-online.de/pbs/datasheet/820542711.pdf +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.3mm_P10mm +Varistor, diameter 21.5mm, width 4.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.4mm_P10mm +Varistor, diameter 21.5mm, width 4.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.5mm_P10mm +Varistor, diameter 21.5mm, width 4.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.6mm_P10mm +Varistor, diameter 21.5mm, width 4.6mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.7mm_P10mm +Varistor, diameter 21.5mm, width 4.7mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.8mm_P10mm +Varistor, diameter 21.5mm, width 4.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W4.9mm_P10mm +Varistor, diameter 21.5mm, width 4.9mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.1mm_P10mm +Varistor, diameter 21.5mm, width 5.1mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.3mm_P10mm +Varistor, diameter 21.5mm, width 5.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.4mm_P10mm +Varistor, diameter 21.5mm, width 5.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.6mm_P10mm +Varistor, diameter 21.5mm, width 5.6mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5.8mm_P10mm +Varistor, diameter 21.5mm, width 5.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W5mm_P10mm +Varistor, diameter 21.5mm, width 5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.1mm_P7.5mm +varistor +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.3mm_P10mm +Varistor, diameter 21.5mm, width 6.3mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.5mm_P10mm +Varistor, diameter 21.5mm, width 6.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.7mm_P10mm +Varistor, diameter 21.5mm, width 6.7mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W6.8mm_P10mm +Varistor, diameter 21.5mm, width 6.8mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.1mm_P10mm +Varistor, diameter 21.5mm, width 7.1mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.5mm_P10mm +Varistor, diameter 21.5mm, width 7.5mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W7.9mm_P10mm +Varistor, diameter 21.5mm, width 7.9mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W8.4mm_P10mm +Varistor, diameter 21.5mm, width 8.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +Varistor +RV_Disc_D21.5mm_W11.4mm_P10mm +Varistor, diameter 21.5mm, width 11.4mm, pitch 10mm +varistor SIOV +0 +2 +2 +wbraun_smd +2743019447 + + +0 +2 +2 +wbraun_smd +4-SMD + +crystal +0 +4 +4 +wbraun_smd +8-QFN-2x2 + + +0 +17 +9 +wbraun_smd +8-WSON_6x8_1.27mm + + +0 +9 +9 +wbraun_smd +10-MSOP + +10-MSOP +0 +13 +11 +wbraun_smd +19-WQFN-RVR + + +0 +21 +21 +wbraun_smd +22-MCOB + + +0 +25 +23 +wbraun_smd +22A-Trimmer + + +0 +3 +3 +wbraun_smd +28-UQFN_6x6mm + + +0 +41 +29 +wbraun_smd +132_coilcraft + + +0 +2 +2 +wbraun_smd +0402_in_grid +Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf) +capacitor 0402 +0 +2 +2 +wbraun_smd +2222SQ + + +0 +2 +2 +wbraun_smd +2222SQ-111 + + +0 +2 +2 +wbraun_smd +2222SQ-161 + + +0 +2 +2 +wbraun_smd +2929SQ + + +0 +2 +2 +wbraun_smd +2929SQ-501 + + +0 +2 +2 +wbraun_smd +7693-term + +screw terminal +0 +4 +1 +wbraun_smd +503182-1853_MOLEX-MicroSD + + +0 +15 +15 +wbraun_smd +10118194-0001LF + + +0 +13 +6 +wbraun_smd +744824622 + +common mode choke +0 +4 +4 +wbraun_smd +AA-2460 +AA battery holder +battery +0 +2 +2 +wbraun_smd +AGP4233 + +inductor +0 +4 +2 +wbraun_smd +Air-Core-223nH + + +0 +2 +2 +wbraun_smd +Air-Core-223nH-mirrored + + +0 +2 +2 +wbraun_smd +Air-Core-680nH + + +0 +2 +2 +wbraun_smd +Air-Core-680nH-mirrored + + +0 +2 +2 +wbraun_smd +Anderson_PP45_2x1 +https://www.connex-electronics.com/html/products/anderson/pdfs/pc45.pdf + +0 +4 +2 +wbraun_smd +BCAAPC +AA battery holder +battery +0 +2 +2 +wbraun_smd +BGA_484_22x22_FULLARRAY_1MM + + +0 +484 +484 +wbraun_smd +BH9VPC +9V Battery Holder +Battery +0 +2 +2 +wbraun_smd +BHAA-POL +AA Battery Holder +AA Battery +0 +2 +2 +wbraun_smd +BHAA-POL-NO-HOLE +AA Battery Holder +AA Battery +0 +2 +2 +wbraun_smd +BK-92-AA + + +0 +4 +2 +wbraun_smd +CAP_16mmx37mm_horizontal + + +0 +2 +2 +wbraun_smd +CAP_77mm_stud_horizontal + + +0 +2 +2 +wbraun_smd +CAP_SNAPIN_4PIN_D45mm + + +0 +4 +2 +wbraun_smd +CM2021Y330R-10 + +choke +0 +4 +4 +wbraun_smd +CONN-SFP-CAGE + + +0 +20 +0 +wbraun_smd +CONN-SFP_1367073-1 + + +0 +20 +20 +wbraun_smd +CP_EIA-7660 + +capacitor tantalum +0 +2 +2 +wbraun_smd +C_0402 +Capacitor SMD 0402, reflow soldering, AVX (see smccp.pdf) +capacitor 0402 +0 +2 +2 +wbraun_smd +C_0603 +Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf) +capacitor 0603 +0 +2 +2 +wbraun_smd +C_0805 +Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf) +capacitor 0805 +0 +2 +2 +wbraun_smd +C_1111 + + +0 +2 +2 +wbraun_smd +C_1808 +Capacitor SMD 1812, reflow soldering, AVX (see smccp.pdf) +capacitor 1812 +0 +2 +2 +wbraun_smd +C_Rect_L32.0mm_W18.0mm_P27.50mm +C, Rect series, Radial, pin pitch=27.00mm, , length*width=32*15mm^2, Capacitor +C Rect series Radial pin pitch 27.00mm length 32mm width 15mm Capacitor +0 +2 +2 +wbraun_smd +C_Rect_L57.5mm_W35.0mm_P52.50mm_P20.30mm +C, Rect series, Radial, pin pitch=27.00mm, , length*width=32*15mm^2, Capacitor +C Rect series Radial pin pitch 27.00mm length 32mm width 15mm Capacitor +0 +4 +2 +wbraun_smd +Crystal_3.2x2.5 + + +0 +4 +4 +wbraun_smd +Crystal_6.0x3.6 + + +0 +4 +4 +wbraun_smd +DC_2.1mm_PJ-202A + + +0 +3 +3 +wbraun_smd +DFN-6-1EP_3x3mm_P0.95mm_EP1.6x2.1mm +DFN6 3*3 MM, 0.95 PITCH; CASE 506AH-01 (see ON Semiconductor 506AH.PDF) +DFN 0.95 +0 +13 +7 +wbraun_smd +DFN-8-1EP_3x3mm_Pitch0.5mm +DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf) +DFN 0.5 +0 +9 +9 +wbraun_smd +DFN-8-3x3 +DD Package; 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_8_05-08-1698.pdf) +DFN 0.5 +0 +13 +9 +wbraun_smd +DFN-8_2x2mm_Pitch0.5mm +DFN8 2x2, 0.5P; CASE 506CN (see ON Semiconductor 506CN.PDF) +DFN 0.5 +0 +10 +9 +wbraun_smd +DFN-8_5x4mm_P0.95mm + + +0 +9 +9 +wbraun_smd +DFN-8mmx8mm + +MOSFET +0 +9 +9 +wbraun_smd +DHVQFN16 + + +0 +17 +17 +wbraun_smd +DHVQFN24_3.5x5.5mm_P0.5mm + + +0 +31 +25 +wbraun_smd +DLW5BTM + +choke, common mode +0 +8 +4 +wbraun_smd +DSBGA-12 + + +0 +24 +12 +wbraun_smd +Diode-GBJ-Horizontal + + +0 +4 +4 +wbraun_smd +Diode-GBJ-Vertical + + +0 +4 +4 +wbraun_smd +EC6AW + + +0 +9 +9 +wbraun_smd +EHF-108-01-L-D + + +0 +16 +16 +wbraun_smd +EPC2014C + + +0 +15 +5 +wbraun_smd +EPC2112 + +GaN FET +0 +20 +10 +wbraun_smd +EPC2152 + +GaN Power Module +0 +24 +12 +wbraun_smd +EPC2214 + + +0 +18 +9 +wbraun_smd +EPC8010 + + +0 +18 +6 +wbraun_smd +ESP8266_breakout + + +0 +8 +8 +wbraun_smd +F423MR12W1M1B11BOMA1 + + +0 +22 +14 +wbraun_smd +FBGA-96-DDR3-SDRAM + + +0 +96 +96 +wbraun_smd +FN-6(TCS3472x) + + +0 +6 +6 +wbraun_smd +FPP-02 + +EMI Filter +0 +5 +5 +wbraun_smd +FS45MR12W1M1B11BOMA1 + + +0 +23 +23 +wbraun_smd +FTGB196 + + +0 +196 +196 +wbraun_smd +FX10B_80S_8_SV + + +0 +92 +90 +wbraun_smd +G2RL-2 + +Relay DPDT +0 +8 +8 +wbraun_smd +GA3095-AL + + +0 +2 +2 +wbraun_smd +GPS_breakout + + +0 +9 +9 +wbraun_smd +GS61004B + + +0 +3 +3 +wbraun_smd +GS61008T + + +0 +4 +4 +wbraun_smd +GS66504B + +GaN FET +0 +3 +3 +wbraun_smd +GS66508T + + +0 +4 +4 +wbraun_smd +GS66508T-flipped-gate + + +0 +4 +4 +wbraun_smd +HHM1520 + + +0 +6 +6 +wbraun_smd +HMC1041Z + + +0 +10 +8 +wbraun_smd +IF-D95 + + +0 +3 +3 +wbraun_smd +IF-E96E + + +0 +2 +2 +wbraun_smd +IMU_Breakout + + +0 +4 +4 +wbraun_smd +LED-T1-RIGHT-ANGLE_4.6x4.4mm + +LED +0 +2 +2 +wbraun_smd +LED_SUNLED_PLCC4_3.2x2.8mm_reverse +RGB LED +LED +0 +4 +4 +wbraun_smd +LGA25_6_25x6_25 + + +0 +25 +25 +wbraun_smd +LM561B-LED + + +0 +5 +2 +wbraun_smd +LPS8045 + + +0 +2 +2 +wbraun_smd +L_33n + + +0 +2 +2 +wbraun_smd +L_190n + + +0 +2 +2 +wbraun_smd +L_0603 +Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf) +resistor 0603 +0 +2 +2 +wbraun_smd +L_0806 + +Inductor +0 +2 +2 +wbraun_smd +L_1210 + +inductor +0 +2 +2 +wbraun_smd +L_SUMIDA_104CDMCC + + +0 +2 +2 +wbraun_smd +L_VLCF4020 +Inductor +Inductor +0 +2 +2 +wbraun_smd +M3-mounting-hole-insulated + + +0 +0 +0 +wbraun_smd +M3-small-mounting-hole + + +0 +0 +0 +wbraun_smd +M3-through-hole + + +0 +0 +0 +wbraun_smd +M3-tight-fit-pan-head + +mounting hole +0 +9 +1 +wbraun_smd +M3-tight-fit-socket-head + +mounting hole +0 +9 +1 +wbraun_smd +MBS1 + + +0 +4 +4 +wbraun_smd +MSOP-8_3x3mm +8-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf) +SSOP 0.65 +0 +8 +8 +wbraun_smd +MSS1278 + +inductor +0 +2 +2 +wbraun_smd +MSS1583 + +inductor +0 +2 +2 +wbraun_smd +MicroSiP-10 + + +0 +11 +11 +wbraun_smd +Molex_0541020164 + +Connector +0 +16 +16 +wbraun_smd +Molex_5003340160 + +Connector +0 +16 +16 +wbraun_smd +NET_TIE + + +0 +2 +2 +wbraun_smd +NXE2 + + +0 +5 +5 +wbraun_smd +OLED_128x64_Display + + +0 +4 +4 +wbraun_smd +OMNI-UNI-30-50-D + + +0 +2 +1 +wbraun_smd +OSCILLATOR_5.0X3.2 + + +0 +4 +4 +wbraun_smd +OSC_SMD_3.2x5.0mm + +SMD SMT crystal +0 +4 +4 +wbraun_smd +PA2745NL + +choke +0 +4 +4 +wbraun_smd +PCC-SMP + + +0 +4 +2 +wbraun_smd +PCIe_1x + + +0 +72 +36 +wbraun_smd +PD2328 + + +0 +6 +6 +wbraun_smd +PE29100 + + +0 +16 +16 +wbraun_smd +PG-LSON-8-1 + +MOSFET +0 +17 +9 +wbraun_smd +PG-TDSON-8 + + +0 +21 +3 +wbraun_smd +PK007-015 +2.5mm Probe Test Connector + +0 +5 +2 +wbraun_smd +PK106-4 + +test point +0 +5 +2 +wbraun_smd +PP45_2x1 +https://www.connex-electronics.com/html/products/anderson/pdfs/pc45.pdf + +0 +4 +2 +wbraun_smd +Pin_Header_1x02_Pitch3.96 + + +0 +2 +2 +wbraun_smd +Pin_Header_1x04_Pitch3.96 + + +0 +4 +4 +wbraun_smd +Q5D + + +0 +17 +9 +wbraun_smd +QFN-16-3x3 +16-Lead Plastic Quad Flat, No Lead Package (NG) - 3x3x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +21 +17 +wbraun_smd +QFN-16-3x3-np +16-Lead Plastic Quad Flat, No Lead Package (NG) - 3x3x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +16 +16 +wbraun_smd +QFN-24-1EP_4x4mm_Pitch0.5mm +24-Lead Plastic Quad Flat, No Lead Package (MJ) - 4x4x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +28 +25 +wbraun_smd +QFN-24-CP-24-7 +24-Lead Plastic Quad Flat, No Lead Package (MJ) - 4x4x0.9 mm Body [QFN]; (see Microchip Packaging Specification 00000049BS.pdf) +QFN 0.5 +0 +25 +25 +wbraun_smd +QFN-28-1EP_6x6mm_P0.65mm_EP4.05x4.05mm_Anchors + + +0 +42 +29 +wbraun_smd +QFN-40 + + +0 +45 +41 +wbraun_smd +QFN-64-1EP_9x9mm +64-Lead Plastic Quad Flat No-Lead Package, 9x9mm Body (see Atmel Appnote 8826) +QFN 0.5 +0 +90 +65 +wbraun_smd +QSH-060-01-X-D-A +.5MM DOUBLE ROW HS SOCKET ASSEMBLY, 120 PINS. +.5MM DOUBLE ROW HS SOCKET ASSEMBLY, 120 PINS. +0 +128 +128 +wbraun_smd +QTH-060-01-X-D-A +HIGH SPEED TERMINAL STRIP, .5mm PITCH, 120 PINS. + +0 +128 +128 +wbraun_smd +RA-T2X + +heatsink +0 +2 +1 +wbraun_smd +RAC10 + + +0 +5 +5 +wbraun_smd +RCA + +RCJ-011 +0 +4 +2 +wbraun_smd +RCJ-222x + + +0 +3 +3 +wbraun_smd +RESISTOR_CW010 + +resistor +0 +2 +2 +wbraun_smd +RF-N-172234 + +RF, N +0 +5 +2 +wbraun_smd +RFM-0505S + + +0 +4 +4 +wbraun_smd +RP-xx06S + + +0 +4 +4 +wbraun_smd +R_0402 +Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf) +resistor 0402 +0 +2 +2 +wbraun_smd +R_0603 +Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf) +resistor 0603 +0 +2 +2 +wbraun_smd +R_Shunt_Ohmite_LVK25 +4 contacts shunt resistor,https://www.ohmite.com/assets/docs/res_lvk.pdf +4 contacts resistor smd +0 +4 +4 +wbraun_smd +Relay-EE2-3T + + +0 +10 +10 +wbraun_smd +Relay-EE2-3TNUH + + +0 +10 +10 +wbraun_smd +S-PWQFN-N16 + + +0 +17 +17 +wbraun_smd +SER1052 + + +0 +3 +2 +wbraun_smd +SG3225 + + +0 +6 +6 +wbraun_smd +SHUNT_CSM2512 +shunt resistor + +0 +4 +4 +wbraun_smd +SIP7-5 + +DC/DC +0 +5 +5 +wbraun_smd +SJ-4351_X-SMT + + +0 +6 +6 +wbraun_smd +SMA-Edge + + +0 +5 +2 +wbraun_smd +SMA-Edge-China + + +0 +5 +2 +wbraun_smd +SMA-Edge-China-Short + + +0 +5 +2 +wbraun_smd +SMA-Edge-short + + +0 +5 +2 +wbraun_smd +SMD-0805 + + +0 +2 +2 +wbraun_smd +SMD-1008 + + +0 +2 +2 +wbraun_smd +SO-PowerPAD-20 + +PowerPAD +0 +33 +21 +wbraun_smd +SOIC-8_power + +SOIC 1.27 Power +0 +9 +9 +wbraun_smd +SON-8_EP + + +0 +13 +9 +wbraun_smd +SOT-223 + + +0 +4 +4 +wbraun_smd +SOT223-5 + + +0 +6 +6 +wbraun_smd +SRF2012 + + +0 +4 +4 +wbraun_smd +SW_Tactile_SPST_Angled_PTS645Vx58-2LFS +tactile switch SPST right angle, PTS645VL58-2 LFS +tactile switch SPST angled PTS645VL58-2 LFS C&K Button +0 +4 +2 +wbraun_smd +Shunt_KRL3216T4A + + +0 +4 +4 +wbraun_smd +T130-Vertical + +inductor +0 +2 +2 +wbraun_smd +T157-Vertical + +inductor +0 +2 +2 +wbraun_smd +TC2030-IDC-FP +2X3 tag-connect programming header + +0 +6 +6 +wbraun_smd +TC2030-IDC-NL +2X3 tag-connect programming header + +0 +6 +6 +wbraun_smd +THM_COMPACT + +test point +0 +1 +1 +wbraun_smd +TO-247_2_horizontal_under + + +0 +2 +2 +wbraun_smd +TO-247_3_horizontal_under + + +0 +3 +3 +wbraun_smd +TO-PMOD-7 + + +0 +8 +8 +wbraun_smd +TP-0.7mm-pad + +Test Point +0 +1 +1 +wbraun_smd +TP-1mm-pad + +Test Point +0 +1 +1 +wbraun_smd +TRIMMER_PVG3A +trimmer resistor + +0 +3 +3 +wbraun_smd +TSOP75xxx + + +0 +4 +4 +wbraun_smd +TSOT-23 + +TSOT-23 +0 +5 +5 +wbraun_smd +TSOT-23-5 + +TSOT-23 +0 +5 +5 +wbraun_smd +TantalC_SizeD_EIA-7343 +Tantal Cap. , Size D, EIA-7343, Reflow +Tantal Capacitor Size-D EIA-7343 Reflow +0 +2 +2 +wbraun_smd +Teensy_3.1 + + +0 +33 +33 +wbraun_smd +Terminal-block-plug_2x1_3.5mm-pitch + +connector header terminal block +0 +2 +2 +wbraun_smd +Terminal-block-plug_2x1_5mm-pitch + + +0 +2 +2 +wbraun_smd +Terminal-block-plug_3x1_5mm-pitch + + +0 +3 +3 +wbraun_smd +Terminal-block-plug_4x1_3.5mm-pitch + + +0 +4 +4 +wbraun_smd +Terminal-block-plug_5x1_3.5mm-pitch + + +0 +5 +5 +wbraun_smd +Terminal-block-plug_6x1_3.5mm-pitch + + +0 +6 +6 +wbraun_smd +TerminalBlock-5.0mm-2 + +terminal block, connector +0 +2 +2 +wbraun_smd +VQFN-11 + + +0 +11 +11 +wbraun_smd +VSON-10 + + +0 +21 +11 +wbraun_smd +WA04P + + +0 +4 +4 +wbraun_smd +WLCSP-6 + + +0 +6 +6 +wbraun_smd +WSON-8-1EP_6x5mm_P1.27mm_EP3.4x4mm +WSON, 8 Pin (http://ww1.microchip.com/downloads/en/AppNotes/S72030.pdf), generated with kicad-footprint-generator ipc_dfn_qfn_generator.py +WSON DFN_QFN +0 +13 +9 +wbraun_smd +WSON-10_3x3mm + + +0 +15 +11 +wbraun_smd +XFL3012 + + +0 +2 +2 +wbraun_smd +XGL6060 + +Inductor +0 +2 +2 +wbraun_smd +bee_large_v1 + + +0 +0 +0 +wbraun_smd +bee_large_v2 + + +0 +0 +0 +wbraun_smd +bee_large_v3 + + +0 +0 +0 +wbraun_smd +bee_v1 + + +0 +0 +0 +wbraun_smd +bee_v4 + + +0 +0 +0 +wbraun_smd +button-5mm + +5mm SMD button +0 +4 +2 +wbraun_smd +cherry-MX + + +0 +2 +2 +wbraun_smd +coax_solder + + +0 +2 +2 +wbraun_smd +iCH12 + + +0 +10 +10 +wbraun_smd +led-3x1-right_angle + + +0 +3 +2 +wbraun_smd +littlebee_qr + + +0 +0 +0 +wbraun_smd +mask-8.5mmx5mm + + +0 +0 +0 +wbraun_smd +mask-12.5mmx4.5mm + + +0 +0 +0 +wbraun_smd +mit_logo_25mm + + +0 +0 +0 +wbraun_smd +particle_electron + + +0 +36 +36 +wbraun_smd +pinheader_2x8_horizontal_mount_2.54mm + + +0 +16 +16 +wbraun_smd +smd_header_10 + + +0 +10 +10 +wbraun_smd +switch-dpdt-JS202011SCQN + + +0 +6 +6 +wbraun_smd +switch-spdt-JS102011J + + +0 +6 +3 +wbraun_smd +terminalBlock-3.5mm-2 + + +0 +2 +2 +wbraun_smd +terminalBlock-3.5mm-3 + + +0 +3 +3 +wbraun_smd +terminalBlock-3.5mm-4 + + +0 +4 +4 +wbraun_smd +terminalBlock-5mm-2 + +terminal block +0 +3 +3 +wbraun_smd +terminalBlock-5mm-3 + +terminal block +0 +3 +3 +wbraun_smd +test_pcb_inductor + + +0 +3 +2 +wbraun_smd +testpad_0.8mm + + +0 +1 +1 +wbraun_smd +testpad_1mm + + +0 +1 +1 +wbraun_smd +uSil-8 + + +0 +9 +9 +wbraun_smd +versatile-link_horizontal + + +0 +6 +6 diff --git a/pcb/gerbers/case-bottom-gerbers/casing-B_Cu.gbr b/pcb/gerbers/case-bottom-gerbers/casing-B_Cu.gbr new file mode 100644 index 0000000..48bf340 --- /dev/null +++ b/pcb/gerbers/case-bottom-gerbers/casing-B_Cu.gbr @@ -0,0 +1,388 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:18:57-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L2,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:18:57* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,NonConductor* +%ADD10C,0.240000*% +G04 #@! TD* +G04 #@! TA.AperFunction,NonConductor* +%ADD11C,0.100000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X212995726Y-135238845D02* +X213616858Y-135426375D01* +X214189731Y-135730978D01* +X214692537Y-136141057D01* +X215106109Y-136640980D01* +X215414707Y-137211718D01* +X215606568Y-137831525D01* +X215676487Y-138496753D01* +X215676500Y-138500609D01* +X215676501Y-155979276D01* +X215611155Y-156645726D01* +X215423624Y-157266859D01* +X215119022Y-157839732D01* +X214708943Y-158342537D01* +X214209020Y-158756109D01* +X213638283Y-159064706D01* +X213018479Y-159256567D01* +X212353247Y-159326487D01* +X212349391Y-159326500D01* +X124870714Y-159326500D01* +X124204274Y-159261155D01* +X123583141Y-159073624D01* +X123010268Y-158769022D01* +X122507463Y-158358943D01* +X122093891Y-157859020D01* +X121785294Y-157288283D01* +X121593433Y-156668479D01* +X121530364Y-156068428D01* +X121535000Y-156021362D01* +X121535000Y-155283872D01* +X123105618Y-155283872D01* +X123105618Y-155716128D01* +X123189947Y-156140078D01* +X123355364Y-156539430D01* +X123595512Y-156898837D01* +X123901163Y-157204488D01* +X124260570Y-157444636D01* +X124659922Y-157610053D01* +X125083872Y-157694382D01* +X125516128Y-157694382D01* +X125940078Y-157610053D01* +X126339430Y-157444636D01* +X126698837Y-157204488D01* +X127004488Y-156898837D01* +X127244636Y-156539430D01* +X127410053Y-156140078D01* +X127494382Y-155716128D01* +X127494382Y-155283872D01* +X209605618Y-155283872D01* +X209605618Y-155716128D01* +X209689947Y-156140078D01* +X209855364Y-156539430D01* +X210095512Y-156898837D01* +X210401163Y-157204488D01* +X210760570Y-157444636D01* +X211159922Y-157610053D01* +X211583872Y-157694382D01* +X212016128Y-157694382D01* +X212440078Y-157610053D01* +X212839430Y-157444636D01* +X213198837Y-157204488D01* +X213504488Y-156898837D01* +X213744636Y-156539430D01* +X213910053Y-156140078D01* +X213994382Y-155716128D01* +X213994382Y-155283872D01* +X213910053Y-154859922D01* +X213744636Y-154460570D01* +X213504488Y-154101163D01* +X213198837Y-153795512D01* +X212839430Y-153555364D01* +X212440078Y-153389947D01* +X212016128Y-153305618D01* +X211583872Y-153305618D01* +X211159922Y-153389947D01* +X210760570Y-153555364D01* +X210401163Y-153795512D01* +X210095512Y-154101163D01* +X209855364Y-154460570D01* +X209689947Y-154859922D01* +X209605618Y-155283872D01* +X127494382Y-155283872D01* +X127410053Y-154859922D01* +X127244636Y-154460570D01* +X127004488Y-154101163D01* +X126698837Y-153795512D01* +X126339430Y-153555364D01* +X125940078Y-153389947D01* +X125516128Y-153305618D01* +X125083872Y-153305618D01* +X124659922Y-153389947D01* +X124260570Y-153555364D01* +X123901163Y-153795512D01* +X123595512Y-154101163D01* +X123355364Y-154460570D01* +X123189947Y-154859922D01* +X123105618Y-155283872D01* +X121535000Y-155283872D01* +X121535000Y-138783872D01* +X123105618Y-138783872D01* +X123105618Y-139216128D01* +X123189947Y-139640078D01* +X123355364Y-140039430D01* +X123595512Y-140398837D01* +X123901163Y-140704488D01* +X124260570Y-140944636D01* +X124659922Y-141110053D01* +X125083872Y-141194382D01* +X125516128Y-141194382D01* +X125940078Y-141110053D01* +X126339430Y-140944636D01* +X126698837Y-140704488D01* +X127004488Y-140398837D01* +X127244636Y-140039430D01* +X127410053Y-139640078D01* +X127494382Y-139216128D01* +X127494382Y-138783872D01* +X209605618Y-138783872D01* +X209605618Y-139216128D01* +X209689947Y-139640078D01* +X209855364Y-140039430D01* +X210095512Y-140398837D01* +X210401163Y-140704488D01* +X210760570Y-140944636D01* +X211159922Y-141110053D01* +X211583872Y-141194382D01* +X212016128Y-141194382D01* +X212440078Y-141110053D01* +X212839430Y-140944636D01* +X213198837Y-140704488D01* +X213504488Y-140398837D01* +X213744636Y-140039430D01* +X213910053Y-139640078D01* +X213994382Y-139216128D01* +X213994382Y-138783872D01* +X213910053Y-138359922D01* +X213744636Y-137960570D01* +X213504488Y-137601163D01* +X213198837Y-137295512D01* +X212839430Y-137055364D01* +X212440078Y-136889947D01* +X212016128Y-136805618D01* +X211583872Y-136805618D01* +X211159922Y-136889947D01* +X210760570Y-137055364D01* +X210401163Y-137295512D01* +X210095512Y-137601163D01* +X209855364Y-137960570D01* +X209689947Y-138359922D01* +X209605618Y-138783872D01* +X127494382Y-138783872D01* +X127410053Y-138359922D01* +X127244636Y-137960570D01* +X127004488Y-137601163D01* +X126698837Y-137295512D01* +X126339430Y-137055364D01* +X125940078Y-136889947D01* +X125516128Y-136805618D01* +X125083872Y-136805618D01* +X124659922Y-136889947D01* +X124260570Y-137055364D01* +X123901163Y-137295512D01* +X123595512Y-137601163D01* +X123355364Y-137960570D01* +X123189947Y-138359922D01* +X123105618Y-138783872D01* +X121535000Y-138783872D01* +X121535000Y-138478638D01* +X121531304Y-138441118D01* +X121588845Y-137854274D01* +X121776375Y-137233142D01* +X122080978Y-136660269D01* +X122491057Y-136157463D01* +X122990980Y-135743891D01* +X123561718Y-135435293D01* +X124181525Y-135243432D01* +X124846753Y-135173513D01* +X124850609Y-135173500D01* +X212329286Y-135173500D01* +X212995726Y-135238845D01* +G04 #@! TA.AperFunction,NonConductor* +D11* +G36* +X212995726Y-135238845D02* +G01* +X213616858Y-135426375D01* +X214189731Y-135730978D01* +X214692537Y-136141057D01* +X215106109Y-136640980D01* +X215414707Y-137211718D01* +X215606568Y-137831525D01* +X215676487Y-138496753D01* +X215676500Y-138500609D01* +X215676501Y-155979276D01* +X215611155Y-156645726D01* +X215423624Y-157266859D01* +X215119022Y-157839732D01* +X214708943Y-158342537D01* +X214209020Y-158756109D01* +X213638283Y-159064706D01* +X213018479Y-159256567D01* +X212353247Y-159326487D01* +X212349391Y-159326500D01* +X124870714Y-159326500D01* +X124204274Y-159261155D01* +X123583141Y-159073624D01* +X123010268Y-158769022D01* +X122507463Y-158358943D01* +X122093891Y-157859020D01* +X121785294Y-157288283D01* +X121593433Y-156668479D01* +X121530364Y-156068428D01* +X121535000Y-156021362D01* +X121535000Y-155283872D01* +X123105618Y-155283872D01* +X123105618Y-155716128D01* +X123189947Y-156140078D01* +X123355364Y-156539430D01* +X123595512Y-156898837D01* +X123901163Y-157204488D01* +X124260570Y-157444636D01* +X124659922Y-157610053D01* +X125083872Y-157694382D01* +X125516128Y-157694382D01* +X125940078Y-157610053D01* +X126339430Y-157444636D01* +X126698837Y-157204488D01* +X127004488Y-156898837D01* +X127244636Y-156539430D01* +X127410053Y-156140078D01* +X127494382Y-155716128D01* +X127494382Y-155283872D01* +X209605618Y-155283872D01* +X209605618Y-155716128D01* +X209689947Y-156140078D01* +X209855364Y-156539430D01* +X210095512Y-156898837D01* +X210401163Y-157204488D01* +X210760570Y-157444636D01* +X211159922Y-157610053D01* +X211583872Y-157694382D01* +X212016128Y-157694382D01* +X212440078Y-157610053D01* +X212839430Y-157444636D01* +X213198837Y-157204488D01* +X213504488Y-156898837D01* +X213744636Y-156539430D01* +X213910053Y-156140078D01* +X213994382Y-155716128D01* +X213994382Y-155283872D01* +X213910053Y-154859922D01* +X213744636Y-154460570D01* +X213504488Y-154101163D01* +X213198837Y-153795512D01* +X212839430Y-153555364D01* +X212440078Y-153389947D01* +X212016128Y-153305618D01* +X211583872Y-153305618D01* +X211159922Y-153389947D01* +X210760570Y-153555364D01* +X210401163Y-153795512D01* +X210095512Y-154101163D01* +X209855364Y-154460570D01* +X209689947Y-154859922D01* +X209605618Y-155283872D01* +X127494382Y-155283872D01* +X127410053Y-154859922D01* +X127244636Y-154460570D01* +X127004488Y-154101163D01* +X126698837Y-153795512D01* +X126339430Y-153555364D01* +X125940078Y-153389947D01* +X125516128Y-153305618D01* +X125083872Y-153305618D01* +X124659922Y-153389947D01* +X124260570Y-153555364D01* +X123901163Y-153795512D01* +X123595512Y-154101163D01* +X123355364Y-154460570D01* +X123189947Y-154859922D01* +X123105618Y-155283872D01* +X121535000Y-155283872D01* +X121535000Y-138783872D01* +X123105618Y-138783872D01* +X123105618Y-139216128D01* +X123189947Y-139640078D01* +X123355364Y-140039430D01* +X123595512Y-140398837D01* +X123901163Y-140704488D01* +X124260570Y-140944636D01* +X124659922Y-141110053D01* +X125083872Y-141194382D01* +X125516128Y-141194382D01* +X125940078Y-141110053D01* +X126339430Y-140944636D01* +X126698837Y-140704488D01* +X127004488Y-140398837D01* +X127244636Y-140039430D01* +X127410053Y-139640078D01* +X127494382Y-139216128D01* +X127494382Y-138783872D01* +X209605618Y-138783872D01* +X209605618Y-139216128D01* +X209689947Y-139640078D01* +X209855364Y-140039430D01* +X210095512Y-140398837D01* +X210401163Y-140704488D01* +X210760570Y-140944636D01* +X211159922Y-141110053D01* +X211583872Y-141194382D01* +X212016128Y-141194382D01* +X212440078Y-141110053D01* +X212839430Y-140944636D01* +X213198837Y-140704488D01* +X213504488Y-140398837D01* +X213744636Y-140039430D01* +X213910053Y-139640078D01* +X213994382Y-139216128D01* +X213994382Y-138783872D01* +X213910053Y-138359922D01* +X213744636Y-137960570D01* +X213504488Y-137601163D01* +X213198837Y-137295512D01* +X212839430Y-137055364D01* +X212440078Y-136889947D01* +X212016128Y-136805618D01* +X211583872Y-136805618D01* +X211159922Y-136889947D01* +X210760570Y-137055364D01* +X210401163Y-137295512D01* +X210095512Y-137601163D01* +X209855364Y-137960570D01* +X209689947Y-138359922D01* +X209605618Y-138783872D01* +X127494382Y-138783872D01* +X127410053Y-138359922D01* +X127244636Y-137960570D01* +X127004488Y-137601163D01* +X126698837Y-137295512D01* +X126339430Y-137055364D01* +X125940078Y-136889947D01* +X125516128Y-136805618D01* +X125083872Y-136805618D01* +X124659922Y-136889947D01* +X124260570Y-137055364D01* +X123901163Y-137295512D01* +X123595512Y-137601163D01* +X123355364Y-137960570D01* +X123189947Y-138359922D01* +X123105618Y-138783872D01* +X121535000Y-138783872D01* +X121535000Y-138478638D01* +X121531304Y-138441118D01* +X121588845Y-137854274D01* +X121776375Y-137233142D01* +X122080978Y-136660269D01* +X122491057Y-136157463D01* +X122990980Y-135743891D01* +X123561718Y-135435293D01* +X124181525Y-135243432D01* +X124846753Y-135173513D01* +X124850609Y-135173500D01* +X212329286Y-135173500D01* +X212995726Y-135238845D01* +G37* +G04 #@! TD.AperFunction* +M02* diff --git a/pcb/gerbers/case-bottom-gerbers/casing-B_Mask.gbr b/pcb/gerbers/case-bottom-gerbers/casing-B_Mask.gbr new file mode 100644 index 0000000..0dcee2e --- /dev/null +++ b/pcb/gerbers/case-bottom-gerbers/casing-B_Mask.gbr @@ -0,0 +1,57 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:18:57-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:18:57* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10C,1.500000*% +G04 APERTURE END LIST* +D10* +X127800000Y-139000000D02* +G75* +G03* +X127800000Y-139000000I-2500000J0D01* +G01* +X127800000Y-155500000D02* +G75* +G03* +X127800000Y-155500000I-2500000J0D01* +G01* +X214300000Y-155500000D02* +G75* +G03* +X214300000Y-155500000I-2500000J0D01* +G01* +X214300000Y-139000000D02* +G75* +G03* +X214300000Y-139000000I-2500000J0D01* +G01* +X127800000Y-139000000D02* +G75* +G03* +X127800000Y-139000000I-2500000J0D01* +G01* +X127800000Y-155500000D02* +G75* +G03* +X127800000Y-155500000I-2500000J0D01* +G01* +X214300000Y-155500000D02* +G75* +G03* +X214300000Y-155500000I-2500000J0D01* +G01* +X214300000Y-139000000D02* +G75* +G03* +X214300000Y-139000000I-2500000J0D01* +G01* +M02* diff --git a/pcb/gerbers/case-bottom-gerbers/casing-B_SilkS.gbr b/pcb/gerbers/case-bottom-gerbers/casing-B_SilkS.gbr new file mode 100644 index 0000000..7434dae --- /dev/null +++ b/pcb/gerbers/case-bottom-gerbers/casing-B_SilkS.gbr @@ -0,0 +1,15 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:18:57-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Legend,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:18:57* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/pcb/gerbers/case-bottom-gerbers/casing-Edge_Cuts.gbr b/pcb/gerbers/case-bottom-gerbers/casing-Edge_Cuts.gbr new file mode 100644 index 0000000..45a2578 --- /dev/null +++ b/pcb/gerbers/case-bottom-gerbers/casing-Edge_Cuts.gbr @@ -0,0 +1,71 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:18:57-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Profile,NP* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:18:57* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,Profile* +%ADD10C,0.150000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Profile* +%ADD11C,0.127000*% +G04 #@! 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TF.CreationDate,2020-12-10T20:18:59-08:00 +; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1 +FMAT,2 +INCH +% +G90 +G05 +T0 +M30 diff --git a/pcb/gerbers/case-top-gerbers/casing-B_Cu.gbr b/pcb/gerbers/case-top-gerbers/casing-B_Cu.gbr new file mode 100644 index 0000000..774e759 --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-B_Cu.gbr @@ -0,0 +1,463 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L2,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:17:47* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ViaPad* +%ADD10C,2.400000*% +G04 #@! TD* +G04 #@! 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TA.AperFunction,NonConductor* +D12* +G36* +X212995726Y-135238845D02* +G01* +X213616858Y-135426375D01* +X214189731Y-135730978D01* +X214692537Y-136141057D01* +X215106109Y-136640980D01* +X215414707Y-137211718D01* +X215606568Y-137831525D01* +X215676487Y-138496753D01* +X215676500Y-138500609D01* +X215676501Y-155979276D01* +X215611155Y-156645726D01* +X215423624Y-157266859D01* +X215119022Y-157839732D01* +X214708943Y-158342537D01* +X214209020Y-158756109D01* +X213638283Y-159064706D01* +X213018479Y-159256567D01* +X212353247Y-159326487D01* +X212349391Y-159326500D01* +X124870714Y-159326500D01* +X124204274Y-159261155D01* +X123583141Y-159073624D01* +X123010268Y-158769022D01* +X122507463Y-158358943D01* +X122093891Y-157859020D01* +X121785294Y-157288283D01* +X121593433Y-156668479D01* +X121530364Y-156068428D01* +X121535000Y-156021362D01* +X121535000Y-155283872D01* +X123105618Y-155283872D01* +X123105618Y-155716128D01* +X123189947Y-156140078D01* +X123355364Y-156539430D01* +X123595512Y-156898837D01* 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TD.AperFunction* +M02* diff --git a/pcb/gerbers/case-top-gerbers/casing-B_Mask.gbr b/pcb/gerbers/case-top-gerbers/casing-B_Mask.gbr new file mode 100644 index 0000000..fce307b --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-B_Mask.gbr @@ -0,0 +1,57 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:17:47* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10C,1.500000*% +G04 APERTURE END LIST* +D10* +X127800000Y-139000000D02* +G75* +G03* +X127800000Y-139000000I-2500000J0D01* +G01* +X127800000Y-155500000D02* +G75* +G03* +X127800000Y-155500000I-2500000J0D01* +G01* +X214300000Y-155500000D02* +G75* +G03* +X214300000Y-155500000I-2500000J0D01* +G01* +X214300000Y-139000000D02* +G75* +G03* +X214300000Y-139000000I-2500000J0D01* +G01* +X127800000Y-139000000D02* +G75* +G03* +X127800000Y-139000000I-2500000J0D01* +G01* +X127800000Y-155500000D02* +G75* +G03* +X127800000Y-155500000I-2500000J0D01* +G01* +X214300000Y-155500000D02* +G75* +G03* +X214300000Y-155500000I-2500000J0D01* +G01* +X214300000Y-139000000D02* +G75* +G03* +X214300000Y-139000000I-2500000J0D01* +G01* +M02* diff --git a/pcb/gerbers/case-top-gerbers/casing-B_SilkS.gbr b/pcb/gerbers/case-top-gerbers/casing-B_SilkS.gbr new file mode 100644 index 0000000..5c8a851 --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-B_SilkS.gbr @@ -0,0 +1,15 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Legend,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:17:47* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/pcb/gerbers/case-top-gerbers/casing-Edge_Cuts.gbr b/pcb/gerbers/case-top-gerbers/casing-Edge_Cuts.gbr new file mode 100644 index 0000000..9ad7495 --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-Edge_Cuts.gbr @@ -0,0 +1,71 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Profile,NP* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:17:47* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,Profile* +%ADD10C,0.150000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Profile* +%ADD11C,0.127000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X121100000Y-138500000D02* +X121100000Y-156000000D01* +D11* +X124850000Y-159750000D02* +G75* +G02* +X121100000Y-156000000I0J3750000D01* +G01* +X121100000Y-138500000D02* +G75* +G02* +X124850000Y-134750000I3750000J0D01* +G01* +X216100000Y-156000000D02* +G75* +G02* +X212350000Y-159750000I-3750000J0D01* +G01* +X212350000Y-134750000D02* +G75* +G02* +X216100000Y-138500000I0J-3750000D01* +G01* +X124850000Y-134750000D02* +X212350000Y-134750000D01* +X212350000Y-159750000D02* +X124850000Y-159750000D01* +X216100000Y-138500000D02* +X216100000Y-156000000D01* +D10* +X127050000Y-155500000D02* +G75* +G03* +X127050000Y-155500000I-1750000J0D01* +G01* +X213550000Y-155500000D02* +G75* +G03* +X213550000Y-155500000I-1750000J0D01* +G01* +X213550000Y-139000000D02* +G75* +G03* +X213550000Y-139000000I-1750000J0D01* +G01* +X127050000Y-139000000D02* +G75* +G03* +X127050000Y-139000000I-1750000J0D01* +G01* +M02* diff --git a/pcb/gerbers/case-top-gerbers/casing-F_Cu.gbr b/pcb/gerbers/case-top-gerbers/casing-F_Cu.gbr new file mode 100644 index 0000000..8a83beb --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-F_Cu.gbr @@ -0,0 +1,41 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L1,Top* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:17:47* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ViaPad* +%ADD10C,2.400000*% +G04 #@! TD* +G04 #@! TA.AperFunction,NonConductor* +%ADD11C,0.254000*% +G04 #@! TD* +G04 #@! TA.AperFunction,NonConductor* +%ADD12C,0.100000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X203300000Y-141500000D03* +D11* +X155051320Y-143986341D02* +X154674620Y-143044591D01* +X156558121Y-142667891D01* +X155051320Y-143986341D01* +G04 #@! TA.AperFunction,NonConductor* +D12* +G36* +X155051320Y-143986341D02* +G01* +X154674620Y-143044591D01* +X156558121Y-142667891D01* +X155051320Y-143986341D01* +G37* +G04 #@! TD.AperFunction* +M02* diff --git a/pcb/gerbers/case-top-gerbers/casing-F_Mask.gbr b/pcb/gerbers/case-top-gerbers/casing-F_Mask.gbr new file mode 100644 index 0000000..6d919a6 --- /dev/null +++ b/pcb/gerbers/case-top-gerbers/casing-F_Mask.gbr @@ -0,0 +1,57 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:17:47-08:00* +G04 #@! TF.ProjectId,casing,63617369-6e67-42e6-9b69-6361645f7063,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Top* +G04 #@! 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TF.CreationDate,2020-12-10T20:17:49-08:00 +; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1 +FMAT,2 +INCH +T1C0.0787 +% +G90 +G05 +T1 +X8.0039Y-5.5709 +T0 +M30 diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-B_Cu.gbl b/pcb/gerbers/current-sense-gerbers/current-sense-B_Cu.gbl new file mode 100644 index 0000000..a3d19db --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-B_Cu.gbl @@ -0,0 +1,7215 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L4,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! 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+X15487373Y42265116D01* +X15607485Y42215364D01* +X15734996Y42190000D01* +X15865004Y42190000D01* +X15992515Y42215364D01* +X16112627Y42265116D01* +X16220725Y42337345D01* +X16312655Y42429275D01* +X16384884Y42537373D01* +X16434636Y42657485D01* +X16460000Y42784996D01* +X16460000Y42915004D01* +X16434636Y43042515D01* +X16384884Y43162627D01* +X16312655Y43270725D01* +X16220725Y43362655D01* +X16112627Y43434884D01* +X15992515Y43484636D01* +X15865004Y43510000D01* +X15734996Y43510000D01* +X15607485Y43484636D01* +X15487373Y43434884D01* +X15379275Y43362655D01* +X15287345Y43270725D01* +X15215116Y43162627D01* +X15165364Y43042515D01* +X15140000Y42915004D01* +X11663664Y42915004D01* +X11762413Y43048083D01* +X10293131Y44517365D01* +X10293130Y44517365D01* +X9250000Y45560495D01* +X9235858Y45546353D01* +X9046353Y45735858D01* +X9060495Y45750000D01* +X9439505Y45750000D01* +X10482635Y44706870D01* +X10482635Y44706869D01* +X11951917Y43237587D01* +X12438776Y43598852D01* +X12797173Y44262286D01* +X13019254Y44982891D01* +X13096484Y45732976D01* +X13025896Y46483715D01* +X12810203Y47206257D01* +X12457693Y47872837D01* +X12438776Y47901148D01* +X11951917Y48262413D01* +X10482635Y46793131D01* +X10482635Y46793130D01* +X9439505Y45750000D01* +X9060495Y45750000D01* +X9046353Y45764142D01* +X9235858Y45953647D01* +X9250000Y45939505D01* +X10293130Y46982635D01* +X10293131Y46982635D01* +X11762413Y48451917D01* +X11401148Y48938776D01* +X10737714Y49297173D01* +X10017109Y49519254D01* +X9461116Y49576500D01* +X27697636Y49576500D01* +X27603303Y49557736D01* +G37* +G04 #@! TD.AperFunction* +D28* +X36890000Y29064967D02* +X36842515Y29084636D01* +X36715004Y29110000D01* +X36584996Y29110000D01* +X36457485Y29084636D01* +X36337373Y29034884D01* +X36229275Y28962655D01* +X36196620Y28930000D01* +X28929958Y28930000D01* +X28934884Y28937373D01* +X28984636Y29057485D01* +X28991104Y29090000D01* +X29065004Y29090000D01* +X29192515Y29115364D01* +X29312627Y29165116D01* +X29420725Y29237345D01* +X29512655Y29329275D01* +X29584884Y29437373D01* +X29634636Y29557485D01* +X29660000Y29684996D01* +X29660000Y29815004D01* +X29634636Y29942515D01* +X29584884Y30062627D01* +X29512655Y30170725D01* +X29440000Y30243380D01* +X29440000Y30281749D01* +X29575253Y30417001D01* +X36890000Y30417001D01* +X36890000Y29064967D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X36890000Y29064967D02* +G01* +X36842515Y29084636D01* +X36715004Y29110000D01* +X36584996Y29110000D01* +X36457485Y29084636D01* +X36337373Y29034884D01* +X36229275Y28962655D01* +X36196620Y28930000D01* +X28929958Y28930000D01* +X28934884Y28937373D01* +X28984636Y29057485D01* +X28991104Y29090000D01* +X29065004Y29090000D01* +X29192515Y29115364D01* +X29312627Y29165116D01* +X29420725Y29237345D01* +X29512655Y29329275D01* +X29584884Y29437373D01* +X29634636Y29557485D01* +X29660000Y29684996D01* +X29660000Y29815004D01* +X29634636Y29942515D01* +X29584884Y30062627D01* +X29512655Y30170725D01* +X29440000Y30243380D01* +X29440000Y30281749D01* +X29575253Y30417001D01* +X36890000Y30417001D01* +X36890000Y29064967D01* +G37* +G04 #@! TD.AperFunction* +D28* +X36890000Y34751992D02* +X36865364Y34692515D01* +X36840000Y34565004D01* +X36840000Y34434996D01* +X36865364Y34307485D01* +X36890000Y34248008D01* +X36890000Y32012253D01* +X36867747Y31990000D01* +X35182254Y31990000D01* +X34209342Y32962912D01* +X34403166Y32833402D01* +X34632471Y32738421D01* +X34875901Y32690000D01* +X35124099Y32690000D01* +X35367529Y32738421D01* +X35596834Y32833402D01* +X35803203Y32971294D01* +X35978706Y33146797D01* +X36116598Y33353166D01* +X36211579Y33582471D01* +X36260000Y33825901D01* +X36260000Y34074099D01* +X36211579Y34317529D01* +X36116598Y34546834D01* +X35978706Y34753203D01* +X35803203Y34928706D01* +X35596834Y35066598D01* +X35367529Y35161579D01* +X35124099Y35210000D01* +X34875901Y35210000D01* +X34632471Y35161579D01* +X34403166Y35066598D01* +X34196797Y34928706D01* +X34021294Y34753203D01* +X33883402Y34546834D01* +X33788421Y34317529D01* +X33740000Y34074099D01* +X33740000Y33825901D01* +X33788421Y33582471D01* +X33883402Y33353166D01* +X34012912Y33159342D01* +X32626411Y34545842D01* +X32612632Y34562632D01* +X32545633Y34617616D01* +X32469195Y34658473D01* +X32386255Y34683633D01* +X32321607Y34690000D01* +X32321604Y34690000D01* +X32300000Y34692128D01* +X32278396Y34690000D01* +X25462253Y34690000D01* +X26082254Y35310000D01* +X36890000Y35310000D01* +X36890000Y34751992D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X36890000Y34751992D02* +G01* +X36865364Y34692515D01* +X36840000Y34565004D01* +X36840000Y34434996D01* +X36865364Y34307485D01* +X36890000Y34248008D01* +X36890000Y32012253D01* +X36867747Y31990000D01* +X35182254Y31990000D01* +X34209342Y32962912D01* +X34403166Y32833402D01* +X34632471Y32738421D01* +X34875901Y32690000D01* +X35124099Y32690000D01* +X35367529Y32738421D01* +X35596834Y32833402D01* +X35803203Y32971294D01* +X35978706Y33146797D01* +X36116598Y33353166D01* +X36211579Y33582471D01* +X36260000Y33825901D01* +X36260000Y34074099D01* +X36211579Y34317529D01* +X36116598Y34546834D01* +X35978706Y34753203D01* +X35803203Y34928706D01* +X35596834Y35066598D01* +X35367529Y35161579D01* +X35124099Y35210000D01* +X34875901Y35210000D01* +X34632471Y35161579D01* +X34403166Y35066598D01* +X34196797Y34928706D01* +X34021294Y34753203D01* +X33883402Y34546834D01* +X33788421Y34317529D01* +X33740000Y34074099D01* +X33740000Y33825901D01* +X33788421Y33582471D01* +X33883402Y33353166D01* +X34012912Y33159342D01* +X32626411Y34545842D01* +X32612632Y34562632D01* +X32545633Y34617616D01* +X32469195Y34658473D01* +X32386255Y34683633D01* +X32321607Y34690000D01* +X32321604Y34690000D01* +X32300000Y34692128D01* +X32278396Y34690000D01* +X25462253Y34690000D01* +X26082254Y35310000D01* +X36890000Y35310000D01* +X36890000Y34751992D01* +G37* +G04 #@! TD.AperFunction* +D28* +X35713745Y41116367D02* +X35778393Y41110000D01* +X35778396Y41110000D01* +X35800000Y41107872D01* +X35821604Y41110000D01* +X36890000Y41110000D01* +X36890000Y40501992D01* +X36865364Y40442515D01* +X36840000Y40315004D01* +X36840000Y40184996D01* +X36865364Y40057485D01* +X36890000Y39998008D01* +X36890000Y38940000D01* +X36482254Y38940000D01* +X35740000Y39682253D01* +X35740000Y40878397D01* +X35742128Y40900001D01* +X35739443Y40927259D01* +X35733633Y40986255D01* +X35708473Y41069195D01* +X35687800Y41107872D01* +X35677360Y41127405D01* +X35713745Y41116367D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X35713745Y41116367D02* +G01* +X35778393Y41110000D01* +X35778396Y41110000D01* +X35800000Y41107872D01* +X35821604Y41110000D01* +X36890000Y41110000D01* +X36890000Y40501992D01* +X36865364Y40442515D01* +X36840000Y40315004D01* +X36840000Y40184996D01* +X36865364Y40057485D01* +X36890000Y39998008D01* +X36890000Y38940000D01* +X36482254Y38940000D01* +X35740000Y39682253D01* +X35740000Y40878397D01* +X35742128Y40900001D01* +X35739443Y40927259D01* +X35733633Y40986255D01* +X35708473Y41069195D01* +X35687800Y41107872D01* +X35677360Y41127405D01* +X35713745Y41116367D01* +G37* +G04 #@! TD.AperFunction* +D28* +X86645550Y42942784D02* +X86666841Y42916841D01* +X86692784Y42895550D01* +X86692787Y42895547D01* +X86770384Y42831865D01* +X86888516Y42768722D01* +X87016697Y42729839D01* +X87150000Y42716710D01* +X87183404Y42720000D01* +X87768336Y42720000D01* +X88120000Y42368335D01* +X88120001Y36031666D01* +X87269428Y35181092D01* +X87124099Y35210000D01* +X86875901Y35210000D01* +X86632471Y35161579D01* +X86403166Y35066598D01* +X86196797Y34928706D01* +X86021294Y34753203D01* +X85883402Y34546834D01* +X85788421Y34317529D01* +X85740000Y34074099D01* +X85740000Y33825901D01* +X85788421Y33582471D01* +X85883402Y33353166D01* +X86021294Y33146797D01* +X86196797Y32971294D01* +X86403166Y32833402D01* +X86632471Y32738421D01* +X86875901Y32690000D01* +X87124099Y32690000D01* +X87367529Y32738421D01* +X87596834Y32833402D01* +X87803203Y32971294D01* +X87978706Y33146797D01* +X88116598Y33353166D01* +X88211579Y33582471D01* +X88260000Y33825901D01* +X88260000Y34074099D01* +X88231092Y34219428D01* +X89130000Y35118335D01* +X89130000Y32299706D01* +X85950294Y29120000D01* +X82792253Y29120000D01* +X85345848Y31673594D01* +X85362632Y31687368D01* +X85388751Y31719195D01* +X85417616Y31754366D01* +X85458473Y31830805D01* +X85466866Y31858472D01* +X85483633Y31913745D01* +X85490000Y31978393D01* +X85490000Y31978396D01* +X85492128Y32000000D01* +X85490000Y32021604D01* +X85490000Y41248008D01* +X85515116Y41187373D01* +X85587345Y41079275D01* +X85679275Y40987345D01* +X85787373Y40915116D01* +X85907485Y40865364D01* +X86034996Y40840000D01* +X86165004Y40840000D01* +X86292515Y40865364D01* +X86412627Y40915116D01* +X86520725Y40987345D01* +X86612655Y41079275D01* +X86684884Y41187373D01* +X86734636Y41307485D01* +X86760000Y41434996D01* +X86760000Y41565004D01* +X86734636Y41692515D01* +X86684884Y41812627D01* +X86612655Y41920725D01* +X86520725Y42012655D01* +X86412627Y42084884D01* +X86292515Y42134636D01* +X86165004Y42160000D01* +X86034996Y42160000D01* +X85907485Y42134636D01* +X85787373Y42084884D01* +X85679275Y42012655D01* +X85587345Y41920725D01* +X85515116Y41812627D01* +X85490000Y41751992D01* +X85490000Y42867747D01* +X85495843Y42873590D01* +X85512632Y42887368D01* +X85567616Y42954367D01* +X85608473Y43030805D01* +X85633633Y43113745D01* +X85640000Y43178393D01* +X85640000Y43178395D01* +X85642128Y43199999D01* +X85640000Y43221603D01* +X85640000Y43948336D01* +X86645550Y42942784D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X86645550Y42942784D02* +G01* +X86666841Y42916841D01* +X86692784Y42895550D01* +X86692787Y42895547D01* +X86770384Y42831865D01* +X86888516Y42768722D01* +X87016697Y42729839D01* +X87150000Y42716710D01* +X87183404Y42720000D01* +X87768336Y42720000D01* +X88120000Y42368335D01* +X88120001Y36031666D01* +X87269428Y35181092D01* +X87124099Y35210000D01* +X86875901Y35210000D01* +X86632471Y35161579D01* +X86403166Y35066598D01* +X86196797Y34928706D01* +X86021294Y34753203D01* +X85883402Y34546834D01* +X85788421Y34317529D01* +X85740000Y34074099D01* +X85740000Y33825901D01* +X85788421Y33582471D01* +X85883402Y33353166D01* +X86021294Y33146797D01* +X86196797Y32971294D01* +X86403166Y32833402D01* +X86632471Y32738421D01* +X86875901Y32690000D01* +X87124099Y32690000D01* +X87367529Y32738421D01* +X87596834Y32833402D01* +X87803203Y32971294D01* +X87978706Y33146797D01* +X88116598Y33353166D01* +X88211579Y33582471D01* +X88260000Y33825901D01* +X88260000Y34074099D01* +X88231092Y34219428D01* +X89130000Y35118335D01* +X89130000Y32299706D01* +X85950294Y29120000D01* +X82792253Y29120000D01* +X85345848Y31673594D01* +X85362632Y31687368D01* +X85388751Y31719195D01* +X85417616Y31754366D01* +X85458473Y31830805D01* +X85466866Y31858472D01* +X85483633Y31913745D01* +X85490000Y31978393D01* +X85490000Y31978396D01* +X85492128Y32000000D01* +X85490000Y32021604D01* +X85490000Y41248008D01* +X85515116Y41187373D01* +X85587345Y41079275D01* +X85679275Y40987345D01* +X85787373Y40915116D01* +X85907485Y40865364D01* +X86034996Y40840000D01* +X86165004Y40840000D01* +X86292515Y40865364D01* +X86412627Y40915116D01* +X86520725Y40987345D01* +X86612655Y41079275D01* +X86684884Y41187373D01* +X86734636Y41307485D01* +X86760000Y41434996D01* +X86760000Y41565004D01* +X86734636Y41692515D01* +X86684884Y41812627D01* +X86612655Y41920725D01* +X86520725Y42012655D01* +X86412627Y42084884D01* +X86292515Y42134636D01* +X86165004Y42160000D01* +X86034996Y42160000D01* +X85907485Y42134636D01* +X85787373Y42084884D01* +X85679275Y42012655D01* +X85587345Y41920725D01* +X85515116Y41812627D01* +X85490000Y41751992D01* +X85490000Y42867747D01* +X85495843Y42873590D01* +X85512632Y42887368D01* +X85567616Y42954367D01* +X85608473Y43030805D01* +X85633633Y43113745D01* +X85640000Y43178393D01* +X85640000Y43178395D01* +X85642128Y43199999D01* +X85640000Y43221603D01* +X85640000Y43948336D01* +X86645550Y42942784D01* +G37* +G04 #@! TD.AperFunction* +D28* +X89130000Y48329843D02* +X88791000Y48328000D01* +X88634000Y48171000D01* +X88634000Y46834000D01* +X88654000Y46834000D01* +X88654000Y46566000D01* +X88634000Y46566000D01* +X88634000Y45229000D01* +X88791000Y45072000D01* +X89130000Y45070157D01* +X89130000Y43281665D01* +X88554459Y43857205D01* +X88533159Y43883159D01* +X88429616Y43968135D01* +X88311484Y44031278D01* +X88183303Y44070161D01* +X88083404Y44080000D01* +X88050000Y44083290D01* +X88016596Y44080000D01* +X87431666Y44080000D01* +X86680000Y44831664D01* +X86680000Y45542754D01* +X86859739Y45690261D01* +X87010946Y45874508D01* +X87019780Y45891035D01* +X87018961Y45700000D01* +X87031086Y45576890D01* +X87066996Y45458512D01* +X87125310Y45349414D01* +X87203788Y45253788D01* +X87299414Y45175310D01* +X87408512Y45116996D01* +X87526890Y45081086D01* +X87650000Y45068961D01* +X88209000Y45072000D01* +X88366000Y45229000D01* +X88366000Y46566000D01* +X88346000Y46566000D01* +X88346000Y46834000D01* +X88366000Y46834000D01* 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+X89130000Y48329843D01* +G37* +G04 #@! TD.AperFunction* +D28* +X37479275Y35237345D02* +X37587373Y35165116D01* +X37707485Y35115364D01* +X37760000Y35104918D01* +X37760001Y32882255D01* +X37370000Y32492254D01* +X37370000Y35310000D01* +X37406620Y35310000D01* +X37479275Y35237345D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X37479275Y35237345D02* +G01* +X37587373Y35165116D01* +X37707485Y35115364D01* +X37760000Y35104918D01* +X37760001Y32882255D01* +X37370000Y32492254D01* +X37370000Y35310000D01* +X37406620Y35310000D01* +X37479275Y35237345D01* +G37* +G04 #@! TD.AperFunction* +D28* +X38260691Y37217056D02* +X38179275Y37162655D01* +X38087345Y37070725D01* +X38015116Y36962627D01* +X37965364Y36842515D01* +X37940000Y36715004D01* +X37940000Y36584996D01* +X37965364Y36457485D01* +X37986831Y36405658D01* +X37965004Y36410000D01* +X37834996Y36410000D01* +X37707485Y36384636D01* +X37587373Y36334884D01* +X37479275Y36262655D01* +X37406620Y36190000D01* +X37370000Y36190000D01* +X37370000Y37179620D01* +X37412655Y37222275D01* +X37484884Y37330373D01* +X37534636Y37450485D01* +X37560000Y37577996D01* +X37560000Y37708004D01* +X37559603Y37710000D01* +X37767747Y37710000D01* +X38260691Y37217056D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X38260691Y37217056D02* +G01* +X38179275Y37162655D01* +X38087345Y37070725D01* +X38015116Y36962627D01* +X37965364Y36842515D01* +X37940000Y36715004D01* +X37940000Y36584996D01* +X37965364Y36457485D01* +X37986831Y36405658D01* +X37965004Y36410000D01* +X37834996Y36410000D01* +X37707485Y36384636D01* +X37587373Y36334884D01* +X37479275Y36262655D01* +X37406620Y36190000D01* +X37370000Y36190000D01* +X37370000Y37179620D01* +X37412655Y37222275D01* +X37484884Y37330373D01* +X37534636Y37450485D01* +X37560000Y37577996D01* +X37560000Y37708004D01* +X37559603Y37710000D01* +X37767747Y37710000D01* +X38260691Y37217056D01* +G37* +G04 #@! TD.AperFunction* +D28* +X38037345Y42670725D02* +X37965116Y42562627D01* +X37915364Y42442515D01* +X37890000Y42315004D01* +X37890000Y42184996D01* +X37915364Y42057485D01* +X37943317Y41990000D01* +X37370000Y41990000D01* +X37370000Y42710000D01* +X38076620Y42710000D01* +X38037345Y42670725D01* +G04 #@! TA.AperFunction,Conductor* +D31* +G36* +X38037345Y42670725D02* +G01* +X37965116Y42562627D01* +X37915364Y42442515D01* +X37890000Y42315004D01* +X37890000Y42184996D01* +X37915364Y42057485D01* +X37943317Y41990000D01* +X37370000Y41990000D01* +X37370000Y42710000D01* +X38076620Y42710000D01* +X38037345Y42670725D01* +G37* +G04 #@! TD.AperFunction* +D28* +X71838579Y49505390D02* +X71584943Y49369819D01* +X71362629Y49187370D01* +X71180181Y48965056D01* +X71044610Y48711420D01* +X70961125Y48436209D01* +X70940000Y48221722D01* +X70940000Y46778277D01* +X70961125Y46563790D01* +X71044610Y46288579D01* +X71180182Y46034943D01* +X71362630Y45812629D01* +X71584944Y45630181D01* +X71838580Y45494610D01* +X72113791Y45411125D01* +X72400000Y45382936D01* +X72686210Y45411125D01* +X72961421Y45494610D01* +X73215057Y45630181D01* +X73437371Y45812629D01* +X73549335Y45949058D01* +X73611568Y45915795D01* +X73679428Y45895210D01* +X73750000Y45888259D01* +X74020001Y45888259D01* +X74020001Y45748824D01* +X73101178Y44830000D01* +X71753380Y44830000D01* +X71720725Y44862655D01* +X71612627Y44934884D01* +X71492515Y44984636D01* +X71365004Y45010000D01* +X71234996Y45010000D01* +X71107485Y44984636D01* +X70987373Y44934884D01* +X70879275Y44862655D01* +X70787345Y44770725D01* +X70715116Y44662627D01* +X70665364Y44542515D01* +X70640000Y44415004D01* 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TA.AperFunction,Conductor* +D31* +G36* +X71838579Y49505390D02* +G01* +X71584943Y49369819D01* +X71362629Y49187370D01* +X71180181Y48965056D01* +X71044610Y48711420D01* +X70961125Y48436209D01* +X70940000Y48221722D01* +X70940000Y46778277D01* +X70961125Y46563790D01* +X71044610Y46288579D01* +X71180182Y46034943D01* +X71362630Y45812629D01* +X71584944Y45630181D01* +X71838580Y45494610D01* +X72113791Y45411125D01* +X72400000Y45382936D01* +X72686210Y45411125D01* +X72961421Y45494610D01* +X73215057Y45630181D01* +X73437371Y45812629D01* +X73549335Y45949058D01* +X73611568Y45915795D01* +X73679428Y45895210D01* +X73750000Y45888259D01* +X74020001Y45888259D01* +X74020001Y45748824D01* +X73101178Y44830000D01* +X71753380Y44830000D01* +X71720725Y44862655D01* +X71612627Y44934884D01* +X71492515Y44984636D01* +X71365004Y45010000D01* +X71234996Y45010000D01* +X71107485Y44984636D01* +X70987373Y44934884D01* +X70879275Y44862655D01* +X70787345Y44770725D01* +X70715116Y44662627D01* +X70665364Y44542515D01* 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TD.AperFunction* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-B_Mask.gbs b/pcb/gerbers/current-sense-gerbers/current-sense-B_Mask.gbs new file mode 100644 index 0000000..b892214 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-B_Mask.gbs @@ -0,0 +1,158 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:13-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Bot* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:13* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10O,1.800000X2.100000*% +%ADD11C,1.900000*% +%ADD12C,0.460000*% +%ADD13O,1.600000X2.600000*% +%ADD14O,2.300000X3.600000*% +%ADD15C,2.200000*% +%ADD16C,1.850000*% +%ADD17C,2.100000*% +%ADD18C,2.350000*% +%ADD19C,0.900000*% +%ADD20C,6.500000*% +%ADD21C,1.091000*% +G04 APERTURE END LIST* +D10* +X86000000Y46700000D03* +G36* +G01* +X89400000Y47485295D02* +X89400000Y45914705D01* +G75* +G02* +X89135295Y45650000I-264705J0D01* +G01* +X87864705Y45650000D01* +G75* +G02* +X87600000Y45914705I0J264705D01* +G01* +X87600000Y47485295D01* +G75* +G02* +X87864705Y47750000I264705J0D01* +G01* +X89135295Y47750000D01* +G75* +G02* +X89400000Y47485295I0J-264705D01* +G01* +G37* +D11* +X87000000Y33950000D03* +X35000000Y33950000D03* +D12* +X73700000Y39750000D03* +X73700000Y38750000D03* +G36* +G01* +X73700000Y46250000D02* +X73700000Y48750000D01* +G75* +G02* +X73750000Y48800000I50000J0D01* +G01* +X75250000Y48800000D01* +G75* +G02* +X75300000Y48750000I0J-50000D01* +G01* +X75300000Y46250000D01* +G75* +G02* +X75250000Y46200000I-50000J0D01* +G01* +X73750000Y46200000D01* +G75* +G02* +X73700000Y46250000I0J50000D01* +G01* +G37* +D13* +X76500000Y47500000D03* +X78500000Y47500000D03* +D14* +X72400000Y47500000D03* +X80600000Y47500000D03* +D15* +X58990000Y44760000D03* +D16* +X60250000Y47250000D03* +X64750000Y47250000D03* +D15* +X66000000Y44760000D03* +X44990000Y44760000D03* +D16* +X46250000Y47250000D03* +X50750000Y47250000D03* +D15* +X52000000Y44760000D03* +D17* +X28000000Y48250000D03* +D18* +X93210000Y34960000D03* +X98290000Y34960000D03* +X98290000Y40040000D03* +X93210000Y40040000D03* +X95750000Y37500000D03* +D19* +X11000000Y44000000D03* +X7500000Y47500000D03* +X7500000Y44000000D03* +X9250000Y43250000D03* +X6750000Y45750000D03* +X9250000Y48250000D03* +X11000000Y47500000D03* +X11750000Y45750000D03* +D20* +X9250000Y45750000D03* +D19* +X97500000Y44000000D03* +X94000000Y47500000D03* +X94000000Y44000000D03* +X95750000Y43250000D03* +X93250000Y45750000D03* +X95750000Y48250000D03* +X97500000Y47500000D03* +X98250000Y45750000D03* +D20* +X95750000Y45750000D03* +D21* +X40790000Y47766000D03* +X40790000Y45734000D03* +X35710000Y46750000D03* +D19* +X11000000Y27500000D03* +X7500000Y31000000D03* +X7500000Y27500000D03* +X9250000Y26750000D03* +X6750000Y29250000D03* +X9250000Y31750000D03* +X11000000Y31000000D03* +X11750000Y29250000D03* +D20* +X9250000Y29250000D03* +D19* +X97500000Y27500000D03* +X94000000Y31000000D03* +X94000000Y27500000D03* +X95750000Y26750000D03* +X93250000Y29250000D03* +X95750000Y31750000D03* +X97500000Y31000000D03* +X98250000Y29250000D03* +D20* +X95750000Y29250000D03* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-B_Paste.gbp b/pcb/gerbers/current-sense-gerbers/current-sense-B_Paste.gbp new file mode 100644 index 0000000..43ee2d9 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-B_Paste.gbp @@ -0,0 +1,19 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Paste,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10C,0.360000*% +G04 APERTURE END LIST* +D10* +X73700000Y39750000D03* +X73700000Y38750000D03* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-B_SilkS.gbo b/pcb/gerbers/current-sense-gerbers/current-sense-B_SilkS.gbo new file mode 100644 index 0000000..44024f2 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-B_SilkS.gbo @@ -0,0 +1,216 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Legend,Bot* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10C,0.100000*% +%ADD11C,0.150000*% +%ADD12C,0.120000*% +G04 APERTURE END LIST* +D10* +G36* +X21000000Y30250000D02* +G01* +X16000000Y30250000D01* +X16000000Y42250000D01* +X21000000Y42250000D01* +X21000000Y30250000D01* +G37* +X21000000Y30250000D02* +X16000000Y30250000D01* +X16000000Y42250000D01* +X21000000Y42250000D01* +X21000000Y30250000D01* +D11* +X18857142Y47678571D02* +X18928571Y47464285D01* +X18928571Y47107142D01* +X18857142Y46964285D01* +X18785714Y46892857D01* +X18642857Y46821428D01* +X18500000Y46821428D01* +X18357142Y46892857D01* +X18285714Y46964285D01* +X18214285Y47107142D01* +X18142857Y47392857D01* +X18071428Y47535714D01* +X18000000Y47607142D01* +X17857142Y47678571D01* +X17714285Y47678571D01* +X17571428Y47607142D01* +X17500000Y47535714D01* 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b/pcb/gerbers/current-sense-gerbers/current-sense-Edge_Cuts.gm1 new file mode 100644 index 0000000..b1fac7b --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-Edge_Cuts.gm1 @@ -0,0 +1,77 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:13-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Profile,NP* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:13* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,Profile* +%ADD10C,0.127000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Profile* +%ADD11C,0.150000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X-30000000Y40000000D02* +X-15000000Y40000000D01* +X-30000000Y35000000D02* +X-15000000Y35000000D01* +X-12500000Y32500000D02* +X3500000Y32500000D01* +X-15000000Y35000000D02* +X-12500000Y32500000D01* +X-12500000Y42500000D02* +X3500000Y42500000D01* +X-15000000Y40000000D02* +X-12500000Y42500000D01* +X5000000Y44000000D02* +G75* +G02* +X3500000Y42500000I-1500000J0D01* +G01* +D11* +X3500000Y32500000D02* +G75* +G02* +X5000000Y31000000I0J-1500000D01* +G01* +X5000000Y46250000D02* +X5000000Y44000000D01* +D10* +X5000000Y28750000D02* +X5000000Y31000000D01* +X8750000Y25000000D02* +G75* +G02* +X5000000Y28750000I0J3750000D01* +G01* +X5000000Y46250000D02* +G75* +G02* +X8750000Y50000000I3750000J0D01* +G01* +X-30000000Y40000000D02* +X-30000000Y35000000D01* +X100000000Y28750000D02* +G75* +G02* +X96250000Y25000000I-3750000J0D01* +G01* +X96250000Y50000000D02* +G75* +G02* +X100000000Y46250000I0J-3750000D01* +G01* +X8750000Y50000000D02* +X96250000Y50000000D01* +X96250000Y25000000D02* +X8750000Y25000000D01* +X100000000Y46250000D02* +X100000000Y28750000D01* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-F_Cu.gtl b/pcb/gerbers/current-sense-gerbers/current-sense-F_Cu.gtl new file mode 100644 index 0000000..a46d292 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-F_Cu.gtl @@ -0,0 +1,17966 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L1,Top* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD10R,1.800000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD11R,0.900000X1.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD12R,0.900000X1.400000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD13O,1.700000X2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD14C,1.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD15C,0.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD16R,0.900000X0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD17R,1.000000X0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD18R,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD19O,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD20O,2.200000X3.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD21C,2.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD22C,1.750000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD23R,0.650000X1.060000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD24R,0.400000X0.650000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD25R,1.750000X0.450000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD26C,2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD27R,1.220000X0.650000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD28C,2.250000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD29C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD30C,6.400000*% +G04 #@! TD* +G04 #@! TA.AperFunction,SMDPad,CuDef* +%ADD31O,0.787000X0.787000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD32C,0.600000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD33C,0.458000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD34C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD35C,0.240000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD36C,0.160000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD37C,0.640000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD38C,0.360000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD39C,1.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD40C,0.100000*% +G04 #@! TD* +G04 APERTURE END LIST* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56425000Y42250000D02* +X56425000Y41750000D01* +G75* +G02* +X56200000Y41525000I-225000J0D01* +G01* +X55750000Y41525000D01* +G75* +G02* +X55525000Y41750000I0J225000D01* +G01* +X55525000Y42250000D01* +G75* +G02* +X55750000Y42475000I225000J0D01* +G01* +X56200000Y42475000D01* +G75* +G02* +X56425000Y42250000I0J-225000D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y42250000D02* +X57975000Y41750000D01* +G75* +G02* +X57750000Y41525000I-225000J0D01* +G01* +X57300000Y41525000D01* +G75* +G02* +X57075000Y41750000I0J225000D01* +G01* +X57075000Y42250000D01* +G75* +G02* +X57300000Y42475000I225000J0D01* +G01* +X57750000Y42475000D01* +G75* +G02* +X57975000Y42250000I0J-225000D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X70025000Y43725000D02* +X70025000Y43175000D01* +G75* +G02* +X69825000Y42975000I-200000J0D01* +G01* +X69425000Y42975000D01* +G75* +G02* +X69225000Y43175000I0J200000D01* +G01* +X69225000Y43725000D01* +G75* +G02* +X69425000Y43925000I200000J0D01* +G01* +X69825000Y43925000D01* +G75* +G02* +X70025000Y43725000I0J-200000D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X71675000Y43725000D02* +X71675000Y43175000D01* +G75* +G02* +X71475000Y42975000I-200000J0D01* +G01* +X71075000Y42975000D01* +G75* +G02* +X70875000Y43175000I0J200000D01* +G01* +X70875000Y43725000D01* +G75* +G02* +X71075000Y43925000I200000J0D01* +G01* +X71475000Y43925000D01* +G75* +G02* +X71675000Y43725000I0J-200000D01* +G01* +G37* +G04 #@! TD.AperFunction* +D10* +X83750000Y40000000D03* +X83750000Y36000000D03* +D11* +X18350000Y44350000D03* +D12* +X21650000Y45500000D03* +D11* +X18350000Y46650000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X74225000Y35143750D02* +X74225000Y35656250D01* +G75* +G02* +X74443750Y35875000I218750J0D01* +G01* +X74881250Y35875000D01* +G75* +G02* +X75100000Y35656250I0J-218750D01* +G01* +X75100000Y35143750D01* +G75* +G02* +X74881250Y34925000I-218750J0D01* +G01* +X74443750Y34925000D01* +G75* +G02* +X74225000Y35143750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X75800000Y35143750D02* +X75800000Y35656250D01* +G75* +G02* +X76018750Y35875000I218750J0D01* +G01* +X76456250Y35875000D01* +G75* +G02* +X76675000Y35656250I0J-218750D01* +G01* +X76675000Y35143750D01* +G75* +G02* +X76456250Y34925000I-218750J0D01* +G01* +X76018750Y34925000D01* +G75* +G02* +X75800000Y35143750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17006250Y45600000D02* +X16493750Y45600000D01* +G75* +G02* +X16275000Y45818750I0J218750D01* +G01* +X16275000Y46256250D01* +G75* +G02* +X16493750Y46475000I218750J0D01* +G01* +X17006250Y46475000D01* +G75* +G02* +X17225000Y46256250I0J-218750D01* +G01* +X17225000Y45818750D01* +G75* +G02* +X17006250Y45600000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17006250Y44025000D02* +X16493750Y44025000D01* +G75* +G02* +X16275000Y44243750I0J218750D01* +G01* +X16275000Y44681250D01* +G75* +G02* +X16493750Y44900000I218750J0D01* +G01* +X17006250Y44900000D01* +G75* +G02* +X17225000Y44681250I0J-218750D01* +G01* +X17225000Y44243750D01* +G75* +G02* +X17006250Y44025000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +D13* +X86000000Y46700000D03* +G04 #@! TA.AperFunction,ComponentPad* +G36* +G01* +X89350000Y47450000D02* +X89350000Y45950000D01* +G75* +G02* +X89100000Y45700000I-250000J0D01* +G01* +X87900000Y45700000D01* +G75* +G02* +X87650000Y45950000I0J250000D01* +G01* +X87650000Y47450000D01* +G75* +G02* +X87900000Y47700000I250000J0D01* +G01* +X89100000Y47700000D01* +G75* +G02* +X89350000Y47450000I0J-250000D01* +G01* +G37* +G04 #@! TD.AperFunction* +D14* +X87000000Y33950000D03* +X35000000Y33950000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79675000Y35656250D02* +X79675000Y35143750D01* +G75* +G02* +X79456250Y34925000I-218750J0D01* +G01* +X79018750Y34925000D01* +G75* +G02* +X78800000Y35143750I0J218750D01* +G01* +X78800000Y35656250D01* +G75* +G02* +X79018750Y35875000I218750J0D01* +G01* +X79456250Y35875000D01* +G75* +G02* +X79675000Y35656250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78100000Y35656250D02* +X78100000Y35143750D01* +G75* +G02* +X77881250Y34925000I-218750J0D01* +G01* +X77443750Y34925000D01* +G75* +G02* +X77225000Y35143750I0J218750D01* +G01* +X77225000Y35656250D01* +G75* +G02* +X77443750Y35875000I218750J0D01* +G01* +X77881250Y35875000D01* +G75* +G02* +X78100000Y35656250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X68225000Y34993750D02* +X68225000Y35506250D01* +G75* +G02* +X68443750Y35725000I218750J0D01* +G01* +X68881250Y35725000D01* +G75* +G02* +X69100000Y35506250I0J-218750D01* +G01* +X69100000Y34993750D01* +G75* +G02* +X68881250Y34775000I-218750J0D01* +G01* +X68443750Y34775000D01* +G75* +G02* +X68225000Y34993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X69800000Y34993750D02* +X69800000Y35506250D01* +G75* +G02* +X70018750Y35725000I218750J0D01* +G01* +X70456250Y35725000D01* +G75* +G02* +X70675000Y35506250I0J-218750D01* +G01* +X70675000Y34993750D01* +G75* +G02* +X70456250Y34775000I-218750J0D01* +G01* +X70018750Y34775000D01* +G75* +G02* +X69800000Y34993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X72225000Y42793750D02* +X72225000Y43706250D01* +G75* +G02* +X72468750Y43950000I243750J0D01* +G01* +X72956250Y43950000D01* +G75* +G02* +X73200000Y43706250I0J-243750D01* +G01* +X73200000Y42793750D01* +G75* +G02* +X72956250Y42550000I-243750J0D01* +G01* +X72468750Y42550000D01* +G75* +G02* +X72225000Y42793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X74100000Y42793750D02* +X74100000Y43706250D01* +G75* +G02* +X74343750Y43950000I243750J0D01* +G01* +X74831250Y43950000D01* +G75* +G02* +X75075000Y43706250I0J-243750D01* +G01* +X75075000Y42793750D01* +G75* +G02* +X74831250Y42550000I-243750J0D01* +G01* +X74343750Y42550000D01* +G75* +G02* +X74100000Y42793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X72543750Y40925000D02* +X73456250Y40925000D01* +G75* +G02* +X73700000Y40681250I0J-243750D01* +G01* +X73700000Y40193750D01* +G75* +G02* +X73456250Y39950000I-243750J0D01* +G01* +X72543750Y39950000D01* +G75* +G02* +X72300000Y40193750I0J243750D01* +G01* +X72300000Y40681250D01* +G75* +G02* +X72543750Y40925000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X72543750Y39050000D02* +X73456250Y39050000D01* +G75* +G02* +X73700000Y38806250I0J-243750D01* +G01* +X73700000Y38318750D01* +G75* +G02* +X73456250Y38075000I-243750J0D01* +G01* +X72543750Y38075000D01* +G75* +G02* +X72300000Y38318750I0J243750D01* +G01* +X72300000Y38806250D01* +G75* +G02* +X72543750Y39050000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X40243750Y30650000D02* +X40756250Y30650000D01* +G75* +G02* +X40975000Y30431250I0J-218750D01* +G01* +X40975000Y29993750D01* +G75* +G02* +X40756250Y29775000I-218750J0D01* +G01* +X40243750Y29775000D01* +G75* +G02* +X40025000Y29993750I0J218750D01* +G01* +X40025000Y30431250D01* +G75* +G02* +X40243750Y30650000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X40243750Y32225000D02* +X40756250Y32225000D01* +G75* +G02* +X40975000Y32006250I0J-218750D01* +G01* +X40975000Y31568750D01* +G75* +G02* +X40756250Y31350000I-218750J0D01* +G01* +X40243750Y31350000D01* +G75* +G02* +X40025000Y31568750I0J218750D01* +G01* +X40025000Y32006250D01* +G75* +G02* +X40243750Y32225000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X41743750Y30650000D02* +X42256250Y30650000D01* +G75* +G02* +X42475000Y30431250I0J-218750D01* +G01* +X42475000Y29993750D01* +G75* +G02* +X42256250Y29775000I-218750J0D01* +G01* +X41743750Y29775000D01* +G75* +G02* +X41525000Y29993750I0J218750D01* +G01* +X41525000Y30431250D01* +G75* +G02* +X41743750Y30650000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X41743750Y32225000D02* +X42256250Y32225000D01* +G75* +G02* +X42475000Y32006250I0J-218750D01* +G01* +X42475000Y31568750D01* +G75* +G02* +X42256250Y31350000I-218750J0D01* +G01* +X41743750Y31350000D01* +G75* +G02* +X41525000Y31568750I0J218750D01* +G01* +X41525000Y32006250D01* +G75* +G02* +X41743750Y32225000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +D15* +G36* +X71550000Y41530000D02* +G01* +X71550000Y40750000D01* +X67650000Y40750000D01* +X67650000Y41530000D01* +X68350000Y42350000D01* +X70850000Y42350000D01* +X71550000Y41530000D01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +X67650000Y38670000D02* +G01* +X67650000Y39450000D01* +X71550000Y39450000D01* +X71550000Y38670000D01* +X70850000Y37850000D01* +X68350000Y37850000D01* +X67650000Y38670000D01* +G37* +G04 #@! TD.AperFunction* +D16* +X60250000Y34750000D03* +X62250000Y35700000D03* +X62250000Y33800000D03* +X60250000Y40250000D03* +X62250000Y41200000D03* +X62250000Y39300000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X12975000Y34006250D02* +X12975000Y33493750D01* +G75* +G02* +X12756250Y33275000I-218750J0D01* +G01* +X12318750Y33275000D01* +G75* +G02* +X12100000Y33493750I0J218750D01* +G01* +X12100000Y34006250D01* +G75* +G02* +X12318750Y34225000I218750J0D01* +G01* +X12756250Y34225000D01* +G75* +G02* +X12975000Y34006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X11400000Y34006250D02* +X11400000Y33493750D01* +G75* +G02* +X11181250Y33275000I-218750J0D01* +G01* +X10743750Y33275000D01* +G75* +G02* +X10525000Y33493750I0J218750D01* +G01* +X10525000Y34006250D01* +G75* +G02* +X10743750Y34225000I218750J0D01* +G01* +X11181250Y34225000D01* +G75* +G02* +X11400000Y34006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X10525000Y40993750D02* +X10525000Y41506250D01* +G75* +G02* +X10743750Y41725000I218750J0D01* +G01* +X11181250Y41725000D01* +G75* +G02* +X11400000Y41506250I0J-218750D01* +G01* +X11400000Y40993750D01* +G75* +G02* +X11181250Y40775000I-218750J0D01* +G01* +X10743750Y40775000D01* +G75* +G02* +X10525000Y40993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X12100000Y40993750D02* +X12100000Y41506250D01* +G75* +G02* +X12318750Y41725000I218750J0D01* +G01* +X12756250Y41725000D01* +G75* +G02* +X12975000Y41506250I0J-218750D01* +G01* +X12975000Y40993750D01* +G75* +G02* +X12756250Y40775000I-218750J0D01* +G01* +X12318750Y40775000D01* +G75* +G02* +X12100000Y40993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X64006250Y33350000D02* +X63493750Y33350000D01* +G75* +G02* +X63275000Y33568750I0J218750D01* +G01* +X63275000Y34006250D01* +G75* +G02* +X63493750Y34225000I218750J0D01* +G01* +X64006250Y34225000D01* +G75* +G02* +X64225000Y34006250I0J-218750D01* +G01* +X64225000Y33568750D01* +G75* +G02* +X64006250Y33350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X64006250Y31775000D02* +X63493750Y31775000D01* +G75* +G02* +X63275000Y31993750I0J218750D01* +G01* +X63275000Y32431250D01* +G75* +G02* +X63493750Y32650000I218750J0D01* +G01* +X64006250Y32650000D01* +G75* +G02* +X64225000Y32431250I0J-218750D01* +G01* +X64225000Y31993750D01* +G75* +G02* +X64006250Y31775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X61850000Y31993750D02* +X61850000Y32506250D01* +G75* +G02* +X62068750Y32725000I218750J0D01* +G01* +X62506250Y32725000D01* +G75* +G02* +X62725000Y32506250I0J-218750D01* +G01* +X62725000Y31993750D01* +G75* +G02* +X62506250Y31775000I-218750J0D01* +G01* +X62068750Y31775000D01* +G75* +G02* +X61850000Y31993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X60275000Y31993750D02* +X60275000Y32506250D01* +G75* +G02* +X60493750Y32725000I218750J0D01* +G01* +X60931250Y32725000D01* +G75* +G02* +X61150000Y32506250I0J-218750D01* +G01* +X61150000Y31993750D01* +G75* +G02* +X60931250Y31775000I-218750J0D01* +G01* +X60493750Y31775000D01* +G75* +G02* +X60275000Y31993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X63493750Y38150000D02* +X64006250Y38150000D01* +G75* +G02* +X64225000Y37931250I0J-218750D01* +G01* +X64225000Y37493750D01* +G75* +G02* +X64006250Y37275000I-218750J0D01* +G01* +X63493750Y37275000D01* +G75* +G02* +X63275000Y37493750I0J218750D01* +G01* +X63275000Y37931250D01* +G75* +G02* +X63493750Y38150000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X63493750Y39725000D02* +X64006250Y39725000D01* +G75* +G02* +X64225000Y39506250I0J-218750D01* +G01* +X64225000Y39068750D01* +G75* +G02* +X64006250Y38850000I-218750J0D01* +G01* +X63493750Y38850000D01* +G75* +G02* +X63275000Y39068750I0J218750D01* +G01* +X63275000Y39506250D01* +G75* +G02* +X63493750Y39725000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X61850000Y37493750D02* +X61850000Y38006250D01* +G75* +G02* +X62068750Y38225000I218750J0D01* +G01* +X62506250Y38225000D01* +G75* +G02* +X62725000Y38006250I0J-218750D01* +G01* +X62725000Y37493750D01* +G75* +G02* +X62506250Y37275000I-218750J0D01* +G01* +X62068750Y37275000D01* +G75* +G02* +X61850000Y37493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X60275000Y37493750D02* +X60275000Y38006250D01* +G75* +G02* +X60493750Y38225000I218750J0D01* +G01* +X60931250Y38225000D01* +G75* +G02* +X61150000Y38006250I0J-218750D01* +G01* +X61150000Y37493750D01* +G75* +G02* +X60931250Y37275000I-218750J0D01* +G01* +X60493750Y37275000D01* +G75* +G02* +X60275000Y37493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79900000Y31993750D02* +X79900000Y32506250D01* +G75* +G02* +X80118750Y32725000I218750J0D01* +G01* +X80556250Y32725000D01* +G75* +G02* +X80775000Y32506250I0J-218750D01* +G01* +X80775000Y31993750D01* +G75* +G02* +X80556250Y31775000I-218750J0D01* +G01* +X80118750Y31775000D01* +G75* +G02* +X79900000Y31993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78325000Y31993750D02* +X78325000Y32506250D01* +G75* +G02* +X78543750Y32725000I218750J0D01* +G01* +X78981250Y32725000D01* +G75* +G02* +X79200000Y32506250I0J-218750D01* +G01* +X79200000Y31993750D01* +G75* +G02* +X78981250Y31775000I-218750J0D01* +G01* +X78543750Y31775000D01* +G75* +G02* +X78325000Y31993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X67606250Y33350000D02* +X67093750Y33350000D01* +G75* +G02* +X66875000Y33568750I0J218750D01* +G01* +X66875000Y34006250D01* +G75* +G02* +X67093750Y34225000I218750J0D01* +G01* +X67606250Y34225000D01* +G75* +G02* +X67825000Y34006250I0J-218750D01* +G01* +X67825000Y33568750D01* +G75* +G02* +X67606250Y33350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X67606250Y31775000D02* +X67093750Y31775000D01* +G75* +G02* +X66875000Y31993750I0J218750D01* +G01* +X66875000Y32431250D01* +G75* +G02* +X67093750Y32650000I218750J0D01* +G01* +X67606250Y32650000D01* +G75* +G02* +X67825000Y32431250I0J-218750D01* +G01* +X67825000Y31993750D01* +G75* +G02* +X67606250Y31775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X38400000Y38006250D02* +X38400000Y37493750D01* +G75* +G02* +X38181250Y37275000I-218750J0D01* +G01* +X37743750Y37275000D01* +G75* +G02* +X37525000Y37493750I0J218750D01* +G01* +X37525000Y38006250D01* +G75* +G02* +X37743750Y38225000I218750J0D01* +G01* +X38181250Y38225000D01* +G75* +G02* +X38400000Y38006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X39975000Y38006250D02* +X39975000Y37493750D01* +G75* +G02* +X39756250Y37275000I-218750J0D01* +G01* +X39318750Y37275000D01* +G75* +G02* +X39100000Y37493750I0J218750D01* +G01* +X39100000Y38006250D01* +G75* +G02* +X39318750Y38225000I218750J0D01* +G01* +X39756250Y38225000D01* +G75* +G02* +X39975000Y38006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +X75750000Y31800000D03* +X75750000Y33700000D03* +X73750000Y32750000D03* +X70300000Y33700000D03* +X70300000Y31800000D03* +X72300000Y32750000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X10525000Y34993750D02* +X10525000Y35506250D01* +G75* +G02* +X10743750Y35725000I218750J0D01* +G01* +X11181250Y35725000D01* +G75* +G02* +X11400000Y35506250I0J-218750D01* +G01* +X11400000Y34993750D01* +G75* +G02* +X11181250Y34775000I-218750J0D01* +G01* +X10743750Y34775000D01* +G75* +G02* +X10525000Y34993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X12100000Y34993750D02* +X12100000Y35506250D01* +G75* +G02* +X12318750Y35725000I218750J0D01* +G01* +X12756250Y35725000D01* +G75* +G02* +X12975000Y35506250I0J-218750D01* +G01* +X12975000Y34993750D01* +G75* +G02* +X12756250Y34775000I-218750J0D01* +G01* +X12318750Y34775000D01* +G75* +G02* +X12100000Y34993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X10525000Y39493750D02* +X10525000Y40006250D01* +G75* +G02* +X10743750Y40225000I218750J0D01* +G01* +X11181250Y40225000D01* +G75* +G02* +X11400000Y40006250I0J-218750D01* +G01* +X11400000Y39493750D01* +G75* +G02* +X11181250Y39275000I-218750J0D01* +G01* +X10743750Y39275000D01* +G75* +G02* +X10525000Y39493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X12100000Y39493750D02* +X12100000Y40006250D01* +G75* +G02* +X12318750Y40225000I218750J0D01* +G01* +X12756250Y40225000D01* +G75* +G02* +X12975000Y40006250I0J-218750D01* +G01* +X12975000Y39493750D01* +G75* +G02* +X12756250Y39275000I-218750J0D01* +G01* +X12318750Y39275000D01* +G75* +G02* +X12100000Y39493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X65506250Y33350000D02* +X64993750Y33350000D01* +G75* +G02* +X64775000Y33568750I0J218750D01* +G01* +X64775000Y34006250D01* +G75* +G02* +X64993750Y34225000I218750J0D01* +G01* +X65506250Y34225000D01* +G75* +G02* +X65725000Y34006250I0J-218750D01* +G01* +X65725000Y33568750D01* +G75* +G02* +X65506250Y33350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X65506250Y31775000D02* +X64993750Y31775000D01* +G75* +G02* +X64775000Y31993750I0J218750D01* +G01* +X64775000Y32431250D01* +G75* +G02* +X64993750Y32650000I218750J0D01* +G01* +X65506250Y32650000D01* +G75* +G02* +X65725000Y32431250I0J-218750D01* +G01* +X65725000Y31993750D01* +G75* +G02* +X65506250Y31775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X64993750Y38150000D02* +X65506250Y38150000D01* +G75* +G02* +X65725000Y37931250I0J-218750D01* +G01* +X65725000Y37493750D01* +G75* +G02* +X65506250Y37275000I-218750J0D01* +G01* +X64993750Y37275000D01* +G75* +G02* +X64775000Y37493750I0J218750D01* +G01* +X64775000Y37931250D01* +G75* +G02* +X64993750Y38150000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X64993750Y39725000D02* +X65506250Y39725000D01* +G75* +G02* +X65725000Y39506250I0J-218750D01* +G01* +X65725000Y39068750D01* +G75* +G02* +X65506250Y38850000I-218750J0D01* +G01* +X64993750Y38850000D01* +G75* +G02* +X64775000Y39068750I0J218750D01* +G01* +X64775000Y39506250D01* +G75* +G02* +X64993750Y39725000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X76993750Y34225000D02* +X77506250Y34225000D01* +G75* +G02* +X77725000Y34006250I0J-218750D01* +G01* +X77725000Y33568750D01* +G75* +G02* +X77506250Y33350000I-218750J0D01* +G01* +X76993750Y33350000D01* +G75* +G02* +X76775000Y33568750I0J218750D01* +G01* +X76775000Y34006250D01* +G75* +G02* +X76993750Y34225000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X76993750Y32650000D02* +X77506250Y32650000D01* +G75* +G02* +X77725000Y32431250I0J-218750D01* +G01* +X77725000Y31993750D01* +G75* +G02* +X77506250Y31775000I-218750J0D01* +G01* +X76993750Y31775000D01* +G75* +G02* +X76775000Y31993750I0J218750D01* +G01* +X76775000Y32431250D01* +G75* +G02* +X76993750Y32650000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X69106250Y31775000D02* +X68593750Y31775000D01* +G75* +G02* +X68375000Y31993750I0J218750D01* +G01* +X68375000Y32431250D01* +G75* +G02* +X68593750Y32650000I218750J0D01* +G01* +X69106250Y32650000D01* +G75* +G02* +X69325000Y32431250I0J-218750D01* +G01* +X69325000Y31993750D01* +G75* +G02* +X69106250Y31775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X69106250Y33350000D02* +X68593750Y33350000D01* +G75* +G02* +X68375000Y33568750I0J218750D01* +G01* +X68375000Y34006250D01* +G75* +G02* +X68593750Y34225000I218750J0D01* +G01* +X69106250Y34225000D01* +G75* +G02* +X69325000Y34006250I0J-218750D01* +G01* +X69325000Y33568750D01* +G75* +G02* +X69106250Y33350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X73456250Y34775000D02* +X72943750Y34775000D01* +G75* +G02* +X72725000Y34993750I0J218750D01* +G01* +X72725000Y35431250D01* +G75* +G02* +X72943750Y35650000I218750J0D01* +G01* +X73456250Y35650000D01* +G75* +G02* +X73675000Y35431250I0J-218750D01* +G01* +X73675000Y34993750D01* +G75* +G02* +X73456250Y34775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X73456250Y36350000D02* +X72943750Y36350000D01* +G75* +G02* +X72725000Y36568750I0J218750D01* +G01* +X72725000Y37006250D01* +G75* +G02* +X72943750Y37225000I218750J0D01* +G01* +X73456250Y37225000D01* +G75* +G02* +X73675000Y37006250I0J-218750D01* +G01* +X73675000Y36568750D01* +G75* +G02* +X73456250Y36350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X71956250Y34775000D02* +X71443750Y34775000D01* +G75* +G02* +X71225000Y34993750I0J218750D01* +G01* +X71225000Y35431250D01* +G75* +G02* +X71443750Y35650000I218750J0D01* +G01* +X71956250Y35650000D01* +G75* +G02* +X72175000Y35431250I0J-218750D01* +G01* +X72175000Y34993750D01* +G75* +G02* +X71956250Y34775000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X71956250Y36350000D02* +X71443750Y36350000D01* +G75* +G02* +X71225000Y36568750I0J218750D01* +G01* +X71225000Y37006250D01* +G75* +G02* +X71443750Y37225000I218750J0D01* +G01* +X71956250Y37225000D01* +G75* +G02* +X72175000Y37006250I0J-218750D01* +G01* +X72175000Y36568750D01* +G75* +G02* +X71956250Y36350000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X19275000Y35743750D02* +X19275000Y36256250D01* +G75* +G02* +X19493750Y36475000I218750J0D01* +G01* +X19931250Y36475000D01* +G75* +G02* +X20150000Y36256250I0J-218750D01* +G01* +X20150000Y35743750D01* +G75* +G02* +X19931250Y35525000I-218750J0D01* +G01* +X19493750Y35525000D01* +G75* +G02* +X19275000Y35743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20850000Y35743750D02* +X20850000Y36256250D01* +G75* +G02* +X21068750Y36475000I218750J0D01* +G01* +X21506250Y36475000D01* +G75* +G02* +X21725000Y36256250I0J-218750D01* +G01* +X21725000Y35743750D01* +G75* +G02* +X21506250Y35525000I-218750J0D01* +G01* +X21068750Y35525000D01* +G75* +G02* +X20850000Y35743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +D17* +X88000000Y43800000D03* +X86500000Y43800000D03* +X86500000Y42700000D03* +X88000000Y42700000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X53493750Y35650000D02* +X54006250Y35650000D01* +G75* +G02* +X54225000Y35431250I0J-218750D01* +G01* +X54225000Y34993750D01* +G75* +G02* +X54006250Y34775000I-218750J0D01* +G01* +X53493750Y34775000D01* +G75* +G02* +X53275000Y34993750I0J218750D01* +G01* +X53275000Y35431250D01* +G75* +G02* +X53493750Y35650000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X53493750Y37225000D02* +X54006250Y37225000D01* +G75* +G02* +X54225000Y37006250I0J-218750D01* +G01* +X54225000Y36568750D01* +G75* +G02* +X54006250Y36350000I-218750J0D01* +G01* +X53493750Y36350000D01* +G75* +G02* +X53275000Y36568750I0J218750D01* +G01* +X53275000Y37006250D01* +G75* +G02* +X53493750Y37225000I218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +D18* +X74500000Y47500000D03* +D19* +X76500000Y47500000D03* +X78500000Y47500000D03* +D20* +X72400000Y47500000D03* +X80600000Y47500000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57100000Y40243750D02* +X57100000Y40756250D01* +G75* +G02* +X57318750Y40975000I218750J0D01* +G01* +X57756250Y40975000D01* +G75* +G02* +X57975000Y40756250I0J-218750D01* +G01* +X57975000Y40243750D01* +G75* +G02* +X57756250Y40025000I-218750J0D01* +G01* +X57318750Y40025000D01* +G75* +G02* +X57100000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X55525000Y40243750D02* +X55525000Y40756250D01* +G75* +G02* +X55743750Y40975000I218750J0D01* +G01* +X56181250Y40975000D01* +G75* +G02* +X56400000Y40756250I0J-218750D01* +G01* +X56400000Y40243750D01* +G75* +G02* +X56181250Y40025000I-218750J0D01* +G01* +X55743750Y40025000D01* +G75* +G02* +X55525000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X86793750Y37300000D02* +X87706250Y37300000D01* +G75* +G02* +X87950000Y37056250I0J-243750D01* +G01* +X87950000Y36568750D01* +G75* +G02* +X87706250Y36325000I-243750J0D01* +G01* +X86793750Y36325000D01* +G75* +G02* +X86550000Y36568750I0J243750D01* +G01* +X86550000Y37056250D01* +G75* +G02* +X86793750Y37300000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X86793750Y39175000D02* +X87706250Y39175000D01* +G75* +G02* +X87950000Y38931250I0J-243750D01* +G01* +X87950000Y38443750D01* +G75* +G02* +X87706250Y38200000I-243750J0D01* +G01* +X86793750Y38200000D01* +G75* +G02* +X86550000Y38443750I0J243750D01* +G01* +X86550000Y38931250D01* +G75* +G02* +X86793750Y39175000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +D21* +X58990000Y44760000D03* +D22* +X60250000Y47250000D03* +X64750000Y47250000D03* +D21* +X66000000Y44760000D03* +X44990000Y44760000D03* +D22* +X46250000Y47250000D03* +X50750000Y47250000D03* +D21* +X52000000Y44760000D03* +D23* +X75750000Y39850000D03* +X74800000Y39850000D03* +X76700000Y39850000D03* +X76700000Y37650000D03* +X75750000Y37650000D03* +X74800000Y37650000D03* +D24* +X31650000Y43050000D03* +X30350000Y43050000D03* +X31000000Y44950000D03* +X31000000Y43050000D03* +X30350000Y44950000D03* +X31650000Y44950000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X30005000Y36000000D02* +X30305000Y36000000D01* +G75* +G02* +X30455000Y35850000I0J-150000D01* +G01* +X30455000Y34200000D01* +G75* +G02* +X30305000Y34050000I-150000J0D01* +G01* +X30005000Y34050000D01* +G75* +G02* +X29855000Y34200000I0J150000D01* +G01* +X29855000Y35850000D01* +G75* +G02* +X30005000Y36000000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X28735000Y36000000D02* +X29035000Y36000000D01* +G75* +G02* +X29185000Y35850000I0J-150000D01* +G01* +X29185000Y34200000D01* +G75* +G02* +X29035000Y34050000I-150000J0D01* +G01* +X28735000Y34050000D01* +G75* +G02* +X28585000Y34200000I0J150000D01* +G01* +X28585000Y35850000D01* +G75* +G02* +X28735000Y36000000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27465000Y36000000D02* +X27765000Y36000000D01* +G75* +G02* +X27915000Y35850000I0J-150000D01* +G01* +X27915000Y34200000D01* +G75* +G02* +X27765000Y34050000I-150000J0D01* +G01* +X27465000Y34050000D01* +G75* +G02* +X27315000Y34200000I0J150000D01* +G01* +X27315000Y35850000D01* +G75* +G02* +X27465000Y36000000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26195000Y36000000D02* +X26495000Y36000000D01* +G75* +G02* +X26645000Y35850000I0J-150000D01* +G01* +X26645000Y34200000D01* +G75* +G02* +X26495000Y34050000I-150000J0D01* +G01* +X26195000Y34050000D01* +G75* +G02* +X26045000Y34200000I0J150000D01* +G01* +X26045000Y35850000D01* +G75* +G02* +X26195000Y36000000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26195000Y40950000D02* +X26495000Y40950000D01* +G75* +G02* +X26645000Y40800000I0J-150000D01* +G01* +X26645000Y39150000D01* +G75* +G02* +X26495000Y39000000I-150000J0D01* +G01* +X26195000Y39000000D01* +G75* +G02* +X26045000Y39150000I0J150000D01* +G01* +X26045000Y40800000D01* +G75* +G02* +X26195000Y40950000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27465000Y40950000D02* +X27765000Y40950000D01* +G75* +G02* +X27915000Y40800000I0J-150000D01* +G01* +X27915000Y39150000D01* +G75* +G02* +X27765000Y39000000I-150000J0D01* +G01* +X27465000Y39000000D01* +G75* +G02* +X27315000Y39150000I0J150000D01* +G01* +X27315000Y40800000D01* +G75* +G02* +X27465000Y40950000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X28735000Y40950000D02* +X29035000Y40950000D01* +G75* +G02* +X29185000Y40800000I0J-150000D01* +G01* +X29185000Y39150000D01* +G75* +G02* +X29035000Y39000000I-150000J0D01* +G01* +X28735000Y39000000D01* +G75* +G02* +X28585000Y39150000I0J150000D01* +G01* +X28585000Y40800000D01* +G75* +G02* +X28735000Y40950000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X30005000Y40950000D02* +X30305000Y40950000D01* +G75* +G02* +X30455000Y40800000I0J-150000D01* +G01* +X30455000Y39150000D01* +G75* +G02* +X30305000Y39000000I-150000J0D01* +G01* +X30005000Y39000000D01* +G75* +G02* +X29855000Y39150000I0J150000D01* +G01* +X29855000Y40800000D01* +G75* +G02* +X30005000Y40950000I150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +D25* +X43900000Y40975000D03* +X43900000Y40325000D03* +X43900000Y39675000D03* +X43900000Y39025000D03* +X43900000Y38375000D03* +X43900000Y37725000D03* +X43900000Y37075000D03* +X43900000Y36425000D03* +X43900000Y35775000D03* +X43900000Y35125000D03* +X43900000Y34475000D03* +X43900000Y33825000D03* +X43900000Y33175000D03* +X43900000Y32525000D03* +X51100000Y32525000D03* +X51100000Y33175000D03* +X51100000Y33825000D03* +X51100000Y34475000D03* +X51100000Y35125000D03* +X51100000Y35775000D03* +X51100000Y36425000D03* +X51100000Y37075000D03* +X51100000Y37725000D03* +X51100000Y38375000D03* +X51100000Y39025000D03* +X51100000Y39675000D03* +X51100000Y40325000D03* +X51100000Y40975000D03* +D24* +X23350000Y34300000D03* +X24650000Y34300000D03* +X24000000Y36200000D03* +X24000000Y34300000D03* +X24650000Y36200000D03* +X23350000Y36200000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X14495000Y34050000D02* +X14195000Y34050000D01* +G75* +G02* +X14045000Y34200000I0J150000D01* +G01* +X14045000Y35850000D01* +G75* +G02* +X14195000Y36000000I150000J0D01* +G01* +X14495000Y36000000D01* +G75* +G02* +X14645000Y35850000I0J-150000D01* +G01* +X14645000Y34200000D01* +G75* +G02* +X14495000Y34050000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X15765000Y34050000D02* +X15465000Y34050000D01* +G75* +G02* +X15315000Y34200000I0J150000D01* +G01* +X15315000Y35850000D01* +G75* +G02* +X15465000Y36000000I150000J0D01* +G01* +X15765000Y36000000D01* +G75* +G02* +X15915000Y35850000I0J-150000D01* +G01* +X15915000Y34200000D01* +G75* +G02* +X15765000Y34050000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17035000Y34050000D02* +X16735000Y34050000D01* +G75* +G02* +X16585000Y34200000I0J150000D01* +G01* +X16585000Y35850000D01* +G75* +G02* +X16735000Y36000000I150000J0D01* +G01* +X17035000Y36000000D01* +G75* +G02* +X17185000Y35850000I0J-150000D01* +G01* +X17185000Y34200000D01* +G75* +G02* +X17035000Y34050000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X18305000Y34050000D02* +X18005000Y34050000D01* +G75* +G02* +X17855000Y34200000I0J150000D01* +G01* +X17855000Y35850000D01* +G75* +G02* +X18005000Y36000000I150000J0D01* +G01* +X18305000Y36000000D01* +G75* +G02* +X18455000Y35850000I0J-150000D01* +G01* +X18455000Y34200000D01* +G75* +G02* +X18305000Y34050000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X18305000Y39000000D02* +X18005000Y39000000D01* +G75* +G02* +X17855000Y39150000I0J150000D01* +G01* +X17855000Y40800000D01* +G75* +G02* +X18005000Y40950000I150000J0D01* +G01* +X18305000Y40950000D01* +G75* +G02* +X18455000Y40800000I0J-150000D01* +G01* +X18455000Y39150000D01* +G75* +G02* +X18305000Y39000000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17035000Y39000000D02* +X16735000Y39000000D01* +G75* +G02* +X16585000Y39150000I0J150000D01* +G01* +X16585000Y40800000D01* +G75* +G02* +X16735000Y40950000I150000J0D01* +G01* +X17035000Y40950000D01* +G75* +G02* +X17185000Y40800000I0J-150000D01* +G01* +X17185000Y39150000D01* +G75* +G02* +X17035000Y39000000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X15765000Y39000000D02* +X15465000Y39000000D01* +G75* +G02* +X15315000Y39150000I0J150000D01* +G01* +X15315000Y40800000D01* +G75* +G02* +X15465000Y40950000I150000J0D01* +G01* +X15765000Y40950000D01* +G75* +G02* +X15915000Y40800000I0J-150000D01* +G01* +X15915000Y39150000D01* +G75* +G02* +X15765000Y39000000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X14495000Y39000000D02* +X14195000Y39000000D01* +G75* +G02* +X14045000Y39150000I0J150000D01* +G01* +X14045000Y40800000D01* +G75* +G02* +X14195000Y40950000I150000J0D01* +G01* +X14495000Y40950000D01* +G75* +G02* +X14645000Y40800000I0J-150000D01* +G01* +X14645000Y39150000D01* +G75* +G02* +X14495000Y39000000I-150000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y39400000D02* +X-28250000Y39400000D01* +G75* +G02* +X-28175000Y39325000I0J-75000D01* +G01* +X-28175000Y39175000D01* +G75* +G02* +X-28250000Y39100000I-75000J0D01* +G01* +X-28700000Y39100000D01* +G75* +G02* +X-28775000Y39175000I0J75000D01* +G01* +X-28775000Y39325000D01* +G75* +G02* +X-28700000Y39400000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y38900000D02* +X-28250000Y38900000D01* +G75* +G02* +X-28175000Y38825000I0J-75000D01* +G01* +X-28175000Y38675000D01* +G75* +G02* +X-28250000Y38600000I-75000J0D01* +G01* +X-28700000Y38600000D01* +G75* +G02* +X-28775000Y38675000I0J75000D01* +G01* +X-28775000Y38825000D01* +G75* +G02* +X-28700000Y38900000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y38400000D02* +X-28250000Y38400000D01* +G75* +G02* +X-28175000Y38325000I0J-75000D01* +G01* +X-28175000Y38175000D01* +G75* +G02* +X-28250000Y38100000I-75000J0D01* +G01* +X-28700000Y38100000D01* +G75* +G02* +X-28775000Y38175000I0J75000D01* +G01* +X-28775000Y38325000D01* +G75* +G02* +X-28700000Y38400000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y37900000D02* +X-28250000Y37900000D01* +G75* +G02* +X-28175000Y37825000I0J-75000D01* +G01* +X-28175000Y37675000D01* +G75* +G02* +X-28250000Y37600000I-75000J0D01* +G01* +X-28700000Y37600000D01* +G75* +G02* +X-28775000Y37675000I0J75000D01* +G01* +X-28775000Y37825000D01* +G75* +G02* +X-28700000Y37900000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y37400000D02* +X-28250000Y37400000D01* +G75* +G02* +X-28175000Y37325000I0J-75000D01* +G01* +X-28175000Y37175000D01* +G75* +G02* +X-28250000Y37100000I-75000J0D01* +G01* +X-28700000Y37100000D01* +G75* +G02* +X-28775000Y37175000I0J75000D01* +G01* +X-28775000Y37325000D01* +G75* +G02* +X-28700000Y37400000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y36900000D02* +X-28250000Y36900000D01* +G75* +G02* +X-28175000Y36825000I0J-75000D01* +G01* +X-28175000Y36675000D01* +G75* +G02* +X-28250000Y36600000I-75000J0D01* +G01* +X-28700000Y36600000D01* +G75* +G02* +X-28775000Y36675000I0J75000D01* +G01* +X-28775000Y36825000D01* +G75* +G02* +X-28700000Y36900000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y36400000D02* +X-28250000Y36400000D01* +G75* +G02* +X-28175000Y36325000I0J-75000D01* +G01* +X-28175000Y36175000D01* +G75* +G02* +X-28250000Y36100000I-75000J0D01* +G01* +X-28700000Y36100000D01* +G75* +G02* +X-28775000Y36175000I0J75000D01* +G01* +X-28775000Y36325000D01* +G75* +G02* +X-28700000Y36400000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-28700000Y35900000D02* +X-28250000Y35900000D01* +G75* +G02* +X-28175000Y35825000I0J-75000D01* +G01* +X-28175000Y35675000D01* +G75* +G02* +X-28250000Y35600000I-75000J0D01* +G01* +X-28700000Y35600000D01* +G75* +G02* +X-28775000Y35675000I0J75000D01* +G01* +X-28775000Y35825000D01* +G75* +G02* +X-28700000Y35900000I75000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-29650000Y36500000D02* +X-29400000Y36500000D01* +G75* +G02* +X-29275000Y36375000I0J-125000D01* +G01* +X-29275000Y36125000D01* +G75* +G02* +X-29400000Y36000000I-125000J0D01* +G01* +X-29650000Y36000000D01* +G75* +G02* +X-29775000Y36125000I0J125000D01* +G01* +X-29775000Y36375000D01* +G75* +G02* +X-29650000Y36500000I125000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X-29650000Y39000000D02* +X-29400000Y39000000D01* +G75* +G02* +X-29275000Y38875000I0J-125000D01* +G01* +X-29275000Y38625000D01* +G75* +G02* +X-29400000Y38500000I-125000J0D01* +G01* +X-29650000Y38500000D01* +G75* +G02* +X-29775000Y38625000I0J125000D01* +G01* +X-29775000Y38875000D01* +G75* +G02* +X-29650000Y39000000I125000J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +D26* +X28000000Y48250000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56400000Y31756250D02* +X56400000Y31243750D01* +G75* +G02* +X56181250Y31025000I-218750J0D01* +G01* +X55743750Y31025000D01* +G75* +G02* +X55525000Y31243750I0J218750D01* +G01* +X55525000Y31756250D01* +G75* +G02* +X55743750Y31975000I218750J0D01* +G01* +X56181250Y31975000D01* +G75* +G02* +X56400000Y31756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y31756250D02* +X57975000Y31243750D01* +G75* +G02* +X57756250Y31025000I-218750J0D01* +G01* +X57318750Y31025000D01* +G75* +G02* +X57100000Y31243750I0J218750D01* +G01* +X57100000Y31756250D01* +G75* +G02* +X57318750Y31975000I218750J0D01* +G01* +X57756250Y31975000D01* +G75* +G02* +X57975000Y31756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56400000Y34756250D02* +X56400000Y34243750D01* +G75* +G02* +X56181250Y34025000I-218750J0D01* +G01* +X55743750Y34025000D01* +G75* +G02* +X55525000Y34243750I0J218750D01* +G01* +X55525000Y34756250D01* +G75* +G02* +X55743750Y34975000I218750J0D01* +G01* +X56181250Y34975000D01* +G75* +G02* +X56400000Y34756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y34756250D02* +X57975000Y34243750D01* +G75* +G02* +X57756250Y34025000I-218750J0D01* +G01* +X57318750Y34025000D01* +G75* +G02* +X57100000Y34243750I0J218750D01* +G01* +X57100000Y34756250D01* +G75* +G02* +X57318750Y34975000I218750J0D01* +G01* +X57756250Y34975000D01* +G75* +G02* +X57975000Y34756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26400000Y31506250D02* +X26400000Y30993750D01* +G75* +G02* +X26181250Y30775000I-218750J0D01* +G01* +X25743750Y30775000D01* +G75* +G02* +X25525000Y30993750I0J218750D01* +G01* +X25525000Y31506250D01* +G75* +G02* +X25743750Y31725000I218750J0D01* +G01* +X26181250Y31725000D01* +G75* +G02* +X26400000Y31506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27975000Y31506250D02* +X27975000Y30993750D01* +G75* +G02* +X27756250Y30775000I-218750J0D01* +G01* +X27318750Y30775000D01* +G75* +G02* +X27100000Y30993750I0J218750D01* +G01* +X27100000Y31506250D01* +G75* +G02* +X27318750Y31725000I218750J0D01* +G01* +X27756250Y31725000D01* +G75* +G02* +X27975000Y31506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56400000Y33256250D02* +X56400000Y32743750D01* +G75* +G02* +X56181250Y32525000I-218750J0D01* +G01* +X55743750Y32525000D01* +G75* +G02* +X55525000Y32743750I0J218750D01* +G01* +X55525000Y33256250D01* +G75* +G02* +X55743750Y33475000I218750J0D01* +G01* +X56181250Y33475000D01* +G75* +G02* +X56400000Y33256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y33256250D02* +X57975000Y32743750D01* +G75* +G02* +X57756250Y32525000I-218750J0D01* +G01* +X57318750Y32525000D01* +G75* +G02* +X57100000Y32743750I0J218750D01* +G01* +X57100000Y33256250D01* +G75* +G02* +X57318750Y33475000I218750J0D01* +G01* +X57756250Y33475000D01* +G75* +G02* +X57975000Y33256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56400000Y37756250D02* +X56400000Y37243750D01* +G75* +G02* +X56181250Y37025000I-218750J0D01* +G01* +X55743750Y37025000D01* +G75* +G02* +X55525000Y37243750I0J218750D01* +G01* +X55525000Y37756250D01* +G75* +G02* +X55743750Y37975000I218750J0D01* +G01* +X56181250Y37975000D01* +G75* +G02* +X56400000Y37756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y37756250D02* +X57975000Y37243750D01* +G75* +G02* +X57756250Y37025000I-218750J0D01* +G01* +X57318750Y37025000D01* +G75* +G02* +X57100000Y37243750I0J218750D01* +G01* +X57100000Y37756250D01* +G75* +G02* +X57318750Y37975000I218750J0D01* +G01* +X57756250Y37975000D01* +G75* +G02* +X57975000Y37756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X56400000Y36256250D02* +X56400000Y35743750D01* +G75* +G02* +X56181250Y35525000I-218750J0D01* +G01* +X55743750Y35525000D01* +G75* +G02* +X55525000Y35743750I0J218750D01* +G01* +X55525000Y36256250D01* +G75* +G02* +X55743750Y36475000I218750J0D01* +G01* +X56181250Y36475000D01* +G75* +G02* +X56400000Y36256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57975000Y36256250D02* +X57975000Y35743750D01* +G75* +G02* +X57756250Y35525000I-218750J0D01* +G01* +X57318750Y35525000D01* +G75* +G02* +X57100000Y35743750I0J218750D01* +G01* +X57100000Y36256250D01* +G75* +G02* +X57318750Y36475000I218750J0D01* +G01* +X57756250Y36475000D01* +G75* +G02* +X57975000Y36256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X75400000Y41756250D02* +X75400000Y41243750D01* +G75* +G02* +X75181250Y41025000I-218750J0D01* +G01* +X74743750Y41025000D01* +G75* +G02* +X74525000Y41243750I0J218750D01* +G01* +X74525000Y41756250D01* +G75* +G02* +X74743750Y41975000I218750J0D01* +G01* +X75181250Y41975000D01* +G75* +G02* +X75400000Y41756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X76975000Y41756250D02* +X76975000Y41243750D01* +G75* +G02* +X76756250Y41025000I-218750J0D01* +G01* +X76318750Y41025000D01* +G75* +G02* +X76100000Y41243750I0J218750D01* +G01* +X76100000Y41756250D01* +G75* +G02* +X76318750Y41975000I218750J0D01* +G01* +X76756250Y41975000D01* +G75* +G02* +X76975000Y41756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78400000Y41756250D02* +X78400000Y41243750D01* +G75* +G02* +X78181250Y41025000I-218750J0D01* +G01* +X77743750Y41025000D01* +G75* +G02* +X77525000Y41243750I0J218750D01* +G01* +X77525000Y41756250D01* +G75* +G02* +X77743750Y41975000I218750J0D01* +G01* +X78181250Y41975000D01* +G75* +G02* +X78400000Y41756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79975000Y41756250D02* +X79975000Y41243750D01* +G75* +G02* +X79756250Y41025000I-218750J0D01* +G01* +X79318750Y41025000D01* +G75* +G02* +X79100000Y41243750I0J218750D01* +G01* +X79100000Y41756250D01* +G75* +G02* +X79318750Y41975000I218750J0D01* +G01* +X79756250Y41975000D01* +G75* +G02* +X79975000Y41756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X32400000Y39256250D02* +X32400000Y38743750D01* +G75* +G02* +X32181250Y38525000I-218750J0D01* +G01* +X31743750Y38525000D01* +G75* +G02* +X31525000Y38743750I0J218750D01* +G01* +X31525000Y39256250D01* +G75* +G02* +X31743750Y39475000I218750J0D01* +G01* +X32181250Y39475000D01* +G75* +G02* +X32400000Y39256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X33975000Y39256250D02* +X33975000Y38743750D01* +G75* +G02* +X33756250Y38525000I-218750J0D01* +G01* +X33318750Y38525000D01* +G75* +G02* +X33100000Y38743750I0J218750D01* +G01* +X33100000Y39256250D01* +G75* +G02* +X33318750Y39475000I218750J0D01* +G01* +X33756250Y39475000D01* +G75* +G02* +X33975000Y39256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X33100000Y40243750D02* +X33100000Y40756250D01* +G75* +G02* +X33318750Y40975000I218750J0D01* +G01* +X33756250Y40975000D01* +G75* +G02* +X33975000Y40756250I0J-218750D01* +G01* +X33975000Y40243750D01* +G75* +G02* +X33756250Y40025000I-218750J0D01* +G01* +X33318750Y40025000D01* +G75* +G02* +X33100000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X31525000Y40243750D02* +X31525000Y40756250D01* +G75* +G02* +X31743750Y40975000I218750J0D01* +G01* +X32181250Y40975000D01* +G75* +G02* +X32400000Y40756250I0J-218750D01* +G01* +X32400000Y40243750D01* +G75* +G02* +X32181250Y40025000I-218750J0D01* +G01* +X31743750Y40025000D01* +G75* +G02* +X31525000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27650000Y45256250D02* +X27650000Y44743750D01* +G75* +G02* +X27431250Y44525000I-218750J0D01* +G01* +X26993750Y44525000D01* +G75* +G02* +X26775000Y44743750I0J218750D01* +G01* +X26775000Y45256250D01* +G75* +G02* +X26993750Y45475000I218750J0D01* +G01* +X27431250Y45475000D01* +G75* +G02* +X27650000Y45256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X29225000Y45256250D02* +X29225000Y44743750D01* +G75* +G02* +X29006250Y44525000I-218750J0D01* +G01* +X28568750Y44525000D01* +G75* +G02* +X28350000Y44743750I0J218750D01* +G01* +X28350000Y45256250D01* +G75* +G02* +X28568750Y45475000I218750J0D01* +G01* +X29006250Y45475000D01* +G75* +G02* +X29225000Y45256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27650000Y43756250D02* +X27650000Y43243750D01* +G75* +G02* +X27431250Y43025000I-218750J0D01* +G01* +X26993750Y43025000D01* +G75* +G02* +X26775000Y43243750I0J218750D01* +G01* +X26775000Y43756250D01* +G75* +G02* +X26993750Y43975000I218750J0D01* +G01* +X27431250Y43975000D01* +G75* +G02* +X27650000Y43756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X29225000Y43756250D02* +X29225000Y43243750D01* +G75* +G02* +X29006250Y43025000I-218750J0D01* +G01* +X28568750Y43025000D01* +G75* +G02* +X28350000Y43243750I0J218750D01* +G01* +X28350000Y43756250D01* +G75* +G02* +X28568750Y43975000I218750J0D01* +G01* +X29006250Y43975000D01* +G75* +G02* +X29225000Y43756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X24650000Y43756250D02* +X24650000Y43243750D01* +G75* +G02* +X24431250Y43025000I-218750J0D01* +G01* +X23993750Y43025000D01* +G75* +G02* +X23775000Y43243750I0J218750D01* +G01* +X23775000Y43756250D01* +G75* +G02* +X23993750Y43975000I218750J0D01* +G01* +X24431250Y43975000D01* +G75* +G02* +X24650000Y43756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26225000Y43756250D02* +X26225000Y43243750D01* +G75* +G02* +X26006250Y43025000I-218750J0D01* +G01* +X25568750Y43025000D01* +G75* +G02* +X25350000Y43243750I0J218750D01* +G01* +X25350000Y43756250D01* +G75* +G02* +X25568750Y43975000I218750J0D01* +G01* +X26006250Y43975000D01* +G75* +G02* +X26225000Y43756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X57100000Y38743750D02* +X57100000Y39256250D01* +G75* +G02* +X57318750Y39475000I218750J0D01* +G01* +X57756250Y39475000D01* +G75* +G02* +X57975000Y39256250I0J-218750D01* +G01* +X57975000Y38743750D01* +G75* +G02* +X57756250Y38525000I-218750J0D01* +G01* +X57318750Y38525000D01* +G75* +G02* +X57100000Y38743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X55525000Y38743750D02* +X55525000Y39256250D01* +G75* +G02* +X55743750Y39475000I218750J0D01* +G01* +X56181250Y39475000D01* +G75* +G02* +X56400000Y39256250I0J-218750D01* +G01* +X56400000Y38743750D01* +G75* +G02* +X56181250Y38525000I-218750J0D01* +G01* +X55743750Y38525000D01* +G75* +G02* +X55525000Y38743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X24650000Y45256250D02* +X24650000Y44743750D01* +G75* +G02* +X24431250Y44525000I-218750J0D01* +G01* +X23993750Y44525000D01* +G75* +G02* +X23775000Y44743750I0J218750D01* +G01* +X23775000Y45256250D01* +G75* +G02* +X23993750Y45475000I218750J0D01* +G01* +X24431250Y45475000D01* +G75* +G02* +X24650000Y45256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26225000Y45256250D02* +X26225000Y44743750D01* +G75* +G02* +X26006250Y44525000I-218750J0D01* +G01* +X25568750Y44525000D01* +G75* +G02* +X25350000Y44743750I0J218750D01* +G01* +X25350000Y45256250D01* +G75* +G02* +X25568750Y45475000I218750J0D01* +G01* +X26006250Y45475000D01* +G75* +G02* +X26225000Y45256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X21725000Y39256250D02* +X21725000Y38743750D01* +G75* +G02* +X21506250Y38525000I-218750J0D01* +G01* +X21068750Y38525000D01* +G75* +G02* +X20850000Y38743750I0J218750D01* +G01* +X20850000Y39256250D01* +G75* +G02* +X21068750Y39475000I218750J0D01* +G01* +X21506250Y39475000D01* +G75* +G02* +X21725000Y39256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20150000Y39256250D02* +X20150000Y38743750D01* +G75* +G02* +X19931250Y38525000I-218750J0D01* +G01* +X19493750Y38525000D01* +G75* +G02* +X19275000Y38743750I0J218750D01* +G01* +X19275000Y39256250D01* +G75* +G02* +X19493750Y39475000I218750J0D01* +G01* +X19931250Y39475000D01* +G75* +G02* +X20150000Y39256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X39100000Y38993750D02* +X39100000Y39506250D01* +G75* +G02* +X39318750Y39725000I218750J0D01* +G01* +X39756250Y39725000D01* +G75* +G02* +X39975000Y39506250I0J-218750D01* +G01* +X39975000Y38993750D01* +G75* +G02* +X39756250Y38775000I-218750J0D01* +G01* +X39318750Y38775000D01* +G75* +G02* +X39100000Y38993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X37525000Y38993750D02* +X37525000Y39506250D01* +G75* +G02* +X37743750Y39725000I218750J0D01* +G01* +X38181250Y39725000D01* +G75* +G02* +X38400000Y39506250I0J-218750D01* +G01* +X38400000Y38993750D01* +G75* +G02* +X38181250Y38775000I-218750J0D01* +G01* +X37743750Y38775000D01* +G75* +G02* +X37525000Y38993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X39100000Y40993750D02* +X39100000Y41506250D01* +G75* +G02* +X39318750Y41725000I218750J0D01* +G01* +X39756250Y41725000D01* +G75* +G02* +X39975000Y41506250I0J-218750D01* +G01* +X39975000Y40993750D01* +G75* +G02* +X39756250Y40775000I-218750J0D01* +G01* +X39318750Y40775000D01* +G75* +G02* +X39100000Y40993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X37525000Y40993750D02* +X37525000Y41506250D01* +G75* +G02* +X37743750Y41725000I218750J0D01* +G01* +X38181250Y41725000D01* +G75* +G02* +X38400000Y41506250I0J-218750D01* +G01* +X38400000Y40993750D01* +G75* +G02* +X38181250Y40775000I-218750J0D01* +G01* +X37743750Y40775000D01* +G75* +G02* +X37525000Y40993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X19275000Y40243750D02* +X19275000Y40756250D01* +G75* +G02* +X19493750Y40975000I218750J0D01* +G01* +X19931250Y40975000D01* +G75* +G02* +X20150000Y40756250I0J-218750D01* +G01* +X20150000Y40243750D01* +G75* +G02* +X19931250Y40025000I-218750J0D01* +G01* +X19493750Y40025000D01* +G75* +G02* +X19275000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20850000Y40243750D02* +X20850000Y40756250D01* +G75* +G02* +X21068750Y40975000I218750J0D01* +G01* +X21506250Y40975000D01* +G75* +G02* +X21725000Y40756250I0J-218750D01* +G01* +X21725000Y40243750D01* +G75* +G02* +X21506250Y40025000I-218750J0D01* +G01* +X21068750Y40025000D01* +G75* +G02* +X20850000Y40243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17025000Y41743750D02* +X17025000Y42256250D01* +G75* +G02* +X17243750Y42475000I218750J0D01* +G01* +X17681250Y42475000D01* +G75* +G02* +X17900000Y42256250I0J-218750D01* +G01* +X17900000Y41743750D01* +G75* +G02* +X17681250Y41525000I-218750J0D01* +G01* +X17243750Y41525000D01* +G75* +G02* +X17025000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X18600000Y41743750D02* +X18600000Y42256250D01* +G75* +G02* +X18818750Y42475000I218750J0D01* +G01* +X19256250Y42475000D01* +G75* +G02* +X19475000Y42256250I0J-218750D01* +G01* +X19475000Y41743750D01* +G75* +G02* +X19256250Y41525000I-218750J0D01* +G01* +X18818750Y41525000D01* +G75* +G02* +X18600000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20025000Y41743750D02* +X20025000Y42256250D01* +G75* +G02* +X20243750Y42475000I218750J0D01* +G01* +X20681250Y42475000D01* +G75* +G02* +X20900000Y42256250I0J-218750D01* +G01* +X20900000Y41743750D01* +G75* +G02* +X20681250Y41525000I-218750J0D01* +G01* +X20243750Y41525000D01* +G75* +G02* +X20025000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X21600000Y41743750D02* +X21600000Y42256250D01* +G75* +G02* +X21818750Y42475000I218750J0D01* +G01* +X22256250Y42475000D01* +G75* +G02* +X22475000Y42256250I0J-218750D01* +G01* +X22475000Y41743750D01* +G75* +G02* +X22256250Y41525000I-218750J0D01* +G01* +X21818750Y41525000D01* +G75* +G02* +X21600000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X11725000Y38506250D02* +X11725000Y37993750D01* +G75* +G02* +X11506250Y37775000I-218750J0D01* +G01* +X11068750Y37775000D01* +G75* +G02* +X10850000Y37993750I0J218750D01* +G01* +X10850000Y38506250D01* +G75* +G02* +X11068750Y38725000I218750J0D01* +G01* +X11506250Y38725000D01* +G75* +G02* +X11725000Y38506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X10150000Y38506250D02* +X10150000Y37993750D01* +G75* +G02* +X9931250Y37775000I-218750J0D01* +G01* +X9493750Y37775000D01* +G75* +G02* +X9275000Y37993750I0J218750D01* +G01* +X9275000Y38506250D01* +G75* +G02* +X9493750Y38725000I218750J0D01* +G01* +X9931250Y38725000D01* +G75* +G02* +X10150000Y38506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X11725000Y37006250D02* +X11725000Y36493750D01* +G75* +G02* +X11506250Y36275000I-218750J0D01* +G01* +X11068750Y36275000D01* +G75* +G02* +X10850000Y36493750I0J218750D01* +G01* +X10850000Y37006250D01* +G75* +G02* +X11068750Y37225000I218750J0D01* +G01* +X11506250Y37225000D01* +G75* +G02* +X11725000Y37006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X10150000Y37006250D02* +X10150000Y36493750D01* +G75* +G02* +X9931250Y36275000I-218750J0D01* +G01* +X9493750Y36275000D01* +G75* +G02* +X9275000Y36493750I0J218750D01* +G01* +X9275000Y37006250D01* +G75* +G02* +X9493750Y37225000I218750J0D01* +G01* +X9931250Y37225000D01* +G75* +G02* +X10150000Y37006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26400000Y29506250D02* +X26400000Y28993750D01* +G75* +G02* +X26181250Y28775000I-218750J0D01* +G01* +X25743750Y28775000D01* +G75* +G02* +X25525000Y28993750I0J218750D01* +G01* +X25525000Y29506250D01* +G75* +G02* +X25743750Y29725000I218750J0D01* +G01* +X26181250Y29725000D01* +G75* +G02* +X26400000Y29506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27975000Y29506250D02* +X27975000Y28993750D01* +G75* +G02* +X27756250Y28775000I-218750J0D01* +G01* +X27318750Y28775000D01* +G75* +G02* +X27100000Y28993750I0J218750D01* +G01* +X27100000Y29506250D01* +G75* +G02* +X27318750Y29725000I218750J0D01* +G01* +X27756250Y29725000D01* +G75* +G02* +X27975000Y29506250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X21725000Y37756250D02* +X21725000Y37243750D01* +G75* +G02* +X21506250Y37025000I-218750J0D01* +G01* +X21068750Y37025000D01* +G75* +G02* +X20850000Y37243750I0J218750D01* +G01* +X20850000Y37756250D01* +G75* +G02* +X21068750Y37975000I218750J0D01* +G01* +X21506250Y37975000D01* +G75* +G02* +X21725000Y37756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20150000Y37756250D02* +X20150000Y37243750D01* +G75* +G02* +X19931250Y37025000I-218750J0D01* +G01* +X19493750Y37025000D01* +G75* +G02* +X19275000Y37243750I0J218750D01* +G01* +X19275000Y37756250D01* +G75* +G02* +X19493750Y37975000I218750J0D01* +G01* +X19931250Y37975000D01* +G75* +G02* +X20150000Y37756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X19275000Y34243750D02* +X19275000Y34756250D01* +G75* +G02* +X19493750Y34975000I218750J0D01* +G01* +X19931250Y34975000D01* +G75* +G02* +X20150000Y34756250I0J-218750D01* +G01* +X20150000Y34243750D01* +G75* +G02* +X19931250Y34025000I-218750J0D01* +G01* +X19493750Y34025000D01* +G75* +G02* +X19275000Y34243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20850000Y34243750D02* +X20850000Y34756250D01* +G75* +G02* +X21068750Y34975000I218750J0D01* +G01* +X21506250Y34975000D01* +G75* +G02* +X21725000Y34756250I0J-218750D01* +G01* +X21725000Y34243750D01* +G75* +G02* +X21506250Y34025000I-218750J0D01* +G01* +X21068750Y34025000D01* +G75* +G02* +X20850000Y34243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27100000Y27493750D02* +X27100000Y28006250D01* +G75* +G02* +X27318750Y28225000I218750J0D01* +G01* +X27756250Y28225000D01* +G75* +G02* +X27975000Y28006250I0J-218750D01* +G01* +X27975000Y27493750D01* +G75* +G02* +X27756250Y27275000I-218750J0D01* +G01* +X27318750Y27275000D01* +G75* +G02* +X27100000Y27493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X25525000Y27493750D02* +X25525000Y28006250D01* +G75* +G02* +X25743750Y28225000I218750J0D01* +G01* +X26181250Y28225000D01* +G75* +G02* +X26400000Y28006250I0J-218750D01* +G01* +X26400000Y27493750D01* +G75* +G02* +X26181250Y27275000I-218750J0D01* +G01* +X25743750Y27275000D01* +G75* +G02* +X25525000Y27493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +D27* +X21440000Y27550000D03* +X21440000Y28500000D03* +X21440000Y29450000D03* +X24060000Y29450000D03* +X24060000Y28500000D03* +X24060000Y27550000D03* +D28* +X93210000Y34960000D03* +X98290000Y34960000D03* +X98290000Y40040000D03* +X93210000Y40040000D03* +X95750000Y37500000D03* +D29* +X11000000Y44000000D03* +X7500000Y47500000D03* +X7500000Y44000000D03* +X9250000Y43250000D03* +X6750000Y45750000D03* +X9250000Y48250000D03* +X11000000Y47500000D03* +X11750000Y45750000D03* +D30* +X9250000Y45750000D03* +D29* +X97500000Y44000000D03* +X94000000Y47500000D03* +X94000000Y44000000D03* +X95750000Y43250000D03* +X93250000Y45750000D03* +X95750000Y48250000D03* +X97500000Y47500000D03* +X98250000Y45750000D03* +D30* +X95750000Y45750000D03* +D31* +X36980000Y46115000D03* +X36980000Y47385000D03* +X38250000Y46115000D03* +X38250000Y47385000D03* +X39520000Y46115000D03* +X39520000Y47385000D03* +D29* +X11000000Y27500000D03* +X7500000Y31000000D03* +X7500000Y27500000D03* +X9250000Y26750000D03* +X6750000Y29250000D03* +X9250000Y31750000D03* +X11000000Y31000000D03* +X11750000Y29250000D03* +D30* +X9250000Y29250000D03* +D29* +X97500000Y27500000D03* +X94000000Y31000000D03* +X94000000Y27500000D03* +X95750000Y26750000D03* +X93250000Y29250000D03* +X95750000Y31750000D03* +X97500000Y31000000D03* +X98250000Y29250000D03* +D30* +X95750000Y29250000D03* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79025000Y42793750D02* +X79025000Y43706250D01* +G75* +G02* +X79268750Y43950000I243750J0D01* +G01* +X79756250Y43950000D01* +G75* +G02* +X80000000Y43706250I0J-243750D01* +G01* +X80000000Y42793750D01* +G75* +G02* +X79756250Y42550000I-243750J0D01* +G01* +X79268750Y42550000D01* +G75* +G02* +X79025000Y42793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X80900000Y42793750D02* +X80900000Y43706250D01* +G75* +G02* +X81143750Y43950000I243750J0D01* +G01* +X81631250Y43950000D01* +G75* +G02* +X81875000Y43706250I0J-243750D01* +G01* +X81875000Y42793750D01* +G75* +G02* +X81631250Y42550000I-243750J0D01* +G01* +X81143750Y42550000D01* +G75* +G02* +X80900000Y42793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78475000Y43706250D02* +X78475000Y42793750D01* +G75* +G02* +X78231250Y42550000I-243750J0D01* +G01* +X77743750Y42550000D01* +G75* +G02* +X77500000Y42793750I0J243750D01* +G01* +X77500000Y43706250D01* +G75* +G02* +X77743750Y43950000I243750J0D01* +G01* +X78231250Y43950000D01* +G75* +G02* +X78475000Y43706250I0J-243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X76600000Y43706250D02* +X76600000Y42793750D01* +G75* +G02* +X76356250Y42550000I-243750J0D01* +G01* +X75868750Y42550000D01* +G75* +G02* +X75625000Y42793750I0J243750D01* +G01* +X75625000Y43706250D01* +G75* +G02* +X75868750Y43950000I243750J0D01* +G01* +X76356250Y43950000D01* +G75* +G02* +X76600000Y43706250I0J-243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78043750Y38150000D02* +X78956250Y38150000D01* +G75* +G02* +X79200000Y37906250I0J-243750D01* +G01* +X79200000Y37418750D01* +G75* +G02* +X78956250Y37175000I-243750J0D01* +G01* +X78043750Y37175000D01* +G75* +G02* +X77800000Y37418750I0J243750D01* +G01* +X77800000Y37906250D01* +G75* +G02* +X78043750Y38150000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X78043750Y40025000D02* +X78956250Y40025000D01* +G75* +G02* +X79200000Y39781250I0J-243750D01* +G01* +X79200000Y39293750D01* +G75* +G02* +X78956250Y39050000I-243750J0D01* +G01* +X78043750Y39050000D01* +G75* +G02* +X77800000Y39293750I0J243750D01* +G01* +X77800000Y39781250D01* +G75* +G02* +X78043750Y40025000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79993750Y38150000D02* +X80906250Y38150000D01* +G75* +G02* +X81150000Y37906250I0J-243750D01* +G01* +X81150000Y37418750D01* +G75* +G02* +X80906250Y37175000I-243750J0D01* +G01* +X79993750Y37175000D01* +G75* +G02* +X79750000Y37418750I0J243750D01* +G01* +X79750000Y37906250D01* +G75* +G02* +X79993750Y38150000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X79993750Y40025000D02* +X80906250Y40025000D01* +G75* +G02* +X81150000Y39781250I0J-243750D01* +G01* +X81150000Y39293750D01* +G75* +G02* +X80906250Y39050000I-243750J0D01* +G01* +X79993750Y39050000D01* +G75* +G02* +X79750000Y39293750I0J243750D01* +G01* +X79750000Y39781250D01* +G75* +G02* +X79993750Y40025000I243750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X22525000Y32493750D02* +X22525000Y33006250D01* +G75* +G02* +X22743750Y33225000I218750J0D01* +G01* +X23181250Y33225000D01* +G75* +G02* +X23400000Y33006250I0J-218750D01* +G01* +X23400000Y32493750D01* +G75* +G02* +X23181250Y32275000I-218750J0D01* +G01* +X22743750Y32275000D01* +G75* +G02* +X22525000Y32493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X24100000Y32493750D02* +X24100000Y33006250D01* +G75* +G02* +X24318750Y33225000I218750J0D01* +G01* +X24756250Y33225000D01* +G75* +G02* +X24975000Y33006250I0J-218750D01* +G01* +X24975000Y32493750D01* +G75* +G02* +X24756250Y32275000I-218750J0D01* +G01* +X24318750Y32275000D01* +G75* +G02* +X24100000Y32493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X25350000Y41743750D02* +X25350000Y42256250D01* +G75* +G02* +X25568750Y42475000I218750J0D01* +G01* +X26006250Y42475000D01* +G75* +G02* +X26225000Y42256250I0J-218750D01* +G01* +X26225000Y41743750D01* +G75* +G02* +X26006250Y41525000I-218750J0D01* +G01* +X25568750Y41525000D01* +G75* +G02* +X25350000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X23775000Y41743750D02* +X23775000Y42256250D01* +G75* +G02* +X23993750Y42475000I218750J0D01* +G01* +X24431250Y42475000D01* +G75* +G02* +X24650000Y42256250I0J-218750D01* +G01* +X24650000Y41743750D01* +G75* +G02* +X24431250Y41525000I-218750J0D01* +G01* +X23993750Y41525000D01* +G75* +G02* +X23775000Y41743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X30975000Y33006250D02* +X30975000Y32493750D01* +G75* +G02* +X30756250Y32275000I-218750J0D01* +G01* +X30318750Y32275000D01* +G75* +G02* +X30100000Y32493750I0J218750D01* +G01* +X30100000Y33006250D01* +G75* +G02* +X30318750Y33225000I218750J0D01* +G01* +X30756250Y33225000D01* +G75* +G02* +X30975000Y33006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X29400000Y33006250D02* +X29400000Y32493750D01* +G75* +G02* +X29181250Y32275000I-218750J0D01* +G01* +X28743750Y32275000D01* +G75* +G02* +X28525000Y32493750I0J218750D01* +G01* +X28525000Y33006250D01* +G75* +G02* +X28743750Y33225000I218750J0D01* +G01* +X29181250Y33225000D01* +G75* +G02* +X29400000Y33006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X36325000Y31793750D02* +X36325000Y32706250D01* +G75* +G02* +X36568750Y32950000I243750J0D01* +G01* +X37056250Y32950000D01* +G75* +G02* +X37300000Y32706250I0J-243750D01* +G01* +X37300000Y31793750D01* +G75* +G02* +X37056250Y31550000I-243750J0D01* +G01* +X36568750Y31550000D01* +G75* +G02* +X36325000Y31793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X38200000Y31793750D02* +X38200000Y32706250D01* +G75* +G02* +X38443750Y32950000I243750J0D01* +G01* +X38931250Y32950000D01* +G75* +G02* +X39175000Y32706250I0J-243750D01* +G01* +X39175000Y31793750D01* +G75* +G02* +X38931250Y31550000I-243750J0D01* +G01* +X38443750Y31550000D01* +G75* +G02* +X38200000Y31793750I0J243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X39175000Y30706250D02* +X39175000Y29793750D01* +G75* +G02* +X38931250Y29550000I-243750J0D01* +G01* +X38443750Y29550000D01* +G75* +G02* +X38200000Y29793750I0J243750D01* +G01* +X38200000Y30706250D01* +G75* +G02* +X38443750Y30950000I243750J0D01* +G01* +X38931250Y30950000D01* +G75* +G02* +X39175000Y30706250I0J-243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X37300000Y30706250D02* +X37300000Y29793750D01* +G75* +G02* +X37056250Y29550000I-243750J0D01* +G01* +X36568750Y29550000D01* +G75* +G02* +X36325000Y29793750I0J243750D01* +G01* +X36325000Y30706250D01* +G75* +G02* +X36568750Y30950000I243750J0D01* +G01* +X37056250Y30950000D01* +G75* +G02* +X37300000Y30706250I0J-243750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X30650000Y46756250D02* +X30650000Y46243750D01* +G75* +G02* +X30431250Y46025000I-218750J0D01* +G01* +X29993750Y46025000D01* +G75* +G02* +X29775000Y46243750I0J218750D01* +G01* +X29775000Y46756250D01* +G75* +G02* +X29993750Y46975000I218750J0D01* +G01* +X30431250Y46975000D01* +G75* +G02* +X30650000Y46756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X32225000Y46756250D02* +X32225000Y46243750D01* +G75* +G02* +X32006250Y46025000I-218750J0D01* +G01* +X31568750Y46025000D01* +G75* +G02* +X31350000Y46243750I0J218750D01* +G01* +X31350000Y46756250D01* +G75* +G02* +X31568750Y46975000I218750J0D01* +G01* +X32006250Y46975000D01* +G75* +G02* +X32225000Y46756250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17725000Y33256250D02* +X17725000Y32743750D01* +G75* +G02* +X17506250Y32525000I-218750J0D01* +G01* +X17068750Y32525000D01* +G75* +G02* +X16850000Y32743750I0J218750D01* +G01* +X16850000Y33256250D01* +G75* +G02* +X17068750Y33475000I218750J0D01* +G01* +X17506250Y33475000D01* +G75* +G02* +X17725000Y33256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X16150000Y33256250D02* +X16150000Y32743750D01* +G75* +G02* +X15931250Y32525000I-218750J0D01* +G01* +X15493750Y32525000D01* +G75* +G02* +X15275000Y32743750I0J218750D01* +G01* +X15275000Y33256250D01* +G75* +G02* +X15493750Y33475000I218750J0D01* +G01* +X15931250Y33475000D01* +G75* +G02* +X16150000Y33256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X16225000Y42256250D02* +X16225000Y41743750D01* +G75* +G02* +X16006250Y41525000I-218750J0D01* +G01* +X15568750Y41525000D01* +G75* +G02* +X15350000Y41743750I0J218750D01* +G01* +X15350000Y42256250D01* +G75* +G02* +X15568750Y42475000I218750J0D01* +G01* +X16006250Y42475000D01* +G75* +G02* +X16225000Y42256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X14650000Y42256250D02* +X14650000Y41743750D01* +G75* +G02* +X14431250Y41525000I-218750J0D01* +G01* +X13993750Y41525000D01* +G75* +G02* +X13775000Y41743750I0J218750D01* +G01* +X13775000Y42256250D01* +G75* +G02* +X13993750Y42475000I218750J0D01* +G01* +X14431250Y42475000D01* +G75* +G02* +X14650000Y42256250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X27975000Y33006250D02* +X27975000Y32493750D01* +G75* +G02* +X27756250Y32275000I-218750J0D01* +G01* +X27318750Y32275000D01* +G75* +G02* +X27100000Y32493750I0J218750D01* +G01* +X27100000Y33006250D01* +G75* +G02* +X27318750Y33225000I218750J0D01* +G01* +X27756250Y33225000D01* +G75* +G02* +X27975000Y33006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X26400000Y33006250D02* +X26400000Y32493750D01* +G75* +G02* +X26181250Y32275000I-218750J0D01* +G01* +X25743750Y32275000D01* +G75* +G02* +X25525000Y32493750I0J218750D01* +G01* +X25525000Y33006250D01* +G75* +G02* +X25743750Y33225000I218750J0D01* +G01* +X26181250Y33225000D01* +G75* +G02* +X26400000Y33006250I0J-218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X25350000Y46243750D02* +X25350000Y46756250D01* +G75* +G02* +X25568750Y46975000I218750J0D01* +G01* +X26006250Y46975000D01* +G75* +G02* +X26225000Y46756250I0J-218750D01* +G01* +X26225000Y46243750D01* +G75* +G02* +X26006250Y46025000I-218750J0D01* +G01* +X25568750Y46025000D01* +G75* +G02* +X25350000Y46243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X23775000Y46243750D02* +X23775000Y46756250D01* +G75* +G02* +X23993750Y46975000I218750J0D01* +G01* +X24431250Y46975000D01* +G75* +G02* +X24650000Y46756250I0J-218750D01* +G01* +X24650000Y46243750D01* +G75* +G02* +X24431250Y46025000I-218750J0D01* +G01* +X23993750Y46025000D01* +G75* +G02* +X23775000Y46243750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X22525000Y38993750D02* +X22525000Y39506250D01* +G75* +G02* +X22743750Y39725000I218750J0D01* +G01* +X23181250Y39725000D01* +G75* +G02* +X23400000Y39506250I0J-218750D01* +G01* +X23400000Y38993750D01* +G75* +G02* +X23181250Y38775000I-218750J0D01* +G01* +X22743750Y38775000D01* +G75* +G02* +X22525000Y38993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X24100000Y38993750D02* +X24100000Y39506250D01* +G75* +G02* +X24318750Y39725000I218750J0D01* +G01* +X24756250Y39725000D01* +G75* +G02* +X24975000Y39506250I0J-218750D01* +G01* +X24975000Y38993750D01* +G75* +G02* +X24756250Y38775000I-218750J0D01* +G01* +X24318750Y38775000D01* +G75* +G02* +X24100000Y38993750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X22525000Y37493750D02* +X22525000Y38006250D01* +G75* +G02* +X22743750Y38225000I218750J0D01* +G01* +X23181250Y38225000D01* +G75* +G02* +X23400000Y38006250I0J-218750D01* +G01* +X23400000Y37493750D01* +G75* +G02* +X23181250Y37275000I-218750J0D01* +G01* +X22743750Y37275000D01* +G75* +G02* +X22525000Y37493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X24100000Y37493750D02* +X24100000Y38006250D01* +G75* +G02* +X24318750Y38225000I218750J0D01* +G01* +X24756250Y38225000D01* +G75* +G02* +X24975000Y38006250I0J-218750D01* +G01* +X24975000Y37493750D01* +G75* +G02* +X24756250Y37275000I-218750J0D01* +G01* +X24318750Y37275000D01* +G75* +G02* +X24100000Y37493750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X13006250Y36275000D02* +X12493750Y36275000D01* +G75* +G02* +X12275000Y36493750I0J218750D01* +G01* +X12275000Y36931250D01* +G75* +G02* +X12493750Y37150000I218750J0D01* +G01* +X13006250Y37150000D01* +G75* +G02* +X13225000Y36931250I0J-218750D01* +G01* +X13225000Y36493750D01* +G75* +G02* +X13006250Y36275000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X13006250Y37850000D02* +X12493750Y37850000D01* +G75* +G02* +X12275000Y38068750I0J218750D01* +G01* +X12275000Y38506250D01* +G75* +G02* +X12493750Y38725000I218750J0D01* +G01* +X13006250Y38725000D01* +G75* +G02* +X13225000Y38506250I0J-218750D01* +G01* +X13225000Y38068750D01* +G75* +G02* +X13006250Y37850000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17756250Y29100000D02* +X17243750Y29100000D01* +G75* +G02* +X17025000Y29318750I0J218750D01* +G01* +X17025000Y29756250D01* +G75* +G02* +X17243750Y29975000I218750J0D01* +G01* +X17756250Y29975000D01* +G75* +G02* +X17975000Y29756250I0J-218750D01* +G01* +X17975000Y29318750D01* +G75* +G02* +X17756250Y29100000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X17756250Y27525000D02* +X17243750Y27525000D01* +G75* +G02* +X17025000Y27743750I0J218750D01* +G01* +X17025000Y28181250D01* +G75* +G02* +X17243750Y28400000I218750J0D01* +G01* +X17756250Y28400000D01* +G75* +G02* +X17975000Y28181250I0J-218750D01* +G01* +X17975000Y27743750D01* +G75* +G02* +X17756250Y27525000I-218750J0D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X19275000Y32743750D02* +X19275000Y33256250D01* +G75* +G02* +X19493750Y33475000I218750J0D01* +G01* +X19931250Y33475000D01* +G75* +G02* +X20150000Y33256250I0J-218750D01* +G01* +X20150000Y32743750D01* +G75* +G02* +X19931250Y32525000I-218750J0D01* +G01* +X19493750Y32525000D01* +G75* +G02* +X19275000Y32743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! TA.AperFunction,SMDPad,CuDef* +G36* +G01* +X20850000Y32743750D02* +X20850000Y33256250D01* +G75* +G02* +X21068750Y33475000I218750J0D01* +G01* +X21506250Y33475000D01* +G75* +G02* +X21725000Y33256250I0J-218750D01* +G01* +X21725000Y32743750D01* +G75* +G02* +X21506250Y32525000I-218750J0D01* +G01* +X21068750Y32525000D01* +G75* +G02* +X20850000Y32743750I0J218750D01* +G01* +G37* +G04 #@! TD.AperFunction* +G04 #@! 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TA.AperFunction,Conductor* +D40* +G36* +X8670000Y38509933D02* +G01* +X8594214Y38478542D01* +X8505770Y38419446D01* +X8430554Y38344230D01* +X8371458Y38255786D01* +X8330752Y38157512D01* +X8310000Y38053185D01* +X8310000Y37946815D01* +X8330752Y37842488D01* +X8371458Y37744214D01* +X8430554Y37655770D01* +X8461324Y37625000D01* +X8430554Y37594230D01* +X8371458Y37505786D01* +X8330752Y37407512D01* +X8310000Y37303185D01* +X8310000Y37196815D01* +X8330752Y37092488D01* +X8371458Y36994214D01* +X8430554Y36905770D01* +X8505770Y36830554D01* +X8594214Y36771458D01* +X8670000Y36740067D01* +X8670000Y25312800D01* +X8080849Y25370567D01* +X7437198Y25564896D01* +X6843541Y25880550D01* +X6322503Y26305499D01* +X5893927Y26823557D01* +X5574141Y27414990D01* +X5375319Y28057279D01* +X5303536Y28740250D01* +X5303500Y28750480D01* +X5303500Y30920133D01* +X5308345Y30935597D01* +X5312523Y30974068D01* +X5313237Y30977545D01* +X5313260Y30980852D01* +X5314983Y30996715D01* +X5314998Y31001113D01* +X5314961Y31011585D01* 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TD.AperFunction* +D35* +X95016285Y49525896D02* +X94293743Y49310203D01* +X93627163Y48957693D01* +X93598852Y48938776D01* +X93237587Y48451917D01* +X94706869Y46982635D01* +X94706870Y46982635D01* +X95750000Y45939505D01* +X96793130Y46982635D01* +X96793131Y46982635D01* +X98262413Y48451917D01* +X97901148Y48938776D01* +X97237714Y49297173D01* +X96517109Y49519254D01* +X95961116Y49576500D01* +X96229286Y49576500D01* +X96895726Y49511155D01* +X97516858Y49323625D01* +X98089731Y49019022D01* +X98592537Y48608943D01* +X99006109Y48109020D01* +X99314707Y47538282D01* +X99506568Y46918475D01* +X99576487Y46253247D01* +X99576500Y46249391D01* +X99576500Y45945516D01* +X99525896Y46483715D01* +X99310203Y47206257D01* +X98957693Y47872837D01* +X98938776Y47901148D01* +X98451917Y48262413D01* +X96982635Y46793131D01* +X96982635Y46793130D01* +X95939505Y45750000D01* +X96982635Y44706870D01* +X96982635Y44706869D01* +X98451917Y43237587D01* +X98938776Y43598852D01* +X99297173Y44262286D01* +X99519254Y44982891D01* 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TD.AperFunction* +D35* +X36834996Y36983000D02* +X36965004Y36983000D01* +X37070631Y37004011D01* +X36987345Y36920725D01* +X36915116Y36812627D01* +X36865364Y36692515D01* +X36840000Y36565004D01* +X36840000Y36434996D01* +X36865364Y36307485D01* +X36915116Y36187373D01* +X36987345Y36079275D01* +X37079275Y35987345D01* +X37187373Y35915116D01* +X37254392Y35887356D01* +X37240000Y35815004D01* +X37240000Y35684996D01* +X37265364Y35557485D01* +X37315116Y35437373D01* +X37387345Y35329275D01* +X37479275Y35237345D01* +X37587373Y35165116D01* +X37631803Y35146713D01* +X37565004Y35160000D01* +X37434996Y35160000D01* +X37307485Y35134636D01* +X37187373Y35084884D01* +X37079275Y35012655D01* +X36987345Y34920725D01* +X36915116Y34812627D01* +X36865364Y34692515D01* +X36840000Y34565004D01* +X36840000Y34434996D01* +X36865364Y34307485D01* +X36915116Y34187373D01* +X36987345Y34079275D01* +X37079275Y33987345D01* +X37187373Y33915116D01* +X37307485Y33865364D01* +X37434996Y33840000D01* +X37565004Y33840000D01* +X37640000Y33854918D01* +X37640000Y29955028D01* +X37615004Y29960000D01* +X37484996Y29960000D01* +X37357485Y29934636D01* +X37237373Y29884884D01* +X37129275Y29812655D01* +X37037345Y29720725D01* +X36965116Y29612627D01* +X36915364Y29492515D01* +X36914864Y29490000D01* +X35971604Y29490000D01* +X35950000Y29492128D01* +X35928396Y29490000D01* +X35928393Y29490000D01* +X35863745Y29483633D01* +X35780805Y29458473D01* +X35704366Y29417616D01* +X35676591Y29394821D01* +X35637368Y29362632D01* +X35623593Y29345847D01* +X34804158Y28526411D01* +X34787368Y28512632D01* +X34763570Y28483633D01* +X34732384Y28445633D01* +X34715080Y28413259D01* +X34691527Y28369194D01* +X34666367Y28286254D01* +X34660827Y28230000D01* +X34657872Y28200000D01* +X34660000Y28178395D01* +X34660001Y27232255D01* +X34167747Y26740000D01* +X34135972Y26740000D01* +X34184636Y26857485D01* +X34210000Y26984996D01* +X34210000Y27115004D01* +X34184636Y27242515D01* +X34134884Y27362627D01* +X34062655Y27470725D01* +X34030000Y27503380D01* +X34030000Y28876425D01* +X34032322Y28900000D01* +X34025427Y28970000D01* +X34023054Y28994096D01* +X34017500Y29012405D01* +X34017500Y33152475D01* +X34021294Y33146797D01* +X34196797Y32971294D01* +X34403166Y32833402D01* +X34632471Y32738421D01* +X34875901Y32690000D01* +X35124099Y32690000D01* +X35367529Y32738421D01* +X35596834Y32833402D01* +X35803203Y32971294D01* +X35978706Y33146797D01* +X36116598Y33353166D01* +X36211579Y33582471D01* +X36260000Y33825901D01* +X36260000Y34074099D01* +X36211579Y34317529D01* +X36116598Y34546834D01* +X35978706Y34753203D01* +X35949066Y34782843D01* +X36428241Y35262018D01* +X36461054Y35288946D01* +X36568524Y35419898D01* +X36642273Y35557872D01* +X36648381Y35569299D01* +X36697556Y35731410D01* +X36714161Y35900000D01* +X36710000Y35942246D01* +X36710000Y37007864D01* +X36834996Y36983000D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X36834996Y36983000D02* +G01* +X36965004Y36983000D01* +X37070631Y37004011D01* +X36987345Y36920725D01* +X36915116Y36812627D01* +X36865364Y36692515D01* +X36840000Y36565004D01* +X36840000Y36434996D01* +X36865364Y36307485D01* +X36915116Y36187373D01* +X36987345Y36079275D01* +X37079275Y35987345D01* +X37187373Y35915116D01* +X37254392Y35887356D01* +X37240000Y35815004D01* +X37240000Y35684996D01* +X37265364Y35557485D01* +X37315116Y35437373D01* +X37387345Y35329275D01* +X37479275Y35237345D01* +X37587373Y35165116D01* +X37631803Y35146713D01* +X37565004Y35160000D01* +X37434996Y35160000D01* +X37307485Y35134636D01* +X37187373Y35084884D01* +X37079275Y35012655D01* +X36987345Y34920725D01* +X36915116Y34812627D01* +X36865364Y34692515D01* +X36840000Y34565004D01* +X36840000Y34434996D01* +X36865364Y34307485D01* +X36915116Y34187373D01* +X36987345Y34079275D01* +X37079275Y33987345D01* +X37187373Y33915116D01* +X37307485Y33865364D01* +X37434996Y33840000D01* +X37565004Y33840000D01* +X37640000Y33854918D01* +X37640000Y29955028D01* +X37615004Y29960000D01* +X37484996Y29960000D01* +X37357485Y29934636D01* +X37237373Y29884884D01* +X37129275Y29812655D01* +X37037345Y29720725D01* +X36965116Y29612627D01* +X36915364Y29492515D01* +X36914864Y29490000D01* +X35971604Y29490000D01* +X35950000Y29492128D01* +X35928396Y29490000D01* +X35928393Y29490000D01* +X35863745Y29483633D01* +X35780805Y29458473D01* +X35704366Y29417616D01* +X35676591Y29394821D01* +X35637368Y29362632D01* +X35623593Y29345847D01* +X34804158Y28526411D01* +X34787368Y28512632D01* +X34763570Y28483633D01* +X34732384Y28445633D01* +X34715080Y28413259D01* +X34691527Y28369194D01* +X34666367Y28286254D01* +X34660827Y28230000D01* +X34657872Y28200000D01* +X34660000Y28178395D01* +X34660001Y27232255D01* +X34167747Y26740000D01* +X34135972Y26740000D01* +X34184636Y26857485D01* +X34210000Y26984996D01* +X34210000Y27115004D01* +X34184636Y27242515D01* +X34134884Y27362627D01* +X34062655Y27470725D01* +X34030000Y27503380D01* +X34030000Y28876425D01* +X34032322Y28900000D01* +X34025427Y28970000D01* +X34023054Y28994096D01* +X34017500Y29012405D01* +X34017500Y33152475D01* +X34021294Y33146797D01* +X34196797Y32971294D01* +X34403166Y32833402D01* +X34632471Y32738421D01* +X34875901Y32690000D01* +X35124099Y32690000D01* +X35367529Y32738421D01* +X35596834Y32833402D01* +X35803203Y32971294D01* +X35978706Y33146797D01* +X36116598Y33353166D01* +X36211579Y33582471D01* +X36260000Y33825901D01* +X36260000Y34074099D01* +X36211579Y34317529D01* +X36116598Y34546834D01* +X35978706Y34753203D01* +X35949066Y34782843D01* +X36428241Y35262018D01* +X36461054Y35288946D01* +X36568524Y35419898D01* +X36642273Y35557872D01* +X36648381Y35569299D01* +X36697556Y35731410D01* +X36714161Y35900000D01* +X36710000Y35942246D01* +X36710000Y37007864D01* +X36834996Y36983000D01* +G37* +G04 #@! TD.AperFunction* +D35* +X31333281Y39833281D02* +X31421246Y39761089D01* +X31441992Y39750000D01* +X31421246Y39738911D01* +X31333281Y39666719D01* +X31261089Y39578754D01* +X31207446Y39478394D01* +X31174413Y39369498D01* +X31163259Y39256250D01* +X31163259Y38743750D01* +X31174413Y38630502D01* +X31207446Y38521606D01* +X31261089Y38421246D01* +X31333281Y38333281D01* +X31421246Y38261089D01* +X31521606Y38207446D01* +X31630502Y38174413D01* +X31743750Y38163259D01* +X32181250Y38163259D01* +X32294498Y38174413D01* +X32403394Y38207446D01* +X32503754Y38261089D01* +X32591719Y38333281D01* +X32663911Y38421246D01* +X32717554Y38521606D01* +X32750000Y38628567D01* +X32782446Y38521606D01* +X32836089Y38421246D01* +X32908281Y38333281D01* +X32996246Y38261089D01* +X33057500Y38228348D01* +X33057501Y28936077D01* +X33055179Y28912500D01* +X33064446Y28818404D01* +X33070001Y28800092D01* +X33070000Y27503380D01* +X33037345Y27470725D01* +X32965116Y27362627D01* +X32915364Y27242515D01* +X32892862Y27129391D01* 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TA.AperFunction,Conductor* +D40* +G36* +X31333281Y39833281D02* +G01* +X31421246Y39761089D01* +X31441992Y39750000D01* +X31421246Y39738911D01* +X31333281Y39666719D01* +X31261089Y39578754D01* +X31207446Y39478394D01* +X31174413Y39369498D01* +X31163259Y39256250D01* +X31163259Y38743750D01* +X31174413Y38630502D01* +X31207446Y38521606D01* +X31261089Y38421246D01* +X31333281Y38333281D01* +X31421246Y38261089D01* +X31521606Y38207446D01* +X31630502Y38174413D01* +X31743750Y38163259D01* +X32181250Y38163259D01* +X32294498Y38174413D01* +X32403394Y38207446D01* +X32503754Y38261089D01* +X32591719Y38333281D01* +X32663911Y38421246D01* +X32717554Y38521606D01* +X32750000Y38628567D01* +X32782446Y38521606D01* +X32836089Y38421246D01* +X32908281Y38333281D01* +X32996246Y38261089D01* +X33057500Y38228348D01* +X33057501Y28936077D01* +X33055179Y28912500D01* +X33064446Y28818404D01* +X33070001Y28800092D01* +X33070000Y27503380D01* +X33037345Y27470725D01* +X32965116Y27362627D01* +X32915364Y27242515D01* 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TD.AperFunction* +D35* +X22333281Y38583281D02* +X22421246Y38511089D01* +X22441992Y38500000D01* +X22421246Y38488911D01* +X22333281Y38416719D01* +X22261089Y38328754D01* +X22207446Y38228394D01* +X22174413Y38119498D01* +X22163259Y38006250D01* +X22163259Y37493750D01* +X22174413Y37380502D01* +X22207446Y37271606D01* +X22261089Y37171246D01* +X22333281Y37083281D01* +X22421246Y37011089D01* +X22521606Y36957446D01* +X22630502Y36924413D01* +X22743750Y36913259D01* +X22924559Y36913259D01* +X22916367Y36886254D01* +X22910411Y36825777D01* +X22907872Y36800000D01* +X22908601Y36792600D01* +X22894210Y36780790D01* +X22849223Y36725973D01* +X22815795Y36663432D01* +X22795210Y36595572D01* +X22788259Y36525000D01* +X22788259Y35875000D01* +X22795210Y35804428D01* +X22815795Y35736568D01* +X22846236Y35679616D01* +X22787345Y35620725D01* +X22715116Y35512627D01* +X22665364Y35392515D01* +X22640000Y35265004D01* +X22640000Y35134996D01* +X22665364Y35007485D01* +X22715116Y34887373D01* +X22787345Y34779275D01* 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+X21988911Y38421246D01* +X22042554Y38521606D01* +X22044182Y38526972D01* +X22134577Y38554393D01* +X22217964Y38598964D01* +X22279180Y38649203D01* +X22333281Y38583281D01* +G37* +G04 #@! TD.AperFunction* +D35* +X13847523Y36223656D02* +X13833144Y36211856D01* +X13769503Y36134308D01* +X13722213Y36045835D01* +X13693092Y35949836D01* +X13683259Y35850000D01* +X13683259Y34321098D01* +X13662627Y34334884D01* +X13542515Y34384636D01* +X13415004Y34410000D01* +X13284996Y34410000D01* +X13188058Y34390717D01* +X13166719Y34416719D01* +X13078754Y34488911D01* +X12978394Y34542554D01* +X12869498Y34575587D01* +X12756250Y34586741D01* +X12318750Y34586741D01* +X12205502Y34575587D01* +X12096606Y34542554D01* +X11996246Y34488911D01* +X11908281Y34416719D01* +X11836089Y34328754D01* +X11782446Y34228394D01* +X11750000Y34121433D01* +X11717554Y34228394D01* +X11663911Y34328754D01* +X11591719Y34416719D01* +X11503754Y34488911D01* +X11483008Y34500000D01* +X11503754Y34511089D01* +X11591719Y34583281D01* +X11663911Y34671246D01* +X11717554Y34771606D01* +X11750587Y34880502D01* +X11761741Y34993750D01* +X11761741Y35506250D01* +X11750587Y35619498D01* +X11717554Y35728394D01* +X11663911Y35828754D01* +X11591719Y35916719D01* +X11586325Y35921146D01* +X11619498Y35924413D01* +X11728394Y35957446D01* +X11828754Y36011089D01* +X11916719Y36083281D01* +X11988911Y36171246D01* +X12000000Y36191992D01* +X12011089Y36171246D01* +X12083281Y36083281D01* +X12171246Y36011089D01* +X12271606Y35957446D01* +X12380502Y35924413D01* +X12493750Y35913259D01* +X13006250Y35913259D01* +X13119498Y35924413D01* +X13228394Y35957446D01* +X13328754Y36011089D01* +X13416719Y36083281D01* +X13488911Y36171246D01* +X13521652Y36232500D01* +X13838678Y36232500D01* +X13847523Y36223656D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X13847523Y36223656D02* +G01* +X13833144Y36211856D01* +X13769503Y36134308D01* +X13722213Y36045835D01* +X13693092Y35949836D01* +X13683259Y35850000D01* +X13683259Y34321098D01* +X13662627Y34334884D01* +X13542515Y34384636D01* +X13415004Y34410000D01* +X13284996Y34410000D01* +X13188058Y34390717D01* +X13166719Y34416719D01* +X13078754Y34488911D01* +X12978394Y34542554D01* +X12869498Y34575587D01* +X12756250Y34586741D01* +X12318750Y34586741D01* +X12205502Y34575587D01* +X12096606Y34542554D01* +X11996246Y34488911D01* +X11908281Y34416719D01* +X11836089Y34328754D01* +X11782446Y34228394D01* +X11750000Y34121433D01* +X11717554Y34228394D01* +X11663911Y34328754D01* +X11591719Y34416719D01* +X11503754Y34488911D01* +X11483008Y34500000D01* +X11503754Y34511089D01* +X11591719Y34583281D01* +X11663911Y34671246D01* +X11717554Y34771606D01* +X11750587Y34880502D01* +X11761741Y34993750D01* +X11761741Y35506250D01* +X11750587Y35619498D01* +X11717554Y35728394D01* +X11663911Y35828754D01* +X11591719Y35916719D01* +X11586325Y35921146D01* +X11619498Y35924413D01* +X11728394Y35957446D01* +X11828754Y36011089D01* +X11916719Y36083281D01* +X11988911Y36171246D01* +X12000000Y36191992D01* +X12011089Y36171246D01* +X12083281Y36083281D01* +X12171246Y36011089D01* +X12271606Y35957446D01* +X12380502Y35924413D01* +X12493750Y35913259D01* +X13006250Y35913259D01* +X13119498Y35924413D01* +X13228394Y35957446D01* +X13328754Y36011089D01* +X13416719Y36083281D01* +X13488911Y36171246D01* +X13521652Y36232500D01* +X13838678Y36232500D01* +X13847523Y36223656D01* +G37* +G04 #@! TD.AperFunction* +D35* +X37079275Y41987345D02* +X37187373Y41915116D01* +X37295283Y41870418D01* +X37261089Y41828754D01* +X37207446Y41728394D01* +X37174413Y41619498D01* +X37163259Y41506250D01* +X37163259Y40993750D01* +X37174413Y40880502D01* +X37188153Y40835207D01* +X37187373Y40834884D01* +X37079275Y40762655D01* +X36987345Y40670725D01* +X36915116Y40562627D01* +X36865364Y40442515D01* +X36840000Y40315004D01* +X36840000Y40184996D01* +X36865364Y40057485D01* +X36915116Y39937373D01* +X36987345Y39829275D01* +X37079275Y39737345D01* +X37187373Y39665116D01* +X37307485Y39615364D01* +X37434996Y39590000D01* +X37565004Y39590000D01* +X37640000Y39604918D01* +X37640000Y38576522D01* +X37630502Y38575587D01* +X37521606Y38542554D01* +X37421246Y38488911D01* +X37333281Y38416719D01* +X37261089Y38328754D01* +X37208162Y38229733D01* +X37092515Y38277636D01* +X36965004Y38303000D01* +X36834996Y38303000D01* +X36710000Y38278136D01* +X36710000Y41702493D01* +X37037064Y42029556D01* +X37079275Y41987345D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X37079275Y41987345D02* +G01* +X37187373Y41915116D01* +X37295283Y41870418D01* +X37261089Y41828754D01* +X37207446Y41728394D01* +X37174413Y41619498D01* +X37163259Y41506250D01* +X37163259Y40993750D01* +X37174413Y40880502D01* +X37188153Y40835207D01* +X37187373Y40834884D01* +X37079275Y40762655D01* +X36987345Y40670725D01* +X36915116Y40562627D01* +X36865364Y40442515D01* +X36840000Y40315004D01* +X36840000Y40184996D01* +X36865364Y40057485D01* +X36915116Y39937373D01* +X36987345Y39829275D01* +X37079275Y39737345D01* +X37187373Y39665116D01* +X37307485Y39615364D01* +X37434996Y39590000D01* +X37565004Y39590000D01* +X37640000Y39604918D01* +X37640000Y38576522D01* +X37630502Y38575587D01* +X37521606Y38542554D01* +X37421246Y38488911D01* +X37333281Y38416719D01* +X37261089Y38328754D01* +X37208162Y38229733D01* +X37092515Y38277636D01* +X36965004Y38303000D01* +X36834996Y38303000D01* +X36710000Y38278136D01* +X36710000Y41702493D01* +X37037064Y42029556D01* +X37079275Y41987345D01* +G37* +G04 #@! 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TD.AperFunction* +D35* +X11782446Y40771606D02* +X11836089Y40671246D01* +X11908281Y40583281D01* +X11996246Y40511089D01* +X12096606Y40457446D01* +X12205502Y40424413D01* +X12318750Y40413259D01* +X12756250Y40413259D01* +X12869498Y40424413D01* +X12978394Y40457446D01* +X13078754Y40511089D01* +X13166719Y40583281D01* +X13196712Y40619827D01* +X13207485Y40615364D01* +X13334996Y40590000D01* +X13465004Y40590000D01* +X13592515Y40615364D01* +X13683259Y40652951D01* +X13683259Y39150000D01* +X13693092Y39050164D01* +X13722213Y38954165D01* +X13769503Y38865692D01* +X13833144Y38788144D01* +X13847523Y38776344D01* +X13838678Y38767500D01* +X13521652Y38767500D01* +X13488911Y38828754D01* +X13416719Y38916719D01* +X13328754Y38988911D01* +X13228394Y39042554D01* +X13119498Y39075587D01* +X13006250Y39086741D01* +X12493750Y39086741D01* +X12380502Y39075587D01* +X12271606Y39042554D01* +X12171246Y38988911D01* +X12083281Y38916719D01* +X12011089Y38828754D01* +X12000000Y38808008D01* +X11988911Y38828754D01* +X11916719Y38916719D01* +X11828754Y38988911D01* +X11728394Y39042554D01* +X11619498Y39075587D01* +X11586325Y39078854D01* +X11591719Y39083281D01* +X11663911Y39171246D01* +X11717554Y39271606D01* +X11750587Y39380502D01* +X11761741Y39493750D01* +X11761741Y40006250D01* +X11750587Y40119498D01* +X11717554Y40228394D01* +X11663911Y40328754D01* +X11591719Y40416719D01* +X11503754Y40488911D01* +X11483008Y40500000D01* +X11503754Y40511089D01* +X11591719Y40583281D01* +X11663911Y40671246D01* +X11717554Y40771606D01* +X11750000Y40878567D01* +X11782446Y40771606D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X11782446Y40771606D02* +G01* +X11836089Y40671246D01* +X11908281Y40583281D01* +X11996246Y40511089D01* +X12096606Y40457446D01* +X12205502Y40424413D01* +X12318750Y40413259D01* +X12756250Y40413259D01* +X12869498Y40424413D01* +X12978394Y40457446D01* +X13078754Y40511089D01* +X13166719Y40583281D01* +X13196712Y40619827D01* +X13207485Y40615364D01* +X13334996Y40590000D01* +X13465004Y40590000D01* +X13592515Y40615364D01* +X13683259Y40652951D01* +X13683259Y39150000D01* +X13693092Y39050164D01* +X13722213Y38954165D01* +X13769503Y38865692D01* +X13833144Y38788144D01* +X13847523Y38776344D01* +X13838678Y38767500D01* +X13521652Y38767500D01* +X13488911Y38828754D01* +X13416719Y38916719D01* +X13328754Y38988911D01* +X13228394Y39042554D01* +X13119498Y39075587D01* +X13006250Y39086741D01* +X12493750Y39086741D01* +X12380502Y39075587D01* +X12271606Y39042554D01* +X12171246Y38988911D01* +X12083281Y38916719D01* +X12011089Y38828754D01* +X12000000Y38808008D01* +X11988911Y38828754D01* +X11916719Y38916719D01* +X11828754Y38988911D01* +X11728394Y39042554D01* +X11619498Y39075587D01* +X11586325Y39078854D01* +X11591719Y39083281D01* +X11663911Y39171246D01* +X11717554Y39271606D01* +X11750587Y39380502D01* +X11761741Y39493750D01* +X11761741Y40006250D01* +X11750587Y40119498D01* +X11717554Y40228394D01* +X11663911Y40328754D01* +X11591719Y40416719D01* +X11503754Y40488911D01* +X11483008Y40500000D01* +X11503754Y40511089D01* +X11591719Y40583281D01* +X11663911Y40671246D01* +X11717554Y40771606D01* +X11750000Y40878567D01* +X11782446Y40771606D01* +G37* +G04 #@! TD.AperFunction* +D35* +X34093921Y44677256D02* +X34108947Y44658947D01* +X34127255Y44643922D01* +X34127258Y44643919D01* +X34130000Y44641669D01* +X34130000Y44400000D01* +X34132306Y44376589D01* +X34139134Y44354078D01* +X34150224Y44333332D01* +X34165147Y44315147D01* +X34183332Y44300224D01* +X34204078Y44289134D01* +X34226589Y44282306D01* +X34250000Y44280000D01* +X35754697Y44280000D01* +X35701620Y44180700D01* +X35652445Y44018589D01* +X35640001Y43892246D01* +X35640000Y43064940D01* +X35271760Y42696699D01* +X35238947Y42669770D01* +X35212018Y42636957D01* +X35212016Y42636955D01* +X35131477Y42538818D01* +X35051620Y42389416D01* +X35002444Y42227305D01* +X34985840Y42058716D01* +X34990001Y42016467D01* +X34990001Y41033184D01* +X34912627Y41084884D01* +X34792515Y41134636D01* +X34665004Y41160000D01* +X34534996Y41160000D01* +X34407485Y41134636D01* +X34287373Y41084884D01* +X34249250Y41059411D01* +X34238911Y41078754D01* +X34166719Y41166719D01* +X34078754Y41238911D01* +X33978394Y41292554D01* +X33869498Y41325587D01* +X33756250Y41336741D01* +X33318750Y41336741D01* +X33205502Y41325587D01* +X33096606Y41292554D01* +X32996246Y41238911D01* +X32908281Y41166719D01* +X32836089Y41078754D01* +X32782446Y40978394D01* +X32750000Y40871433D01* +X32717554Y40978394D01* +X32663911Y41078754D01* +X32591719Y41166719D01* +X32503754Y41238911D01* +X32403394Y41292554D01* +X32294498Y41325587D01* +X32181250Y41336741D01* +X31743750Y41336741D01* +X31630502Y41325587D01* +X31521606Y41292554D01* +X31421246Y41238911D01* +X31333281Y41166719D01* +X31261089Y41078754D01* +X31207446Y40978394D01* +X31207364Y40978123D01* +X31164892Y40973939D01* +X31155903Y40973054D01* +X31067154Y40946132D01* +X31065423Y40945607D01* +X30982036Y40901036D01* +X30948575Y40873575D01* +X30927258Y40856081D01* +X30927255Y40856078D01* +X30908947Y40841053D01* +X30893921Y40822744D01* +X30816741Y40745564D01* +X30816741Y40800000D01* +X30806908Y40899836D01* +X30777787Y40995835D01* +X30730497Y41084308D01* +X30666856Y41161856D01* +X30635000Y41187999D01* +X30635000Y41206178D01* +X31322739Y41893917D01* +X31341053Y41908947D01* +X31401036Y41982036D01* +X31445607Y42065423D01* +X31465341Y42130476D01* +X31473054Y42155903D01* +X31476153Y42187369D01* +X31480000Y42226425D01* +X31480000Y42226432D01* +X31482321Y42249999D01* +X31480000Y42273566D01* +X31480000Y42363259D01* +X31850000Y42363259D01* +X31920572Y42370210D01* +X31988432Y42390795D01* +X32050973Y42424223D01* +X32105790Y42469210D01* +X32150777Y42524027D01* +X32184205Y42586568D01* +X32204790Y42654428D01* +X32211741Y42725000D01* +X32211741Y43375000D01* +X32204790Y43445572D01* +X32184205Y43513432D01* +X32150777Y43575973D01* +X32132186Y43598627D01* +X32132321Y43600001D01* +X32130000Y43623568D01* +X32130000Y43623575D01* +X32123054Y43694096D01* +X32119012Y43707423D01* +X32100646Y43767964D01* +X32095607Y43784577D01* +X32051036Y43867964D01* +X31991053Y43941053D01* +X31972739Y43956083D01* +X31856081Y44072741D01* +X31841053Y44091053D01* +X31767964Y44151036D01* +X31684577Y44195607D01* +X31594096Y44223054D01* +X31523575Y44230000D01* +X31523567Y44230000D01* +X31500000Y44232321D01* +X31476433Y44230000D01* +X30130000Y44230000D01* +X30130000Y44265229D01* +X30150000Y44263259D01* +X30550000Y44263259D01* +X30620572Y44270210D01* +X30675000Y44286720D01* +X30729428Y44270210D01* +X30800000Y44263259D01* +X31200000Y44263259D01* +X31270572Y44270210D01* +X31325000Y44286720D01* +X31379428Y44270210D01* +X31450000Y44263259D01* +X31850000Y44263259D01* +X31920572Y44270210D01* +X31988432Y44290795D01* +X32044478Y44320752D01* +X32057485Y44315364D01* +X32184996Y44290000D01* +X32315004Y44290000D01* +X32442515Y44315364D01* +X32562627Y44365116D01* +X32670725Y44437345D01* +X32762655Y44529275D01* +X32834884Y44637373D01* +X32884636Y44757485D01* +X32910000Y44884996D01* +X32910000Y45015004D01* +X32884636Y45142515D01* +X32834884Y45262627D01* +X32762655Y45370725D01* +X32670725Y45462655D01* +X32562627Y45534884D01* +X32442515Y45584636D01* +X32315004Y45610000D01* +X32184996Y45610000D01* +X32057485Y45584636D01* +X32044478Y45579248D01* +X31988432Y45609205D01* +X31920572Y45629790D01* +X31850000Y45636741D01* +X31715563Y45636741D01* +X31742082Y45663259D01* +X32006250Y45663259D01* +X32119498Y45674413D01* +X32228394Y45707446D01* +X32328754Y45761089D01* +X32416719Y45833281D01* +X32488911Y45921246D01* +X32541696Y46020000D01* +X32751178Y46020000D01* +X34093921Y44677256D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X34093921Y44677256D02* +G01* +X34108947Y44658947D01* +X34127255Y44643922D01* +X34127258Y44643919D01* +X34130000Y44641669D01* +X34130000Y44400000D01* +X34132306Y44376589D01* +X34139134Y44354078D01* +X34150224Y44333332D01* +X34165147Y44315147D01* +X34183332Y44300224D01* +X34204078Y44289134D01* +X34226589Y44282306D01* +X34250000Y44280000D01* +X35754697Y44280000D01* +X35701620Y44180700D01* +X35652445Y44018589D01* +X35640001Y43892246D01* +X35640000Y43064940D01* +X35271760Y42696699D01* +X35238947Y42669770D01* +X35212018Y42636957D01* +X35212016Y42636955D01* +X35131477Y42538818D01* +X35051620Y42389416D01* +X35002444Y42227305D01* +X34985840Y42058716D01* +X34990001Y42016467D01* +X34990001Y41033184D01* +X34912627Y41084884D01* +X34792515Y41134636D01* +X34665004Y41160000D01* +X34534996Y41160000D01* +X34407485Y41134636D01* +X34287373Y41084884D01* +X34249250Y41059411D01* +X34238911Y41078754D01* +X34166719Y41166719D01* +X34078754Y41238911D01* +X33978394Y41292554D01* +X33869498Y41325587D01* +X33756250Y41336741D01* +X33318750Y41336741D01* +X33205502Y41325587D01* +X33096606Y41292554D01* +X32996246Y41238911D01* +X32908281Y41166719D01* +X32836089Y41078754D01* +X32782446Y40978394D01* +X32750000Y40871433D01* +X32717554Y40978394D01* +X32663911Y41078754D01* +X32591719Y41166719D01* +X32503754Y41238911D01* +X32403394Y41292554D01* +X32294498Y41325587D01* +X32181250Y41336741D01* +X31743750Y41336741D01* +X31630502Y41325587D01* +X31521606Y41292554D01* +X31421246Y41238911D01* +X31333281Y41166719D01* +X31261089Y41078754D01* +X31207446Y40978394D01* +X31207364Y40978123D01* +X31164892Y40973939D01* +X31155903Y40973054D01* +X31067154Y40946132D01* +X31065423Y40945607D01* +X30982036Y40901036D01* +X30948575Y40873575D01* +X30927258Y40856081D01* +X30927255Y40856078D01* +X30908947Y40841053D01* +X30893921Y40822744D01* +X30816741Y40745564D01* +X30816741Y40800000D01* +X30806908Y40899836D01* +X30777787Y40995835D01* +X30730497Y41084308D01* +X30666856Y41161856D01* +X30635000Y41187999D01* +X30635000Y41206178D01* +X31322739Y41893917D01* +X31341053Y41908947D01* +X31401036Y41982036D01* +X31445607Y42065423D01* +X31465341Y42130476D01* +X31473054Y42155903D01* +X31476153Y42187369D01* +X31480000Y42226425D01* +X31480000Y42226432D01* +X31482321Y42249999D01* +X31480000Y42273566D01* +X31480000Y42363259D01* +X31850000Y42363259D01* +X31920572Y42370210D01* +X31988432Y42390795D01* +X32050973Y42424223D01* +X32105790Y42469210D01* +X32150777Y42524027D01* +X32184205Y42586568D01* +X32204790Y42654428D01* +X32211741Y42725000D01* +X32211741Y43375000D01* +X32204790Y43445572D01* +X32184205Y43513432D01* +X32150777Y43575973D01* +X32132186Y43598627D01* +X32132321Y43600001D01* +X32130000Y43623568D01* +X32130000Y43623575D01* +X32123054Y43694096D01* +X32119012Y43707423D01* +X32100646Y43767964D01* +X32095607Y43784577D01* +X32051036Y43867964D01* +X31991053Y43941053D01* +X31972739Y43956083D01* +X31856081Y44072741D01* +X31841053Y44091053D01* +X31767964Y44151036D01* +X31684577Y44195607D01* +X31594096Y44223054D01* +X31523575Y44230000D01* +X31523567Y44230000D01* +X31500000Y44232321D01* +X31476433Y44230000D01* +X30130000Y44230000D01* +X30130000Y44265229D01* +X30150000Y44263259D01* +X30550000Y44263259D01* +X30620572Y44270210D01* +X30675000Y44286720D01* +X30729428Y44270210D01* +X30800000Y44263259D01* +X31200000Y44263259D01* +X31270572Y44270210D01* +X31325000Y44286720D01* +X31379428Y44270210D01* +X31450000Y44263259D01* +X31850000Y44263259D01* +X31920572Y44270210D01* +X31988432Y44290795D01* +X32044478Y44320752D01* +X32057485Y44315364D01* +X32184996Y44290000D01* +X32315004Y44290000D01* +X32442515Y44315364D01* +X32562627Y44365116D01* +X32670725Y44437345D01* +X32762655Y44529275D01* +X32834884Y44637373D01* +X32884636Y44757485D01* +X32910000Y44884996D01* +X32910000Y45015004D01* +X32884636Y45142515D01* +X32834884Y45262627D01* +X32762655Y45370725D01* +X32670725Y45462655D01* +X32562627Y45534884D01* +X32442515Y45584636D01* +X32315004Y45610000D01* +X32184996Y45610000D01* +X32057485Y45584636D01* +X32044478Y45579248D01* +X31988432Y45609205D01* +X31920572Y45629790D01* +X31850000Y45636741D01* +X31715563Y45636741D01* +X31742082Y45663259D01* +X32006250Y45663259D01* +X32119498Y45674413D01* +X32228394Y45707446D01* +X32328754Y45761089D01* +X32416719Y45833281D01* +X32488911Y45921246D01* +X32541696Y46020000D01* +X32751178Y46020000D01* +X34093921Y44677256D01* +G37* +G04 #@! TD.AperFunction* +D35* +X89130000Y48329843D02* +X88791000Y48328000D01* +X88634000Y48171000D01* +X88634000Y46834000D01* +X88654000Y46834000D01* +X88654000Y46566000D01* +X88634000Y46566000D01* +X88634000Y45229000D01* +X88791000Y45072000D01* +X89130000Y45070157D01* +X89130000Y32299706D01* +X85950294Y29120000D01* +X44340000Y29120000D01* +X44340000Y29267747D01* +X44832254Y29760000D01* +X58728396Y29760000D01* +X58750000Y29757872D01* +X58771604Y29760000D01* +X58771607Y29760000D01* +X58836255Y29766367D01* +X58919195Y29791527D01* +X58995633Y29832384D01* +X59062632Y29887368D01* +X59076411Y29904158D01* +X59595847Y30423593D01* +X59612632Y30437368D01* +X59660625Y30495848D01* +X59667616Y30504366D01* +X59692787Y30551459D01* +X59708473Y30580805D01* +X59733633Y30663745D01* +X59740000Y30728393D01* +X59740000Y30728395D01* +X59742128Y30749999D01* +X59740000Y30771603D01* +X59740000Y32867747D01* +X60545847Y33673593D01* +X60562632Y33687368D01* +X60604932Y33738911D01* +X60617616Y33754366D01* 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TD.AperFunction* +D35* +X38315000Y35190004D02* +X38315000Y35059996D01* +X38340364Y34932485D01* +X38390116Y34812373D01* +X38462345Y34704275D01* +X38554275Y34612345D01* +X38662373Y34540116D01* +X38782485Y34490364D01* +X38909996Y34465000D01* +X39040004Y34465000D01* +X39167515Y34490364D01* +X39287627Y34540116D01* +X39395725Y34612345D01* +X39468380Y34685000D01* +X42663259Y34685000D01* +X42663259Y34250000D01* +X42670210Y34179428D01* +X42679137Y34150000D01* +X42670210Y34120572D01* +X42663259Y34050000D01* +X42663259Y33615000D01* +X40796603Y33615000D01* +X40774999Y33617128D01* +X40753395Y33615000D01* +X40753393Y33615000D01* +X40688745Y33608633D01* +X40605805Y33583473D01* +X40578260Y33568750D01* +X40529366Y33542616D01* +X40492859Y33512655D01* +X40462368Y33487632D01* +X40448593Y33470847D01* +X40337746Y33360000D01* +X40234996Y33360000D01* +X40107485Y33334636D01* +X39987373Y33284884D01* +X39879275Y33212655D01* +X39787345Y33120725D01* +X39715116Y33012627D01* +X39665364Y32892515D01* +X39640000Y32765004D01* +X39640000Y32634996D01* +X39665364Y32507485D01* +X39715116Y32387373D01* +X39758065Y32323096D01* +X39707446Y32228394D01* +X39674413Y32119498D01* +X39663259Y32006250D01* +X39663259Y31568750D01* +X39674413Y31455502D01* +X39707446Y31346606D01* +X39761089Y31246246D01* +X39833281Y31158281D01* +X39921246Y31086089D01* +X40021606Y31032446D01* +X40130502Y30999413D01* +X40243750Y30988259D01* +X40756250Y30988259D01* +X40869498Y30999413D01* +X40978394Y31032446D01* +X41078754Y31086089D01* +X41166719Y31158281D01* +X41238911Y31246246D01* +X41250000Y31266992D01* +X41261089Y31246246D01* +X41333281Y31158281D01* +X41421246Y31086089D01* +X41521606Y31032446D01* +X41630502Y30999413D01* +X41743750Y30988259D01* +X42256250Y30988259D01* +X42369498Y30999413D01* +X42478394Y31032446D01* +X42578754Y31086089D01* +X42610000Y31111732D01* +X42610001Y29482255D01* +X42467747Y29340000D01* +X40321603Y29340000D01* +X40299999Y29342128D01* +X40278395Y29340000D01* +X40278393Y29340000D01* +X40213745Y29333633D01* +X40130805Y29308473D01* +X40054367Y29267616D01* +X39987368Y29212632D01* +X39973589Y29195842D01* +X39967747Y29190000D01* +X38948927Y29190000D01* +X39049375Y29199893D01* +X39162961Y29234349D01* +X39267643Y29290303D01* +X39359397Y29365603D01* +X39434697Y29457357D01* +X39490651Y29562039D01* +X39499133Y29590000D01* +X39615004Y29590000D01* +X39742515Y29615364D01* +X39862627Y29665116D01* +X39970725Y29737345D01* +X40062655Y29829275D01* +X40134884Y29937373D01* +X40184636Y30057485D01* +X40210000Y30184996D01* +X40210000Y30315004D01* +X40184636Y30442515D01* +X40134884Y30562627D01* +X40062655Y30670725D01* +X39970725Y30762655D01* +X39862627Y30834884D01* +X39742515Y30884636D01* +X39615004Y30910000D01* +X39499133Y30910000D01* +X39490651Y30937961D01* +X39434697Y31042643D01* +X39359397Y31134397D01* +X39267643Y31209697D01* +X39162961Y31265651D01* +X39049375Y31300107D01* +X38931250Y31311741D01* +X38443750Y31311741D01* +X38325625Y31300107D01* +X38212039Y31265651D01* +X38120000Y31216455D01* +X38120000Y35126749D01* +X38212627Y35165116D01* +X38320725Y35237345D01* +X38325334Y35241954D01* +X38315000Y35190004D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X38315000Y35190004D02* +G01* +X38315000Y35059996D01* +X38340364Y34932485D01* +X38390116Y34812373D01* +X38462345Y34704275D01* +X38554275Y34612345D01* +X38662373Y34540116D01* +X38782485Y34490364D01* +X38909996Y34465000D01* +X39040004Y34465000D01* +X39167515Y34490364D01* +X39287627Y34540116D01* +X39395725Y34612345D01* +X39468380Y34685000D01* +X42663259Y34685000D01* +X42663259Y34250000D01* +X42670210Y34179428D01* +X42679137Y34150000D01* +X42670210Y34120572D01* +X42663259Y34050000D01* +X42663259Y33615000D01* +X40796603Y33615000D01* +X40774999Y33617128D01* +X40753395Y33615000D01* +X40753393Y33615000D01* +X40688745Y33608633D01* +X40605805Y33583473D01* +X40578260Y33568750D01* +X40529366Y33542616D01* +X40492859Y33512655D01* +X40462368Y33487632D01* +X40448593Y33470847D01* +X40337746Y33360000D01* +X40234996Y33360000D01* +X40107485Y33334636D01* +X39987373Y33284884D01* +X39879275Y33212655D01* +X39787345Y33120725D01* +X39715116Y33012627D01* +X39665364Y32892515D01* +X39640000Y32765004D01* +X39640000Y32634996D01* +X39665364Y32507485D01* +X39715116Y32387373D01* +X39758065Y32323096D01* +X39707446Y32228394D01* +X39674413Y32119498D01* +X39663259Y32006250D01* +X39663259Y31568750D01* +X39674413Y31455502D01* +X39707446Y31346606D01* +X39761089Y31246246D01* +X39833281Y31158281D01* +X39921246Y31086089D01* +X40021606Y31032446D01* +X40130502Y30999413D01* +X40243750Y30988259D01* +X40756250Y30988259D01* +X40869498Y30999413D01* +X40978394Y31032446D01* +X41078754Y31086089D01* +X41166719Y31158281D01* +X41238911Y31246246D01* +X41250000Y31266992D01* +X41261089Y31246246D01* +X41333281Y31158281D01* +X41421246Y31086089D01* +X41521606Y31032446D01* +X41630502Y30999413D01* +X41743750Y30988259D01* +X42256250Y30988259D01* +X42369498Y30999413D01* +X42478394Y31032446D01* +X42578754Y31086089D01* +X42610000Y31111732D01* +X42610001Y29482255D01* +X42467747Y29340000D01* +X40321603Y29340000D01* +X40299999Y29342128D01* +X40278395Y29340000D01* +X40278393Y29340000D01* +X40213745Y29333633D01* +X40130805Y29308473D01* +X40054367Y29267616D01* +X39987368Y29212632D01* +X39973589Y29195842D01* +X39967747Y29190000D01* +X38948927Y29190000D01* +X39049375Y29199893D01* +X39162961Y29234349D01* +X39267643Y29290303D01* +X39359397Y29365603D01* +X39434697Y29457357D01* +X39490651Y29562039D01* +X39499133Y29590000D01* +X39615004Y29590000D01* +X39742515Y29615364D01* +X39862627Y29665116D01* +X39970725Y29737345D01* +X40062655Y29829275D01* +X40134884Y29937373D01* +X40184636Y30057485D01* +X40210000Y30184996D01* +X40210000Y30315004D01* +X40184636Y30442515D01* +X40134884Y30562627D01* +X40062655Y30670725D01* +X39970725Y30762655D01* +X39862627Y30834884D01* +X39742515Y30884636D01* +X39615004Y30910000D01* +X39499133Y30910000D01* +X39490651Y30937961D01* +X39434697Y31042643D01* +X39359397Y31134397D01* +X39267643Y31209697D01* +X39162961Y31265651D01* +X39049375Y31300107D01* +X38931250Y31311741D01* +X38443750Y31311741D01* +X38325625Y31300107D01* +X38212039Y31265651D01* +X38120000Y31216455D01* +X38120000Y35126749D01* +X38212627Y35165116D01* +X38320725Y35237345D01* +X38325334Y35241954D01* +X38315000Y35190004D01* +G37* +G04 #@! TD.AperFunction* +D35* +X49863259Y37500000D02* +X49870210Y37429428D01* +X49879137Y37400000D01* +X49870210Y37370572D01* +X49863259Y37300000D01* +X49863259Y36850000D01* +X49870210Y36779428D01* +X49879137Y36750000D01* +X49870210Y36720572D01* +X49863259Y36650000D01* +X49863259Y36200000D01* +X49870210Y36129428D01* +X49879137Y36100000D01* +X49870210Y36070572D01* +X49863259Y36000000D01* +X49863259Y35550000D01* +X49870210Y35479428D01* +X49890795Y35411568D01* +X49924223Y35349027D01* +X49969210Y35294210D01* +X50024027Y35249223D01* +X50086568Y35215795D01* +X50154428Y35195210D01* +X50225000Y35188259D01* +X51975000Y35188259D01* +X52045572Y35195210D01* +X52113432Y35215795D01* +X52175973Y35249223D01* +X52230790Y35294210D01* +X52231438Y35295000D01* +X52851433Y35295000D01* +X52875000Y35292679D01* +X52898567Y35295000D01* +X52898575Y35295000D01* +X52969096Y35301946D01* +X53059577Y35329393D01* +X53142964Y35373964D01* +X53216053Y35433947D01* +X53231083Y35452261D01* +X53348822Y35570000D01* +X53626433Y35570000D01* +X53650000Y35567679D01* +X53673567Y35570000D01* +X53673575Y35570000D01* +X53744096Y35576946D01* +X53834577Y35604393D01* +X53917964Y35648964D01* +X53991053Y35708947D01* +X54006083Y35727261D01* +X54072739Y35793917D01* +X54091053Y35808947D01* +X54151036Y35882036D01* +X54195607Y35965423D01* +X54211109Y36016527D01* +X54214676Y36028285D01* +X54228394Y36032446D01* +X54290083Y36065419D01* +X54290000Y36065004D01* +X54290000Y35934996D01* +X54315364Y35807485D01* +X54365116Y35687373D01* +X54437345Y35579275D01* +X54522243Y35494377D01* +X54541528Y35430805D01* +X54582384Y35354367D01* +X54613570Y35316367D01* +X54637369Y35287368D01* +X54654154Y35273593D01* +X54710000Y35217747D01* +X54710000Y35182254D01* +X54267747Y34740000D01* +X53232253Y34740000D01* +X53201411Y34770842D01* +X53187632Y34787632D01* +X53120633Y34842616D01* +X53044195Y34883473D01* +X52961255Y34908633D01* +X52896607Y34915000D01* +X52896604Y34915000D01* +X52875000Y34917128D01* +X52853396Y34915000D01* +X52264265Y34915000D01* +X52230790Y34955790D01* +X52175973Y35000777D01* +X52113432Y35034205D01* +X52045572Y35054790D01* +X51975000Y35061741D01* +X50225000Y35061741D01* +X50154428Y35054790D01* +X50086568Y35034205D01* +X50024027Y35000777D01* +X49969210Y34955790D01* +X49924223Y34900973D01* +X49890795Y34838432D01* +X49870210Y34770572D01* +X49863259Y34700000D01* +X49863259Y34250000D01* +X49870210Y34179428D01* +X49879137Y34150000D01* +X49870210Y34120572D01* +X49863259Y34050000D01* +X49863259Y33600000D01* +X49870210Y33529428D01* +X49879137Y33500000D01* +X49870210Y33470572D01* +X49863259Y33400000D01* +X49863259Y32950000D01* +X49870210Y32879428D01* +X49879137Y32850000D01* +X49870210Y32820572D01* +X49863259Y32750000D01* +X49863259Y32300000D01* +X49870210Y32229428D01* +X49890795Y32161568D01* +X49924223Y32099027D01* +X49969210Y32044210D01* +X50024027Y31999223D01* +X50086568Y31965795D01* +X50154428Y31945210D01* +X50225000Y31938259D01* +X51975000Y31938259D01* +X52045572Y31945210D01* +X52113432Y31965795D01* +X52175973Y31999223D01* +X52230790Y32044210D01* +X52264265Y32085000D01* +X53492747Y32085000D01* +X54373593Y31204153D01* +X54387368Y31187368D01* +X54417170Y31162910D01* +X54454366Y31132384D01* +X54530804Y31091527D01* +X54547495Y31086464D01* +X54613745Y31066367D01* +X54678393Y31060000D01* +X54678396Y31060000D01* +X54700000Y31057872D01* +X54721604Y31060000D01* +X55195799Y31060000D01* +X55207446Y31021606D01* +X55224340Y30990000D01* +X44471604Y30990000D01* +X44450000Y30992128D01* +X44428396Y30990000D01* +X44428393Y30990000D01* +X44363745Y30983633D01* +X44300108Y30964329D01* +X44280804Y30958473D01* +X44204366Y30917616D01* +X44172578Y30891528D01* +X44137368Y30862632D01* +X44123594Y30845848D01* +X43490000Y30212253D01* +X43490000Y31117747D01* +X43582254Y31210000D01* +X44928396Y31210000D01* +X44950000Y31207872D01* +X44971604Y31210000D01* +X44971607Y31210000D01* +X45036255Y31216367D01* +X45119195Y31241527D01* +X45195633Y31282384D01* +X45262632Y31337368D01* +X45276411Y31354158D01* +X45645847Y31723593D01* +X45662632Y31737368D01* +X45690730Y31771606D01* +X45717616Y31804366D01* +X45753471Y31871447D01* +X45758473Y31880805D01* +X45783633Y31963745D01* +X45790000Y32028393D01* +X45790000Y32028395D01* +X45792128Y32049999D01* +X45790000Y32071603D01* +X45790000Y33678396D01* +X45792128Y33700000D01* +X45788312Y33738745D01* +X45783633Y33786255D01* +X45758473Y33869195D01* +X45717616Y33945633D01* +X45662632Y34012632D01* +X45645843Y34026410D01* +X45637253Y34035000D01* +X46143396Y34035000D01* +X46165000Y34032872D01* +X46186604Y34035000D01* +X46186607Y34035000D01* +X46251255Y34041367D01* +X46334195Y34066527D01* +X46410633Y34107384D01* +X46477632Y34162368D01* +X46491411Y34179158D01* +X49863259Y37551005D01* +X49863259Y37500000D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X49863259Y37500000D02* +G01* +X49870210Y37429428D01* +X49879137Y37400000D01* +X49870210Y37370572D01* +X49863259Y37300000D01* +X49863259Y36850000D01* +X49870210Y36779428D01* +X49879137Y36750000D01* +X49870210Y36720572D01* +X49863259Y36650000D01* +X49863259Y36200000D01* +X49870210Y36129428D01* +X49879137Y36100000D01* +X49870210Y36070572D01* +X49863259Y36000000D01* +X49863259Y35550000D01* +X49870210Y35479428D01* +X49890795Y35411568D01* +X49924223Y35349027D01* +X49969210Y35294210D01* +X50024027Y35249223D01* +X50086568Y35215795D01* +X50154428Y35195210D01* +X50225000Y35188259D01* +X51975000Y35188259D01* +X52045572Y35195210D01* +X52113432Y35215795D01* +X52175973Y35249223D01* +X52230790Y35294210D01* +X52231438Y35295000D01* +X52851433Y35295000D01* +X52875000Y35292679D01* +X52898567Y35295000D01* +X52898575Y35295000D01* +X52969096Y35301946D01* +X53059577Y35329393D01* +X53142964Y35373964D01* +X53216053Y35433947D01* +X53231083Y35452261D01* +X53348822Y35570000D01* +X53626433Y35570000D01* +X53650000Y35567679D01* +X53673567Y35570000D01* +X53673575Y35570000D01* +X53744096Y35576946D01* +X53834577Y35604393D01* +X53917964Y35648964D01* +X53991053Y35708947D01* +X54006083Y35727261D01* +X54072739Y35793917D01* +X54091053Y35808947D01* +X54151036Y35882036D01* +X54195607Y35965423D01* +X54211109Y36016527D01* +X54214676Y36028285D01* +X54228394Y36032446D01* +X54290083Y36065419D01* +X54290000Y36065004D01* +X54290000Y35934996D01* +X54315364Y35807485D01* +X54365116Y35687373D01* +X54437345Y35579275D01* +X54522243Y35494377D01* +X54541528Y35430805D01* +X54582384Y35354367D01* +X54613570Y35316367D01* +X54637369Y35287368D01* +X54654154Y35273593D01* +X54710000Y35217747D01* +X54710000Y35182254D01* +X54267747Y34740000D01* +X53232253Y34740000D01* +X53201411Y34770842D01* +X53187632Y34787632D01* +X53120633Y34842616D01* +X53044195Y34883473D01* +X52961255Y34908633D01* +X52896607Y34915000D01* +X52896604Y34915000D01* +X52875000Y34917128D01* +X52853396Y34915000D01* +X52264265Y34915000D01* +X52230790Y34955790D01* +X52175973Y35000777D01* +X52113432Y35034205D01* +X52045572Y35054790D01* +X51975000Y35061741D01* +X50225000Y35061741D01* +X50154428Y35054790D01* +X50086568Y35034205D01* +X50024027Y35000777D01* +X49969210Y34955790D01* +X49924223Y34900973D01* +X49890795Y34838432D01* +X49870210Y34770572D01* +X49863259Y34700000D01* +X49863259Y34250000D01* +X49870210Y34179428D01* +X49879137Y34150000D01* +X49870210Y34120572D01* +X49863259Y34050000D01* +X49863259Y33600000D01* +X49870210Y33529428D01* +X49879137Y33500000D01* +X49870210Y33470572D01* +X49863259Y33400000D01* +X49863259Y32950000D01* +X49870210Y32879428D01* +X49879137Y32850000D01* +X49870210Y32820572D01* +X49863259Y32750000D01* +X49863259Y32300000D01* +X49870210Y32229428D01* +X49890795Y32161568D01* +X49924223Y32099027D01* +X49969210Y32044210D01* +X50024027Y31999223D01* +X50086568Y31965795D01* +X50154428Y31945210D01* +X50225000Y31938259D01* +X51975000Y31938259D01* +X52045572Y31945210D01* +X52113432Y31965795D01* +X52175973Y31999223D01* +X52230790Y32044210D01* +X52264265Y32085000D01* +X53492747Y32085000D01* +X54373593Y31204153D01* +X54387368Y31187368D01* +X54417170Y31162910D01* +X54454366Y31132384D01* +X54530804Y31091527D01* +X54547495Y31086464D01* +X54613745Y31066367D01* +X54678393Y31060000D01* +X54678396Y31060000D01* +X54700000Y31057872D01* +X54721604Y31060000D01* +X55195799Y31060000D01* +X55207446Y31021606D01* +X55224340Y30990000D01* +X44471604Y30990000D01* +X44450000Y30992128D01* +X44428396Y30990000D01* +X44428393Y30990000D01* +X44363745Y30983633D01* +X44300108Y30964329D01* +X44280804Y30958473D01* +X44204366Y30917616D01* +X44172578Y30891528D01* +X44137368Y30862632D01* +X44123594Y30845848D01* +X43490000Y30212253D01* +X43490000Y31117747D01* +X43582254Y31210000D01* +X44928396Y31210000D01* +X44950000Y31207872D01* +X44971604Y31210000D01* +X44971607Y31210000D01* +X45036255Y31216367D01* +X45119195Y31241527D01* +X45195633Y31282384D01* +X45262632Y31337368D01* +X45276411Y31354158D01* +X45645847Y31723593D01* +X45662632Y31737368D01* +X45690730Y31771606D01* +X45717616Y31804366D01* +X45753471Y31871447D01* +X45758473Y31880805D01* +X45783633Y31963745D01* +X45790000Y32028393D01* +X45790000Y32028395D01* +X45792128Y32049999D01* +X45790000Y32071603D01* +X45790000Y33678396D01* +X45792128Y33700000D01* +X45788312Y33738745D01* +X45783633Y33786255D01* +X45758473Y33869195D01* +X45717616Y33945633D01* +X45662632Y34012632D01* +X45645843Y34026410D01* +X45637253Y34035000D01* +X46143396Y34035000D01* +X46165000Y34032872D01* +X46186604Y34035000D01* +X46186607Y34035000D01* +X46251255Y34041367D01* +X46334195Y34066527D01* +X46410633Y34107384D01* +X46477632Y34162368D01* +X46491411Y34179158D01* +X49863259Y37551005D01* +X49863259Y37500000D01* +G37* +G04 #@! TD.AperFunction* +D35* +X61532446Y37271606D02* +X61586089Y37171246D01* +X61658281Y37083281D01* +X61746246Y37011089D01* +X61846606Y36957446D01* +X61955502Y36924413D01* +X62068750Y36913259D01* +X62506250Y36913259D01* +X62619498Y36924413D01* +X62728394Y36957446D01* +X62828754Y37011089D01* +X62916719Y37083281D01* +X62988911Y37171246D01* +X63000000Y37191992D01* +X63011089Y37171246D01* +X63083281Y37083281D01* +X63171246Y37011089D01* +X63271606Y36957446D01* +X63380502Y36924413D01* +X63493750Y36913259D01* +X64006250Y36913259D01* +X64119498Y36924413D01* +X64228394Y36957446D01* +X64328754Y37011089D01* +X64416719Y37083281D01* +X64488911Y37171246D01* +X64500000Y37191992D01* +X64511089Y37171246D01* +X64583281Y37083281D01* +X64609283Y37061942D01* +X64590000Y36965004D01* +X64590000Y36834996D01* +X64615364Y36707485D01* +X64665116Y36587373D01* +X64737345Y36479275D01* +X64829275Y36387345D01* +X64937373Y36315116D01* +X65057485Y36265364D01* +X65184996Y36240000D01* +X65315004Y36240000D01* +X65442515Y36265364D01* +X65562627Y36315116D01* +X65670725Y36387345D01* +X65762655Y36479275D01* +X65834884Y36587373D01* +X65884636Y36707485D01* +X65910000Y36834996D01* +X65910000Y36965004D01* +X65890717Y37061942D01* +X65916719Y37083281D01* +X65970000Y37148203D01* +X65970000Y36623567D01* +X65967679Y36600000D01* +X65970000Y36576433D01* +X65970000Y36576426D01* +X65973425Y36541652D01* +X65976946Y36505904D01* +X65993715Y36450625D01* +X66004393Y36415424D01* +X66048964Y36332036D01* +X66108947Y36258947D01* +X66127261Y36243917D01* +X66870001Y35501176D01* +X66870000Y34541696D01* +X66771246Y34488911D01* +X66683281Y34416719D01* +X66611089Y34328754D01* +X66557446Y34228394D01* +X66524413Y34119498D01* +X66514094Y34014728D01* +X66418581Y34110241D01* +X66403553Y34128553D01* +X66330464Y34188536D01* +X66247077Y34233107D01* +X66156596Y34260554D01* +X66086075Y34267500D01* +X66086067Y34267500D01* +X66062500Y34269821D01* +X66038933Y34267500D01* +X66021652Y34267500D01* +X65988911Y34328754D01* +X65916719Y34416719D01* +X65828754Y34488911D01* +X65728394Y34542554D01* +X65619498Y34575587D01* +X65506250Y34586741D01* +X64993750Y34586741D01* +X64880502Y34575587D01* +X64771606Y34542554D01* +X64671246Y34488911D01* +X64583281Y34416719D01* +X64511089Y34328754D01* +X64500000Y34308008D01* +X64488911Y34328754D01* +X64416719Y34416719D01* +X64328754Y34488911D01* +X64228394Y34542554D01* +X64223028Y34544182D01* +X64222224Y34546834D01* +X64195607Y34634577D01* +X64190458Y34644210D01* +X64151036Y34717964D01* +X64091053Y34791053D01* +X64072739Y34806083D01* +X63806083Y35072739D01* +X63791053Y35091053D01* +X63717964Y35151036D01* +X63634577Y35195607D01* +X63544096Y35223054D01* +X63473575Y35230000D01* +X63473567Y35230000D01* +X63450000Y35232321D01* +X63426433Y35230000D01* +X61051930Y35230000D01* +X61034205Y35288432D01* +X61000777Y35350973D01* +X60955790Y35405790D01* +X60900973Y35450777D01* +X60838432Y35484205D01* +X60770572Y35504790D01* +X60700000Y35511741D01* +X59800000Y35511741D01* +X59729428Y35504790D01* +X59661568Y35484205D01* +X59599027Y35450777D01* +X59544210Y35405790D01* +X59499223Y35350973D01* +X59465795Y35288432D01* +X59445210Y35220572D01* +X59438259Y35150000D01* +X59438259Y34350000D01* +X59445210Y34279428D01* +X59465795Y34211568D01* +X59499223Y34149027D01* +X59544210Y34094210D01* +X59599027Y34049223D01* +X59649820Y34022074D01* +X59390000Y33762253D01* +X59390000Y36817747D01* +X59882254Y37310000D01* +X59945799Y37310000D01* +X59957446Y37271606D01* +X60011089Y37171246D01* +X60083281Y37083281D01* +X60171246Y37011089D01* +X60271606Y36957446D01* +X60380502Y36924413D01* +X60493750Y36913259D01* +X60931250Y36913259D01* +X61044498Y36924413D01* +X61153394Y36957446D01* +X61253754Y37011089D01* +X61341719Y37083281D01* +X61413911Y37171246D01* +X61467554Y37271606D01* +X61500000Y37378567D01* +X61532446Y37271606D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X61532446Y37271606D02* +G01* +X61586089Y37171246D01* +X61658281Y37083281D01* +X61746246Y37011089D01* +X61846606Y36957446D01* +X61955502Y36924413D01* +X62068750Y36913259D01* +X62506250Y36913259D01* +X62619498Y36924413D01* +X62728394Y36957446D01* +X62828754Y37011089D01* +X62916719Y37083281D01* +X62988911Y37171246D01* +X63000000Y37191992D01* +X63011089Y37171246D01* +X63083281Y37083281D01* +X63171246Y37011089D01* +X63271606Y36957446D01* +X63380502Y36924413D01* +X63493750Y36913259D01* +X64006250Y36913259D01* +X64119498Y36924413D01* +X64228394Y36957446D01* +X64328754Y37011089D01* +X64416719Y37083281D01* +X64488911Y37171246D01* +X64500000Y37191992D01* +X64511089Y37171246D01* +X64583281Y37083281D01* +X64609283Y37061942D01* +X64590000Y36965004D01* +X64590000Y36834996D01* +X64615364Y36707485D01* +X64665116Y36587373D01* +X64737345Y36479275D01* +X64829275Y36387345D01* +X64937373Y36315116D01* +X65057485Y36265364D01* +X65184996Y36240000D01* +X65315004Y36240000D01* +X65442515Y36265364D01* +X65562627Y36315116D01* +X65670725Y36387345D01* +X65762655Y36479275D01* +X65834884Y36587373D01* +X65884636Y36707485D01* +X65910000Y36834996D01* +X65910000Y36965004D01* +X65890717Y37061942D01* +X65916719Y37083281D01* +X65970000Y37148203D01* +X65970000Y36623567D01* +X65967679Y36600000D01* +X65970000Y36576433D01* +X65970000Y36576426D01* +X65973425Y36541652D01* +X65976946Y36505904D01* +X65993715Y36450625D01* +X66004393Y36415424D01* +X66048964Y36332036D01* +X66108947Y36258947D01* +X66127261Y36243917D01* +X66870001Y35501176D01* +X66870000Y34541696D01* +X66771246Y34488911D01* +X66683281Y34416719D01* +X66611089Y34328754D01* +X66557446Y34228394D01* +X66524413Y34119498D01* +X66514094Y34014728D01* +X66418581Y34110241D01* +X66403553Y34128553D01* +X66330464Y34188536D01* +X66247077Y34233107D01* +X66156596Y34260554D01* +X66086075Y34267500D01* +X66086067Y34267500D01* +X66062500Y34269821D01* +X66038933Y34267500D01* +X66021652Y34267500D01* +X65988911Y34328754D01* +X65916719Y34416719D01* +X65828754Y34488911D01* +X65728394Y34542554D01* +X65619498Y34575587D01* +X65506250Y34586741D01* +X64993750Y34586741D01* +X64880502Y34575587D01* +X64771606Y34542554D01* +X64671246Y34488911D01* +X64583281Y34416719D01* +X64511089Y34328754D01* +X64500000Y34308008D01* +X64488911Y34328754D01* +X64416719Y34416719D01* +X64328754Y34488911D01* +X64228394Y34542554D01* +X64223028Y34544182D01* +X64222224Y34546834D01* +X64195607Y34634577D01* +X64190458Y34644210D01* +X64151036Y34717964D01* +X64091053Y34791053D01* +X64072739Y34806083D01* +X63806083Y35072739D01* +X63791053Y35091053D01* +X63717964Y35151036D01* +X63634577Y35195607D01* +X63544096Y35223054D01* +X63473575Y35230000D01* +X63473567Y35230000D01* +X63450000Y35232321D01* +X63426433Y35230000D01* +X61051930Y35230000D01* +X61034205Y35288432D01* +X61000777Y35350973D01* +X60955790Y35405790D01* +X60900973Y35450777D01* +X60838432Y35484205D01* +X60770572Y35504790D01* +X60700000Y35511741D01* +X59800000Y35511741D01* +X59729428Y35504790D01* +X59661568Y35484205D01* +X59599027Y35450777D01* +X59544210Y35405790D01* +X59499223Y35350973D01* +X59465795Y35288432D01* +X59445210Y35220572D01* +X59438259Y35150000D01* +X59438259Y34350000D01* +X59445210Y34279428D01* +X59465795Y34211568D01* +X59499223Y34149027D01* +X59544210Y34094210D01* +X59599027Y34049223D01* +X59649820Y34022074D01* +X59390000Y33762253D01* +X59390000Y36817747D01* +X59882254Y37310000D01* +X59945799Y37310000D01* +X59957446Y37271606D01* +X60011089Y37171246D01* +X60083281Y37083281D01* +X60171246Y37011089D01* +X60271606Y36957446D01* +X60380502Y36924413D01* +X60493750Y36913259D01* +X60931250Y36913259D01* +X61044498Y36924413D01* +X61153394Y36957446D01* +X61253754Y37011089D01* +X61341719Y37083281D01* +X61413911Y37171246D01* +X61467554Y37271606D01* +X61500000Y37378567D01* +X61532446Y37271606D01* +G37* +G04 #@! TD.AperFunction* +D35* +X71838579Y49505390D02* +X71584943Y49369819D01* +X71362629Y49187370D01* +X71180181Y48965056D01* +X71044610Y48711420D01* +X70961125Y48436209D01* +X70940000Y48221722D01* +X70940000Y46778277D01* +X70961125Y46563790D01* +X71044610Y46288579D01* +X71180182Y46034943D01* +X71362630Y45812629D01* +X71584944Y45630181D01* +X71838580Y45494610D01* +X72113791Y45411125D01* +X72400000Y45382936D01* +X72529463Y45395687D01* +X72134260Y45000483D01* +X72101447Y44973554D01* +X72074518Y44940741D01* +X72074516Y44940739D01* +X71993977Y44842602D01* +X71914120Y44693200D01* +X71896407Y44634808D01* +X71884884Y44662627D01* +X71812655Y44770725D01* +X71720725Y44862655D01* +X71612627Y44934884D01* +X71492515Y44984636D01* +X71365004Y45010000D01* +X71234996Y45010000D01* +X71107485Y44984636D01* +X70987373Y44934884D01* +X70879275Y44862655D01* +X70787345Y44770725D01* +X70715116Y44662627D01* +X70665364Y44542515D01* +X70640000Y44415004D01* +X70640000Y44284996D01* +X70665364Y44157485D01* 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TD.AperFunction* +D35* +X49862223Y38765523D02* +X49819366Y38742616D01* +X49804212Y38730179D01* +X49752368Y38687632D01* +X49738593Y38670847D01* +X45982747Y34915000D01* +X45136741Y34915000D01* +X45136741Y35350000D01* +X45129790Y35420572D01* +X45120863Y35450000D01* +X45129790Y35479428D01* +X45136741Y35550000D01* +X45136741Y36000000D01* +X45129790Y36070572D01* +X45109205Y36138432D01* +X45075777Y36200973D01* +X45030790Y36255790D01* +X44975973Y36300777D01* +X44913432Y36334205D01* +X44845572Y36354790D01* +X44775000Y36361741D01* +X43025000Y36361741D01* +X42954428Y36354790D01* +X42886568Y36334205D01* +X42824027Y36300777D01* +X42769210Y36255790D01* +X42724223Y36200973D01* +X42718358Y36190000D01* +X39073380Y36190000D01* +X39112655Y36229275D01* +X39184884Y36337373D01* +X39234636Y36457485D01* +X39260000Y36584996D01* +X39260000Y36715004D01* +X39234636Y36842515D01* +X39200025Y36926075D01* +X39205502Y36924413D01* +X39318750Y36913259D01* +X39756250Y36913259D01* +X39869498Y36924413D01* +X39978394Y36957446D01* +X40078754Y37011089D01* +X40166719Y37083281D01* +X40238911Y37171246D01* +X40292554Y37271606D01* +X40304201Y37310000D01* +X40428396Y37310000D01* +X40450000Y37307872D01* +X40471604Y37310000D01* +X40471607Y37310000D01* +X40536255Y37316367D01* +X40619195Y37341527D01* +X40695633Y37382384D01* +X40762632Y37437368D01* +X40776411Y37454158D01* +X42557254Y39235000D01* +X42663259Y39235000D01* +X42663259Y38800000D01* +X42670210Y38729428D01* +X42679137Y38700000D01* +X42670210Y38670572D01* +X42663259Y38600000D01* +X42663259Y38150000D01* +X42670210Y38079428D01* +X42679137Y38050000D01* +X42670210Y38020572D01* +X42663259Y37950000D01* +X42663259Y37500000D01* +X42670210Y37429428D01* +X42679137Y37400000D01* +X42670210Y37370572D01* +X42663259Y37300000D01* +X42663259Y36850000D01* +X42670210Y36779428D01* +X42690795Y36711568D01* +X42724223Y36649027D01* +X42769210Y36594210D01* +X42824027Y36549223D01* +X42886568Y36515795D01* +X42954428Y36495210D01* +X43025000Y36488259D01* +X44775000Y36488259D01* +X44845572Y36495210D01* +X44913432Y36515795D01* +X44975973Y36549223D01* +X45030790Y36594210D01* +X45031438Y36595000D01* +X45401433Y36595000D01* +X45425000Y36592679D01* +X45448567Y36595000D01* +X45448575Y36595000D01* +X45519096Y36601946D01* +X45609577Y36629393D01* +X45692964Y36673964D01* +X45766053Y36733947D01* +X45781083Y36752261D01* +X46122744Y37093921D01* +X46141053Y37108947D01* +X46156719Y37128035D01* +X46186024Y37163744D01* +X46201036Y37182036D01* +X46245607Y37265423D01* +X46257355Y37304152D01* +X46273054Y37355903D01* +X46274796Y37373595D01* +X46280000Y37426425D01* +X46280000Y37426432D01* +X46282321Y37449999D01* +X46280000Y37473566D01* +X46280000Y39276434D01* +X46282321Y39300001D01* +X46280000Y39323568D01* +X46280000Y39323575D01* +X46273054Y39394096D01* +X46272151Y39397075D01* +X46245607Y39484577D01* +X46242360Y39490651D01* +X46201036Y39567964D01* +X46162339Y39615116D01* +X46156081Y39622742D01* +X46156078Y39622745D01* +X46141053Y39641053D01* +X46122744Y39656079D01* +X45781083Y39997739D01* +X45766053Y40016053D01* +X45692964Y40076036D01* +X45609577Y40120607D01* +X45519096Y40148054D01* +X45448575Y40155000D01* +X45448567Y40155000D01* +X45425000Y40157321D01* +X45401433Y40155000D01* +X45136741Y40155000D01* +X45136741Y40550000D01* +X45129790Y40620572D01* +X45120863Y40650000D01* +X45129790Y40679428D01* +X45136741Y40750000D01* +X45136741Y41200000D01* +X45129790Y41270572D01* +X45109205Y41338432D01* +X45097677Y41360000D01* +X47267747Y41360000D01* +X49862223Y38765523D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X49862223Y38765523D02* +G01* +X49819366Y38742616D01* +X49804212Y38730179D01* +X49752368Y38687632D01* +X49738593Y38670847D01* +X45982747Y34915000D01* +X45136741Y34915000D01* +X45136741Y35350000D01* +X45129790Y35420572D01* +X45120863Y35450000D01* +X45129790Y35479428D01* +X45136741Y35550000D01* +X45136741Y36000000D01* +X45129790Y36070572D01* +X45109205Y36138432D01* +X45075777Y36200973D01* +X45030790Y36255790D01* +X44975973Y36300777D01* +X44913432Y36334205D01* +X44845572Y36354790D01* +X44775000Y36361741D01* +X43025000Y36361741D01* +X42954428Y36354790D01* +X42886568Y36334205D01* +X42824027Y36300777D01* +X42769210Y36255790D01* +X42724223Y36200973D01* +X42718358Y36190000D01* +X39073380Y36190000D01* +X39112655Y36229275D01* +X39184884Y36337373D01* +X39234636Y36457485D01* +X39260000Y36584996D01* +X39260000Y36715004D01* +X39234636Y36842515D01* +X39200025Y36926075D01* +X39205502Y36924413D01* +X39318750Y36913259D01* +X39756250Y36913259D01* +X39869498Y36924413D01* +X39978394Y36957446D01* +X40078754Y37011089D01* +X40166719Y37083281D01* +X40238911Y37171246D01* +X40292554Y37271606D01* +X40304201Y37310000D01* +X40428396Y37310000D01* +X40450000Y37307872D01* +X40471604Y37310000D01* +X40471607Y37310000D01* +X40536255Y37316367D01* +X40619195Y37341527D01* +X40695633Y37382384D01* +X40762632Y37437368D01* +X40776411Y37454158D01* +X42557254Y39235000D01* +X42663259Y39235000D01* +X42663259Y38800000D01* +X42670210Y38729428D01* +X42679137Y38700000D01* +X42670210Y38670572D01* +X42663259Y38600000D01* +X42663259Y38150000D01* +X42670210Y38079428D01* +X42679137Y38050000D01* +X42670210Y38020572D01* +X42663259Y37950000D01* +X42663259Y37500000D01* +X42670210Y37429428D01* +X42679137Y37400000D01* +X42670210Y37370572D01* +X42663259Y37300000D01* +X42663259Y36850000D01* +X42670210Y36779428D01* +X42690795Y36711568D01* +X42724223Y36649027D01* +X42769210Y36594210D01* +X42824027Y36549223D01* +X42886568Y36515795D01* +X42954428Y36495210D01* +X43025000Y36488259D01* +X44775000Y36488259D01* +X44845572Y36495210D01* +X44913432Y36515795D01* +X44975973Y36549223D01* +X45030790Y36594210D01* +X45031438Y36595000D01* +X45401433Y36595000D01* +X45425000Y36592679D01* +X45448567Y36595000D01* +X45448575Y36595000D01* +X45519096Y36601946D01* +X45609577Y36629393D01* +X45692964Y36673964D01* +X45766053Y36733947D01* +X45781083Y36752261D01* +X46122744Y37093921D01* +X46141053Y37108947D01* +X46156719Y37128035D01* +X46186024Y37163744D01* +X46201036Y37182036D01* +X46245607Y37265423D01* +X46257355Y37304152D01* +X46273054Y37355903D01* +X46274796Y37373595D01* +X46280000Y37426425D01* +X46280000Y37426432D01* +X46282321Y37449999D01* +X46280000Y37473566D01* +X46280000Y39276434D01* +X46282321Y39300001D01* +X46280000Y39323568D01* +X46280000Y39323575D01* +X46273054Y39394096D01* +X46272151Y39397075D01* +X46245607Y39484577D01* +X46242360Y39490651D01* +X46201036Y39567964D01* +X46162339Y39615116D01* +X46156081Y39622742D01* +X46156078Y39622745D01* +X46141053Y39641053D01* +X46122744Y39656079D01* +X45781083Y39997739D01* +X45766053Y40016053D01* +X45692964Y40076036D01* +X45609577Y40120607D01* +X45519096Y40148054D01* +X45448575Y40155000D01* +X45448567Y40155000D01* +X45425000Y40157321D01* +X45401433Y40155000D01* +X45136741Y40155000D01* +X45136741Y40550000D01* +X45129790Y40620572D01* +X45120863Y40650000D01* +X45129790Y40679428D01* +X45136741Y40750000D01* +X45136741Y41200000D01* +X45129790Y41270572D01* +X45109205Y41338432D01* +X45097677Y41360000D01* +X47267747Y41360000D01* +X49862223Y38765523D01* +G37* +G04 #@! TD.AperFunction* +D35* +X77340000Y44234996D02* +X77353779Y44165727D01* +X77315603Y44134397D01* +X77240303Y44042643D01* +X77184349Y43937961D01* +X77149893Y43824375D01* +X77138259Y43706250D01* +X77138259Y42793750D01* +X77149893Y42675625D01* +X77184349Y42562039D01* +X77240303Y42457357D01* +X77315603Y42365603D01* +X77407357Y42290303D01* +X77462375Y42260895D01* +X77421246Y42238911D01* +X77333281Y42166719D01* +X77261089Y42078754D01* +X77250000Y42058008D01* +X77238911Y42078754D01* +X77166719Y42166719D01* +X77078754Y42238911D01* +X76978394Y42292554D01* +X76869498Y42325587D01* +X76756250Y42336741D01* +X76318750Y42336741D01* +X76205502Y42325587D01* +X76096606Y42292554D01* +X75996246Y42238911D01* +X75908281Y42166719D01* +X75836089Y42078754D01* +X75782446Y41978394D01* +X75749413Y41869498D01* +X75738259Y41756250D01* +X75738259Y41243750D01* +X75749413Y41130502D01* +X75782446Y41021606D01* +X75836089Y40921246D01* +X75908281Y40833281D01* +X75996246Y40761089D01* +X76032444Y40741741D01* +X75425000Y40741741D01* +X75415819Y40740837D01* +X75404558Y40754558D01* +X75350005Y40799329D01* +X75287766Y40832597D01* +X75220233Y40853083D01* +X75150000Y40860000D01* +X74061663Y40860000D01* +X74016202Y40911143D01* +X74015651Y40912961D01* +X73959697Y41017643D01* +X73884397Y41109397D01* +X73792643Y41184697D01* +X73744918Y41210207D01* +X73700005Y41249329D01* +X73680000Y41260022D01* +X73680000Y41516607D01* +X73683289Y41550001D01* +X73680000Y41583395D01* +X73680000Y41583404D01* +X73670161Y41683303D01* +X73631278Y41811484D01* +X73568135Y41929616D01* +X73483159Y42033159D01* +X73457205Y42054459D01* +X73392500Y42119164D01* +X73392500Y42375477D01* +X73459697Y42457357D01* +X73515651Y42562039D01* +X73550107Y42675625D01* +X73561741Y42793750D01* +X73561741Y43098519D01* +X73572500Y43207754D01* +X73572500Y44006277D01* +X73856224Y44290000D01* +X76357761Y44290000D01* +X76400000Y44285840D01* +X76442239Y44290000D01* +X77207761Y44290000D01* +X77250000Y44285840D01* +X77292239Y44290000D01* +X77292246Y44290000D01* +X77340000Y44294703D01* +X77340000Y44234996D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X77340000Y44234996D02* +G01* +X77353779Y44165727D01* +X77315603Y44134397D01* +X77240303Y44042643D01* +X77184349Y43937961D01* +X77149893Y43824375D01* +X77138259Y43706250D01* +X77138259Y42793750D01* +X77149893Y42675625D01* +X77184349Y42562039D01* +X77240303Y42457357D01* +X77315603Y42365603D01* +X77407357Y42290303D01* +X77462375Y42260895D01* +X77421246Y42238911D01* +X77333281Y42166719D01* +X77261089Y42078754D01* +X77250000Y42058008D01* +X77238911Y42078754D01* +X77166719Y42166719D01* +X77078754Y42238911D01* +X76978394Y42292554D01* +X76869498Y42325587D01* +X76756250Y42336741D01* +X76318750Y42336741D01* +X76205502Y42325587D01* +X76096606Y42292554D01* +X75996246Y42238911D01* +X75908281Y42166719D01* +X75836089Y42078754D01* +X75782446Y41978394D01* +X75749413Y41869498D01* +X75738259Y41756250D01* +X75738259Y41243750D01* +X75749413Y41130502D01* +X75782446Y41021606D01* +X75836089Y40921246D01* +X75908281Y40833281D01* +X75996246Y40761089D01* +X76032444Y40741741D01* +X75425000Y40741741D01* +X75415819Y40740837D01* +X75404558Y40754558D01* +X75350005Y40799329D01* +X75287766Y40832597D01* +X75220233Y40853083D01* +X75150000Y40860000D01* +X74061663Y40860000D01* +X74016202Y40911143D01* +X74015651Y40912961D01* +X73959697Y41017643D01* +X73884397Y41109397D01* +X73792643Y41184697D01* +X73744918Y41210207D01* +X73700005Y41249329D01* +X73680000Y41260022D01* +X73680000Y41516607D01* +X73683289Y41550001D01* +X73680000Y41583395D01* +X73680000Y41583404D01* +X73670161Y41683303D01* +X73631278Y41811484D01* +X73568135Y41929616D01* +X73483159Y42033159D01* +X73457205Y42054459D01* +X73392500Y42119164D01* +X73392500Y42375477D01* +X73459697Y42457357D01* +X73515651Y42562039D01* +X73550107Y42675625D01* +X73561741Y42793750D01* +X73561741Y43098519D01* +X73572500Y43207754D01* +X73572500Y44006277D01* +X73856224Y44290000D01* +X76357761Y44290000D01* +X76400000Y44285840D01* +X76442239Y44290000D01* +X77207761Y44290000D01* +X77250000Y44285840D01* +X77292239Y44290000D01* +X77292246Y44290000D01* +X77340000Y44294703D01* +X77340000Y44234996D01* +G37* +G04 #@! TD.AperFunction* +D36* +X75970000Y38416862D02* +X75970000Y37150000D01* +X75971537Y37134393D01* +X75976090Y37119385D01* +X75986000Y37102000D01* +X76136000Y36902000D01* +X76146594Y36890437D01* +X76159241Y36881162D01* +X76173453Y36874533D01* +X76188686Y36870804D01* +X76200000Y36870000D01* +X77650000Y36870000D01* +X77665607Y36871537D01* +X77680615Y36876090D01* +X77694446Y36883482D01* +X77706569Y36893431D01* +X77716518Y36905554D01* +X77723910Y36919385D01* +X77728463Y36934393D01* +X77730000Y36950000D01* +X77730000Y37374533D01* +X77765622Y37427845D01* +X77800976Y37513198D01* +X77819000Y37603808D01* +X77819000Y37696192D01* +X77800976Y37786802D01* +X77765622Y37872155D01* +X77730000Y37925467D01* +X77730000Y38266862D01* +X77933138Y38470000D01* +X81120000Y38470000D01* +X81120000Y36129307D01* +X77988277Y36102075D01* +X77970974Y36107324D01* +X77881250Y36116161D01* +X77443750Y36116161D01* +X77354026Y36107324D01* +X77317495Y36096242D01* +X76602986Y36090029D01* +X76545974Y36107324D01* +X76456250Y36116161D01* +X76018750Y36116161D01* +X75929026Y36107324D01* +X75850442Y36083485D01* +X75530000Y36080699D01* +X75530000Y38150000D01* +X75528463Y38165607D01* +X75523910Y38180615D01* +X75516518Y38194446D01* +X75506569Y38206569D01* +X75256569Y38456569D01* +X75244446Y38466518D01* +X75230615Y38473910D01* +X75215607Y38478463D01* +X75200000Y38480000D01* +X74450000Y38480000D01* +X74434393Y38478463D01* +X74419385Y38473910D01* +X74412072Y38470438D01* +X73779830Y38130000D01* +X72330000Y38130000D01* +X72330000Y39070000D01* +X75316862Y39070000D01* +X75970000Y38416862D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X75970000Y38416862D02* +G01* +X75970000Y37150000D01* +X75971537Y37134393D01* +X75976090Y37119385D01* +X75986000Y37102000D01* +X76136000Y36902000D01* +X76146594Y36890437D01* +X76159241Y36881162D01* +X76173453Y36874533D01* +X76188686Y36870804D01* +X76200000Y36870000D01* +X77650000Y36870000D01* +X77665607Y36871537D01* +X77680615Y36876090D01* +X77694446Y36883482D01* +X77706569Y36893431D01* +X77716518Y36905554D01* +X77723910Y36919385D01* +X77728463Y36934393D01* +X77730000Y36950000D01* +X77730000Y37374533D01* +X77765622Y37427845D01* +X77800976Y37513198D01* +X77819000Y37603808D01* +X77819000Y37696192D01* +X77800976Y37786802D01* +X77765622Y37872155D01* +X77730000Y37925467D01* +X77730000Y38266862D01* +X77933138Y38470000D01* +X81120000Y38470000D01* +X81120000Y36129307D01* +X77988277Y36102075D01* +X77970974Y36107324D01* +X77881250Y36116161D01* +X77443750Y36116161D01* +X77354026Y36107324D01* +X77317495Y36096242D01* +X76602986Y36090029D01* +X76545974Y36107324D01* +X76456250Y36116161D01* +X76018750Y36116161D01* +X75929026Y36107324D01* +X75850442Y36083485D01* +X75530000Y36080699D01* +X75530000Y38150000D01* +X75528463Y38165607D01* +X75523910Y38180615D01* +X75516518Y38194446D01* +X75506569Y38206569D01* +X75256569Y38456569D01* +X75244446Y38466518D01* +X75230615Y38473910D01* +X75215607Y38478463D01* +X75200000Y38480000D01* +X74450000Y38480000D01* +X74434393Y38478463D01* +X74419385Y38473910D01* +X74412072Y38470438D01* +X73779830Y38130000D01* +X72330000Y38130000D01* +X72330000Y39070000D01* +X75316862Y39070000D01* +X75970000Y38416862D01* +G37* +G04 #@! TD.AperFunction* +D36* +X71470000Y38150000D02* +X71471537Y38134393D01* +X71476090Y38119385D01* +X71483482Y38105554D01* +X71493431Y38093431D01* +X72093431Y37493431D01* +X72105554Y37483482D01* +X72119385Y37476090D01* +X72134393Y37471537D01* +X72150000Y37470000D01* +X73800000Y37470000D01* +X73815607Y37471537D01* +X73830615Y37476090D01* +X73844446Y37483482D01* +X73856569Y37493431D01* +X74483138Y38120000D01* +X75070000Y38120000D01* +X75070000Y36780000D01* +X71183138Y36780000D01* +X70056569Y37906569D01* +X70044446Y37916518D01* +X70030615Y37923910D01* +X70015607Y37928463D01* +X70000000Y37930000D01* +X68386301Y37930000D01* +X67957551Y38420000D01* +X71250000Y38420000D01* +X71265607Y38421537D01* +X71280615Y38426090D01* +X71294446Y38433482D01* +X71306569Y38443431D01* +X71316518Y38455554D01* +X71323910Y38469385D01* +X71328463Y38484393D01* +X71330000Y38500000D01* +X71330000Y39370000D01* +X71470000Y39370000D01* +X71470000Y38150000D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X71470000Y38150000D02* +G01* +X71471537Y38134393D01* +X71476090Y38119385D01* +X71483482Y38105554D01* +X71493431Y38093431D01* +X72093431Y37493431D01* +X72105554Y37483482D01* +X72119385Y37476090D01* +X72134393Y37471537D01* +X72150000Y37470000D01* +X73800000Y37470000D01* +X73815607Y37471537D01* +X73830615Y37476090D01* +X73844446Y37483482D01* +X73856569Y37493431D01* +X74483138Y38120000D01* +X75070000Y38120000D01* +X75070000Y36780000D01* +X71183138Y36780000D01* +X70056569Y37906569D01* +X70044446Y37916518D01* +X70030615Y37923910D01* +X70015607Y37928463D01* +X70000000Y37930000D01* +X68386301Y37930000D01* +X67957551Y38420000D01* +X71250000Y38420000D01* +X71265607Y38421537D01* +X71280615Y38426090D01* +X71294446Y38433482D01* +X71306569Y38443431D01* +X71316518Y38455554D01* +X71323910Y38469385D01* +X71328463Y38484393D01* +X71330000Y38500000D01* +X71330000Y39370000D01* +X71470000Y39370000D01* +X71470000Y38150000D01* +G37* +G04 #@! TD.AperFunction* +D36* +X81870000Y38830000D02* +X77850000Y38830000D01* +X77834393Y38828463D01* +X77819385Y38823910D01* +X77805554Y38816518D01* +X77793431Y38806569D01* +X77416862Y38430000D01* +X76433138Y38430000D01* +X75530000Y39333138D01* +X75530000Y40270000D01* +X76020000Y40270000D01* +X76020000Y39300000D01* +X76021537Y39284393D01* +X76026090Y39269385D01* +X76033482Y39255554D01* +X76043431Y39243431D01* +X76058840Y39231401D01* +X76229180Y39129197D01* +X76241018Y39119482D01* +X76280907Y39098161D01* +X76308840Y39081401D01* +X76323014Y39074689D01* +X76338225Y39070871D01* +X76350000Y39070000D01* +X77050000Y39070000D01* +X77065607Y39071537D01* +X77080615Y39076090D01* +X77094376Y39083436D01* +X77113119Y39095931D01* +X77117288Y39097196D01* +X77158982Y39119482D01* +X77195527Y39149473D01* +X77198058Y39152558D01* +X77244376Y39183436D01* +X77256509Y39193372D01* +X77266471Y39205485D01* +X77273878Y39219308D01* +X77278446Y39234311D01* +X77280000Y39250000D01* +X77280000Y40470000D01* +X78300000Y40470000D01* +X78315607Y40471537D01* +X78330615Y40476090D01* +X78344446Y40483482D01* +X78356569Y40493431D01* +X78706569Y40843431D01* +X78716518Y40855554D01* +X78723910Y40869385D01* +X78728463Y40884393D01* +X78730000Y40900000D01* +X78730000Y42170000D01* +X80850000Y42170000D01* +X80865607Y42171537D01* +X80880615Y42176090D01* +X80894446Y42183482D01* +X80906569Y42193431D01* +X80916518Y42205554D01* +X80923910Y42219385D01* +X80928463Y42234393D01* +X80930000Y42250000D01* +X80930000Y43970000D01* +X81870000Y43970000D01* +X81870000Y38830000D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X81870000Y38830000D02* +G01* +X77850000Y38830000D01* +X77834393Y38828463D01* +X77819385Y38823910D01* +X77805554Y38816518D01* +X77793431Y38806569D01* +X77416862Y38430000D01* +X76433138Y38430000D01* +X75530000Y39333138D01* +X75530000Y40270000D01* +X76020000Y40270000D01* +X76020000Y39300000D01* +X76021537Y39284393D01* +X76026090Y39269385D01* +X76033482Y39255554D01* +X76043431Y39243431D01* +X76058840Y39231401D01* +X76229180Y39129197D01* +X76241018Y39119482D01* +X76280907Y39098161D01* +X76308840Y39081401D01* +X76323014Y39074689D01* +X76338225Y39070871D01* +X76350000Y39070000D01* +X77050000Y39070000D01* +X77065607Y39071537D01* +X77080615Y39076090D01* +X77094376Y39083436D01* +X77113119Y39095931D01* +X77117288Y39097196D01* +X77158982Y39119482D01* +X77195527Y39149473D01* +X77198058Y39152558D01* +X77244376Y39183436D01* +X77256509Y39193372D01* +X77266471Y39205485D01* +X77273878Y39219308D01* +X77278446Y39234311D01* +X77280000Y39250000D01* +X77280000Y40470000D01* +X78300000Y40470000D01* +X78315607Y40471537D01* +X78330615Y40476090D01* +X78344446Y40483482D01* +X78356569Y40493431D01* +X78706569Y40843431D01* +X78716518Y40855554D01* +X78723910Y40869385D01* +X78728463Y40884393D01* +X78730000Y40900000D01* +X78730000Y42170000D01* +X80850000Y42170000D01* +X80865607Y42171537D01* +X80880615Y42176090D01* +X80894446Y42183482D01* +X80906569Y42193431D01* +X80916518Y42205554D01* +X80923910Y42219385D01* +X80928463Y42234393D01* +X80930000Y42250000D01* +X80930000Y43970000D01* +X81870000Y43970000D01* +X81870000Y38830000D01* +G37* +G04 #@! TD.AperFunction* +D36* +X71062085Y42420533D02* +X71770000Y41571035D01* +X71770000Y40950000D01* +X71771537Y40934393D01* +X71776090Y40919385D01* +X71783482Y40905554D01* +X71793431Y40893431D01* +X71805554Y40883482D01* +X71819385Y40876090D01* +X71834393Y40871537D01* +X71850000Y40870000D01* +X73464075Y40870000D01* +X73840207Y40446851D01* +X73851725Y40436207D01* +X73865098Y40428015D01* +X73879812Y40422589D01* +X73900000Y40420000D01* +X75070000Y40420000D01* +X75070000Y39430000D01* +X72172158Y39430000D01* +X70980000Y40145295D01* +X70980000Y40700000D01* +X70978463Y40715607D01* +X70973910Y40730615D01* +X70966518Y40744446D01* +X70956569Y40756569D01* +X70944446Y40766518D01* +X70930615Y40773910D01* +X70915607Y40778463D01* +X70900000Y40780000D01* +X67680000Y40780000D01* +X67680000Y42468849D01* +X71062085Y42420533D01* +G04 #@! TA.AperFunction,Conductor* +D40* +G36* +X71062085Y42420533D02* +G01* +X71770000Y41571035D01* +X71770000Y40950000D01* +X71771537Y40934393D01* +X71776090Y40919385D01* +X71783482Y40905554D01* +X71793431Y40893431D01* +X71805554Y40883482D01* +X71819385Y40876090D01* +X71834393Y40871537D01* +X71850000Y40870000D01* +X73464075Y40870000D01* +X73840207Y40446851D01* +X73851725Y40436207D01* +X73865098Y40428015D01* +X73879812Y40422589D01* +X73900000Y40420000D01* +X75070000Y40420000D01* +X75070000Y39430000D01* +X72172158Y39430000D01* +X70980000Y40145295D01* +X70980000Y40700000D01* +X70978463Y40715607D01* +X70973910Y40730615D01* +X70966518Y40744446D01* +X70956569Y40756569D01* +X70944446Y40766518D01* +X70930615Y40773910D01* +X70915607Y40778463D01* +X70900000Y40780000D01* +X67680000Y40780000D01* +X67680000Y42468849D01* +X71062085Y42420533D01* +G37* +G04 #@! TD.AperFunction* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-F_Mask.gts b/pcb/gerbers/current-sense-gerbers/current-sense-F_Mask.gts new file mode 100644 index 0000000..6443cf9 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-F_Mask.gts @@ -0,0 +1,6368 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Soldermask,Top* +G04 #@! TF.FilePolarity,Negative* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%ADD10O,1.800000X2.100000*% +%ADD11C,1.900000*% +%ADD12C,0.100000*% +%ADD13O,1.600000X2.600000*% +%ADD14O,2.300000X3.600000*% +%ADD15C,2.200000*% +%ADD16C,1.850000*% +%ADD17C,2.100000*% +%ADD18C,2.350000*% +%ADD19C,0.900000*% +%ADD20C,6.500000*% +%ADD21O,0.887000X0.887000*% +%ADD22C,1.091000*% +G04 APERTURE END LIST* +G36* +G01* +X56475000Y42275000D02* +X56475000Y41725000D01* +G75* +G02* +X56225000Y41475000I-250000J0D01* +G01* +X55725000Y41475000D01* +G75* +G02* +X55475000Y41725000I0J250000D01* +G01* +X55475000Y42275000D01* +G75* +G02* +X55725000Y42525000I250000J0D01* +G01* +X56225000Y42525000D01* +G75* +G02* +X56475000Y42275000I0J-250000D01* +G01* +G37* +G36* +G01* +X58025000Y42275000D02* +X58025000Y41725000D01* +G75* +G02* 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+G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L2,Inr* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ComponentPad* +%ADD10O,1.700000X2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD11C,1.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD12R,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD13O,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD14O,2.200000X3.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD15C,2.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD16C,1.750000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD17C,2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD18C,2.250000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD19C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD20C,6.400000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD21C,0.600000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD22C,0.458000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD23C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD24C,0.240000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD25C,0.160000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD26C,0.200000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD27C,0.100000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X86000000Y46700000D03* +G04 #@! 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TA.AperFunction,Conductor* +D27* +G36* +X-26380000Y38344020D02* +G01* +X-27229700Y38344020D01* +X-27330192Y38444512D01* +X-27330192Y38507156D01* +X-27348216Y38597766D01* +X-27383570Y38683119D01* +X-27434896Y38759934D01* +X-27500222Y38825260D01* +X-27577037Y38876586D01* +X-27662390Y38911940D01* +X-27753000Y38929964D01* +X-27845384Y38929964D01* +X-27935994Y38911940D01* +X-28021347Y38876586D01* +X-28098162Y38825260D01* +X-28163488Y38759934D01* +X-28214814Y38683119D01* +X-28250168Y38597766D01* +X-28268192Y38507156D01* +X-28268192Y38414772D01* +X-28250168Y38324162D01* +X-28214814Y38238809D01* +X-28186538Y38196491D01* +X-28206513Y38176516D01* +X-28257839Y38099701D01* +X-28293193Y38014348D01* +X-28311217Y37923738D01* +X-28311217Y37831354D01* +X-28293193Y37740744D01* +X-28257839Y37655391D01* +X-28226404Y37608344D01* +X-28242147Y37592601D01* +X-28293473Y37515786D01* +X-28328827Y37430433D01* +X-28346851Y37339823D01* +X-28346851Y37247439D01* +X-28328827Y37156829D01* +X-28293473Y37071476D01* +X-28258068Y37018488D01* +X-28268369Y37008187D01* +X-28319695Y36931372D01* +X-28355049Y36846019D01* +X-28373073Y36755409D01* +X-28373073Y36663025D01* +X-28355049Y36572415D01* +X-28319695Y36487062D01* +X-28268369Y36410247D01* +X-28203043Y36344921D01* +X-28126228Y36293595D01* +X-28046968Y36260765D01* +X-28122155Y36229622D01* +X-28198970Y36178296D01* +X-28264296Y36112970D01* +X-28315622Y36036155D01* +X-28350976Y35950802D01* +X-28369000Y35860192D01* +X-28369000Y35767808D01* +X-28350976Y35677198D01* +X-28315622Y35591845D01* +X-28264296Y35515030D01* +X-28198970Y35449704D01* +X-28122155Y35398378D01* +X-28036802Y35363024D01* +X-27946192Y35345000D01* +X-27853808Y35345000D01* +X-27763198Y35363024D01* +X-27677845Y35398378D01* +X-27658397Y35411373D01* +X-26896303Y35411373D01* +X-26878627Y35409632D01* +X-26808055Y35416583D01* +X-26740195Y35437168D01* +X-26677654Y35470596D01* +X-26622837Y35515583D01* +X-26611561Y35529323D01* +X-26380000Y35760884D01* +X-26380000Y35303500D01* +X-28420000Y35303500D01* +X-28420000Y39696500D01* +X-26380000Y39696500D01* +X-26380000Y38344020D01* +G37* +G04 #@! TD.AperFunction* +D26* +X89150000Y32291422D02* +X85958578Y29100000D01* +X37100000Y29100000D01* +X37100000Y30309095D01* +X38950000Y30309095D01* +X38950000Y30190905D01* +X38973058Y30074986D01* +X39018287Y29965793D01* +X39083950Y29867522D01* +X39167522Y29783950D01* +X39265793Y29718287D01* +X39374986Y29673058D01* +X39490905Y29650000D01* +X39609095Y29650000D01* +X39725014Y29673058D01* +X39834207Y29718287D01* +X39932478Y29783950D01* +X40016050Y29867522D01* +X40081713Y29965793D01* +X40126942Y30074986D01* +X40150000Y30190905D01* +X40150000Y30309095D01* +X40126942Y30425014D01* +X40081713Y30534207D01* +X40016050Y30632478D01* +X39932478Y30716050D01* +X39834207Y30781713D01* +X39725014Y30826942D01* +X39609095Y30850000D01* +X39490905Y30850000D01* +X39374986Y30826942D01* +X39265793Y30781713D01* +X39167522Y30716050D01* +X39083950Y30632478D01* +X39018287Y30534207D01* +X38973058Y30425014D01* +X38950000Y30309095D01* +X37100000Y30309095D01* +X37100000Y31509095D01* +X57800000Y31509095D01* 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TD.AperFunction* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense-In2_Cu.g3 b/pcb/gerbers/current-sense-gerbers/current-sense-In2_Cu.g3 new file mode 100644 index 0000000..789f460 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense-In2_Cu.g3 @@ -0,0 +1,9809 @@ +G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.8-db9833491~87~ubuntu20.04.1* +G04 #@! TF.CreationDate,2020-12-10T20:16:12-08:00* +G04 #@! TF.ProjectId,current-sense,63757272-656e-4742-9d73-656e73652e6b,rev?* +G04 #@! TF.SameCoordinates,Original* +G04 #@! TF.FileFunction,Copper,L3,Inr* +G04 #@! TF.FilePolarity,Positive* +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 5.1.8-db9833491~87~ubuntu20.04.1) date 2020-12-10 20:16:12* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 #@! TA.AperFunction,ComponentPad* +%ADD10O,1.700000X2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD11C,1.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD12R,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD13O,1.500000X2.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD14O,2.200000X3.500000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD15C,2.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD16C,1.750000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD17C,2.000000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD18C,2.250000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD19C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ComponentPad* +%ADD20C,6.400000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD21C,0.600000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD22C,0.458000*% +G04 #@! TD* +G04 #@! TA.AperFunction,ViaPad* +%ADD23C,0.800000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD24C,0.360000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD25C,0.240000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD26C,0.640000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD27C,0.200000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD28C,0.100000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD29C,0.160000*% +G04 #@! TD* +G04 #@! TA.AperFunction,Conductor* +%ADD30C,0.254000*% +G04 #@! TD* +G04 APERTURE END LIST* +D10* +X86000000Y46700000D03* +G04 #@! TA.AperFunction,ComponentPad* +G36* +G01* +X89350000Y47450000D02* +X89350000Y45950000D01* +G75* +G02* +X89100000Y45700000I-250000J0D01* +G01* +X87900000Y45700000D01* +G75* +G02* +X87650000Y45950000I0J250000D01* +G01* +X87650000Y47450000D01* +G75* +G02* +X87900000Y47700000I250000J0D01* +G01* +X89100000Y47700000D01* +G75* +G02* +X89350000Y47450000I0J-250000D01* +G01* +G37* +G04 #@! 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TA.AperFunction,Conductor* +D28* +G36* +X10400000Y40295882D02* +G01* +X10325014Y40326942D01* +X10209095Y40350000D01* +X10090905Y40350000D01* +X9974986Y40326942D01* +X9865793Y40281713D01* +X9767522Y40216050D01* +X9683950Y40132478D01* +X9618287Y40034207D01* +X9573058Y39925014D01* +X9550000Y39809095D01* +X9550000Y39690905D01* +X9573058Y39574986D01* +X9618287Y39465793D01* +X9683950Y39367522D01* +X9767522Y39283950D01* +X9865793Y39218287D01* +X9974986Y39173058D01* +X10090905Y39150000D01* +X10209095Y39150000D01* +X10325014Y39173058D01* +X10400000Y39204118D01* +X10400000Y35795882D01* +X10325014Y35826942D01* +X10209095Y35850000D01* +X10090905Y35850000D01* +X9974986Y35826942D01* +X9865793Y35781713D01* +X9767522Y35716050D01* +X9683950Y35632478D01* +X9618287Y35534207D01* +X9573058Y35425014D01* +X9550000Y35309095D01* +X9550000Y35190905D01* +X9573058Y35074986D01* +X9618287Y34965793D01* +X9683950Y34867522D01* +X9767522Y34783950D01* +X9865793Y34718287D01* +X9974986Y34673058D01* +X10090905Y34650000D01* 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TA.AperFunction,Conductor* +D28* +G36* +X96909970Y49583109D02* +G01* +X97544810Y49391440D01* +X98130325Y49080116D01* +X98644221Y48660991D01* +X99066920Y48150036D01* +X99382324Y47566707D01* +X99578419Y46933228D01* +X99649473Y46257204D01* +X99649500Y46249357D01* +X99649500Y41030951D01* +X99514531Y41084926D01* +X98469605Y40040000D01* +X99514531Y38995074D01* +X99649500Y39049049D01* +X99649501Y35950951D01* +X99514531Y36004926D01* +X98469605Y34960000D01* +X99514531Y33915074D01* +X99649501Y33969049D01* +X99649501Y28767151D01* +X99583109Y28090026D01* +X99391439Y27455189D01* +X99080116Y26869675D01* +X98660994Y26355781D01* +X98150036Y25933080D01* +X97566708Y25617676D01* +X96933227Y25421581D01* +X96257203Y25350527D01* +X96249357Y25350500D01* +X38127000Y25350500D01* +X38127000Y26549119D01* +X93228724Y26549119D01* +X93588912Y26059452D01* +X94252882Y25699151D01* +X94974385Y25475306D01* +X95725695Y25396520D01* +X96477938Y25465822D01* +X97202208Y25680548D01* +X97870670Y26032445D01* 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TD.AperFunction* +M02* diff --git a/pcb/gerbers/current-sense-gerbers/current-sense.drl b/pcb/gerbers/current-sense-gerbers/current-sense.drl new file mode 100644 index 0000000..0105fa9 --- /dev/null +++ b/pcb/gerbers/current-sense-gerbers/current-sense.drl @@ -0,0 +1,314 @@ +M48 +; DRILL file {KiCad 5.1.8-db9833491~87~ubuntu20.04.1} date Thu Dec 10 20:16:17 2020 +; FORMAT={-:-/ absolute / inch / decimal} +; #@! TF.CreationDate,2020-12-10T20:16:17-08:00 +; #@! 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